./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 0cd3be1d Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2f4049400be941342f32e9ba06dfe9aa51e5b146 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2f4049400be941342f32e9ba06dfe9aa51e5b146 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Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.23-0cd3be1 [2018-11-28 13:19:16,702 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 13:19:16,704 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 13:19:16,713 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 13:19:16,713 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 13:19:16,714 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 13:19:16,715 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 13:19:16,716 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 13:19:16,718 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 13:19:16,718 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 13:19:16,719 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 13:19:16,719 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 13:19:16,720 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 13:19:16,720 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 13:19:16,721 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 13:19:16,722 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 13:19:16,722 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 13:19:16,723 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 13:19:16,724 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 13:19:16,725 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 13:19:16,726 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 13:19:16,727 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 13:19:16,728 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 13:19:16,729 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 13:19:16,729 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 13:19:16,729 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 13:19:16,730 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 13:19:16,730 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 13:19:16,731 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 13:19:16,732 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 13:19:16,732 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 13:19:16,732 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 13:19:16,732 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 13:19:16,733 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 13:19:16,733 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 13:19:16,734 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 13:19:16,734 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-11-28 13:19:16,741 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 13:19:16,741 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 13:19:16,742 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 13:19:16,742 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 13:19:16,742 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 13:19:16,742 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 13:19:16,743 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 13:19:16,743 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 13:19:16,743 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 13:19:16,743 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-28 13:19:16,743 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 13:19:16,743 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 13:19:16,743 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 13:19:16,744 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-11-28 13:19:16,744 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-11-28 13:19:16,744 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-11-28 13:19:16,744 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 13:19:16,744 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 13:19:16,744 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 13:19:16,745 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 13:19:16,745 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 13:19:16,745 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 13:19:16,745 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 13:19:16,745 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 13:19:16,745 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 13:19:16,745 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 13:19:16,746 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-28 13:19:16,746 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 13:19:16,746 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2f4049400be941342f32e9ba06dfe9aa51e5b146 [2018-11-28 13:19:16,770 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 13:19:16,779 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 13:19:16,781 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 13:19:16,782 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 13:19:16,783 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 13:19:16,783 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-11-28 13:19:16,827 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/data/cefcff6a9/02acf73652eb439d9f9cb0069450c4df/FLAG292046189 [2018-11-28 13:19:17,296 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 13:19:17,296 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-11-28 13:19:17,305 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/data/cefcff6a9/02acf73652eb439d9f9cb0069450c4df/FLAG292046189 [2018-11-28 13:19:17,801 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/data/cefcff6a9/02acf73652eb439d9f9cb0069450c4df [2018-11-28 13:19:17,803 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 13:19:17,804 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-11-28 13:19:17,805 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 13:19:17,805 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 13:19:17,808 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 13:19:17,809 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 01:19:17" (1/1) ... [2018-11-28 13:19:17,811 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3711ebb6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:19:17, skipping insertion in model container [2018-11-28 13:19:17,811 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 01:19:17" (1/1) ... [2018-11-28 13:19:17,815 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 13:19:17,846 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 13:19:18,110 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 13:19:18,122 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 13:19:18,162 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 13:19:18,207 INFO L195 MainTranslator]: Completed translation [2018-11-28 13:19:18,207 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:19:18 WrapperNode [2018-11-28 13:19:18,207 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 13:19:18,208 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 13:19:18,208 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 13:19:18,208 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 13:19:18,217 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:19:18" (1/1) ... [2018-11-28 13:19:18,217 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:19:18" (1/1) ... [2018-11-28 13:19:18,229 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:19:18" (1/1) ... [2018-11-28 13:19:18,229 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:19:18" (1/1) ... [2018-11-28 13:19:18,247 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:19:18" (1/1) ... [2018-11-28 13:19:18,250 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:19:18" (1/1) ... [2018-11-28 13:19:18,253 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:19:18" (1/1) ... [2018-11-28 13:19:18,260 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 13:19:18,260 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 13:19:18,260 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 13:19:18,260 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 13:19:18,261 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:19:18" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 13:19:18,294 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-28 13:19:18,294 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 13:19:18,294 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-11-28 13:19:18,295 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-11-28 13:19:18,295 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-11-28 13:19:18,295 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-11-28 13:19:18,295 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-11-28 13:19:18,295 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-11-28 13:19:18,295 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-11-28 13:19:18,295 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-11-28 13:19:18,295 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-11-28 13:19:18,295 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-11-28 13:19:18,295 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-11-28 13:19:18,296 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-11-28 13:19:18,296 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-11-28 13:19:18,296 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-11-28 13:19:18,296 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-11-28 13:19:18,296 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-11-28 13:19:18,296 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-11-28 13:19:18,296 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-11-28 13:19:18,296 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-11-28 13:19:18,296 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-11-28 13:19:18,297 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-11-28 13:19:18,297 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-11-28 13:19:18,297 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-11-28 13:19:18,297 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-11-28 13:19:18,297 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-11-28 13:19:18,297 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-11-28 13:19:18,297 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-11-28 13:19:18,297 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-11-28 13:19:18,297 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-11-28 13:19:18,297 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-11-28 13:19:18,298 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-11-28 13:19:18,298 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-11-28 13:19:18,298 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-11-28 13:19:18,298 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-11-28 13:19:18,298 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-11-28 13:19:18,298 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-11-28 13:19:18,298 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_get_clientdata [2018-11-28 13:19:18,298 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_set_clientdata [2018-11-28 13:19:18,298 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_3_11 [2018-11-28 13:19:18,299 INFO L138 BoogieDeclarations]: Found implementation of procedure free_11 [2018-11-28 13:19:18,299 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-11-28 13:19:18,299 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-28 13:19:18,299 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-11-28 13:19:18,299 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-11-28 13:19:18,299 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-11-28 13:19:18,299 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-11-28 13:19:18,299 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-11-28 13:19:18,299 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-11-28 13:19:18,300 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-11-28 13:19:18,300 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-11-28 13:19:18,300 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-11-28 13:19:18,300 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-11-28 13:19:18,300 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-11-28 13:19:18,300 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-11-28 13:19:18,300 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-11-28 13:19:18,300 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-11-28 13:19:18,300 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-11-28 13:19:18,301 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-11-28 13:19:18,301 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-11-28 13:19:18,301 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-11-28 13:19:18,301 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-11-28 13:19:18,301 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-11-28 13:19:18,301 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-11-28 13:19:18,301 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-11-28 13:19:18,301 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-11-28 13:19:18,301 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-11-28 13:19:18,302 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-11-28 13:19:18,302 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-11-28 13:19:18,302 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-11-28 13:19:18,302 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-11-28 13:19:18,302 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-11-28 13:19:18,302 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-11-28 13:19:18,302 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-11-28 13:19:18,302 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-11-28 13:19:18,302 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-11-28 13:19:18,303 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-11-28 13:19:18,303 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-11-28 13:19:18,303 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-11-28 13:19:18,303 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-11-28 13:19:18,303 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-11-28 13:19:18,303 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-11-28 13:19:18,303 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-11-28 13:19:18,303 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-11-28 13:19:18,303 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-11-28 13:19:18,304 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-11-28 13:19:18,304 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-11-28 13:19:18,304 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-11-28 13:19:18,304 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-11-28 13:19:18,304 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-11-28 13:19:18,304 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-11-28 13:19:18,304 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-11-28 13:19:18,304 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-11-28 13:19:18,304 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-11-28 13:19:18,304 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-11-28 13:19:18,305 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-11-28 13:19:18,305 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-11-28 13:19:18,305 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-11-28 13:19:18,305 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-11-28 13:19:18,305 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-11-28 13:19:18,305 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-11-28 13:19:18,305 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-11-28 13:19:18,305 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-11-28 13:19:18,305 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-11-28 13:19:18,306 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-11-28 13:19:18,306 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-11-28 13:19:18,306 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-11-28 13:19:18,306 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-11-28 13:19:18,306 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-11-28 13:19:18,306 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-11-28 13:19:18,306 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-11-28 13:19:18,306 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-11-28 13:19:18,306 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-11-28 13:19:18,306 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-11-28 13:19:18,307 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-11-28 13:19:18,307 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-11-28 13:19:18,307 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-11-28 13:19:18,307 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-11-28 13:19:18,307 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-11-28 13:19:18,307 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-11-28 13:19:18,307 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-11-28 13:19:18,307 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-11-28 13:19:18,307 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-11-28 13:19:18,308 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-11-28 13:19:18,308 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-11-28 13:19:18,308 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-11-28 13:19:18,308 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-11-28 13:19:18,308 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-11-28 13:19:18,308 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-11-28 13:19:18,308 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-11-28 13:19:18,308 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-11-28 13:19:18,308 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-11-28 13:19:18,309 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-11-28 13:19:18,309 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-11-28 13:19:18,309 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-11-28 13:19:18,309 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-11-28 13:19:18,309 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-11-28 13:19:18,309 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-11-28 13:19:18,309 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-11-28 13:19:18,309 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-11-28 13:19:18,309 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-11-28 13:19:18,309 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-11-28 13:19:18,310 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-11-28 13:19:18,310 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-11-28 13:19:18,310 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-11-28 13:19:18,310 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-11-28 13:19:18,310 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-11-28 13:19:18,310 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-11-28 13:19:18,310 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-28 13:19:18,310 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-28 13:19:18,310 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-11-28 13:19:18,311 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-11-28 13:19:18,311 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-11-28 13:19:18,311 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-11-28 13:19:18,311 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-11-28 13:19:18,311 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-11-28 13:19:18,311 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 13:19:18,311 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-11-28 13:19:18,311 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-11-28 13:19:18,311 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-11-28 13:19:18,312 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-28 13:19:18,312 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-11-28 13:19:18,312 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-11-28 13:19:18,312 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-11-28 13:19:18,312 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-28 13:19:18,312 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-11-28 13:19:18,312 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-11-28 13:19:18,312 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-11-28 13:19:18,312 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-11-28 13:19:18,312 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-11-28 13:19:18,313 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-11-28 13:19:18,313 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 13:19:18,313 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-11-28 13:19:18,313 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-11-28 13:19:18,313 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-11-28 13:19:18,313 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-11-28 13:19:18,313 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-11-28 13:19:18,313 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-28 13:19:18,313 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-28 13:19:18,313 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-11-28 13:19:18,314 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-11-28 13:19:18,314 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-11-28 13:19:18,314 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-11-28 13:19:18,314 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-11-28 13:19:18,314 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-11-28 13:19:18,314 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-11-28 13:19:18,314 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-11-28 13:19:18,314 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-11-28 13:19:18,314 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-11-28 13:19:18,315 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-11-28 13:19:18,315 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-11-28 13:19:18,315 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-11-28 13:19:18,315 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-11-28 13:19:18,315 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-11-28 13:19:18,315 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-11-28 13:19:18,315 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-11-28 13:19:18,315 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_get_clientdata [2018-11-28 13:19:18,315 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_set_clientdata [2018-11-28 13:19:18,315 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_3_11 [2018-11-28 13:19:18,316 INFO L130 BoogieDeclarations]: Found specification of procedure free_11 [2018-11-28 13:19:18,316 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-11-28 13:19:18,316 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-28 13:19:18,316 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-28 13:19:18,316 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-11-28 13:19:18,316 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 13:19:18,316 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-11-28 13:19:18,316 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-11-28 13:19:18,316 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-11-28 13:19:18,317 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2018-11-28 13:19:18,639 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-28 13:19:18,827 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-28 13:19:19,086 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 13:19:19,087 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-11-28 13:19:19,087 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 01:19:19 BoogieIcfgContainer [2018-11-28 13:19:19,087 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 13:19:19,088 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 13:19:19,088 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 13:19:19,090 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 13:19:19,090 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 01:19:17" (1/3) ... [2018-11-28 13:19:19,090 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5b6891d8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 01:19:19, skipping insertion in model container [2018-11-28 13:19:19,091 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:19:18" (2/3) ... [2018-11-28 13:19:19,091 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5b6891d8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 01:19:19, skipping insertion in model container [2018-11-28 13:19:19,091 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 01:19:19" (3/3) ... [2018-11-28 13:19:19,092 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-11-28 13:19:19,098 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 13:19:19,104 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 85 error locations. [2018-11-28 13:19:19,114 INFO L257 AbstractCegarLoop]: Starting to check reachability of 85 error locations. [2018-11-28 13:19:19,131 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 13:19:19,132 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 13:19:19,132 INFO L383 AbstractCegarLoop]: Hoare is false [2018-11-28 13:19:19,132 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 13:19:19,132 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 13:19:19,132 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 13:19:19,132 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 13:19:19,133 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 13:19:19,133 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 13:19:19,146 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states. [2018-11-28 13:19:19,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-28 13:19:19,153 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:19,153 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:19,155 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:19,159 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:19,159 INFO L82 PathProgramCache]: Analyzing trace with hash 1348674973, now seen corresponding path program 1 times [2018-11-28 13:19:19,161 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:19,161 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:19,194 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:19,195 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:19,195 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:19,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:19,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:19:19,328 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:19:19,328 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:19:19,331 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:19:19,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:19:19,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:19:19,346 INFO L87 Difference]: Start difference. First operand 170 states. Second operand 5 states. [2018-11-28 13:19:19,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:19,419 INFO L93 Difference]: Finished difference Result 132 states and 153 transitions. [2018-11-28 13:19:19,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:19:19,421 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-28 13:19:19,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:19,429 INFO L225 Difference]: With dead ends: 132 [2018-11-28 13:19:19,429 INFO L226 Difference]: Without dead ends: 129 [2018-11-28 13:19:19,430 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:19:19,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-11-28 13:19:19,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 101. [2018-11-28 13:19:19,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-11-28 13:19:19,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 113 transitions. [2018-11-28 13:19:19,467 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 113 transitions. Word has length 16 [2018-11-28 13:19:19,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:19,467 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 113 transitions. [2018-11-28 13:19:19,467 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:19:19,468 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 113 transitions. [2018-11-28 13:19:19,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-28 13:19:19,469 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:19,469 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:19,469 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:19,470 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:19,470 INFO L82 PathProgramCache]: Analyzing trace with hash -1203481988, now seen corresponding path program 1 times [2018-11-28 13:19:19,470 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:19,470 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:19,472 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:19,472 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:19,472 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:19,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:19,520 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:19:19,520 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:19:19,520 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-28 13:19:19,521 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 13:19:19,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 13:19:19,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 13:19:19,522 INFO L87 Difference]: Start difference. First operand 101 states and 113 transitions. Second operand 3 states. [2018-11-28 13:19:19,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:19,646 INFO L93 Difference]: Finished difference Result 144 states and 168 transitions. [2018-11-28 13:19:19,646 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 13:19:19,646 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-11-28 13:19:19,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:19,647 INFO L225 Difference]: With dead ends: 144 [2018-11-28 13:19:19,647 INFO L226 Difference]: Without dead ends: 141 [2018-11-28 13:19:19,648 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 13:19:19,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-11-28 13:19:19,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 97. [2018-11-28 13:19:19,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-11-28 13:19:19,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 105 transitions. [2018-11-28 13:19:19,654 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 105 transitions. Word has length 16 [2018-11-28 13:19:19,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:19,654 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 105 transitions. [2018-11-28 13:19:19,655 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 13:19:19,655 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 105 transitions. [2018-11-28 13:19:19,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-28 13:19:19,655 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:19,655 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:19,656 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:19,656 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:19,656 INFO L82 PathProgramCache]: Analyzing trace with hash -1252423737, now seen corresponding path program 1 times [2018-11-28 13:19:19,656 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:19,656 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:19,658 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:19,658 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:19,658 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:19,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:19,712 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:19:19,712 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:19:19,712 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:19:19,712 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:19:19,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:19:19,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:19:19,713 INFO L87 Difference]: Start difference. First operand 97 states and 105 transitions. Second operand 5 states. [2018-11-28 13:19:19,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:19,753 INFO L93 Difference]: Finished difference Result 126 states and 143 transitions. [2018-11-28 13:19:19,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:19:19,753 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-11-28 13:19:19,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:19,754 INFO L225 Difference]: With dead ends: 126 [2018-11-28 13:19:19,754 INFO L226 Difference]: Without dead ends: 126 [2018-11-28 13:19:19,754 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:19:19,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-11-28 13:19:19,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 101. [2018-11-28 13:19:19,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-11-28 13:19:19,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 112 transitions. [2018-11-28 13:19:19,761 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 112 transitions. Word has length 21 [2018-11-28 13:19:19,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:19,761 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 112 transitions. [2018-11-28 13:19:19,761 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:19:19,761 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 112 transitions. [2018-11-28 13:19:19,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-28 13:19:19,762 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:19,762 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:19,762 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:19,763 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:19,763 INFO L82 PathProgramCache]: Analyzing trace with hash -1252423700, now seen corresponding path program 1 times [2018-11-28 13:19:19,763 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:19,763 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:19,764 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:19,764 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:19,764 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:19,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:19,830 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:19:19,830 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:19:19,830 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:19:19,837 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:19,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:19,871 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:19:19,902 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:19:19,903 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:19,905 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:19,906 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:19:19,940 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:19,941 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:19,942 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-28 13:19:19,942 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:19,947 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:19:19,947 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-11-28 13:19:19,963 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:19:19,988 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:19:19,988 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7] total 8 [2018-11-28 13:19:19,989 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 13:19:19,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 13:19:19,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-28 13:19:19,989 INFO L87 Difference]: Start difference. First operand 101 states and 112 transitions. Second operand 9 states. [2018-11-28 13:19:20,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:20,487 INFO L93 Difference]: Finished difference Result 193 states and 229 transitions. [2018-11-28 13:19:20,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 13:19:20,488 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-11-28 13:19:20,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:20,490 INFO L225 Difference]: With dead ends: 193 [2018-11-28 13:19:20,490 INFO L226 Difference]: Without dead ends: 193 [2018-11-28 13:19:20,490 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 18 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2018-11-28 13:19:20,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-11-28 13:19:20,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 111. [2018-11-28 13:19:20,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-11-28 13:19:20,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 127 transitions. [2018-11-28 13:19:20,499 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 127 transitions. Word has length 21 [2018-11-28 13:19:20,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:20,499 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 127 transitions. [2018-11-28 13:19:20,499 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 13:19:20,499 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 127 transitions. [2018-11-28 13:19:20,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-28 13:19:20,500 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:20,500 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:20,500 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:20,501 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:20,501 INFO L82 PathProgramCache]: Analyzing trace with hash -1252423699, now seen corresponding path program 1 times [2018-11-28 13:19:20,501 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:20,502 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:20,503 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:20,504 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:20,504 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:20,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:20,643 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:19:20,643 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:19:20,643 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:19:20,661 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:20,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:20,684 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:19:20,703 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:19:20,703 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:20,709 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:19:20,710 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:20,715 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:20,715 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-11-28 13:19:20,745 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:20,746 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:20,747 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:19:20,747 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:20,754 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:19:20,754 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:20,759 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:20,759 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:19:20,779 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:19:20,794 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:19:20,794 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-11-28 13:19:20,794 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 13:19:20,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 13:19:20,794 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-11-28 13:19:20,794 INFO L87 Difference]: Start difference. First operand 111 states and 127 transitions. Second operand 10 states. [2018-11-28 13:19:21,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:21,429 INFO L93 Difference]: Finished difference Result 257 states and 303 transitions. [2018-11-28 13:19:21,429 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 13:19:21,429 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 21 [2018-11-28 13:19:21,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:21,431 INFO L225 Difference]: With dead ends: 257 [2018-11-28 13:19:21,431 INFO L226 Difference]: Without dead ends: 257 [2018-11-28 13:19:21,432 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 16 SyntacticMatches, 5 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=162, Unknown=0, NotChecked=0, Total=210 [2018-11-28 13:19:21,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-11-28 13:19:21,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 136. [2018-11-28 13:19:21,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-11-28 13:19:21,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 172 transitions. [2018-11-28 13:19:21,442 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 172 transitions. Word has length 21 [2018-11-28 13:19:21,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:21,442 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 172 transitions. [2018-11-28 13:19:21,442 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 13:19:21,442 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 172 transitions. [2018-11-28 13:19:21,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-28 13:19:21,443 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:21,443 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:21,443 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:21,443 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:21,443 INFO L82 PathProgramCache]: Analyzing trace with hash -1545826707, now seen corresponding path program 1 times [2018-11-28 13:19:21,444 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:21,444 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:21,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:21,445 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:21,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:21,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:21,482 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:19:21,482 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:19:21,482 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:19:21,489 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:21,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:21,501 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:19:21,512 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:19:21,526 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:19:21,527 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-11-28 13:19:21,527 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:19:21,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:19:21,527 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:19:21,527 INFO L87 Difference]: Start difference. First operand 136 states and 172 transitions. Second operand 5 states. [2018-11-28 13:19:21,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:21,540 INFO L93 Difference]: Finished difference Result 123 states and 148 transitions. [2018-11-28 13:19:21,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:19:21,541 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-11-28 13:19:21,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:21,541 INFO L225 Difference]: With dead ends: 123 [2018-11-28 13:19:21,542 INFO L226 Difference]: Without dead ends: 121 [2018-11-28 13:19:21,542 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 19 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:19:21,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-11-28 13:19:21,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2018-11-28 13:19:21,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-11-28 13:19:21,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 146 transitions. [2018-11-28 13:19:21,547 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 146 transitions. Word has length 21 [2018-11-28 13:19:21,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:21,547 INFO L480 AbstractCegarLoop]: Abstraction has 121 states and 146 transitions. [2018-11-28 13:19:21,547 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:19:21,547 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 146 transitions. [2018-11-28 13:19:21,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-28 13:19:21,548 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:21,548 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:21,549 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:21,549 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:21,549 INFO L82 PathProgramCache]: Analyzing trace with hash -817295485, now seen corresponding path program 1 times [2018-11-28 13:19:21,549 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:21,549 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:21,550 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:21,550 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:21,550 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:21,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:21,612 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:19:21,612 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:19:21,612 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:19:21,619 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:21,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:21,636 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:19:23,154 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:19:23,168 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:19:23,168 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6] total 9 [2018-11-28 13:19:23,169 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 13:19:23,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 13:19:23,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=63, Unknown=6, NotChecked=0, Total=90 [2018-11-28 13:19:23,169 INFO L87 Difference]: Start difference. First operand 121 states and 146 transitions. Second operand 10 states. [2018-11-28 13:19:23,732 WARN L180 SmtUtils]: Spent 513.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 11 [2018-11-28 13:19:23,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:23,953 INFO L93 Difference]: Finished difference Result 146 states and 176 transitions. [2018-11-28 13:19:23,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 13:19:23,953 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 25 [2018-11-28 13:19:23,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:23,954 INFO L225 Difference]: With dead ends: 146 [2018-11-28 13:19:23,954 INFO L226 Difference]: Without dead ends: 141 [2018-11-28 13:19:23,955 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 25 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=26, Invalid=78, Unknown=6, NotChecked=0, Total=110 [2018-11-28 13:19:23,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-11-28 13:19:23,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 117. [2018-11-28 13:19:23,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-11-28 13:19:23,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 141 transitions. [2018-11-28 13:19:23,961 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 141 transitions. Word has length 25 [2018-11-28 13:19:23,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:23,961 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 141 transitions. [2018-11-28 13:19:23,961 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 13:19:23,961 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 141 transitions. [2018-11-28 13:19:23,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-28 13:19:23,962 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:23,962 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:23,963 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:23,963 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:23,963 INFO L82 PathProgramCache]: Analyzing trace with hash 514865073, now seen corresponding path program 1 times [2018-11-28 13:19:23,963 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:23,963 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:23,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:23,965 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:23,965 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:23,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:24,004 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:19:24,005 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:19:24,005 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:19:24,005 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:19:24,005 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:19:24,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:19:24,006 INFO L87 Difference]: Start difference. First operand 117 states and 141 transitions. Second operand 5 states. [2018-11-28 13:19:24,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:24,032 INFO L93 Difference]: Finished difference Result 133 states and 156 transitions. [2018-11-28 13:19:24,033 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:19:24,034 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-11-28 13:19:24,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:24,035 INFO L225 Difference]: With dead ends: 133 [2018-11-28 13:19:24,035 INFO L226 Difference]: Without dead ends: 133 [2018-11-28 13:19:24,036 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:19:24,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-11-28 13:19:24,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 117. [2018-11-28 13:19:24,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-11-28 13:19:24,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 140 transitions. [2018-11-28 13:19:24,042 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 140 transitions. Word has length 29 [2018-11-28 13:19:24,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:24,043 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 140 transitions. [2018-11-28 13:19:24,043 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:19:24,043 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 140 transitions. [2018-11-28 13:19:24,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-28 13:19:24,044 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:24,044 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:24,044 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:24,044 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:24,045 INFO L82 PathProgramCache]: Analyzing trace with hash 514865125, now seen corresponding path program 1 times [2018-11-28 13:19:24,045 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:24,045 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:24,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:24,046 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:24,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:24,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:24,123 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:19:24,123 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:19:24,123 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:19:24,138 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:24,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:24,163 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:19:24,167 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:19:24,167 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:24,169 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:24,169 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:19:24,206 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:24,207 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:24,208 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-28 13:19:24,209 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:24,215 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:19:24,216 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-11-28 13:19:24,233 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:19:24,258 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:19:24,258 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7] total 8 [2018-11-28 13:19:24,258 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 13:19:24,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 13:19:24,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-28 13:19:24,259 INFO L87 Difference]: Start difference. First operand 117 states and 140 transitions. Second operand 9 states. [2018-11-28 13:19:24,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:24,643 INFO L93 Difference]: Finished difference Result 162 states and 195 transitions. [2018-11-28 13:19:24,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 13:19:24,643 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-11-28 13:19:24,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:24,644 INFO L225 Difference]: With dead ends: 162 [2018-11-28 13:19:24,644 INFO L226 Difference]: Without dead ends: 162 [2018-11-28 13:19:24,644 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 25 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2018-11-28 13:19:24,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-11-28 13:19:24,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 129. [2018-11-28 13:19:24,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-11-28 13:19:24,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 158 transitions. [2018-11-28 13:19:24,649 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 158 transitions. Word has length 29 [2018-11-28 13:19:24,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:24,650 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 158 transitions. [2018-11-28 13:19:24,650 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 13:19:24,650 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 158 transitions. [2018-11-28 13:19:24,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-28 13:19:24,652 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:24,652 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:24,652 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:24,653 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:24,653 INFO L82 PathProgramCache]: Analyzing trace with hash 514865126, now seen corresponding path program 1 times [2018-11-28 13:19:24,653 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:24,653 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:24,654 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:24,654 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:24,654 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:24,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:24,805 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-28 13:19:24,805 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:19:24,805 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:19:24,818 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:24,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:24,840 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:19:24,845 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:19:24,845 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:24,854 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:19:24,854 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:24,860 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:24,861 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-11-28 13:19:24,893 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:24,895 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:19:24,895 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:24,907 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:24,908 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:24,909 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:19:24,909 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:24,916 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:24,916 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:19:24,918 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-28 13:19:24,943 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:19:24,943 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-11-28 13:19:24,944 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 13:19:24,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 13:19:24,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-11-28 13:19:24,944 INFO L87 Difference]: Start difference. First operand 129 states and 158 transitions. Second operand 10 states. [2018-11-28 13:19:26,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:26,554 INFO L93 Difference]: Finished difference Result 182 states and 219 transitions. [2018-11-28 13:19:26,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 13:19:26,555 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 29 [2018-11-28 13:19:26,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:26,556 INFO L225 Difference]: With dead ends: 182 [2018-11-28 13:19:26,556 INFO L226 Difference]: Without dead ends: 182 [2018-11-28 13:19:26,556 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2018-11-28 13:19:26,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-11-28 13:19:26,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 141. [2018-11-28 13:19:26,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-11-28 13:19:26,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 177 transitions. [2018-11-28 13:19:26,562 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 177 transitions. Word has length 29 [2018-11-28 13:19:26,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:26,562 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 177 transitions. [2018-11-28 13:19:26,562 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 13:19:26,562 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 177 transitions. [2018-11-28 13:19:26,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-28 13:19:26,563 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:26,563 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:26,564 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:26,564 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:26,564 INFO L82 PathProgramCache]: Analyzing trace with hash 9306500, now seen corresponding path program 1 times [2018-11-28 13:19:26,564 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:26,564 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:26,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:26,567 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:26,567 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:26,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:26,600 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:19:26,600 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:19:26,600 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:19:26,621 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:26,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:26,643 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:19:26,679 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:19:26,696 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:19:26,696 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-11-28 13:19:26,696 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:19:26,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:19:26,697 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:19:26,697 INFO L87 Difference]: Start difference. First operand 141 states and 177 transitions. Second operand 5 states. [2018-11-28 13:19:26,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:26,714 INFO L93 Difference]: Finished difference Result 118 states and 137 transitions. [2018-11-28 13:19:26,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:19:26,715 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-11-28 13:19:26,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:26,716 INFO L225 Difference]: With dead ends: 118 [2018-11-28 13:19:26,716 INFO L226 Difference]: Without dead ends: 116 [2018-11-28 13:19:26,716 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:19:26,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-11-28 13:19:26,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-11-28 13:19:26,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-11-28 13:19:26,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 135 transitions. [2018-11-28 13:19:26,720 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 135 transitions. Word has length 29 [2018-11-28 13:19:26,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:26,720 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 135 transitions. [2018-11-28 13:19:26,720 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:19:26,720 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 135 transitions. [2018-11-28 13:19:26,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-28 13:19:26,721 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:26,721 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:26,722 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:26,722 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:26,722 INFO L82 PathProgramCache]: Analyzing trace with hash 1019181102, now seen corresponding path program 1 times [2018-11-28 13:19:26,722 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:26,722 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:26,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:26,726 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:26,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:26,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:26,773 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:19:26,773 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:19:26,773 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 13:19:26,774 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 13:19:26,774 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 13:19:26,774 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-28 13:19:26,774 INFO L87 Difference]: Start difference. First operand 116 states and 135 transitions. Second operand 7 states. [2018-11-28 13:19:26,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:26,920 INFO L93 Difference]: Finished difference Result 125 states and 145 transitions. [2018-11-28 13:19:26,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 13:19:26,921 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 32 [2018-11-28 13:19:26,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:26,921 INFO L225 Difference]: With dead ends: 125 [2018-11-28 13:19:26,921 INFO L226 Difference]: Without dead ends: 125 [2018-11-28 13:19:26,922 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-28 13:19:26,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-11-28 13:19:26,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 115. [2018-11-28 13:19:26,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-11-28 13:19:26,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 134 transitions. [2018-11-28 13:19:26,926 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 134 transitions. Word has length 32 [2018-11-28 13:19:26,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:26,926 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 134 transitions. [2018-11-28 13:19:26,926 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 13:19:26,926 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 134 transitions. [2018-11-28 13:19:26,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-28 13:19:26,927 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:26,927 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:26,928 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:26,928 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:26,928 INFO L82 PathProgramCache]: Analyzing trace with hash 1019181103, now seen corresponding path program 1 times [2018-11-28 13:19:26,928 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:26,928 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:26,929 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:26,929 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:26,929 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:26,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:27,022 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:19:27,022 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:19:27,022 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:19:27,028 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:27,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:27,047 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:19:27,073 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:27,074 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:19:27,075 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:27,081 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:27,082 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:27,082 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:19:27,082 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:27,089 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:27,089 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-11-28 13:19:27,117 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:19:27,132 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:19:27,132 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2018-11-28 13:19:27,132 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-28 13:19:27,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-28 13:19:27,132 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2018-11-28 13:19:27,133 INFO L87 Difference]: Start difference. First operand 115 states and 134 transitions. Second operand 16 states. [2018-11-28 13:19:27,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:27,481 INFO L93 Difference]: Finished difference Result 130 states and 147 transitions. [2018-11-28 13:19:27,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-28 13:19:27,481 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 32 [2018-11-28 13:19:27,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:27,482 INFO L225 Difference]: With dead ends: 130 [2018-11-28 13:19:27,482 INFO L226 Difference]: Without dead ends: 130 [2018-11-28 13:19:27,483 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=387, Unknown=0, NotChecked=0, Total=462 [2018-11-28 13:19:27,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-11-28 13:19:27,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 95. [2018-11-28 13:19:27,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-11-28 13:19:27,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 103 transitions. [2018-11-28 13:19:27,487 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 103 transitions. Word has length 32 [2018-11-28 13:19:27,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:27,487 INFO L480 AbstractCegarLoop]: Abstraction has 95 states and 103 transitions. [2018-11-28 13:19:27,487 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-28 13:19:27,487 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 103 transitions. [2018-11-28 13:19:27,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-28 13:19:27,488 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:27,488 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:27,489 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:27,489 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:27,489 INFO L82 PathProgramCache]: Analyzing trace with hash -789849662, now seen corresponding path program 1 times [2018-11-28 13:19:27,489 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:27,489 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:27,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:27,494 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:27,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:27,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:27,562 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:19:27,563 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:19:27,563 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:19:27,569 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:27,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:27,587 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:19:27,589 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:19:27,589 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:27,591 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:27,591 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:19:27,605 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:27,605 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:27,606 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:19:27,606 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:27,607 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:27,607 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:19:27,626 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:27,626 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-11-28 13:19:27,627 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:27,631 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:19:27,631 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-11-28 13:19:27,642 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:19:27,667 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:19:27,667 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10] total 10 [2018-11-28 13:19:27,668 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 13:19:27,668 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 13:19:27,668 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-11-28 13:19:27,668 INFO L87 Difference]: Start difference. First operand 95 states and 103 transitions. Second operand 11 states. [2018-11-28 13:19:27,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:27,870 INFO L93 Difference]: Finished difference Result 118 states and 133 transitions. [2018-11-28 13:19:27,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 13:19:27,870 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-11-28 13:19:27,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:27,871 INFO L225 Difference]: With dead ends: 118 [2018-11-28 13:19:27,871 INFO L226 Difference]: Without dead ends: 118 [2018-11-28 13:19:27,871 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 26 SyntacticMatches, 8 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-11-28 13:19:27,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-11-28 13:19:27,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 97. [2018-11-28 13:19:27,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-11-28 13:19:27,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 105 transitions. [2018-11-28 13:19:27,874 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 105 transitions. Word has length 32 [2018-11-28 13:19:27,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:27,875 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 105 transitions. [2018-11-28 13:19:27,875 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 13:19:27,875 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 105 transitions. [2018-11-28 13:19:27,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-28 13:19:27,875 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:27,875 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:27,876 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:27,876 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:27,876 INFO L82 PathProgramCache]: Analyzing trace with hash 180504079, now seen corresponding path program 1 times [2018-11-28 13:19:27,876 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:27,876 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:27,877 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:27,877 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:27,877 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:27,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:28,010 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:19:28,011 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:19:28,011 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:19:28,024 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:28,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:28,051 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:19:28,056 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:19:28,057 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:28,059 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:28,059 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:19:28,067 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:28,068 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:28,069 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:19:28,070 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:28,072 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:28,072 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:19:28,082 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:19:28,084 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:19:28,085 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:28,087 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:28,090 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:28,091 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:16, output treesize:12 [2018-11-28 13:19:30,094 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_4 Int) (v_entry_point_~c11~0.base_BEFORE_CALL_9 Int)) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_9 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_9) v_entry_point_~c11~0.offset_BEFORE_CALL_4)))) is different from true [2018-11-28 13:19:30,111 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-11-28 13:19:30,119 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 13:19:30,119 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:30,127 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:30,130 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:30,130 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:37, output treesize:18 [2018-11-28 13:19:30,167 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-28 13:19:30,168 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-28 13:19:30,168 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:30,171 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:30,173 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:30,173 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:5 [2018-11-28 13:19:30,182 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-11-28 13:19:30,196 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:19:30,197 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 18 [2018-11-28 13:19:30,197 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-28 13:19:30,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-28 13:19:30,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=270, Unknown=1, NotChecked=32, Total=342 [2018-11-28 13:19:30,197 INFO L87 Difference]: Start difference. First operand 97 states and 105 transitions. Second operand 19 states. [2018-11-28 13:19:34,290 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 12 [2018-11-28 13:19:38,306 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 18 [2018-11-28 13:19:40,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:40,681 INFO L93 Difference]: Finished difference Result 123 states and 138 transitions. [2018-11-28 13:19:40,681 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-28 13:19:40,681 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 34 [2018-11-28 13:19:40,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:40,682 INFO L225 Difference]: With dead ends: 123 [2018-11-28 13:19:40,682 INFO L226 Difference]: Without dead ends: 123 [2018-11-28 13:19:40,682 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 26 SyntacticMatches, 5 SemanticMatches, 29 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 12.2s TimeCoverageRelationStatistics Valid=119, Invalid=751, Unknown=4, NotChecked=56, Total=930 [2018-11-28 13:19:40,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-11-28 13:19:40,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 100. [2018-11-28 13:19:40,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-11-28 13:19:40,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 108 transitions. [2018-11-28 13:19:40,685 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 108 transitions. Word has length 34 [2018-11-28 13:19:40,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:40,685 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 108 transitions. [2018-11-28 13:19:40,685 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-28 13:19:40,685 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 108 transitions. [2018-11-28 13:19:40,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-28 13:19:40,686 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:40,686 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:40,686 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:40,686 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:40,686 INFO L82 PathProgramCache]: Analyzing trace with hash 180504080, now seen corresponding path program 1 times [2018-11-28 13:19:40,687 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:40,687 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:40,687 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:40,687 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:40,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:40,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:40,815 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:19:40,816 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:19:40,816 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:19:40,822 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:40,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:40,840 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:19:40,842 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:19:40,842 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:40,843 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:40,844 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:19:40,868 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:40,869 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:40,869 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:19:40,869 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:40,871 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:40,871 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:19:40,896 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:19:40,898 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:19:40,898 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:40,900 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:40,904 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:19:40,906 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:19:40,906 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:40,907 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:40,910 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:40,910 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-11-28 13:19:42,926 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_12 Int) (v_entry_point_~c11~0.offset_BEFORE_CALL_6 Int)) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_12 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_12) v_entry_point_~c11~0.offset_BEFORE_CALL_6)))) is different from true [2018-11-28 13:19:42,951 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 70 [2018-11-28 13:19:42,953 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:19:42,953 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:42,959 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:42,972 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 58 [2018-11-28 13:19:42,976 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:19:42,977 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:42,983 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:42,989 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:42,989 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:77, output treesize:31 [2018-11-28 13:19:43,040 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-11-28 13:19:43,043 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 16 [2018-11-28 13:19:43,044 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:43,046 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:43,051 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 20 [2018-11-28 13:19:43,052 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 11 [2018-11-28 13:19:43,052 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:43,056 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:43,060 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:43,060 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:45, output treesize:11 [2018-11-28 13:19:43,092 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-11-28 13:19:43,107 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:19:43,107 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 24 [2018-11-28 13:19:43,107 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-11-28 13:19:43,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-11-28 13:19:43,108 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=501, Unknown=1, NotChecked=44, Total=600 [2018-11-28 13:19:43,108 INFO L87 Difference]: Start difference. First operand 100 states and 108 transitions. Second operand 25 states. [2018-11-28 13:19:47,238 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 12 [2018-11-28 13:19:51,261 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 20 [2018-11-28 13:19:51,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:51,893 INFO L93 Difference]: Finished difference Result 122 states and 137 transitions. [2018-11-28 13:19:51,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-28 13:19:51,893 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 34 [2018-11-28 13:19:51,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:51,893 INFO L225 Difference]: With dead ends: 122 [2018-11-28 13:19:51,893 INFO L226 Difference]: Without dead ends: 122 [2018-11-28 13:19:51,894 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 22 SyntacticMatches, 3 SemanticMatches, 35 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 10.5s TimeCoverageRelationStatistics Valid=149, Invalid=1112, Unknown=3, NotChecked=68, Total=1332 [2018-11-28 13:19:51,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-11-28 13:19:51,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 99. [2018-11-28 13:19:51,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-11-28 13:19:51,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 107 transitions. [2018-11-28 13:19:51,897 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 107 transitions. Word has length 34 [2018-11-28 13:19:51,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:51,897 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 107 transitions. [2018-11-28 13:19:51,897 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-11-28 13:19:51,897 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 107 transitions. [2018-11-28 13:19:51,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-28 13:19:51,898 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:51,898 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:51,898 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:51,898 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:51,898 INFO L82 PathProgramCache]: Analyzing trace with hash 1714971376, now seen corresponding path program 1 times [2018-11-28 13:19:51,898 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:51,898 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:51,899 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:51,899 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:51,899 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:51,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:52,089 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-28 13:19:52,090 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:19:52,090 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:19:52,102 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:52,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:52,118 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:19:54,989 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:19:55,004 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:19:55,005 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-11-28 13:19:55,005 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-28 13:19:55,005 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-28 13:19:55,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=227, Unknown=5, NotChecked=0, Total=272 [2018-11-28 13:19:55,005 INFO L87 Difference]: Start difference. First operand 99 states and 107 transitions. Second operand 17 states. [2018-11-28 13:19:56,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:19:56,184 INFO L93 Difference]: Finished difference Result 123 states and 137 transitions. [2018-11-28 13:19:56,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 13:19:56,184 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 35 [2018-11-28 13:19:56,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:19:56,184 INFO L225 Difference]: With dead ends: 123 [2018-11-28 13:19:56,185 INFO L226 Difference]: Without dead ends: 116 [2018-11-28 13:19:56,185 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 34 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=66, Invalid=391, Unknown=5, NotChecked=0, Total=462 [2018-11-28 13:19:56,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-11-28 13:19:56,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 93. [2018-11-28 13:19:56,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-11-28 13:19:56,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 100 transitions. [2018-11-28 13:19:56,187 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 100 transitions. Word has length 35 [2018-11-28 13:19:56,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:19:56,187 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 100 transitions. [2018-11-28 13:19:56,187 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-28 13:19:56,187 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 100 transitions. [2018-11-28 13:19:56,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-28 13:19:56,188 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:19:56,188 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:19:56,188 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:19:56,188 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:19:56,188 INFO L82 PathProgramCache]: Analyzing trace with hash 1753082646, now seen corresponding path program 1 times [2018-11-28 13:19:56,188 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:19:56,188 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:19:56,189 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:56,189 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:56,189 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:19:56,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:56,408 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-28 13:19:56,409 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:19:56,409 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:19:56,416 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:19:56,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:19:56,439 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:19:56,441 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:19:56,441 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:56,442 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:56,443 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:19:56,448 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:56,449 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:19:56,449 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:19:56,449 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:56,451 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:56,452 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:19:56,459 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:19:56,461 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:19:56,461 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:56,464 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:56,469 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:19:56,471 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:19:56,471 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:56,472 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:56,475 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:19:56,475 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-11-28 13:19:58,484 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_17 Int) (v_entry_point_~c11~0.offset_BEFORE_CALL_8 Int)) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_17 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_17) v_entry_point_~c11~0.offset_BEFORE_CALL_8)))) is different from true [2018-11-28 13:19:58,487 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:19:58,487 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:19:58,490 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:19:58,490 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:14 [2018-11-28 13:20:02,508 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 14 [2018-11-28 13:20:02,578 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-11-28 13:20:02,580 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:20:02,580 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:02,584 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:02,595 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 35 [2018-11-28 13:20:02,597 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 11 [2018-11-28 13:20:02,597 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:02,603 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:02,611 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:02,611 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:62, output treesize:26 [2018-11-28 13:20:02,666 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-11-28 13:20:02,669 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-11-28 13:20:02,669 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:02,674 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:02,682 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:20:02,682 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:29 [2018-11-28 13:20:02,746 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-11-28 13:20:02,748 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-11-28 13:20:02,748 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:02,752 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-28 13:20:02,752 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:02,753 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:02,753 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:02,754 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:33, output treesize:5 [2018-11-28 13:20:03,139 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:20:03,139 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:20:03,140 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-28 13:20:03,140 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:03,144 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:20:03,144 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-11-28 13:20:03,168 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 4 not checked. [2018-11-28 13:20:03,183 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:20:03,183 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 22] total 28 [2018-11-28 13:20:03,183 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-11-28 13:20:03,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-11-28 13:20:03,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=688, Unknown=3, NotChecked=52, Total=812 [2018-11-28 13:20:03,184 INFO L87 Difference]: Start difference. First operand 93 states and 100 transitions. Second operand 29 states. [2018-11-28 13:20:07,850 WARN L180 SmtUtils]: Spent 331.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-11-28 13:20:14,357 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 12 [2018-11-28 13:20:18,723 WARN L180 SmtUtils]: Spent 2.35 s on a formula simplification that was a NOOP. DAG size: 25 [2018-11-28 13:20:21,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:20:21,610 INFO L93 Difference]: Finished difference Result 140 states and 158 transitions. [2018-11-28 13:20:21,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-28 13:20:21,610 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 43 [2018-11-28 13:20:21,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:20:21,611 INFO L225 Difference]: With dead ends: 140 [2018-11-28 13:20:21,611 INFO L226 Difference]: Without dead ends: 140 [2018-11-28 13:20:21,611 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 29 SyntacticMatches, 8 SemanticMatches, 48 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 474 ImplicationChecksByTransitivity, 19.7s TimeCoverageRelationStatistics Valid=243, Invalid=2106, Unknown=7, NotChecked=94, Total=2450 [2018-11-28 13:20:21,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-11-28 13:20:21,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 124. [2018-11-28 13:20:21,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-11-28 13:20:21,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 145 transitions. [2018-11-28 13:20:21,615 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 145 transitions. Word has length 43 [2018-11-28 13:20:21,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:20:21,615 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 145 transitions. [2018-11-28 13:20:21,615 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-11-28 13:20:21,615 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 145 transitions. [2018-11-28 13:20:21,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-28 13:20:21,615 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:20:21,615 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:20:21,616 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:20:21,616 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:20:21,616 INFO L82 PathProgramCache]: Analyzing trace with hash 1753082647, now seen corresponding path program 1 times [2018-11-28 13:20:21,616 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:20:21,616 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:20:21,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:20:21,617 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:20:21,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:20:21,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:20:21,906 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-28 13:20:21,907 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:20:21,907 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:20:21,916 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:20:21,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:20:21,937 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:20:21,939 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:20:21,939 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:21,940 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:21,940 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:20:21,946 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:20:21,947 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:20:21,947 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:20:21,947 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:21,948 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:21,949 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:20:21,956 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:20:21,957 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:20:21,958 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:21,959 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:21,964 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:20:21,966 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:20:21,966 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:21,967 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:21,970 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:21,970 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-11-28 13:20:23,972 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_20 Int) (v_entry_point_~c11~0.offset_BEFORE_CALL_10 Int)) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_20) v_entry_point_~c11~0.offset_BEFORE_CALL_10) v_entry_point_~c11~0.base_BEFORE_CALL_20))) is different from true [2018-11-28 13:20:26,590 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 12 [2018-11-28 13:20:26,593 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:20:26,593 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:26,599 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:20:26,600 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:26,605 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:20:26,605 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:27, output treesize:22 [2018-11-28 13:20:29,278 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 21 [2018-11-28 13:20:29,334 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-11-28 13:20:29,336 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 11 [2018-11-28 13:20:29,336 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:29,340 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:29,351 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 35 [2018-11-28 13:20:29,352 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:20:29,352 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:29,357 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:29,364 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:29,364 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:67, output treesize:58 [2018-11-28 13:20:29,507 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 69 [2018-11-28 13:20:29,515 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-11-28 13:20:29,515 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:20:29,526 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 11 [2018-11-28 13:20:29,526 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:29,531 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:20:29,538 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-11-28 13:20:29,540 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-28 13:20:29,540 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:29,543 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:29,547 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:29,547 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:88, output treesize:14 [2018-11-28 13:20:29,888 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:20:29,889 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:20:29,889 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:29,895 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:20:29,896 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:20:29,896 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:20:29,897 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:20:29,900 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:20:29,900 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:20:29,904 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-11-28 13:20:29,919 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:20:29,919 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 24] total 32 [2018-11-28 13:20:29,919 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-11-28 13:20:29,919 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-11-28 13:20:29,920 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=911, Unknown=4, NotChecked=60, Total=1056 [2018-11-28 13:20:29,920 INFO L87 Difference]: Start difference. First operand 124 states and 145 transitions. Second operand 33 states. [2018-11-28 13:20:39,471 WARN L180 SmtUtils]: Spent 343.00 ms on a formula simplification that was a NOOP. DAG size: 26 [2018-11-28 13:20:49,596 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 15 [2018-11-28 13:20:52,273 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 18 [2018-11-28 13:20:56,685 WARN L180 SmtUtils]: Spent 2.39 s on a formula simplification that was a NOOP. DAG size: 34 [2018-11-28 13:20:59,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:20:59,891 INFO L93 Difference]: Finished difference Result 146 states and 165 transitions. [2018-11-28 13:20:59,891 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-11-28 13:20:59,891 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 43 [2018-11-28 13:20:59,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:20:59,891 INFO L225 Difference]: With dead ends: 146 [2018-11-28 13:20:59,891 INFO L226 Difference]: Without dead ends: 146 [2018-11-28 13:20:59,892 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 30 SyntacticMatches, 6 SemanticMatches, 50 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 508 ImplicationChecksByTransitivity, 27.1s TimeCoverageRelationStatistics Valid=247, Invalid=2295, Unknown=12, NotChecked=98, Total=2652 [2018-11-28 13:20:59,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-11-28 13:20:59,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 114. [2018-11-28 13:20:59,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-11-28 13:20:59,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 125 transitions. [2018-11-28 13:20:59,895 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 125 transitions. Word has length 43 [2018-11-28 13:20:59,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:20:59,896 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 125 transitions. [2018-11-28 13:20:59,896 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-11-28 13:20:59,896 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 125 transitions. [2018-11-28 13:20:59,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-28 13:20:59,896 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:20:59,896 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:20:59,897 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:20:59,897 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:20:59,897 INFO L82 PathProgramCache]: Analyzing trace with hash 1344258421, now seen corresponding path program 1 times [2018-11-28 13:20:59,897 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:20:59,897 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:20:59,898 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:20:59,898 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:20:59,898 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:20:59,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:20:59,942 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:20:59,943 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:20:59,943 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:20:59,951 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:20:59,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:20:59,971 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:20:59,974 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:20:59,989 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:20:59,989 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-11-28 13:20:59,989 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:20:59,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:20:59,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:20:59,990 INFO L87 Difference]: Start difference. First operand 114 states and 125 transitions. Second operand 5 states. [2018-11-28 13:20:59,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:20:59,998 INFO L93 Difference]: Finished difference Result 95 states and 100 transitions. [2018-11-28 13:20:59,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:20:59,998 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2018-11-28 13:20:59,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:20:59,999 INFO L225 Difference]: With dead ends: 95 [2018-11-28 13:20:59,999 INFO L226 Difference]: Without dead ends: 91 [2018-11-28 13:20:59,999 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:20:59,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-11-28 13:21:00,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 91. [2018-11-28 13:21:00,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-11-28 13:21:00,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 96 transitions. [2018-11-28 13:21:00,001 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 96 transitions. Word has length 43 [2018-11-28 13:21:00,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:00,001 INFO L480 AbstractCegarLoop]: Abstraction has 91 states and 96 transitions. [2018-11-28 13:21:00,001 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:21:00,002 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 96 transitions. [2018-11-28 13:21:00,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 13:21:00,002 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:00,002 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:00,002 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:00,002 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:00,002 INFO L82 PathProgramCache]: Analyzing trace with hash -658039088, now seen corresponding path program 1 times [2018-11-28 13:21:00,002 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:00,002 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:00,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:00,003 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:00,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:00,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:00,034 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:21:00,035 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:21:00,035 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:21:00,035 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:21:00,035 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:21:00,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:00,035 INFO L87 Difference]: Start difference. First operand 91 states and 96 transitions. Second operand 5 states. [2018-11-28 13:21:00,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:00,053 INFO L93 Difference]: Finished difference Result 98 states and 104 transitions. [2018-11-28 13:21:00,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:21:00,054 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-11-28 13:21:00,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:00,055 INFO L225 Difference]: With dead ends: 98 [2018-11-28 13:21:00,055 INFO L226 Difference]: Without dead ends: 98 [2018-11-28 13:21:00,055 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:00,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-11-28 13:21:00,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 93. [2018-11-28 13:21:00,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-11-28 13:21:00,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 98 transitions. [2018-11-28 13:21:00,058 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 98 transitions. Word has length 47 [2018-11-28 13:21:00,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:00,058 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 98 transitions. [2018-11-28 13:21:00,058 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:21:00,058 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 98 transitions. [2018-11-28 13:21:00,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 13:21:00,058 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:00,059 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:00,059 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:00,059 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:00,059 INFO L82 PathProgramCache]: Analyzing trace with hash -854552593, now seen corresponding path program 1 times [2018-11-28 13:21:00,059 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:00,059 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:00,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:00,060 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:00,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:00,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:00,134 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-28 13:21:00,134 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:21:00,134 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 13:21:00,134 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 13:21:00,135 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 13:21:00,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-28 13:21:00,135 INFO L87 Difference]: Start difference. First operand 93 states and 98 transitions. Second operand 8 states. [2018-11-28 13:21:00,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:00,292 INFO L93 Difference]: Finished difference Result 109 states and 114 transitions. [2018-11-28 13:21:00,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 13:21:00,294 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-11-28 13:21:00,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:00,294 INFO L225 Difference]: With dead ends: 109 [2018-11-28 13:21:00,294 INFO L226 Difference]: Without dead ends: 109 [2018-11-28 13:21:00,295 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2018-11-28 13:21:00,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-11-28 13:21:00,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 103. [2018-11-28 13:21:00,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-11-28 13:21:00,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 109 transitions. [2018-11-28 13:21:00,297 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 109 transitions. Word has length 47 [2018-11-28 13:21:00,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:00,297 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 109 transitions. [2018-11-28 13:21:00,297 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 13:21:00,297 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 109 transitions. [2018-11-28 13:21:00,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 13:21:00,297 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:00,297 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:00,298 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:00,298 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:00,298 INFO L82 PathProgramCache]: Analyzing trace with hash -854552592, now seen corresponding path program 1 times [2018-11-28 13:21:00,298 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:00,298 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:00,298 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:00,298 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:00,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:00,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:00,491 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:21:00,491 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:00,491 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:00,502 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:00,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:00,529 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:00,539 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:00,539 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:00,547 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:00,547 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:00,552 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:00,552 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-11-28 13:21:00,589 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:00,591 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:21:00,591 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:00,598 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:00,599 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:00,600 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:21:00,600 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:00,604 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:00,604 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:21:00,609 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:00,611 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:21:00,612 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:00,630 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:00,632 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:00,633 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:21:00,633 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:00,639 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:00,639 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:21:00,713 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 17 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:21:00,738 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:00,738 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16] total 18 [2018-11-28 13:21:00,738 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-28 13:21:00,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-28 13:21:00,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=300, Unknown=0, NotChecked=0, Total=342 [2018-11-28 13:21:00,738 INFO L87 Difference]: Start difference. First operand 103 states and 109 transitions. Second operand 19 states. [2018-11-28 13:21:01,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:01,445 INFO L93 Difference]: Finished difference Result 122 states and 129 transitions. [2018-11-28 13:21:01,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-28 13:21:01,447 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-11-28 13:21:01,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:01,447 INFO L225 Difference]: With dead ends: 122 [2018-11-28 13:21:01,447 INFO L226 Difference]: Without dead ends: 122 [2018-11-28 13:21:01,448 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 43 SyntacticMatches, 6 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=110, Invalid=702, Unknown=0, NotChecked=0, Total=812 [2018-11-28 13:21:01,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-11-28 13:21:01,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 103. [2018-11-28 13:21:01,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-11-28 13:21:01,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 108 transitions. [2018-11-28 13:21:01,451 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 108 transitions. Word has length 47 [2018-11-28 13:21:01,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:01,451 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 108 transitions. [2018-11-28 13:21:01,451 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-28 13:21:01,451 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 108 transitions. [2018-11-28 13:21:01,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-28 13:21:01,452 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:01,452 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:01,452 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:01,452 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:01,452 INFO L82 PathProgramCache]: Analyzing trace with hash -1632542409, now seen corresponding path program 1 times [2018-11-28 13:21:01,452 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:01,452 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:01,453 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:01,453 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:01,453 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:01,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:01,527 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-28 13:21:01,527 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:21:01,528 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 13:21:01,528 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 13:21:01,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 13:21:01,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-28 13:21:01,528 INFO L87 Difference]: Start difference. First operand 103 states and 108 transitions. Second operand 9 states. [2018-11-28 13:21:01,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:01,789 INFO L93 Difference]: Finished difference Result 107 states and 112 transitions. [2018-11-28 13:21:01,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 13:21:01,790 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 48 [2018-11-28 13:21:01,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:01,790 INFO L225 Difference]: With dead ends: 107 [2018-11-28 13:21:01,790 INFO L226 Difference]: Without dead ends: 107 [2018-11-28 13:21:01,791 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=160, Unknown=0, NotChecked=0, Total=210 [2018-11-28 13:21:01,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-11-28 13:21:01,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 102. [2018-11-28 13:21:01,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-11-28 13:21:01,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 107 transitions. [2018-11-28 13:21:01,794 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 107 transitions. Word has length 48 [2018-11-28 13:21:01,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:01,794 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 107 transitions. [2018-11-28 13:21:01,794 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 13:21:01,794 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 107 transitions. [2018-11-28 13:21:01,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-28 13:21:01,795 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:01,795 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:01,796 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:01,796 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:01,796 INFO L82 PathProgramCache]: Analyzing trace with hash -1632542408, now seen corresponding path program 1 times [2018-11-28 13:21:01,796 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:01,796 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:01,797 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:01,797 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:01,797 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:01,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:02,052 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:21:02,052 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:02,052 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:02,059 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:02,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:02,088 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:02,090 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:02,091 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:02,121 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:02,121 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:02,126 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:02,126 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-11-28 13:21:02,158 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:02,159 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:02,160 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:21:02,160 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:02,167 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:21:02,167 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:02,173 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:02,173 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:21:02,178 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:02,179 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:02,179 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:21:02,179 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:02,187 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:21:02,187 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:02,192 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:02,192 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:21:02,234 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:02,235 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:02,236 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:21:02,236 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:02,243 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:21:02,244 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:02,248 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:02,248 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:21:02,273 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-28 13:21:02,287 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:02,287 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 19 [2018-11-28 13:21:02,288 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-28 13:21:02,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-28 13:21:02,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=334, Unknown=0, NotChecked=0, Total=380 [2018-11-28 13:21:02,288 INFO L87 Difference]: Start difference. First operand 102 states and 107 transitions. Second operand 20 states. [2018-11-28 13:21:03,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:03,215 INFO L93 Difference]: Finished difference Result 120 states and 127 transitions. [2018-11-28 13:21:03,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-28 13:21:03,215 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 48 [2018-11-28 13:21:03,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:03,216 INFO L225 Difference]: With dead ends: 120 [2018-11-28 13:21:03,216 INFO L226 Difference]: Without dead ends: 120 [2018-11-28 13:21:03,216 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 46 SyntacticMatches, 6 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=133, Invalid=859, Unknown=0, NotChecked=0, Total=992 [2018-11-28 13:21:03,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-11-28 13:21:03,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 101. [2018-11-28 13:21:03,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-11-28 13:21:03,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 106 transitions. [2018-11-28 13:21:03,219 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 106 transitions. Word has length 48 [2018-11-28 13:21:03,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:03,219 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 106 transitions. [2018-11-28 13:21:03,219 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-28 13:21:03,219 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 106 transitions. [2018-11-28 13:21:03,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-28 13:21:03,220 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:03,220 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:03,220 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:03,220 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:03,220 INFO L82 PathProgramCache]: Analyzing trace with hash -773284884, now seen corresponding path program 1 times [2018-11-28 13:21:03,220 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:03,220 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:03,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:03,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:03,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:03,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:03,321 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-28 13:21:03,321 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:21:03,322 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-28 13:21:03,322 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-28 13:21:03,322 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-28 13:21:03,322 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-11-28 13:21:03,322 INFO L87 Difference]: Start difference. First operand 101 states and 106 transitions. Second operand 13 states. [2018-11-28 13:21:03,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:03,673 INFO L93 Difference]: Finished difference Result 133 states and 140 transitions. [2018-11-28 13:21:03,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-28 13:21:03,673 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 62 [2018-11-28 13:21:03,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:03,674 INFO L225 Difference]: With dead ends: 133 [2018-11-28 13:21:03,674 INFO L226 Difference]: Without dead ends: 133 [2018-11-28 13:21:03,674 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=391, Unknown=0, NotChecked=0, Total=462 [2018-11-28 13:21:03,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-11-28 13:21:03,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 124. [2018-11-28 13:21:03,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-11-28 13:21:03,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-11-28 13:21:03,677 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 62 [2018-11-28 13:21:03,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:03,677 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-11-28 13:21:03,677 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-28 13:21:03,677 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-11-28 13:21:03,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-28 13:21:03,678 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:03,678 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:03,678 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:03,678 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:03,679 INFO L82 PathProgramCache]: Analyzing trace with hash -773284883, now seen corresponding path program 1 times [2018-11-28 13:21:03,679 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:03,679 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:03,679 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:03,680 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:03,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:03,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:03,922 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:21:03,922 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:03,922 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:03,932 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:03,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:03,968 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:04,129 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:21:04,145 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:04,145 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 19] total 25 [2018-11-28 13:21:04,145 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-11-28 13:21:04,145 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-11-28 13:21:04,145 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=594, Unknown=0, NotChecked=0, Total=650 [2018-11-28 13:21:04,145 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 26 states. [2018-11-28 13:21:04,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:04,666 INFO L93 Difference]: Finished difference Result 123 states and 130 transitions. [2018-11-28 13:21:04,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-28 13:21:04,666 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 62 [2018-11-28 13:21:04,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:04,666 INFO L225 Difference]: With dead ends: 123 [2018-11-28 13:21:04,666 INFO L226 Difference]: Without dead ends: 123 [2018-11-28 13:21:04,667 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 48 SyntacticMatches, 6 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 229 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=154, Invalid=1568, Unknown=0, NotChecked=0, Total=1722 [2018-11-28 13:21:04,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-11-28 13:21:04,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 123. [2018-11-28 13:21:04,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-11-28 13:21:04,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 130 transitions. [2018-11-28 13:21:04,670 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 130 transitions. Word has length 62 [2018-11-28 13:21:04,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:04,670 INFO L480 AbstractCegarLoop]: Abstraction has 123 states and 130 transitions. [2018-11-28 13:21:04,670 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-11-28 13:21:04,670 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 130 transitions. [2018-11-28 13:21:04,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-11-28 13:21:04,670 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:04,670 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:04,671 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:04,671 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:04,671 INFO L82 PathProgramCache]: Analyzing trace with hash -632987292, now seen corresponding path program 1 times [2018-11-28 13:21:04,671 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:04,671 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:04,672 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:04,672 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:04,672 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:04,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:04,791 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-11-28 13:21:04,791 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:21:04,791 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-11-28 13:21:04,792 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-28 13:21:04,792 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-28 13:21:04,792 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-11-28 13:21:04,792 INFO L87 Difference]: Start difference. First operand 123 states and 130 transitions. Second operand 15 states. [2018-11-28 13:21:05,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:05,007 INFO L93 Difference]: Finished difference Result 126 states and 133 transitions. [2018-11-28 13:21:05,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-28 13:21:05,009 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 63 [2018-11-28 13:21:05,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:05,009 INFO L225 Difference]: With dead ends: 126 [2018-11-28 13:21:05,009 INFO L226 Difference]: Without dead ends: 126 [2018-11-28 13:21:05,010 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=369, Unknown=0, NotChecked=0, Total=420 [2018-11-28 13:21:05,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-11-28 13:21:05,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 99. [2018-11-28 13:21:05,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-11-28 13:21:05,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 104 transitions. [2018-11-28 13:21:05,013 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 104 transitions. Word has length 63 [2018-11-28 13:21:05,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:05,013 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 104 transitions. [2018-11-28 13:21:05,013 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-28 13:21:05,013 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 104 transitions. [2018-11-28 13:21:05,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-28 13:21:05,014 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:05,014 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:05,014 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:05,014 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:05,014 INFO L82 PathProgramCache]: Analyzing trace with hash 1765117560, now seen corresponding path program 1 times [2018-11-28 13:21:05,015 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:05,015 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:05,015 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:05,015 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:05,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:05,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:05,050 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:21:05,050 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:21:05,050 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:21:05,050 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:21:05,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:21:05,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:05,050 INFO L87 Difference]: Start difference. First operand 99 states and 104 transitions. Second operand 5 states. [2018-11-28 13:21:05,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:05,063 INFO L93 Difference]: Finished difference Result 99 states and 102 transitions. [2018-11-28 13:21:05,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:21:05,065 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-11-28 13:21:05,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:05,065 INFO L225 Difference]: With dead ends: 99 [2018-11-28 13:21:05,065 INFO L226 Difference]: Without dead ends: 99 [2018-11-28 13:21:05,066 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:05,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-11-28 13:21:05,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 97. [2018-11-28 13:21:05,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-11-28 13:21:05,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 100 transitions. [2018-11-28 13:21:05,068 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 100 transitions. Word has length 72 [2018-11-28 13:21:05,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:05,068 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 100 transitions. [2018-11-28 13:21:05,068 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:21:05,068 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 100 transitions. [2018-11-28 13:21:05,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-28 13:21:05,069 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:05,069 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:05,069 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:05,069 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:05,070 INFO L82 PathProgramCache]: Analyzing trace with hash 1556016431, now seen corresponding path program 1 times [2018-11-28 13:21:05,070 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:05,070 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:05,072 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:05,072 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:05,072 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:05,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:05,398 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:21:05,398 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:05,398 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:05,406 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:05,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:05,439 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:05,463 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 13:21:05,465 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 13:21:05,466 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:05,467 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:05,468 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:05,468 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-28 13:21:05,778 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2018-11-28 13:21:05,781 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 3 [2018-11-28 13:21:05,781 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:05,785 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:05,785 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:05,786 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:28, output treesize:3 [2018-11-28 13:21:05,790 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-11-28 13:21:05,805 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:21:05,805 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [21] total 35 [2018-11-28 13:21:05,805 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-11-28 13:21:05,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-11-28 13:21:05,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=1164, Unknown=0, NotChecked=0, Total=1260 [2018-11-28 13:21:05,806 INFO L87 Difference]: Start difference. First operand 97 states and 100 transitions. Second operand 36 states. [2018-11-28 13:21:06,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:06,251 INFO L93 Difference]: Finished difference Result 102 states and 104 transitions. [2018-11-28 13:21:06,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-28 13:21:06,251 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 71 [2018-11-28 13:21:06,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:06,252 INFO L225 Difference]: With dead ends: 102 [2018-11-28 13:21:06,252 INFO L226 Difference]: Without dead ends: 100 [2018-11-28 13:21:06,252 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 56 SyntacticMatches, 2 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 320 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=179, Invalid=2173, Unknown=0, NotChecked=0, Total=2352 [2018-11-28 13:21:06,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-11-28 13:21:06,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2018-11-28 13:21:06,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-11-28 13:21:06,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 102 transitions. [2018-11-28 13:21:06,254 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 102 transitions. Word has length 71 [2018-11-28 13:21:06,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:06,254 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 102 transitions. [2018-11-28 13:21:06,254 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-11-28 13:21:06,254 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 102 transitions. [2018-11-28 13:21:06,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-28 13:21:06,254 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:06,254 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:06,255 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:06,255 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:06,255 INFO L82 PathProgramCache]: Analyzing trace with hash 991869487, now seen corresponding path program 1 times [2018-11-28 13:21:06,255 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:06,255 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:06,255 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:06,256 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:06,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:06,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:06,528 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:21:06,529 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:06,529 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:06,537 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:06,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:06,568 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:06,604 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 13:21:06,605 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 13:21:06,605 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:06,606 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:06,607 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:06,607 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-28 13:21:06,873 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2018-11-28 13:21:06,875 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 3 [2018-11-28 13:21:06,875 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:06,879 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:06,880 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:06,880 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:28, output treesize:3 [2018-11-28 13:21:06,895 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-11-28 13:21:06,909 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:21:06,910 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [21] total 35 [2018-11-28 13:21:06,910 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-11-28 13:21:06,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-11-28 13:21:06,910 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=1164, Unknown=0, NotChecked=0, Total=1260 [2018-11-28 13:21:06,911 INFO L87 Difference]: Start difference. First operand 100 states and 102 transitions. Second operand 36 states. [2018-11-28 13:21:07,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:07,276 INFO L93 Difference]: Finished difference Result 99 states and 101 transitions. [2018-11-28 13:21:07,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-28 13:21:07,276 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 72 [2018-11-28 13:21:07,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:07,277 INFO L225 Difference]: With dead ends: 99 [2018-11-28 13:21:07,277 INFO L226 Difference]: Without dead ends: 99 [2018-11-28 13:21:07,277 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 56 SyntacticMatches, 3 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 270 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=166, Invalid=1904, Unknown=0, NotChecked=0, Total=2070 [2018-11-28 13:21:07,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-11-28 13:21:07,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-11-28 13:21:07,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-11-28 13:21:07,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 101 transitions. [2018-11-28 13:21:07,279 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 101 transitions. Word has length 72 [2018-11-28 13:21:07,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:07,279 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 101 transitions. [2018-11-28 13:21:07,279 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-11-28 13:21:07,279 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 101 transitions. [2018-11-28 13:21:07,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-11-28 13:21:07,279 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:07,279 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:07,280 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:07,280 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:07,280 INFO L82 PathProgramCache]: Analyzing trace with hash 683372519, now seen corresponding path program 1 times [2018-11-28 13:21:07,280 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:07,280 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:07,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:07,286 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:07,287 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:07,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:07,323 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:21:07,324 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:07,324 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:07,341 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:07,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:07,386 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:07,402 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:21:07,420 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:07,420 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-11-28 13:21:07,420 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:21:07,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:21:07,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:07,421 INFO L87 Difference]: Start difference. First operand 99 states and 101 transitions. Second operand 5 states. [2018-11-28 13:21:07,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:07,453 INFO L93 Difference]: Finished difference Result 98 states and 100 transitions. [2018-11-28 13:21:07,455 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:21:07,455 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2018-11-28 13:21:07,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:07,456 INFO L225 Difference]: With dead ends: 98 [2018-11-28 13:21:07,456 INFO L226 Difference]: Without dead ends: 98 [2018-11-28 13:21:07,456 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 72 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:07,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-11-28 13:21:07,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-11-28 13:21:07,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-11-28 13:21:07,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 100 transitions. [2018-11-28 13:21:07,458 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 100 transitions. Word has length 73 [2018-11-28 13:21:07,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:07,458 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 100 transitions. [2018-11-28 13:21:07,459 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:21:07,459 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 100 transitions. [2018-11-28 13:21:07,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-11-28 13:21:07,459 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:07,459 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:07,459 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:07,460 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:07,460 INFO L82 PathProgramCache]: Analyzing trace with hash -290287964, now seen corresponding path program 1 times [2018-11-28 13:21:07,460 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:07,460 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:07,461 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:07,461 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:07,461 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:07,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:07,509 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:21:07,509 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:07,510 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:07,523 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:07,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:07,565 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:07,566 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:07,567 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:07,569 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:07,569 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:21:07,574 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:21:07,589 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:07,589 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-11-28 13:21:07,589 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 13:21:07,589 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 13:21:07,589 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 13:21:07,589 INFO L87 Difference]: Start difference. First operand 98 states and 100 transitions. Second operand 6 states. [2018-11-28 13:21:07,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:07,682 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2018-11-28 13:21:07,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 13:21:07,683 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2018-11-28 13:21:07,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:07,683 INFO L225 Difference]: With dead ends: 106 [2018-11-28 13:21:07,683 INFO L226 Difference]: Without dead ends: 106 [2018-11-28 13:21:07,683 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 78 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 13:21:07,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-11-28 13:21:07,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-11-28 13:21:07,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-11-28 13:21:07,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 110 transitions. [2018-11-28 13:21:07,685 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 110 transitions. Word has length 74 [2018-11-28 13:21:07,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:07,685 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 110 transitions. [2018-11-28 13:21:07,685 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 13:21:07,686 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 110 transitions. [2018-11-28 13:21:07,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-28 13:21:07,686 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:07,686 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:07,686 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:07,686 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:07,686 INFO L82 PathProgramCache]: Analyzing trace with hash -293937124, now seen corresponding path program 1 times [2018-11-28 13:21:07,686 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:07,687 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:07,687 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:07,687 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:07,687 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:07,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:07,742 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:21:07,742 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:07,742 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:07,750 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:07,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:07,779 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:07,781 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:07,781 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:07,782 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:07,783 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:21:07,807 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:07,808 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-11-28 13:21:07,808 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:07,809 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:21:07,809 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-11-28 13:21:07,826 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:07,827 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:07,828 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-28 13:21:07,829 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:07,834 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:21:07,834 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-11-28 13:21:07,849 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:21:07,864 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:07,864 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8] total 9 [2018-11-28 13:21:07,864 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 13:21:07,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 13:21:07,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-11-28 13:21:07,865 INFO L87 Difference]: Start difference. First operand 106 states and 110 transitions. Second operand 10 states. [2018-11-28 13:21:08,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:08,060 INFO L93 Difference]: Finished difference Result 111 states and 115 transitions. [2018-11-28 13:21:08,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 13:21:08,060 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 75 [2018-11-28 13:21:08,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:08,061 INFO L225 Difference]: With dead ends: 111 [2018-11-28 13:21:08,061 INFO L226 Difference]: Without dead ends: 111 [2018-11-28 13:21:08,061 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 73 SyntacticMatches, 5 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2018-11-28 13:21:08,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-11-28 13:21:08,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 102. [2018-11-28 13:21:08,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-11-28 13:21:08,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 104 transitions. [2018-11-28 13:21:08,064 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 104 transitions. Word has length 75 [2018-11-28 13:21:08,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:08,064 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 104 transitions. [2018-11-28 13:21:08,064 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 13:21:08,064 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 104 transitions. [2018-11-28 13:21:08,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-11-28 13:21:08,065 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:08,065 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:08,065 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:08,065 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:08,065 INFO L82 PathProgramCache]: Analyzing trace with hash 206154598, now seen corresponding path program 1 times [2018-11-28 13:21:08,065 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:08,065 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:08,066 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:08,066 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:08,066 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:08,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:08,129 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:21:08,129 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:08,130 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:08,148 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:08,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:08,181 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:08,186 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:08,187 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:08,195 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:08,195 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:21:08,202 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:08,203 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:08,204 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:21:08,204 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:08,205 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:08,205 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:21:08,211 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:08,211 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-11-28 13:21:08,211 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:08,219 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:21:08,219 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-11-28 13:21:08,230 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:21:08,245 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:08,246 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10] total 10 [2018-11-28 13:21:08,246 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 13:21:08,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 13:21:08,246 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-11-28 13:21:08,246 INFO L87 Difference]: Start difference. First operand 102 states and 104 transitions. Second operand 11 states. [2018-11-28 13:21:08,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:08,386 INFO L93 Difference]: Finished difference Result 110 states and 114 transitions. [2018-11-28 13:21:08,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 13:21:08,386 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 76 [2018-11-28 13:21:08,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:08,387 INFO L225 Difference]: With dead ends: 110 [2018-11-28 13:21:08,387 INFO L226 Difference]: Without dead ends: 110 [2018-11-28 13:21:08,387 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 79 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-11-28 13:21:08,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-11-28 13:21:08,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-11-28 13:21:08,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-11-28 13:21:08,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 114 transitions. [2018-11-28 13:21:08,389 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 114 transitions. Word has length 76 [2018-11-28 13:21:08,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:08,390 INFO L480 AbstractCegarLoop]: Abstraction has 110 states and 114 transitions. [2018-11-28 13:21:08,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 13:21:08,390 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 114 transitions. [2018-11-28 13:21:08,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-11-28 13:21:08,390 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:08,390 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:08,391 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:08,391 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:08,391 INFO L82 PathProgramCache]: Analyzing trace with hash -1132496672, now seen corresponding path program 1 times [2018-11-28 13:21:08,391 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:08,391 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:08,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:08,392 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:08,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:08,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:08,676 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:21:08,676 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:08,676 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:08,685 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:08,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:08,713 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:08,806 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 13:21:08,807 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 13:21:08,807 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:08,808 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:08,809 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:08,809 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-28 13:21:09,271 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:21:09,286 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:09,286 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 25] total 42 [2018-11-28 13:21:09,286 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-11-28 13:21:09,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-11-28 13:21:09,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=114, Invalid=1608, Unknown=0, NotChecked=0, Total=1722 [2018-11-28 13:21:09,286 INFO L87 Difference]: Start difference. First operand 110 states and 114 transitions. Second operand 42 states. [2018-11-28 13:21:09,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:09,744 INFO L93 Difference]: Finished difference Result 107 states and 109 transitions. [2018-11-28 13:21:09,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-28 13:21:09,744 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 76 [2018-11-28 13:21:09,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:09,745 INFO L225 Difference]: With dead ends: 107 [2018-11-28 13:21:09,745 INFO L226 Difference]: Without dead ends: 103 [2018-11-28 13:21:09,745 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 55 SyntacticMatches, 5 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 472 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=204, Invalid=2658, Unknown=0, NotChecked=0, Total=2862 [2018-11-28 13:21:09,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-11-28 13:21:09,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 103. [2018-11-28 13:21:09,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-11-28 13:21:09,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 105 transitions. [2018-11-28 13:21:09,748 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 105 transitions. Word has length 76 [2018-11-28 13:21:09,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:09,748 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 105 transitions. [2018-11-28 13:21:09,748 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-11-28 13:21:09,748 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 105 transitions. [2018-11-28 13:21:09,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-28 13:21:09,749 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:09,749 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:09,749 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:09,749 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:09,749 INFO L82 PathProgramCache]: Analyzing trace with hash 994279134, now seen corresponding path program 1 times [2018-11-28 13:21:09,749 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:09,749 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:09,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:09,751 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:09,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:09,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:10,072 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-28 13:21:10,073 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:10,073 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:10,082 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:10,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:10,116 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:10,126 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:10,127 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:10,129 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:10,129 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:21:10,175 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:10,177 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:10,177 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:21:10,178 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:10,179 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:10,180 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:21:10,952 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:10,953 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-11-28 13:21:10,953 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:10,955 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:21:10,955 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-11-28 13:21:11,320 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:11,321 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:11,321 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-28 13:21:11,322 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:11,327 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:21:11,327 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-11-28 13:21:11,352 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:11,357 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 34 [2018-11-28 13:21:11,357 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-11-28 13:21:11,373 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-11-28 13:21:11,373 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:25, output treesize:36 [2018-11-28 13:21:11,403 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:21:11,418 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:11,418 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 13] total 31 [2018-11-28 13:21:11,418 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-11-28 13:21:11,418 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-11-28 13:21:11,418 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=873, Unknown=2, NotChecked=0, Total=992 [2018-11-28 13:21:11,419 INFO L87 Difference]: Start difference. First operand 103 states and 105 transitions. Second operand 32 states. [2018-11-28 13:21:12,108 WARN L180 SmtUtils]: Spent 270.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-11-28 13:21:14,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:14,021 INFO L93 Difference]: Finished difference Result 102 states and 104 transitions. [2018-11-28 13:21:14,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-28 13:21:14,021 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 77 [2018-11-28 13:21:14,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:14,022 INFO L225 Difference]: With dead ends: 102 [2018-11-28 13:21:14,022 INFO L226 Difference]: Without dead ends: 102 [2018-11-28 13:21:14,023 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 69 SyntacticMatches, 6 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 651 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=312, Invalid=2338, Unknown=2, NotChecked=0, Total=2652 [2018-11-28 13:21:14,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-11-28 13:21:14,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 94. [2018-11-28 13:21:14,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-11-28 13:21:14,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 95 transitions. [2018-11-28 13:21:14,024 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 95 transitions. Word has length 77 [2018-11-28 13:21:14,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:14,024 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 95 transitions. [2018-11-28 13:21:14,025 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-11-28 13:21:14,025 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 95 transitions. [2018-11-28 13:21:14,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-11-28 13:21:14,025 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:14,025 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:14,026 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:14,026 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:14,026 INFO L82 PathProgramCache]: Analyzing trace with hash 546086984, now seen corresponding path program 1 times [2018-11-28 13:21:14,026 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:14,026 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:14,027 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:14,027 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:14,027 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:14,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:14,184 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-28 13:21:14,185 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:14,185 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:14,194 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:14,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:14,226 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:14,234 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:14,234 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:14,236 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:14,237 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:21:14,255 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:14,257 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:14,258 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:21:14,258 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:14,259 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:14,259 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:21:14,270 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:14,270 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:14,271 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:21:14,271 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:14,273 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:14,273 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:9 [2018-11-28 13:21:14,383 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:14,385 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-11-28 13:21:14,385 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:14,392 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:21:14,392 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:15 [2018-11-28 13:21:14,428 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:14,431 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:14,432 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-11-28 13:21:14,432 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:14,448 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:21:14,448 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-11-28 13:21:14,483 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:21:14,508 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:14,508 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17] total 23 [2018-11-28 13:21:14,509 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-28 13:21:14,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-28 13:21:14,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=483, Unknown=0, NotChecked=0, Total=552 [2018-11-28 13:21:14,509 INFO L87 Difference]: Start difference. First operand 94 states and 95 transitions. Second operand 24 states. [2018-11-28 13:21:15,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:15,119 INFO L93 Difference]: Finished difference Result 103 states and 107 transitions. [2018-11-28 13:21:15,120 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-11-28 13:21:15,120 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 78 [2018-11-28 13:21:15,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:15,121 INFO L225 Difference]: With dead ends: 103 [2018-11-28 13:21:15,121 INFO L226 Difference]: Without dead ends: 103 [2018-11-28 13:21:15,121 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 68 SyntacticMatches, 12 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 330 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=197, Invalid=1609, Unknown=0, NotChecked=0, Total=1806 [2018-11-28 13:21:15,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-11-28 13:21:15,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 93. [2018-11-28 13:21:15,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-11-28 13:21:15,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 94 transitions. [2018-11-28 13:21:15,123 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 94 transitions. Word has length 78 [2018-11-28 13:21:15,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:15,123 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 94 transitions. [2018-11-28 13:21:15,123 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-28 13:21:15,123 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 94 transitions. [2018-11-28 13:21:15,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-11-28 13:21:15,124 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:15,124 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:15,124 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:15,124 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:15,124 INFO L82 PathProgramCache]: Analyzing trace with hash -858339670, now seen corresponding path program 1 times [2018-11-28 13:21:15,124 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:15,124 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:15,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:15,125 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:15,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:15,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:15,894 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-28 13:21:15,894 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:15,894 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:15,901 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:15,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:15,942 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:22,627 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:21:22,642 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:22,642 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 23 [2018-11-28 13:21:22,642 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-28 13:21:22,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-28 13:21:22,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=483, Unknown=9, NotChecked=0, Total=552 [2018-11-28 13:21:22,643 INFO L87 Difference]: Start difference. First operand 93 states and 94 transitions. Second operand 24 states. [2018-11-28 13:21:37,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:37,279 INFO L93 Difference]: Finished difference Result 106 states and 107 transitions. [2018-11-28 13:21:37,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-28 13:21:37,280 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 81 [2018-11-28 13:21:37,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:37,280 INFO L225 Difference]: With dead ends: 106 [2018-11-28 13:21:37,280 INFO L226 Difference]: Without dead ends: 79 [2018-11-28 13:21:37,280 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 82 SyntacticMatches, 4 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 7.6s TimeCoverageRelationStatistics Valid=104, Invalid=879, Unknown=9, NotChecked=0, Total=992 [2018-11-28 13:21:37,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-11-28 13:21:37,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-11-28 13:21:37,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-11-28 13:21:37,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 79 transitions. [2018-11-28 13:21:37,282 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 79 transitions. Word has length 81 [2018-11-28 13:21:37,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:37,282 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 79 transitions. [2018-11-28 13:21:37,282 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-28 13:21:37,283 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 79 transitions. [2018-11-28 13:21:37,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-28 13:21:37,283 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:37,283 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:37,283 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-11-28 13:21:37,284 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:37,284 INFO L82 PathProgramCache]: Analyzing trace with hash -322019790, now seen corresponding path program 1 times [2018-11-28 13:21:37,284 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:21:37,284 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:21:37,285 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:37,285 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:37,285 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:21:37,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 13:21:37,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 13:21:37,334 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 13:21:37,350 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-11-28 13:21:37,356 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 21 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 13:21:37,356 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 22 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 13:21:37,369 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 01:21:37 BoogieIcfgContainer [2018-11-28 13:21:37,369 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 13:21:37,369 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 13:21:37,369 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 13:21:37,370 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 13:21:37,370 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 01:19:19" (3/4) ... [2018-11-28 13:21:37,377 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-11-28 13:21:37,378 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 13:21:37,378 INFO L168 Benchmark]: Toolchain (without parser) took 139574.36 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 289.4 MB). Free memory was 950.6 MB in the beginning and 914.6 MB in the end (delta: 36.0 MB). Peak memory consumption was 325.4 MB. Max. memory is 11.5 GB. [2018-11-28 13:21:37,379 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 13:21:37,379 INFO L168 Benchmark]: CACSL2BoogieTranslator took 402.65 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.4 MB). Free memory was 950.6 MB in the beginning and 1.1 GB in the end (delta: -158.3 MB). Peak memory consumption was 27.6 MB. Max. memory is 11.5 GB. [2018-11-28 13:21:37,379 INFO L168 Benchmark]: Boogie Preprocessor took 51.95 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. [2018-11-28 13:21:37,379 INFO L168 Benchmark]: RCFGBuilder took 827.19 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 994.4 MB in the end (delta: 111.2 MB). Peak memory consumption was 111.2 MB. Max. memory is 11.5 GB. [2018-11-28 13:21:37,379 INFO L168 Benchmark]: TraceAbstraction took 138281.31 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 151.0 MB). Free memory was 994.4 MB in the beginning and 914.6 MB in the end (delta: 79.8 MB). Peak memory consumption was 230.8 MB. Max. memory is 11.5 GB. [2018-11-28 13:21:37,380 INFO L168 Benchmark]: Witness Printer took 8.26 ms. Allocated memory is still 1.3 GB. Free memory is still 914.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 13:21:37,381 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 402.65 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.4 MB). Free memory was 950.6 MB in the beginning and 1.1 GB in the end (delta: -158.3 MB). Peak memory consumption was 27.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 51.95 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. * RCFGBuilder took 827.19 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 994.4 MB in the end (delta: 111.2 MB). Peak memory consumption was 111.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 138281.31 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 151.0 MB). Free memory was 994.4 MB in the beginning and 914.6 MB in the end (delta: 79.8 MB). Peak memory consumption was 230.8 MB. Max. memory is 11.5 GB. * Witness Printer took 8.26 ms. Allocated memory is still 1.3 GB. Free memory is still 914.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 21 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 22 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1512]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1512. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={31:0}] [L1513] CALL entry_point() VAL [ldv_global_msg_list={31:0}] [L1490] CALL, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [\old(size)=20, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=20, \result={33:0}, ldv_global_msg_list={31:0}, malloc(size)={33:0}, size=20] [L1490] RET, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct ldv_i2c_client))={33:0}] [L1490] struct ldv_i2c_client *c11 = (struct ldv_i2c_client *)ldv_malloc(sizeof(struct ldv_i2c_client)); [L1491] COND FALSE !(!c11) VAL [c11={33:0}, ldv_global_msg_list={31:0}] [L1493] CALL, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [\old(size)=4, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={28:0}, ldv_global_msg_list={31:0}, malloc(size)={28:0}, size=4] [L1493] RET, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [c11={33:0}, ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct ldv_m88ts2022_config))={28:0}] [L1492-L1493] struct ldv_m88ts2022_config *cfg = (struct ldv_m88ts2022_config *) ldv_malloc(sizeof(struct ldv_m88ts2022_config)); [L1494] COND FALSE !(!cfg) VAL [c11={33:0}, cfg={28:0}, ldv_global_msg_list={31:0}] [L1495] c11->dev.platform_data = cfg VAL [c11={33:0}, cfg={28:0}, ldv_global_msg_list={31:0}] [L1497] CALL, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [\old(size)=4, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={27:0}, ldv_global_msg_list={31:0}, malloc(size)={27:0}, size=4] [L1497] RET, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [c11={33:0}, cfg={28:0}, ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct ldv_dvb_frontend))={27:0}] [L1496-L1497] struct ldv_dvb_frontend *fe = (struct ldv_dvb_frontend *) ldv_malloc(sizeof(struct ldv_dvb_frontend)); [L1498] COND FALSE !(!fe) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1499] cfg->fe = fe VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1500] CALL alloc_3_11(c11) VAL [client={33:0}, ldv_global_msg_list={31:0}] [L1470] EXPR client->dev.platform_data VAL [client={33:0}, client={33:0}, client->dev.platform_data={28:0}, ldv_global_msg_list={31:0}] [L1470] struct ldv_m88ts2022_config *cfg = client->dev.platform_data; [L1471] EXPR cfg->fe VAL [cfg={28:0}, cfg->fe={27:0}, client={33:0}, client={33:0}, ldv_global_msg_list={31:0}] [L1471] struct ldv_dvb_frontend *fe = cfg->fe; [L1472] CALL, EXPR ldv_malloc(sizeof(struct Data11)) VAL [\old(size)=12, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=12, \result={29:0}, ldv_global_msg_list={31:0}, malloc(size)={29:0}, size=12] [L1472] RET, EXPR ldv_malloc(sizeof(struct Data11)) VAL [cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct Data11))={29:0}] [L1472] struct Data11 *priv = (struct Data11*)ldv_malloc(sizeof(struct Data11)); [L1473] COND FALSE !(!priv) VAL [cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={29:0}] [L1474] fe->tuner_priv = priv VAL [cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={29:0}] [L1475] CALL ldv_i2c_set_clientdata(client, 0) VAL [data={0:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1462] CALL ldv_dev_set_drvdata(&dev->dev, data) VAL [data={0:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1198] dev->driver_data = data VAL [data={0:0}, data={0:0}, dev={33:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1462] RET ldv_dev_set_drvdata(&dev->dev, data) VAL [data={0:0}, data={0:0}, dev={33:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1475] RET ldv_i2c_set_clientdata(client, 0) VAL [cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={29:0}] [L1476] return 0; VAL [\result=0, cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={29:0}] [L1500] RET alloc_3_11(c11) VAL [alloc_3_11(c11)=0, c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1501] CALL free_11(c11) VAL [client={33:0}, ldv_global_msg_list={31:0}] [L1483] CALL, EXPR ldv_i2c_get_clientdata(client) VAL [dev={33:0}, ldv_global_msg_list={31:0}] [L1457] CALL, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={33:0}, ldv_global_msg_list={31:0}] [L1193] EXPR dev->driver_data VAL [dev={33:0}, dev={33:0}, dev->driver_data={0:0}, ldv_global_msg_list={31:0}] [L1193] return dev->driver_data; [L1457] RET, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={33:0}, dev={33:0}, ldv_dev_get_drvdata(&dev->dev)={0:0}, ldv_global_msg_list={31:0}] [L1457] return ldv_dev_get_drvdata(&dev->dev); [L1483] RET, EXPR ldv_i2c_get_clientdata(client) VAL [client={33:0}, client={33:0}, ldv_global_msg_list={31:0}, ldv_i2c_get_clientdata(client)={0:0}] [L1483] void *priv = (struct Data11*)ldv_i2c_get_clientdata(client); [L1484] COND FALSE !(\read(*priv)) VAL [client={33:0}, client={33:0}, ldv_global_msg_list={31:0}, priv={0:0}] [L1501] RET free_11(c11) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1503] free(fe) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1503] free(fe) [L1505] free(cfg) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1505] free(cfg) [L1507] free(c11) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1507] free(c11) [L1513] RET entry_point() VAL [ldv_global_msg_list={31:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 47 procedures, 375 locations, 85 error locations. UNSAFE Result, 138.2s OverallTime, 40 OverallIterations, 4 TraceHistogramMax, 96.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3329 SDtfs, 3033 SDslu, 18289 SDs, 0 SdLazy, 22203 SolverSat, 1327 SolverUnsat, 47 SolverUnknown, 0 SolverNotchecked, 41.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2110 GetRequests, 1242 SyntacticMatches, 116 SemanticMatches, 752 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 4160 ImplicationChecksByTransitivity, 90.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=170occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 39 MinimizatonAttempts, 716 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 39.2s InterpolantComputationTime, 3297 NumberOfCodeBlocks, 3297 NumberOfCodeBlocksAsserted, 68 NumberOfCheckSat, 3148 ConstructedInterpolants, 169 QuantifiedInterpolants, 1014112 SizeOfPredicates, 224 NumberOfNonLiveVariables, 7488 ConjunctsInSsa, 1024 ConjunctsInUnsatCore, 67 InterpolantComputations, 17 PerfectInterpolantSequences, 855/1164 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-0cd3be1 [2018-11-28 13:21:38,841 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 13:21:38,843 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 13:21:38,852 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 13:21:38,852 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 13:21:38,853 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 13:21:38,854 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 13:21:38,855 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 13:21:38,856 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 13:21:38,857 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 13:21:38,858 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 13:21:38,858 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 13:21:38,859 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 13:21:38,860 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 13:21:38,861 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 13:21:38,862 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 13:21:38,863 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 13:21:38,865 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 13:21:38,867 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 13:21:38,868 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 13:21:38,869 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 13:21:38,870 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 13:21:38,872 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 13:21:38,872 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 13:21:38,872 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 13:21:38,873 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 13:21:38,874 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 13:21:38,875 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 13:21:38,876 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 13:21:38,877 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 13:21:38,877 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 13:21:38,877 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 13:21:38,877 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 13:21:38,878 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 13:21:38,879 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 13:21:38,880 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 13:21:38,880 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf [2018-11-28 13:21:38,890 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 13:21:38,891 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 13:21:38,891 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 13:21:38,891 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 13:21:38,892 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 13:21:38,892 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 13:21:38,892 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 13:21:38,892 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 13:21:38,893 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 13:21:38,893 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-28 13:21:38,893 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 13:21:38,893 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 13:21:38,893 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 13:21:38,893 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-11-28 13:21:38,893 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-11-28 13:21:38,893 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-11-28 13:21:38,893 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 13:21:38,894 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-28 13:21:38,894 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-28 13:21:38,894 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 13:21:38,894 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 13:21:38,896 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 13:21:38,896 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 13:21:38,896 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 13:21:38,896 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 13:21:38,896 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 13:21:38,896 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 13:21:38,896 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 13:21:38,897 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-28 13:21:38,897 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 13:21:38,897 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-11-28 13:21:38,897 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2f4049400be941342f32e9ba06dfe9aa51e5b146 [2018-11-28 13:21:38,926 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 13:21:38,935 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 13:21:38,938 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 13:21:38,939 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 13:21:38,940 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 13:21:38,940 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-11-28 13:21:38,987 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/data/f629b7375/88c816b3d31347fb8f7191e2fe5e7b0e/FLAGedce5eb94 [2018-11-28 13:21:39,359 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 13:21:39,359 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-11-28 13:21:39,370 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/data/f629b7375/88c816b3d31347fb8f7191e2fe5e7b0e/FLAGedce5eb94 [2018-11-28 13:21:39,746 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/data/f629b7375/88c816b3d31347fb8f7191e2fe5e7b0e [2018-11-28 13:21:39,749 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 13:21:39,750 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-11-28 13:21:39,751 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 13:21:39,751 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 13:21:39,754 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 13:21:39,754 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 01:21:39" (1/1) ... [2018-11-28 13:21:39,757 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3d94f228 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:21:39, skipping insertion in model container [2018-11-28 13:21:39,757 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 01:21:39" (1/1) ... [2018-11-28 13:21:39,763 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 13:21:39,797 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 13:21:40,089 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 13:21:40,106 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 13:21:40,191 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 13:21:40,238 INFO L195 MainTranslator]: Completed translation [2018-11-28 13:21:40,239 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:21:40 WrapperNode [2018-11-28 13:21:40,239 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 13:21:40,239 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 13:21:40,239 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 13:21:40,240 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 13:21:40,250 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:21:40" (1/1) ... [2018-11-28 13:21:40,250 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:21:40" (1/1) ... [2018-11-28 13:21:40,262 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:21:40" (1/1) ... [2018-11-28 13:21:40,262 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:21:40" (1/1) ... [2018-11-28 13:21:40,279 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:21:40" (1/1) ... [2018-11-28 13:21:40,283 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:21:40" (1/1) ... [2018-11-28 13:21:40,288 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:21:40" (1/1) ... [2018-11-28 13:21:40,295 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 13:21:40,295 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 13:21:40,295 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 13:21:40,295 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 13:21:40,296 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:21:40" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 13:21:40,330 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-28 13:21:40,330 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 13:21:40,330 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-11-28 13:21:40,330 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-11-28 13:21:40,330 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-11-28 13:21:40,331 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-11-28 13:21:40,331 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-11-28 13:21:40,331 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-11-28 13:21:40,331 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-11-28 13:21:40,331 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-11-28 13:21:40,331 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-11-28 13:21:40,331 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-11-28 13:21:40,331 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-11-28 13:21:40,332 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-11-28 13:21:40,332 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-11-28 13:21:40,332 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-11-28 13:21:40,332 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-11-28 13:21:40,332 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-11-28 13:21:40,332 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-11-28 13:21:40,332 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-11-28 13:21:40,332 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-11-28 13:21:40,332 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-11-28 13:21:40,333 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-11-28 13:21:40,333 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-11-28 13:21:40,333 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-11-28 13:21:40,333 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-11-28 13:21:40,333 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-11-28 13:21:40,333 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-11-28 13:21:40,333 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-11-28 13:21:40,333 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-11-28 13:21:40,333 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-11-28 13:21:40,334 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-11-28 13:21:40,334 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-11-28 13:21:40,334 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-11-28 13:21:40,334 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-11-28 13:21:40,334 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-11-28 13:21:40,334 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-11-28 13:21:40,334 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-11-28 13:21:40,334 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_get_clientdata [2018-11-28 13:21:40,335 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_set_clientdata [2018-11-28 13:21:40,335 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_3_11 [2018-11-28 13:21:40,335 INFO L138 BoogieDeclarations]: Found implementation of procedure free_11 [2018-11-28 13:21:40,335 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-11-28 13:21:40,335 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-28 13:21:40,335 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-11-28 13:21:40,335 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-11-28 13:21:40,335 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-11-28 13:21:40,336 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-11-28 13:21:40,336 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-11-28 13:21:40,336 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-11-28 13:21:40,336 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-11-28 13:21:40,336 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-11-28 13:21:40,336 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-11-28 13:21:40,336 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-11-28 13:21:40,336 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-11-28 13:21:40,336 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-11-28 13:21:40,337 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-11-28 13:21:40,337 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-11-28 13:21:40,337 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-11-28 13:21:40,337 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-11-28 13:21:40,337 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-11-28 13:21:40,337 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-11-28 13:21:40,337 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-11-28 13:21:40,337 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-11-28 13:21:40,337 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-11-28 13:21:40,337 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-11-28 13:21:40,338 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-11-28 13:21:40,338 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-11-28 13:21:40,338 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-11-28 13:21:40,338 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-11-28 13:21:40,338 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-11-28 13:21:40,338 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-11-28 13:21:40,338 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-11-28 13:21:40,338 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-11-28 13:21:40,338 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-11-28 13:21:40,338 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-11-28 13:21:40,338 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-11-28 13:21:40,339 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-11-28 13:21:40,339 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-11-28 13:21:40,339 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-11-28 13:21:40,339 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-11-28 13:21:40,339 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-11-28 13:21:40,339 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-11-28 13:21:40,339 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-11-28 13:21:40,339 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-11-28 13:21:40,339 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-11-28 13:21:40,339 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-11-28 13:21:40,339 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-11-28 13:21:40,340 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-11-28 13:21:40,340 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-11-28 13:21:40,340 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-11-28 13:21:40,340 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-11-28 13:21:40,340 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-11-28 13:21:40,340 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-11-28 13:21:40,340 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-11-28 13:21:40,340 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-11-28 13:21:40,340 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-11-28 13:21:40,340 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-11-28 13:21:40,340 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-11-28 13:21:40,341 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-11-28 13:21:40,341 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-11-28 13:21:40,341 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-11-28 13:21:40,341 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-11-28 13:21:40,341 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-11-28 13:21:40,341 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-11-28 13:21:40,341 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-11-28 13:21:40,341 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-11-28 13:21:40,341 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-11-28 13:21:40,341 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-11-28 13:21:40,341 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-11-28 13:21:40,342 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-11-28 13:21:40,342 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-11-28 13:21:40,342 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-11-28 13:21:40,342 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-11-28 13:21:40,342 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-11-28 13:21:40,342 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-11-28 13:21:40,342 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-11-28 13:21:40,342 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-11-28 13:21:40,342 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-11-28 13:21:40,342 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-11-28 13:21:40,342 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-11-28 13:21:40,342 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-11-28 13:21:40,343 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-11-28 13:21:40,343 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-11-28 13:21:40,343 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-11-28 13:21:40,343 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-11-28 13:21:40,343 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-11-28 13:21:40,343 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-11-28 13:21:40,343 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-11-28 13:21:40,343 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-11-28 13:21:40,343 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-11-28 13:21:40,343 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-11-28 13:21:40,344 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-11-28 13:21:40,344 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-11-28 13:21:40,344 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-11-28 13:21:40,344 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-11-28 13:21:40,344 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-11-28 13:21:40,344 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-11-28 13:21:40,344 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-11-28 13:21:40,344 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-11-28 13:21:40,344 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-11-28 13:21:40,344 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-11-28 13:21:40,344 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-11-28 13:21:40,345 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-11-28 13:21:40,345 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-11-28 13:21:40,345 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-11-28 13:21:40,345 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-11-28 13:21:40,345 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-11-28 13:21:40,345 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-11-28 13:21:40,345 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-28 13:21:40,345 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-28 13:21:40,345 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-11-28 13:21:40,345 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-11-28 13:21:40,345 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-11-28 13:21:40,346 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-11-28 13:21:40,346 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-11-28 13:21:40,346 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-11-28 13:21:40,346 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 13:21:40,346 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-11-28 13:21:40,346 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-11-28 13:21:40,346 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-11-28 13:21:40,346 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-28 13:21:40,346 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-11-28 13:21:40,346 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-11-28 13:21:40,346 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-11-28 13:21:40,347 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-28 13:21:40,347 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-11-28 13:21:40,347 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-11-28 13:21:40,347 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-11-28 13:21:40,347 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-11-28 13:21:40,347 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-11-28 13:21:40,347 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-11-28 13:21:40,347 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 13:21:40,347 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-11-28 13:21:40,347 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-11-28 13:21:40,347 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-11-28 13:21:40,348 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-11-28 13:21:40,348 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-11-28 13:21:40,348 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-28 13:21:40,348 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-28 13:21:40,348 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-11-28 13:21:40,348 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-11-28 13:21:40,348 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-11-28 13:21:40,348 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-11-28 13:21:40,348 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-11-28 13:21:40,348 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-11-28 13:21:40,348 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-11-28 13:21:40,349 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-11-28 13:21:40,349 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-11-28 13:21:40,349 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-11-28 13:21:40,349 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-11-28 13:21:40,349 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-11-28 13:21:40,349 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-11-28 13:21:40,349 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-11-28 13:21:40,349 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-11-28 13:21:40,349 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-11-28 13:21:40,349 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-11-28 13:21:40,349 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_get_clientdata [2018-11-28 13:21:40,349 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_set_clientdata [2018-11-28 13:21:40,350 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_3_11 [2018-11-28 13:21:40,350 INFO L130 BoogieDeclarations]: Found specification of procedure free_11 [2018-11-28 13:21:40,350 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-11-28 13:21:40,350 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-28 13:21:40,350 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-28 13:21:40,350 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-11-28 13:21:40,350 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 13:21:40,350 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-11-28 13:21:40,350 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-11-28 13:21:40,350 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-11-28 13:21:40,350 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE4 [2018-11-28 13:21:40,725 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-28 13:21:41,033 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-28 13:21:41,405 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 13:21:41,405 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-11-28 13:21:41,406 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 01:21:41 BoogieIcfgContainer [2018-11-28 13:21:41,406 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 13:21:41,406 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 13:21:41,407 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 13:21:41,409 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 13:21:41,409 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 01:21:39" (1/3) ... [2018-11-28 13:21:41,410 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@678757bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 01:21:41, skipping insertion in model container [2018-11-28 13:21:41,411 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:21:40" (2/3) ... [2018-11-28 13:21:41,411 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@678757bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 01:21:41, skipping insertion in model container [2018-11-28 13:21:41,411 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 01:21:41" (3/3) ... [2018-11-28 13:21:41,413 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-11-28 13:21:41,422 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 13:21:41,429 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 85 error locations. [2018-11-28 13:21:41,444 INFO L257 AbstractCegarLoop]: Starting to check reachability of 85 error locations. [2018-11-28 13:21:41,463 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 13:21:41,464 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 13:21:41,464 INFO L383 AbstractCegarLoop]: Hoare is false [2018-11-28 13:21:41,464 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 13:21:41,464 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 13:21:41,464 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 13:21:41,464 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 13:21:41,464 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 13:21:41,464 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 13:21:41,476 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states. [2018-11-28 13:21:41,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-28 13:21:41,482 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:41,483 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:41,484 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:21:41,487 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:41,488 INFO L82 PathProgramCache]: Analyzing trace with hash -307556449, now seen corresponding path program 1 times [2018-11-28 13:21:41,490 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:21:41,491 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:21:41,506 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:41,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:41,553 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:41,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:21:41,603 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 13:21:41,606 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:21:41,606 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:21:41,608 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:21:41,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:21:41,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:41,618 INFO L87 Difference]: Start difference. First operand 170 states. Second operand 5 states. [2018-11-28 13:21:41,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:41,693 INFO L93 Difference]: Finished difference Result 132 states and 153 transitions. [2018-11-28 13:21:41,694 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:21:41,695 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-28 13:21:41,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:41,705 INFO L225 Difference]: With dead ends: 132 [2018-11-28 13:21:41,705 INFO L226 Difference]: Without dead ends: 129 [2018-11-28 13:21:41,706 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:41,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-11-28 13:21:41,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 101. [2018-11-28 13:21:41,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-11-28 13:21:41,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 113 transitions. [2018-11-28 13:21:41,745 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 113 transitions. Word has length 16 [2018-11-28 13:21:41,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:41,746 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 113 transitions. [2018-11-28 13:21:41,746 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:21:41,746 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 113 transitions. [2018-11-28 13:21:41,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-28 13:21:41,747 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:41,747 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:41,748 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:21:41,748 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:41,748 INFO L82 PathProgramCache]: Analyzing trace with hash 1435253886, now seen corresponding path program 1 times [2018-11-28 13:21:41,748 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:21:41,748 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:21:41,768 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:41,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:41,791 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:41,800 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:21:41,800 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 13:21:41,803 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:21:41,803 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-28 13:21:41,804 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 13:21:41,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 13:21:41,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 13:21:41,804 INFO L87 Difference]: Start difference. First operand 101 states and 113 transitions. Second operand 3 states. [2018-11-28 13:21:41,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:41,991 INFO L93 Difference]: Finished difference Result 144 states and 168 transitions. [2018-11-28 13:21:41,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 13:21:41,992 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-11-28 13:21:41,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:41,993 INFO L225 Difference]: With dead ends: 144 [2018-11-28 13:21:41,993 INFO L226 Difference]: Without dead ends: 141 [2018-11-28 13:21:41,994 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 13:21:41,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-11-28 13:21:42,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 97. [2018-11-28 13:21:42,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-11-28 13:21:42,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 105 transitions. [2018-11-28 13:21:42,003 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 105 transitions. Word has length 16 [2018-11-28 13:21:42,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:42,004 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 105 transitions. [2018-11-28 13:21:42,004 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 13:21:42,004 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 105 transitions. [2018-11-28 13:21:42,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-28 13:21:42,004 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:42,005 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:42,005 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:21:42,005 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:42,005 INFO L82 PathProgramCache]: Analyzing trace with hash -758951418, now seen corresponding path program 1 times [2018-11-28 13:21:42,005 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:21:42,006 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:21:42,021 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:42,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:42,047 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:42,066 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:21:42,066 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:21:42,103 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:21:42,106 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:42,107 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-11-28 13:21:42,107 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:21:42,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:21:42,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:42,107 INFO L87 Difference]: Start difference. First operand 97 states and 105 transitions. Second operand 5 states. [2018-11-28 13:21:42,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:42,140 INFO L93 Difference]: Finished difference Result 96 states and 104 transitions. [2018-11-28 13:21:42,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:21:42,142 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-11-28 13:21:42,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:42,143 INFO L225 Difference]: With dead ends: 96 [2018-11-28 13:21:42,143 INFO L226 Difference]: Without dead ends: 96 [2018-11-28 13:21:42,143 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:42,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-11-28 13:21:42,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 96. [2018-11-28 13:21:42,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-11-28 13:21:42,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 104 transitions. [2018-11-28 13:21:42,150 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 104 transitions. Word has length 21 [2018-11-28 13:21:42,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:42,150 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 104 transitions. [2018-11-28 13:21:42,150 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:21:42,151 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 104 transitions. [2018-11-28 13:21:42,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-28 13:21:42,151 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:42,151 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:42,152 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:21:42,152 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:42,152 INFO L82 PathProgramCache]: Analyzing trace with hash -758951381, now seen corresponding path program 1 times [2018-11-28 13:21:42,152 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:21:42,153 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:21:42,169 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:42,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:42,217 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:42,237 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:42,238 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:42,240 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:42,241 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:21:42,696 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|)) is different from true [2018-11-28 13:21:42,703 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 13:21:42,704 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:42,708 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:21:42,708 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:11 [2018-11-28 13:21:42,715 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-11-28 13:21:42,715 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:21:42,803 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:21:42,810 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:42,811 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5] total 7 [2018-11-28 13:21:42,811 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 13:21:42,811 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 13:21:42,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=27, Unknown=5, NotChecked=10, Total=56 [2018-11-28 13:21:42,811 INFO L87 Difference]: Start difference. First operand 96 states and 104 transitions. Second operand 8 states. [2018-11-28 13:21:43,728 WARN L180 SmtUtils]: Spent 884.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 13 [2018-11-28 13:21:44,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:44,447 INFO L93 Difference]: Finished difference Result 179 states and 221 transitions. [2018-11-28 13:21:44,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 13:21:44,448 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-11-28 13:21:44,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:44,450 INFO L225 Difference]: With dead ends: 179 [2018-11-28 13:21:44,450 INFO L226 Difference]: Without dead ends: 179 [2018-11-28 13:21:44,450 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 32 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=32, Invalid=73, Unknown=9, NotChecked=18, Total=132 [2018-11-28 13:21:44,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-11-28 13:21:44,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 106. [2018-11-28 13:21:44,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-11-28 13:21:44,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 121 transitions. [2018-11-28 13:21:44,460 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 121 transitions. Word has length 21 [2018-11-28 13:21:44,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:44,461 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 121 transitions. [2018-11-28 13:21:44,461 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 13:21:44,461 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 121 transitions. [2018-11-28 13:21:44,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-28 13:21:44,461 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:44,462 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:44,462 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:21:44,462 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:44,462 INFO L82 PathProgramCache]: Analyzing trace with hash -758951380, now seen corresponding path program 1 times [2018-11-28 13:21:44,463 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:21:44,463 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:21:44,478 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:44,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:44,530 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:44,541 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:44,542 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:44,549 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:44,549 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:44,556 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:44,556 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 13:21:45,501 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-11-28 13:21:45,508 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:45,509 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:45,510 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:21:45,510 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:45,523 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:21:45,523 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:45,531 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:45,531 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-11-28 13:21:45,543 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-11-28 13:21:45,543 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:21:45,665 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:45,665 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:45,675 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:45,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:45,696 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:45,703 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:45,703 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:45,711 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:21:45,712 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:45,717 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:45,717 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 13:21:45,729 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:45,730 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:45,731 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:21:45,731 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:45,746 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:21:45,746 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:45,753 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:45,754 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-11-28 13:21:45,755 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-11-28 13:21:45,755 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:21:45,870 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:45,870 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-11-28 13:21:45,871 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 13:21:45,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 13:21:45,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=70, Unknown=1, NotChecked=16, Total=110 [2018-11-28 13:21:45,871 INFO L87 Difference]: Start difference. First operand 106 states and 121 transitions. Second operand 9 states. [2018-11-28 13:21:46,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:46,807 INFO L93 Difference]: Finished difference Result 187 states and 225 transitions. [2018-11-28 13:21:46,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 13:21:46,808 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-11-28 13:21:46,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:46,809 INFO L225 Difference]: With dead ends: 187 [2018-11-28 13:21:46,809 INFO L226 Difference]: Without dead ends: 187 [2018-11-28 13:21:46,809 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 38 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=31, Invalid=104, Unknown=1, NotChecked=20, Total=156 [2018-11-28 13:21:46,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-11-28 13:21:46,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 106. [2018-11-28 13:21:46,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-11-28 13:21:46,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 120 transitions. [2018-11-28 13:21:46,819 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 120 transitions. Word has length 21 [2018-11-28 13:21:46,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:46,819 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 120 transitions. [2018-11-28 13:21:46,819 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 13:21:46,820 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 120 transitions. [2018-11-28 13:21:46,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-28 13:21:46,820 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:46,820 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:46,821 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:21:46,821 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:46,821 INFO L82 PathProgramCache]: Analyzing trace with hash -1052354388, now seen corresponding path program 1 times [2018-11-28 13:21:46,821 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:21:46,822 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:21:46,837 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:46,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:46,876 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:46,892 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:21:46,892 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 13:21:46,894 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:21:46,894 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:21:46,894 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:21:46,894 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:21:46,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:46,895 INFO L87 Difference]: Start difference. First operand 106 states and 120 transitions. Second operand 5 states. [2018-11-28 13:21:46,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:46,911 INFO L93 Difference]: Finished difference Result 100 states and 110 transitions. [2018-11-28 13:21:46,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:21:46,912 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-11-28 13:21:46,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:46,913 INFO L225 Difference]: With dead ends: 100 [2018-11-28 13:21:46,913 INFO L226 Difference]: Without dead ends: 98 [2018-11-28 13:21:46,913 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:46,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-11-28 13:21:46,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-11-28 13:21:46,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-11-28 13:21:46,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 108 transitions. [2018-11-28 13:21:46,917 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 108 transitions. Word has length 21 [2018-11-28 13:21:46,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:46,918 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 108 transitions. [2018-11-28 13:21:46,918 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:21:46,918 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 108 transitions. [2018-11-28 13:21:46,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-28 13:21:46,920 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:46,920 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:46,920 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:21:46,920 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:46,920 INFO L82 PathProgramCache]: Analyzing trace with hash 1038858468, now seen corresponding path program 1 times [2018-11-28 13:21:46,921 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:21:46,921 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:21:46,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:46,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:46,962 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:46,984 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:21:46,984 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 13:21:46,985 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:21:46,985 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:21:46,986 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:21:46,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:21:46,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:46,986 INFO L87 Difference]: Start difference. First operand 98 states and 108 transitions. Second operand 5 states. [2018-11-28 13:21:47,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:21:47,039 INFO L93 Difference]: Finished difference Result 122 states and 138 transitions. [2018-11-28 13:21:47,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:21:47,040 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-11-28 13:21:47,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:21:47,041 INFO L225 Difference]: With dead ends: 122 [2018-11-28 13:21:47,041 INFO L226 Difference]: Without dead ends: 122 [2018-11-28 13:21:47,041 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:21:47,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-11-28 13:21:47,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 100. [2018-11-28 13:21:47,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-11-28 13:21:47,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 110 transitions. [2018-11-28 13:21:47,046 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 110 transitions. Word has length 25 [2018-11-28 13:21:47,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:21:47,047 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 110 transitions. [2018-11-28 13:21:47,047 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:21:47,047 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 110 transitions. [2018-11-28 13:21:47,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-28 13:21:47,047 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:21:47,048 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:21:47,048 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:21:47,048 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:21:47,048 INFO L82 PathProgramCache]: Analyzing trace with hash 842344963, now seen corresponding path program 1 times [2018-11-28 13:21:47,048 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:21:47,048 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:21:47,064 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:47,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:47,107 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:47,133 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 17 [2018-11-28 13:21:47,137 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:47,142 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 15 [2018-11-28 13:21:47,143 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-11-28 13:21:47,149 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-28 13:21:47,150 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 15 [2018-11-28 13:21:47,152 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:21:47,153 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2018-11-28 13:21:47,153 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:21:47,156 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:21:47,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 13:21:47,163 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:18, output treesize:19 [2018-11-28 13:21:49,237 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~c11~0.base (_ BitVec 32))) (and (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= |c_#valid| (store |c_old(#valid)| entry_point_~c11~0.base (_ bv0 1))))) is different from true [2018-11-28 13:21:49,259 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:21:49,259 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:21:49,685 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_17 (_ BitVec 32))) (or (not (= (select |c_#valid| v_entry_point_~c11~0.base_17) (_ bv0 1))) (= |c_old(#valid)| (store |c_#valid| v_entry_point_~c11~0.base_17 (_ bv0 1))))) is different from false [2018-11-28 13:21:49,688 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:21:49,688 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:21:49,694 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:21:49,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:21:49,707 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:21:49,719 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:21:49,719 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:21:50,270 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_20 (_ BitVec 32))) (or (not (= (select |c_#valid| v_entry_point_~c11~0.base_20) (_ bv0 1))) (= |c_old(#valid)| (store |c_#valid| v_entry_point_~c11~0.base_20 (_ bv0 1))))) is different from false [2018-11-28 13:21:50,286 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:21:50,286 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 6] total 9 [2018-11-28 13:21:50,286 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 13:21:50,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 13:21:50,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=52, Unknown=3, NotChecked=48, Total=132 [2018-11-28 13:21:50,287 INFO L87 Difference]: Start difference. First operand 100 states and 110 transitions. Second operand 10 states. [2018-11-28 13:22:12,551 WARN L180 SmtUtils]: Spent 2.65 s on a formula simplification. DAG size of input: 12 DAG size of output: 10 [2018-11-28 13:22:56,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:22:56,253 INFO L93 Difference]: Finished difference Result 121 states and 131 transitions. [2018-11-28 13:22:56,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 13:22:56,254 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 25 [2018-11-28 13:22:56,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:22:56,255 INFO L225 Difference]: With dead ends: 121 [2018-11-28 13:22:56,255 INFO L226 Difference]: Without dead ends: 116 [2018-11-28 13:22:56,255 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=33, Invalid=66, Unknown=3, NotChecked=54, Total=156 [2018-11-28 13:22:56,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-11-28 13:22:56,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 100. [2018-11-28 13:22:56,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-11-28 13:22:56,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 107 transitions. [2018-11-28 13:22:56,260 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 107 transitions. Word has length 25 [2018-11-28 13:22:56,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:22:56,261 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 107 transitions. [2018-11-28 13:22:56,261 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 13:22:56,261 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 107 transitions. [2018-11-28 13:22:56,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-28 13:22:56,261 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:22:56,261 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:22:56,262 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:22:56,265 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:22:56,265 INFO L82 PathProgramCache]: Analyzing trace with hash -677007919, now seen corresponding path program 1 times [2018-11-28 13:22:56,265 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:22:56,265 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:22:56,280 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:22:56,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:22:56,306 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:22:56,319 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:22:56,319 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:22:56,368 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:22:56,371 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:22:56,371 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-11-28 13:22:56,371 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:22:56,371 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:22:56,372 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:22:56,372 INFO L87 Difference]: Start difference. First operand 100 states and 107 transitions. Second operand 5 states. [2018-11-28 13:22:56,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:22:56,413 INFO L93 Difference]: Finished difference Result 99 states and 106 transitions. [2018-11-28 13:22:56,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:22:56,414 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-11-28 13:22:56,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:22:56,414 INFO L225 Difference]: With dead ends: 99 [2018-11-28 13:22:56,414 INFO L226 Difference]: Without dead ends: 99 [2018-11-28 13:22:56,415 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:22:56,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-11-28 13:22:56,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-11-28 13:22:56,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-11-28 13:22:56,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 106 transitions. [2018-11-28 13:22:56,418 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 106 transitions. Word has length 29 [2018-11-28 13:22:56,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:22:56,419 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 106 transitions. [2018-11-28 13:22:56,419 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:22:56,419 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 106 transitions. [2018-11-28 13:22:56,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-28 13:22:56,419 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:22:56,420 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:22:56,420 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:22:56,420 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:22:56,420 INFO L82 PathProgramCache]: Analyzing trace with hash -677007867, now seen corresponding path program 1 times [2018-11-28 13:22:56,420 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:22:56,421 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:22:56,439 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:22:56,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:22:56,499 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:22:56,502 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:22:56,502 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:22:56,506 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:22:56,506 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:22:56,920 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|)) is different from true [2018-11-28 13:22:56,924 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-11-28 13:22:56,924 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:22:56,928 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:22:56,928 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:14, output treesize:11 [2018-11-28 13:22:56,933 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 2 not checked. [2018-11-28 13:22:56,933 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:22:57,035 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:22:57,036 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:22:57,036 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-11-28 13:22:57,037 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 13:22:57,037 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 13:22:57,037 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=66, Unknown=5, NotChecked=16, Total=110 [2018-11-28 13:22:57,037 INFO L87 Difference]: Start difference. First operand 99 states and 106 transitions. Second operand 11 states. [2018-11-28 13:22:57,939 WARN L180 SmtUtils]: Spent 868.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 13 [2018-11-28 13:22:58,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:22:58,605 INFO L93 Difference]: Finished difference Result 138 states and 159 transitions. [2018-11-28 13:22:58,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 13:22:58,606 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 29 [2018-11-28 13:22:58,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:22:58,607 INFO L225 Difference]: With dead ends: 138 [2018-11-28 13:22:58,607 INFO L226 Difference]: Without dead ends: 138 [2018-11-28 13:22:58,607 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 44 SyntacticMatches, 4 SemanticMatches, 12 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=38, Invalid=114, Unknown=8, NotChecked=22, Total=182 [2018-11-28 13:22:58,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-11-28 13:22:58,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 108. [2018-11-28 13:22:58,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-11-28 13:22:58,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 118 transitions. [2018-11-28 13:22:58,613 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 118 transitions. Word has length 29 [2018-11-28 13:22:58,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:22:58,614 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 118 transitions. [2018-11-28 13:22:58,614 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 13:22:58,614 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 118 transitions. [2018-11-28 13:22:58,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-28 13:22:58,614 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:22:58,615 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:22:58,615 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:22:58,615 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:22:58,615 INFO L82 PathProgramCache]: Analyzing trace with hash -677007866, now seen corresponding path program 1 times [2018-11-28 13:22:58,615 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:22:58,616 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:22:58,631 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:22:58,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:22:58,699 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:22:58,715 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:22:58,715 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:22:58,724 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:22:58,725 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:22:58,730 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:22:58,730 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 13:22:59,541 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-11-28 13:22:59,548 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:22:59,551 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:22:59,551 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:22:59,570 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:22:59,571 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:22:59,571 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:22:59,571 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:22:59,583 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:22:59,583 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-11-28 13:22:59,600 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 2 not checked. [2018-11-28 13:22:59,600 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:22:59,738 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:22:59,739 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:22:59,745 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:22:59,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:22:59,762 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:22:59,766 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:22:59,766 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:22:59,773 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:22:59,773 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:22:59,778 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:22:59,778 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 13:22:59,787 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:22:59,790 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:22:59,790 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:22:59,807 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:22:59,808 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:22:59,808 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:22:59,809 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:22:59,816 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:22:59,816 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-11-28 13:22:59,817 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 2 not checked. [2018-11-28 13:22:59,817 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:22:59,918 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:22:59,918 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-11-28 13:22:59,919 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 13:22:59,919 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 13:22:59,919 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=70, Unknown=1, NotChecked=16, Total=110 [2018-11-28 13:22:59,919 INFO L87 Difference]: Start difference. First operand 108 states and 118 transitions. Second operand 9 states. [2018-11-28 13:23:00,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:23:00,663 INFO L93 Difference]: Finished difference Result 147 states and 166 transitions. [2018-11-28 13:23:00,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 13:23:00,663 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-11-28 13:23:00,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:23:00,664 INFO L225 Difference]: With dead ends: 147 [2018-11-28 13:23:00,664 INFO L226 Difference]: Without dead ends: 147 [2018-11-28 13:23:00,664 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 55 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=31, Invalid=104, Unknown=1, NotChecked=20, Total=156 [2018-11-28 13:23:00,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-11-28 13:23:00,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 108. [2018-11-28 13:23:00,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-11-28 13:23:00,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 117 transitions. [2018-11-28 13:23:00,668 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 117 transitions. Word has length 29 [2018-11-28 13:23:00,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:23:00,668 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 117 transitions. [2018-11-28 13:23:00,668 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 13:23:00,669 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 117 transitions. [2018-11-28 13:23:00,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-28 13:23:00,669 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:23:00,669 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:23:00,670 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:23:00,670 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:23:00,670 INFO L82 PathProgramCache]: Analyzing trace with hash -1182566492, now seen corresponding path program 1 times [2018-11-28 13:23:00,670 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:23:00,673 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:23:00,695 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:23:00,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:23:00,739 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:23:00,753 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:23:00,753 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 13:23:00,755 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:23:00,755 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:23:00,755 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:23:00,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:23:00,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:23:00,755 INFO L87 Difference]: Start difference. First operand 108 states and 117 transitions. Second operand 5 states. [2018-11-28 13:23:00,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:23:00,777 INFO L93 Difference]: Finished difference Result 103 states and 110 transitions. [2018-11-28 13:23:00,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:23:00,777 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-11-28 13:23:00,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:23:00,778 INFO L225 Difference]: With dead ends: 103 [2018-11-28 13:23:00,778 INFO L226 Difference]: Without dead ends: 99 [2018-11-28 13:23:00,778 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:23:00,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-11-28 13:23:00,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 97. [2018-11-28 13:23:00,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-11-28 13:23:00,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 103 transitions. [2018-11-28 13:23:00,781 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 103 transitions. Word has length 29 [2018-11-28 13:23:00,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:23:00,781 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 103 transitions. [2018-11-28 13:23:00,781 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:23:00,781 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 103 transitions. [2018-11-28 13:23:00,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-28 13:23:00,783 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:23:00,783 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:23:00,784 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:23:00,784 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:23:00,784 INFO L82 PathProgramCache]: Analyzing trace with hash 425511469, now seen corresponding path program 1 times [2018-11-28 13:23:00,784 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:23:00,784 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:23:00,803 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:23:00,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:23:00,869 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:23:01,269 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|)) is different from true [2018-11-28 13:23:01,273 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-11-28 13:23:01,273 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:01,276 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:23:01,277 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:14, output treesize:11 [2018-11-28 13:23:01,288 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:23:01,288 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 13:23:01,289 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:23:01,290 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 13:23:01,290 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 13:23:01,290 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 13:23:01,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=22, Unknown=1, NotChecked=8, Total=42 [2018-11-28 13:23:01,290 INFO L87 Difference]: Start difference. First operand 97 states and 103 transitions. Second operand 7 states. [2018-11-28 13:23:01,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:23:01,577 INFO L93 Difference]: Finished difference Result 117 states and 129 transitions. [2018-11-28 13:23:01,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 13:23:01,577 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 32 [2018-11-28 13:23:01,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:23:01,578 INFO L225 Difference]: With dead ends: 117 [2018-11-28 13:23:01,578 INFO L226 Difference]: Without dead ends: 117 [2018-11-28 13:23:01,578 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=21, Invalid=38, Unknown=1, NotChecked=12, Total=72 [2018-11-28 13:23:01,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-11-28 13:23:01,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 96. [2018-11-28 13:23:01,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-11-28 13:23:01,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 102 transitions. [2018-11-28 13:23:01,582 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 102 transitions. Word has length 32 [2018-11-28 13:23:01,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:23:01,582 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 102 transitions. [2018-11-28 13:23:01,583 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 13:23:01,583 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 102 transitions. [2018-11-28 13:23:01,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-28 13:23:01,583 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:23:01,583 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:23:01,584 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:23:01,584 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:23:01,584 INFO L82 PathProgramCache]: Analyzing trace with hash 425511470, now seen corresponding path program 1 times [2018-11-28 13:23:01,584 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:23:01,584 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:23:01,601 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:23:01,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:23:01,692 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:23:01,697 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:23:01,698 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:01,707 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:23:01,707 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:01,712 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:01,713 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 13:23:02,685 WARN L180 SmtUtils]: Spent 927.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-11-28 13:23:02,691 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:02,693 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:02,693 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:23:02,694 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:02,707 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:23:02,707 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:02,714 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:02,715 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:15 [2018-11-28 13:23:03,572 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-11-28 13:23:03,578 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:03,579 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:23:03,580 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:03,592 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:03,593 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:03,593 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:23:03,593 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:03,601 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:03,601 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-11-28 13:23:03,644 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 4 not checked. [2018-11-28 13:23:03,644 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:23:03,917 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:23:03,917 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:23:03,924 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:23:03,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:23:03,947 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:23:04,087 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:04,088 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:04,089 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:23:04,089 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:04,104 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:23:04,105 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:04,114 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:04,115 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-11-28 13:23:04,229 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 2 not checked. [2018-11-28 13:23:04,229 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:23:04,360 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:23:04,360 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 19 [2018-11-28 13:23:04,360 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-28 13:23:04,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-28 13:23:04,360 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=437, Unknown=1, NotChecked=42, Total=552 [2018-11-28 13:23:04,361 INFO L87 Difference]: Start difference. First operand 96 states and 102 transitions. Second operand 20 states. [2018-11-28 13:23:06,827 WARN L180 SmtUtils]: Spent 2.37 s on a formula simplification. DAG size of input: 31 DAG size of output: 24 [2018-11-28 13:23:36,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:23:36,678 INFO L93 Difference]: Finished difference Result 136 states and 153 transitions. [2018-11-28 13:23:36,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-28 13:23:36,679 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-11-28 13:23:36,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:23:36,679 INFO L225 Difference]: With dead ends: 136 [2018-11-28 13:23:36,679 INFO L226 Difference]: Without dead ends: 136 [2018-11-28 13:23:36,680 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 54 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=111, Invalid=704, Unknown=1, NotChecked=54, Total=870 [2018-11-28 13:23:36,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-11-28 13:23:36,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 95. [2018-11-28 13:23:36,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-11-28 13:23:36,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 101 transitions. [2018-11-28 13:23:36,683 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 101 transitions. Word has length 32 [2018-11-28 13:23:36,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:23:36,684 INFO L480 AbstractCegarLoop]: Abstraction has 95 states and 101 transitions. [2018-11-28 13:23:36,684 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-28 13:23:36,684 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 101 transitions. [2018-11-28 13:23:36,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-28 13:23:36,684 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:23:36,684 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:23:36,685 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:23:36,685 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:23:36,685 INFO L82 PathProgramCache]: Analyzing trace with hash 423935168, now seen corresponding path program 1 times [2018-11-28 13:23:36,685 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:23:36,685 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:23:36,704 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:23:36,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:23:36,726 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:23:36,737 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:23:36,737 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 13:23:36,738 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:23:36,738 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:23:36,739 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:23:36,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:23:36,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:23:36,739 INFO L87 Difference]: Start difference. First operand 95 states and 101 transitions. Second operand 5 states. [2018-11-28 13:23:36,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:23:36,767 INFO L93 Difference]: Finished difference Result 114 states and 124 transitions. [2018-11-28 13:23:36,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:23:36,767 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2018-11-28 13:23:36,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:23:36,768 INFO L225 Difference]: With dead ends: 114 [2018-11-28 13:23:36,768 INFO L226 Difference]: Without dead ends: 114 [2018-11-28 13:23:36,768 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:23:36,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-11-28 13:23:36,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 99. [2018-11-28 13:23:36,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-11-28 13:23:36,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 106 transitions. [2018-11-28 13:23:36,771 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 106 transitions. Word has length 32 [2018-11-28 13:23:36,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:23:36,772 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 106 transitions. [2018-11-28 13:23:36,772 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:23:36,772 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 106 transitions. [2018-11-28 13:23:36,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-28 13:23:36,772 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:23:36,772 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:23:36,773 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:23:36,773 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:23:36,773 INFO L82 PathProgramCache]: Analyzing trace with hash -1383519295, now seen corresponding path program 1 times [2018-11-28 13:23:36,773 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:23:36,773 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:23:36,792 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:23:36,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:23:36,850 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:23:36,852 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:23:36,853 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:36,854 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:36,854 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:23:36,875 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:36,876 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:36,876 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:23:36,876 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:36,878 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:36,878 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-11-28 13:23:36,918 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:36,919 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-11-28 13:23:36,919 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:36,927 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:23:36,928 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:13 [2018-11-28 13:23:36,952 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:23:36,952 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:23:37,012 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:23:37,012 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:37,017 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:37,017 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:26, output treesize:4 [2018-11-28 13:23:37,114 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 4 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:23:37,117 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:23:37,117 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 11 [2018-11-28 13:23:37,118 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-28 13:23:37,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-28 13:23:37,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=101, Unknown=6, NotChecked=0, Total=132 [2018-11-28 13:23:37,118 INFO L87 Difference]: Start difference. First operand 99 states and 106 transitions. Second operand 12 states. [2018-11-28 13:23:43,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:23:43,995 INFO L93 Difference]: Finished difference Result 133 states and 148 transitions. [2018-11-28 13:23:43,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 13:23:43,995 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 32 [2018-11-28 13:23:43,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:23:43,996 INFO L225 Difference]: With dead ends: 133 [2018-11-28 13:23:43,996 INFO L226 Difference]: Without dead ends: 133 [2018-11-28 13:23:43,996 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 47 SyntacticMatches, 6 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=57, Invalid=236, Unknown=13, NotChecked=0, Total=306 [2018-11-28 13:23:43,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-11-28 13:23:43,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 101. [2018-11-28 13:23:43,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-11-28 13:23:43,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 108 transitions. [2018-11-28 13:23:43,999 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 108 transitions. Word has length 32 [2018-11-28 13:23:43,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:23:43,999 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 108 transitions. [2018-11-28 13:23:43,999 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-28 13:23:43,999 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 108 transitions. [2018-11-28 13:23:44,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-28 13:23:44,000 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:23:44,000 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:23:44,000 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:23:44,001 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:23:44,001 INFO L82 PathProgramCache]: Analyzing trace with hash 894637102, now seen corresponding path program 1 times [2018-11-28 13:23:44,001 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:23:44,001 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:23:44,015 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:23:44,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:23:44,096 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:23:44,098 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:23:44,098 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:44,101 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:44,102 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 13:23:44,136 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:44,137 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:44,138 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:23:44,138 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:44,144 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:44,144 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-11-28 13:23:44,168 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-28 13:23:44,168 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:44,179 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:23:44,181 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:23:44,181 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:44,184 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:44,189 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:44,189 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:24, output treesize:15 [2018-11-28 13:23:46,210 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_19 (_ BitVec 32))) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_19 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_19) (_ bv0 32))))) is different from true [2018-11-28 13:23:46,241 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-11-28 13:23:46,244 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 13:23:46,245 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,252 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,261 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,261 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:21 [2018-11-28 13:23:46,322 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-28 13:23:46,324 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-28 13:23:46,325 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,332 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,335 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,336 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:5 [2018-11-28 13:23:46,367 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-11-28 13:23:46,367 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:23:46,434 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 19 [2018-11-28 13:23:46,434 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,437 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:23:46,437 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:24, output treesize:15 [2018-11-28 13:23:46,497 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:23:46,497 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:23:46,503 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:23:46,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:23:46,524 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:23:46,526 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:23:46,527 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,528 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,528 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:23:46,590 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:46,591 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:23:46,592 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:23:46,592 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,593 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,594 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-11-28 13:23:46,645 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:23:46,647 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:23:46,647 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,649 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,663 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:46,664 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:16, output treesize:12 [2018-11-28 13:23:48,712 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_14 (_ BitVec 32)) (v_entry_point_~c11~0.base_BEFORE_CALL_22 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_22) v_entry_point_~c11~0.offset_BEFORE_CALL_14) v_entry_point_~c11~0.base_BEFORE_CALL_22))) is different from true [2018-11-28 13:23:48,769 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-11-28 13:23:48,771 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 13:23:48,771 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:48,779 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:48,787 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:48,787 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:20 [2018-11-28 13:23:48,905 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-28 13:23:48,907 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-28 13:23:48,908 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:48,912 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:48,920 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:23:48,920 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:5 [2018-11-28 13:23:48,921 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-11-28 13:23:48,921 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:23:48,926 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 19 [2018-11-28 13:23:48,926 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:23:48,929 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:23:48,929 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:24, output treesize:15 [2018-11-28 13:23:49,036 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:23:49,051 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-28 13:23:49,051 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14] total 29 [2018-11-28 13:23:49,052 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-11-28 13:23:49,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-11-28 13:23:49,052 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=720, Unknown=18, NotChecked=110, Total=930 [2018-11-28 13:23:49,052 INFO L87 Difference]: Start difference. First operand 101 states and 108 transitions. Second operand 30 states. [2018-11-28 13:23:55,546 WARN L180 SmtUtils]: Spent 4.01 s on a formula simplification. DAG size of input: 19 DAG size of output: 12 [2018-11-28 13:24:01,633 WARN L180 SmtUtils]: Spent 4.03 s on a formula simplification. DAG size of input: 36 DAG size of output: 29 [2018-11-28 13:24:13,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:24:13,962 INFO L93 Difference]: Finished difference Result 154 states and 174 transitions. [2018-11-28 13:24:13,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-11-28 13:24:13,962 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 34 [2018-11-28 13:24:13,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:24:13,963 INFO L225 Difference]: With dead ends: 154 [2018-11-28 13:24:13,963 INFO L226 Difference]: Without dead ends: 154 [2018-11-28 13:24:13,964 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 76 SyntacticMatches, 4 SemanticMatches, 51 ConstructedPredicates, 2 IntricatePredicates, 1 DeprecatedPredicates, 433 ImplicationChecksByTransitivity, 27.5s TimeCoverageRelationStatistics Valid=293, Invalid=2219, Unknown=46, NotChecked=198, Total=2756 [2018-11-28 13:24:13,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-11-28 13:24:13,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 104. [2018-11-28 13:24:13,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-11-28 13:24:13,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 111 transitions. [2018-11-28 13:24:13,969 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 111 transitions. Word has length 34 [2018-11-28 13:24:13,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:24:13,969 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 111 transitions. [2018-11-28 13:24:13,969 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-11-28 13:24:13,969 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 111 transitions. [2018-11-28 13:24:13,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-28 13:24:13,969 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:24:13,970 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:24:13,970 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:24:13,970 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:24:13,970 INFO L82 PathProgramCache]: Analyzing trace with hash 894637103, now seen corresponding path program 1 times [2018-11-28 13:24:13,970 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:24:13,970 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:24:13,990 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:24:14,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:24:14,106 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:24:14,109 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:24:14,109 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,116 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 13:24:14,155 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:24:14,156 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:24:14,157 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:24:14,157 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,163 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:11 [2018-11-28 13:24:14,210 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:24:14,213 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:24:14,213 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,219 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,249 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:24:14,252 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:24:14,252 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,255 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,273 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,273 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:33, output treesize:25 [2018-11-28 13:24:14,404 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2018-11-28 13:24:14,409 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 13:24:14,410 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,430 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,482 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-11-28 13:24:14,487 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 13:24:14,487 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,497 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,517 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,518 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:66, output treesize:28 [2018-11-28 13:24:14,652 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-28 13:24:14,655 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-28 13:24:14,655 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,658 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,671 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-28 13:24:14,674 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-28 13:24:14,674 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,680 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,689 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:14,689 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:9 [2018-11-28 13:24:14,752 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:24:14,752 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:24:15,238 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 44 [2018-11-28 13:24:15,239 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-11-28 13:24:15,373 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2018-11-28 13:24:15,374 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:24:15,518 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-11-28 13:24:15,519 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:24:15,677 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 10 dim-0 vars, and 4 xjuncts. [2018-11-28 13:24:15,677 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:103, output treesize:122 [2018-11-28 13:24:16,603 WARN L180 SmtUtils]: Spent 478.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 46 [2018-11-28 13:24:16,612 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:24:16,612 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:24:16,620 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:24:16,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:24:16,669 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:24:16,672 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:24:16,672 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:16,673 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:16,673 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:24:16,810 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:24:16,811 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:24:16,812 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:24:16,812 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:16,816 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:16,817 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-11-28 13:24:16,931 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:24:16,934 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:24:16,934 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:16,937 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:16,956 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:24:16,959 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:24:16,959 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:16,962 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:16,972 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:16,972 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:22 [2018-11-28 13:24:17,249 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-11-28 13:24:17,252 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 13:24:17,253 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:17,263 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:17,293 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 44 [2018-11-28 13:24:17,296 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 13:24:17,296 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:17,309 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:17,323 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:17,323 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:63, output treesize:25 [2018-11-28 13:24:17,533 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-28 13:24:17,536 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-28 13:24:17,536 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:17,539 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:17,550 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-28 13:24:17,553 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-28 13:24:17,553 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:17,559 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:17,566 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:17,566 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:39, output treesize:9 [2018-11-28 13:24:17,568 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:24:17,568 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:24:17,581 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2018-11-28 13:24:17,582 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:24:17,792 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 54 [2018-11-28 13:24:17,794 INFO L267 ElimStorePlain]: Start of recursive call 3: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-11-28 13:24:18,025 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-11-28 13:24:18,025 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:24:18,230 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 10 dim-0 vars, and 4 xjuncts. [2018-11-28 13:24:18,230 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:133, output treesize:162 [2018-11-28 13:24:19,175 WARN L180 SmtUtils]: Spent 497.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 54 [2018-11-28 13:24:19,202 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:24:19,202 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 25 [2018-11-28 13:24:19,202 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-11-28 13:24:19,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-11-28 13:24:19,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=955, Unknown=0, NotChecked=0, Total=1056 [2018-11-28 13:24:19,203 INFO L87 Difference]: Start difference. First operand 104 states and 111 transitions. Second operand 26 states. [2018-11-28 13:24:24,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:24:24,067 INFO L93 Difference]: Finished difference Result 134 states and 148 transitions. [2018-11-28 13:24:24,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-28 13:24:24,067 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 34 [2018-11-28 13:24:24,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:24:24,068 INFO L225 Difference]: With dead ends: 134 [2018-11-28 13:24:24,068 INFO L226 Difference]: Without dead ends: 134 [2018-11-28 13:24:24,068 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 52 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 343 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=223, Invalid=1669, Unknown=0, NotChecked=0, Total=1892 [2018-11-28 13:24:24,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-11-28 13:24:24,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 103. [2018-11-28 13:24:24,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-11-28 13:24:24,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 110 transitions. [2018-11-28 13:24:24,071 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 110 transitions. Word has length 34 [2018-11-28 13:24:24,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:24:24,071 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 110 transitions. [2018-11-28 13:24:24,071 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-11-28 13:24:24,071 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 110 transitions. [2018-11-28 13:24:24,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-28 13:24:24,072 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:24:24,072 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:24:24,072 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:24:24,072 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:24:24,073 INFO L82 PathProgramCache]: Analyzing trace with hash -1916708687, now seen corresponding path program 1 times [2018-11-28 13:24:24,073 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:24:24,073 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:24:24,107 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:24:24,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:24:24,187 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:24:24,223 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 17 [2018-11-28 13:24:24,227 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:24:24,232 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 15 [2018-11-28 13:24:24,232 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-11-28 13:24:24,239 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-28 13:24:24,241 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 15 [2018-11-28 13:24:24,242 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:24:24,243 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2018-11-28 13:24:24,243 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:24:24,246 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:24:24,253 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 13:24:24,253 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:18, output treesize:19 [2018-11-28 13:24:31,529 WARN L180 SmtUtils]: Spent 3.35 s on a formula simplification that was a NOOP. DAG size: 24 [2018-11-28 13:24:32,322 WARN L180 SmtUtils]: Spent 768.00 ms on a formula simplification that was a NOOP. DAG size: 19 [2018-11-28 13:24:33,804 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~c11~0.base (_ BitVec 32)) (v_prenex_27 (_ BitVec 32))) (let ((.cse0 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (let ((.cse1 (store .cse0 v_prenex_27 (_ bv0 1)))) (and (not (= (_ bv0 32) entry_point_~c11~0.base)) (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= (select .cse0 v_prenex_27) (_ bv0 1)) (= |c_#valid| (store .cse1 entry_point_~c11~0.base (_ bv0 1))) (= (_ bv1 1) (select .cse1 entry_point_~c11~0.base)))))) is different from true [2018-11-28 13:24:33,862 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:24:33,862 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:24:34,043 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 47 [2018-11-28 13:24:35,472 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_25 (_ BitVec 32)) (v_entry_point_~cfg~1.base_26 (_ BitVec 32))) (let ((.cse0 (store |c_#valid| v_entry_point_~c11~0.base_25 (_ bv1 1)))) (or (= v_entry_point_~c11~0.base_25 (_ bv0 32)) (= (store (store .cse0 v_entry_point_~cfg~1.base_26 (_ bv0 1)) v_entry_point_~c11~0.base_25 (_ bv0 1)) |c_old(#valid)|) (not (= (_ bv0 1) (select .cse0 v_entry_point_~cfg~1.base_26))) (not (= (select |c_#valid| v_entry_point_~c11~0.base_25) (_ bv0 1)))))) is different from false [2018-11-28 13:24:35,475 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:24:35,475 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:24:35,482 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:24:35,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:24:35,500 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:24:44,937 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 16 [2018-11-28 13:24:46,942 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~c11~0.base (_ BitVec 32)) (entry_point_~cfg~1.base (_ BitVec 32))) (let ((.cse0 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (and (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= (select .cse0 entry_point_~cfg~1.base) (_ bv0 1)) (= |c_#valid| (store (store .cse0 entry_point_~cfg~1.base (_ bv0 1)) entry_point_~c11~0.base (_ bv0 1)))))) is different from true [2018-11-28 13:24:46,945 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:24:46,945 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:24:49,080 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_28 (_ BitVec 32)) (v_entry_point_~cfg~1.base_29 (_ BitVec 32))) (let ((.cse0 (store |c_#valid| v_entry_point_~c11~0.base_28 (_ bv1 1)))) (or (not (= (select .cse0 v_entry_point_~cfg~1.base_29) (_ bv0 1))) (not (= (select |c_#valid| v_entry_point_~c11~0.base_28) (_ bv0 1))) (= |c_old(#valid)| (store (store .cse0 v_entry_point_~cfg~1.base_29 (_ bv0 1)) v_entry_point_~c11~0.base_28 (_ bv0 1)))))) is different from false [2018-11-28 13:24:49,096 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:24:49,096 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 9] total 18 [2018-11-28 13:24:49,096 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-28 13:24:49,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-28 13:24:49,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=209, Unknown=13, NotChecked=132, Total=420 [2018-11-28 13:24:49,097 INFO L87 Difference]: Start difference. First operand 103 states and 110 transitions. Second operand 19 states. [2018-11-28 13:25:27,256 WARN L180 SmtUtils]: Spent 1.98 s on a formula simplification. DAG size of input: 31 DAG size of output: 21 [2018-11-28 13:25:51,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:25:51,732 INFO L93 Difference]: Finished difference Result 134 states and 147 transitions. [2018-11-28 13:25:51,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-28 13:25:51,732 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 35 [2018-11-28 13:25:51,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:25:51,733 INFO L225 Difference]: With dead ends: 134 [2018-11-28 13:25:51,733 INFO L226 Difference]: Without dead ends: 127 [2018-11-28 13:25:51,733 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 53 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 26.4s TimeCoverageRelationStatistics Valid=70, Invalid=239, Unknown=13, NotChecked=140, Total=462 [2018-11-28 13:25:51,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-11-28 13:25:51,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 97. [2018-11-28 13:25:51,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-11-28 13:25:51,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 103 transitions. [2018-11-28 13:25:51,736 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 103 transitions. Word has length 35 [2018-11-28 13:25:51,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:25:51,736 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 103 transitions. [2018-11-28 13:25:51,737 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-28 13:25:51,737 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 103 transitions. [2018-11-28 13:25:51,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-28 13:25:51,737 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:25:51,737 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:25:51,738 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:25:51,738 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:25:51,738 INFO L82 PathProgramCache]: Analyzing trace with hash -776766537, now seen corresponding path program 1 times [2018-11-28 13:25:51,738 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:25:51,738 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:25:51,755 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:25:51,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:25:51,862 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:25:51,864 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:25:51,864 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:25:51,875 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:25:51,876 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 13:25:51,911 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:25:51,912 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:25:51,913 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:25:51,913 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:25:51,917 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:25:51,917 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-11-28 13:25:51,946 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-28 13:25:51,946 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:25:51,971 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:25:51,974 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:25:51,974 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 13:25:51,976 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:25:51,992 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:25:51,994 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:25:51,995 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-28 13:25:51,997 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:25:52,011 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:25:52,011 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:35, output treesize:22 [2018-11-28 13:25:54,047 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_37 (_ BitVec 32))) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_37 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_37) (_ bv0 32))))) is different from true [2018-11-28 13:25:54,050 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:25:54,051 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:25:54,055 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:25:54,056 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:14 [2018-11-28 13:25:58,078 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 16 [2018-11-28 13:25:58,177 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-11-28 13:25:58,180 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:25:58,180 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:25:58,190 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:25:58,223 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-11-28 13:25:58,226 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:25:58,226 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:25:58,236 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:25:58,249 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:25:58,249 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:63, output treesize:31 [2018-11-28 13:25:58,342 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-11-28 13:25:58,344 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 15 [2018-11-28 13:25:58,344 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:25:58,346 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:25:58,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:25:58,353 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:31 [2018-11-28 13:25:58,441 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-11-28 13:25:58,443 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-11-28 13:25:58,444 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:25:58,449 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-28 13:25:58,449 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 13:25:58,450 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:25:58,451 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:25:58,451 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:33, output treesize:5 [2018-11-28 13:26:00,508 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-11-28 13:26:00,512 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:26:00,513 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:26:00,514 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-11-28 13:26:00,514 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:00,521 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:26:00,521 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-11-28 13:26:00,571 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 10 not checked. [2018-11-28 13:26:00,571 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:26:00,640 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:26:00,641 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:26:00,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:26:00,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:26:00,682 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:26:00,684 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:26:00,685 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:00,686 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:00,686 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:26:02,781 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:26:02,782 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:26:02,782 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:26:02,783 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:02,784 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:02,784 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-11-28 13:26:02,849 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:26:02,851 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:26:02,851 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:02,855 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:02,868 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:26:02,870 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:26:02,871 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:02,873 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:02,881 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:02,881 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-11-28 13:26:04,940 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_27 (_ BitVec 32)) (v_entry_point_~c11~0.base_BEFORE_CALL_40 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_40) v_entry_point_~c11~0.offset_BEFORE_CALL_27) v_entry_point_~c11~0.base_BEFORE_CALL_40))) is different from true [2018-11-28 13:26:04,943 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:26:04,943 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:04,949 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:26:04,949 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:14 [2018-11-28 13:26:13,011 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 16 [2018-11-28 13:26:13,188 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-11-28 13:26:13,192 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:26:13,192 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:13,205 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:13,236 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-11-28 13:26:13,239 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:26:13,239 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:13,253 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:13,270 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:13,270 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:60, output treesize:28 [2018-11-28 13:26:13,459 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-11-28 13:26:13,461 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-11-28 13:26:13,461 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:13,463 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:13,471 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:26:13,471 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:29 [2018-11-28 13:26:13,619 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 [2018-11-28 13:26:13,621 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-11-28 13:26:13,622 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:13,627 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-11-28 13:26:13,628 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:13,629 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:13,630 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:13,630 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:35, output treesize:7 [2018-11-28 13:26:13,671 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:26:13,674 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:26:13,675 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-11-28 13:26:13,675 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:13,681 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:26:13,682 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-11-28 13:26:13,685 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 10 not checked. [2018-11-28 13:26:13,685 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:26:13,772 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:26:13,772 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 37 [2018-11-28 13:26:13,772 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-11-28 13:26:13,772 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-11-28 13:26:13,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=1155, Unknown=8, NotChecked=210, Total=1482 [2018-11-28 13:26:13,773 INFO L87 Difference]: Start difference. First operand 97 states and 103 transitions. Second operand 38 states. [2018-11-28 13:26:20,845 WARN L180 SmtUtils]: Spent 965.00 ms on a formula simplification that was a NOOP. DAG size: 21 [2018-11-28 13:26:29,278 WARN L180 SmtUtils]: Spent 4.01 s on a formula simplification. DAG size of input: 19 DAG size of output: 12 [2018-11-28 13:26:34,778 WARN L180 SmtUtils]: Spent 3.03 s on a formula simplification that was a NOOP. DAG size: 28 [2018-11-28 13:26:42,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:26:42,059 INFO L93 Difference]: Finished difference Result 146 states and 165 transitions. [2018-11-28 13:26:42,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-28 13:26:42,059 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 43 [2018-11-28 13:26:42,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:26:42,060 INFO L225 Difference]: With dead ends: 146 [2018-11-28 13:26:42,060 INFO L226 Difference]: Without dead ends: 146 [2018-11-28 13:26:42,061 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 54 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 468 ImplicationChecksByTransitivity, 40.3s TimeCoverageRelationStatistics Valid=270, Invalid=2485, Unknown=13, NotChecked=312, Total=3080 [2018-11-28 13:26:42,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-11-28 13:26:42,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 128. [2018-11-28 13:26:42,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-11-28 13:26:42,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 148 transitions. [2018-11-28 13:26:42,065 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 148 transitions. Word has length 43 [2018-11-28 13:26:42,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:26:42,065 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 148 transitions. [2018-11-28 13:26:42,065 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-11-28 13:26:42,065 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 148 transitions. [2018-11-28 13:26:42,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-28 13:26:42,065 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:26:42,066 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:26:42,066 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:26:42,066 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:26:42,066 INFO L82 PathProgramCache]: Analyzing trace with hash -776766536, now seen corresponding path program 1 times [2018-11-28 13:26:42,066 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:26:42,066 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:26:42,087 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:26:42,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:26:42,229 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:26:42,231 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:26:42,231 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:42,234 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:42,234 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 13:26:42,262 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:26:42,263 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:26:42,263 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:26:42,264 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:42,267 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:42,267 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-11-28 13:26:42,296 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:26:42,298 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:26:42,298 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:42,301 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:42,316 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:26:42,318 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:26:42,318 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:42,321 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:42,330 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:42,330 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:22 [2018-11-28 13:26:44,358 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_43 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_43) (_ bv0 32)) v_entry_point_~c11~0.base_BEFORE_CALL_43))) is different from true [2018-11-28 13:26:46,381 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 12 [2018-11-28 13:26:46,385 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:26:46,385 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:46,402 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:26:46,402 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:46,411 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:26:46,411 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:24, output treesize:22 [2018-11-28 13:26:48,451 WARN L180 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 22 [2018-11-28 13:26:48,568 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-11-28 13:26:48,571 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:26:48,571 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:48,580 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:48,604 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-11-28 13:26:48,606 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:26:48,606 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:48,625 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:48,639 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:48,639 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:68, output treesize:65 [2018-11-28 13:26:48,921 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 68 [2018-11-28 13:26:48,924 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-28 13:26:48,924 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:48,935 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 40 [2018-11-28 13:26:48,936 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:26:48,945 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:26:48,958 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 33 [2018-11-28 13:26:48,960 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-11-28 13:26:48,960 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:48,967 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 13 [2018-11-28 13:26:48,967 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:48,970 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:48,975 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:48,975 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:90, output treesize:16 [2018-11-28 13:26:50,036 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-11-28 13:26:50,040 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:26:50,041 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:26:50,041 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:26:50,041 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:50,053 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:26:50,053 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:50,061 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:50,062 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:26:50,101 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 8 not checked. [2018-11-28 13:26:50,101 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:26:50,388 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:26:50,388 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:26:50,394 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:26:50,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:26:50,428 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:26:50,430 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:26:50,430 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:50,431 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:50,431 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:26:50,542 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:26:50,542 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:26:50,543 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:26:50,543 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:50,544 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:50,544 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-11-28 13:26:50,626 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:26:50,628 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:26:50,628 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:50,631 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:50,644 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:26:50,646 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:26:50,646 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:50,648 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:50,655 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:26:50,656 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-11-28 13:26:52,728 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_32 (_ BitVec 32)) (v_entry_point_~c11~0.base_BEFORE_CALL_46 (_ BitVec 32))) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_46 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_46) v_entry_point_~c11~0.offset_BEFORE_CALL_32)))) is different from true [2018-11-28 13:26:56,804 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 12 [2018-11-28 13:26:56,807 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:26:56,808 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:56,823 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:26:56,823 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:26:56,841 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:26:56,841 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:24, output treesize:22 [2018-11-28 13:27:00,954 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 23 [2018-11-28 13:27:01,220 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-11-28 13:27:01,224 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:27:01,224 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:01,236 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:27:01,266 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-11-28 13:27:01,269 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:27:01,269 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:01,279 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:27:01,295 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:27:01,295 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:65, output treesize:62 [2018-11-28 13:27:01,907 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 66 [2018-11-28 13:27:01,911 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-28 13:27:01,911 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:01,927 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-11-28 13:27:01,928 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:27:01,940 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:27:01,959 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 31 [2018-11-28 13:27:01,962 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 11 [2018-11-28 13:27:01,963 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:01,972 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-11-28 13:27:01,972 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:01,976 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:27:01,981 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:27:01,981 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:88, output treesize:14 [2018-11-28 13:27:02,019 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:02,021 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:27:02,022 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:02,034 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:02,035 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:02,036 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:27:02,036 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:02,044 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:27:02,044 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-11-28 13:27:02,080 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 8 not checked. [2018-11-28 13:27:02,080 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:27:02,250 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:27:02,250 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 40 [2018-11-28 13:27:02,250 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-11-28 13:27:02,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-11-28 13:27:02,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=1439, Unknown=11, NotChecked=234, Total=1806 [2018-11-28 13:27:02,251 INFO L87 Difference]: Start difference. First operand 128 states and 148 transitions. Second operand 41 states. [2018-11-28 13:27:08,407 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 24 [2018-11-28 13:27:14,830 WARN L180 SmtUtils]: Spent 4.01 s on a formula simplification. DAG size of input: 22 DAG size of output: 15 [2018-11-28 13:27:16,881 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 18 [2018-11-28 13:27:21,009 WARN L180 SmtUtils]: Spent 4.03 s on a formula simplification that was a NOOP. DAG size: 35 [2018-11-28 13:27:26,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:27:26,699 INFO L93 Difference]: Finished difference Result 150 states and 168 transitions. [2018-11-28 13:27:26,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-28 13:27:26,699 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 43 [2018-11-28 13:27:26,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:27:26,700 INFO L225 Difference]: With dead ends: 150 [2018-11-28 13:27:26,700 INFO L226 Difference]: Without dead ends: 150 [2018-11-28 13:27:26,701 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 49 SyntacticMatches, 3 SemanticMatches, 55 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 539 ImplicationChecksByTransitivity, 36.7s TimeCoverageRelationStatistics Valid=258, Invalid=2603, Unknown=13, NotChecked=318, Total=3192 [2018-11-28 13:27:26,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-11-28 13:27:26,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 116. [2018-11-28 13:27:26,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-11-28 13:27:26,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 125 transitions. [2018-11-28 13:27:26,705 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 125 transitions. Word has length 43 [2018-11-28 13:27:26,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:27:26,706 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 125 transitions. [2018-11-28 13:27:26,706 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-11-28 13:27:26,706 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 125 transitions. [2018-11-28 13:27:26,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-28 13:27:26,707 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:27:26,707 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:27:26,707 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:27:26,707 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:27:26,707 INFO L82 PathProgramCache]: Analyzing trace with hash -1185590762, now seen corresponding path program 1 times [2018-11-28 13:27:26,708 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:27:26,708 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:27:26,729 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:27:26,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:27:26,818 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:27:26,838 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:27:26,838 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 13:27:26,840 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:27:26,840 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:27:26,840 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:27:26,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:27:26,840 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:27:26,840 INFO L87 Difference]: Start difference. First operand 116 states and 125 transitions. Second operand 5 states. [2018-11-28 13:27:26,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:27:26,857 INFO L93 Difference]: Finished difference Result 99 states and 103 transitions. [2018-11-28 13:27:26,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:27:26,857 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2018-11-28 13:27:26,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:27:26,858 INFO L225 Difference]: With dead ends: 99 [2018-11-28 13:27:26,858 INFO L226 Difference]: Without dead ends: 95 [2018-11-28 13:27:26,858 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:27:26,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-11-28 13:27:26,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 93. [2018-11-28 13:27:26,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-11-28 13:27:26,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 97 transitions. [2018-11-28 13:27:26,860 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 97 transitions. Word has length 43 [2018-11-28 13:27:26,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:27:26,860 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 97 transitions. [2018-11-28 13:27:26,860 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:27:26,860 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 97 transitions. [2018-11-28 13:27:26,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 13:27:26,860 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:27:26,861 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:27:26,861 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:27:26,861 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:27:26,861 INFO L82 PathProgramCache]: Analyzing trace with hash -1785629904, now seen corresponding path program 1 times [2018-11-28 13:27:26,861 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:27:26,861 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 33 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:27:26,877 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:27:26,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:27:26,913 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:27:26,921 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:27:26,921 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 13:27:26,923 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:27:26,923 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:27:26,923 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:27:26,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:27:26,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:27:26,924 INFO L87 Difference]: Start difference. First operand 93 states and 97 transitions. Second operand 5 states. [2018-11-28 13:27:26,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:27:26,947 INFO L93 Difference]: Finished difference Result 102 states and 107 transitions. [2018-11-28 13:27:26,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:27:26,949 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-11-28 13:27:26,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:27:26,950 INFO L225 Difference]: With dead ends: 102 [2018-11-28 13:27:26,950 INFO L226 Difference]: Without dead ends: 102 [2018-11-28 13:27:26,950 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:27:26,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-11-28 13:27:26,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 97. [2018-11-28 13:27:26,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-11-28 13:27:26,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 101 transitions. [2018-11-28 13:27:26,953 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 101 transitions. Word has length 47 [2018-11-28 13:27:26,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:27:26,953 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 101 transitions. [2018-11-28 13:27:26,953 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:27:26,954 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 101 transitions. [2018-11-28 13:27:26,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 13:27:26,954 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:27:26,954 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:27:26,955 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:27:26,955 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:27:26,955 INFO L82 PathProgramCache]: Analyzing trace with hash -1982143409, now seen corresponding path program 1 times [2018-11-28 13:27:26,955 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:27:26,955 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:27:26,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:27:27,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:27:27,062 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:27:27,064 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-28 13:27:27,064 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:27,065 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:27:27,065 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-11-28 13:27:27,097 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-28 13:27:27,097 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 13:27:27,099 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:27:27,099 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 13:27:27,099 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 13:27:27,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 13:27:27,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-28 13:27:27,100 INFO L87 Difference]: Start difference. First operand 97 states and 101 transitions. Second operand 8 states. [2018-11-28 13:27:27,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:27:27,747 INFO L93 Difference]: Finished difference Result 113 states and 117 transitions. [2018-11-28 13:27:27,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 13:27:27,748 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-11-28 13:27:27,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:27:27,748 INFO L225 Difference]: With dead ends: 113 [2018-11-28 13:27:27,748 INFO L226 Difference]: Without dead ends: 113 [2018-11-28 13:27:27,749 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2018-11-28 13:27:27,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-11-28 13:27:27,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 107. [2018-11-28 13:27:27,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-11-28 13:27:27,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 112 transitions. [2018-11-28 13:27:27,751 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 112 transitions. Word has length 47 [2018-11-28 13:27:27,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:27:27,752 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 112 transitions. [2018-11-28 13:27:27,752 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 13:27:27,752 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 112 transitions. [2018-11-28 13:27:27,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 13:27:27,752 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:27:27,752 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:27:27,753 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:27:27,755 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:27:27,755 INFO L82 PathProgramCache]: Analyzing trace with hash -1982143408, now seen corresponding path program 1 times [2018-11-28 13:27:27,756 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:27:27,756 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:27:27,770 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:27:27,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:27:27,918 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:27:27,927 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:27:27,927 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:27,947 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:27:27,947 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:27,967 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:27:27,967 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 13:27:29,003 WARN L180 SmtUtils]: Spent 935.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-11-28 13:27:29,007 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:29,010 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:27:29,010 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:29,022 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:29,023 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:29,024 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:27:29,024 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:29,031 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:27:29,031 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:15 [2018-11-28 13:27:30,033 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-11-28 13:27:30,038 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:30,040 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:27:30,041 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:30,056 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:30,057 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:30,058 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:27:30,058 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:30,065 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:27:30,065 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-11-28 13:27:30,244 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 6 not checked. [2018-11-28 13:27:30,244 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:27:33,392 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:27:33,392 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:27:33,399 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:27:33,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:27:33,435 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:27:33,438 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:27:33,438 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:33,446 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:27:33,446 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:33,452 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:27:33,452 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 13:27:34,567 WARN L180 SmtUtils]: Spent 1.05 s on a formula simplification that was a NOOP. DAG size: 16 [2018-11-28 13:27:34,572 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:34,574 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:27:34,574 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:34,589 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:34,590 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:34,591 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-28 13:27:34,591 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:34,603 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:27:34,603 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:31, output treesize:23 [2018-11-28 13:27:34,745 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:34,746 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:34,748 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:27:34,748 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 13 [2018-11-28 13:27:34,749 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:34,778 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:27:34,779 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:27:34,793 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:27:34,793 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:38, output treesize:9 [2018-11-28 13:27:34,826 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 6 not checked. [2018-11-28 13:27:34,826 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:27:36,126 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 41 [2018-11-28 13:27:36,142 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:27:36,142 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 18] total 20 [2018-11-28 13:27:36,142 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-28 13:27:36,143 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-28 13:27:36,143 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=1014, Unknown=2, NotChecked=64, Total=1190 [2018-11-28 13:27:36,143 INFO L87 Difference]: Start difference. First operand 107 states and 112 transitions. Second operand 21 states. [2018-11-28 13:27:38,872 WARN L180 SmtUtils]: Spent 2.54 s on a formula simplification. DAG size of input: 33 DAG size of output: 23 [2018-11-28 13:28:00,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:28:00,601 INFO L93 Difference]: Finished difference Result 130 states and 136 transitions. [2018-11-28 13:28:00,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-28 13:28:00,601 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 47 [2018-11-28 13:28:00,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:28:00,602 INFO L225 Difference]: With dead ends: 130 [2018-11-28 13:28:00,602 INFO L226 Difference]: Without dead ends: 130 [2018-11-28 13:28:00,602 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 99 SyntacticMatches, 4 SemanticMatches, 41 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 258 ImplicationChecksByTransitivity, 10.8s TimeCoverageRelationStatistics Valid=177, Invalid=1547, Unknown=2, NotChecked=80, Total=1806 [2018-11-28 13:28:00,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-11-28 13:28:00,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 107. [2018-11-28 13:28:00,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-11-28 13:28:00,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 111 transitions. [2018-11-28 13:28:00,605 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 111 transitions. Word has length 47 [2018-11-28 13:28:00,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:28:00,605 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 111 transitions. [2018-11-28 13:28:00,605 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-28 13:28:00,605 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 111 transitions. [2018-11-28 13:28:00,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-28 13:28:00,606 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:28:00,606 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:28:00,606 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:28:00,606 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:28:00,607 INFO L82 PathProgramCache]: Analyzing trace with hash 2065953268, now seen corresponding path program 1 times [2018-11-28 13:28:00,607 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:28:00,607 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:28:00,628 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:28:00,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:28:00,776 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:28:00,791 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-28 13:28:00,791 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:00,792 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:00,792 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-11-28 13:28:01,224 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|)) is different from true [2018-11-28 13:28:01,227 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-11-28 13:28:01,227 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:01,232 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:28:01,232 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:14, output treesize:11 [2018-11-28 13:28:01,256 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-28 13:28:01,256 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 13:28:01,258 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:28:01,258 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 13:28:01,259 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 13:28:01,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 13:28:01,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=44, Unknown=1, NotChecked=12, Total=72 [2018-11-28 13:28:01,259 INFO L87 Difference]: Start difference. First operand 107 states and 111 transitions. Second operand 9 states. [2018-11-28 13:28:01,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:28:01,613 INFO L93 Difference]: Finished difference Result 111 states and 115 transitions. [2018-11-28 13:28:01,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 13:28:01,614 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 48 [2018-11-28 13:28:01,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:28:01,614 INFO L225 Difference]: With dead ends: 111 [2018-11-28 13:28:01,614 INFO L226 Difference]: Without dead ends: 111 [2018-11-28 13:28:01,614 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=39, Invalid=120, Unknown=1, NotChecked=22, Total=182 [2018-11-28 13:28:01,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-11-28 13:28:01,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 106. [2018-11-28 13:28:01,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-11-28 13:28:01,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 110 transitions. [2018-11-28 13:28:01,616 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 110 transitions. Word has length 48 [2018-11-28 13:28:01,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:28:01,617 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 110 transitions. [2018-11-28 13:28:01,617 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 13:28:01,617 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 110 transitions. [2018-11-28 13:28:01,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-28 13:28:01,617 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:28:01,617 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:28:01,618 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:28:01,618 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:28:01,618 INFO L82 PathProgramCache]: Analyzing trace with hash 2065953269, now seen corresponding path program 1 times [2018-11-28 13:28:01,618 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:28:01,618 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 38 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:28:01,632 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:28:01,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:28:01,802 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:28:01,810 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:28:01,811 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:01,819 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:28:01,819 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:01,824 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:01,824 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 13:28:02,898 WARN L180 SmtUtils]: Spent 1.03 s on a formula simplification that was a NOOP. DAG size: 12 [2018-11-28 13:28:02,902 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:02,905 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:28:02,905 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:02,918 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:02,918 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:02,919 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:28:02,919 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:02,926 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:02,927 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:27, output treesize:15 [2018-11-28 13:28:04,960 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-11-28 13:28:04,965 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:04,966 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:04,966 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:28:04,967 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:04,980 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:28:04,980 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:04,988 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:04,988 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-11-28 13:28:05,046 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:05,047 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:05,048 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:28:05,048 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:05,062 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:28:05,062 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:05,069 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:05,070 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-11-28 13:28:05,174 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 8 not checked. [2018-11-28 13:28:05,175 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:28:05,753 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:28:05,753 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:28:05,760 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:28:05,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:28:05,804 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:28:05,807 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:28:05,807 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:05,821 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:28:05,822 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:05,829 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:05,829 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 13:28:05,836 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:05,838 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:28:05,838 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:05,852 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:05,853 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:05,854 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:28:05,854 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:05,862 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:05,862 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-11-28 13:28:06,694 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-11-28 13:28:06,710 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:06,712 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:06,713 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-11-28 13:28:06,713 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:06,733 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:28:06,733 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:06,744 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:28:06,745 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:35, output treesize:27 [2018-11-28 13:28:06,964 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:06,972 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:28:06,973 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:07,000 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:07,001 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:07,003 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:07,004 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-11-28 13:28:07,004 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:07,025 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:07,025 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:36, output treesize:9 [2018-11-28 13:28:07,052 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 10 not checked. [2018-11-28 13:28:07,052 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:28:07,271 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:28:07,271 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 21 [2018-11-28 13:28:07,271 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-28 13:28:07,271 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-28 13:28:07,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=586, Unknown=2, NotChecked=98, Total=756 [2018-11-28 13:28:07,272 INFO L87 Difference]: Start difference. First operand 106 states and 110 transitions. Second operand 22 states. [2018-11-28 13:28:10,828 WARN L180 SmtUtils]: Spent 3.33 s on a formula simplification. DAG size of input: 35 DAG size of output: 30 [2018-11-28 13:28:17,790 WARN L180 SmtUtils]: Spent 321.00 ms on a formula simplification that was a NOOP. DAG size: 25 [2018-11-28 13:28:18,610 WARN L180 SmtUtils]: Spent 775.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 35 [2018-11-28 13:28:36,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:28:36,761 INFO L93 Difference]: Finished difference Result 114 states and 118 transitions. [2018-11-28 13:28:36,762 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-28 13:28:36,762 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 48 [2018-11-28 13:28:36,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:28:36,762 INFO L225 Difference]: With dead ends: 114 [2018-11-28 13:28:36,762 INFO L226 Difference]: Without dead ends: 114 [2018-11-28 13:28:36,763 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 82 SyntacticMatches, 4 SemanticMatches, 36 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 172 ImplicationChecksByTransitivity, 9.8s TimeCoverageRelationStatistics Valid=137, Invalid=1129, Unknown=2, NotChecked=138, Total=1406 [2018-11-28 13:28:36,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-11-28 13:28:36,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 105. [2018-11-28 13:28:36,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-11-28 13:28:36,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 109 transitions. [2018-11-28 13:28:36,765 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 109 transitions. Word has length 48 [2018-11-28 13:28:36,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:28:36,765 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 109 transitions. [2018-11-28 13:28:36,765 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-28 13:28:36,765 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 109 transitions. [2018-11-28 13:28:36,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-28 13:28:36,766 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:28:36,766 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:28:36,767 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:28:36,767 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:28:36,767 INFO L82 PathProgramCache]: Analyzing trace with hash 1976737196, now seen corresponding path program 1 times [2018-11-28 13:28:36,767 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:28:36,767 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 40 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:28:36,788 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:28:36,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:28:36,902 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:28:36,904 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-28 13:28:36,905 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:36,905 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:36,905 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-11-28 13:28:37,035 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-28 13:28:37,035 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 13:28:37,038 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:28:37,038 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-28 13:28:37,038 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-28 13:28:37,038 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-28 13:28:37,038 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-11-28 13:28:37,038 INFO L87 Difference]: Start difference. First operand 105 states and 109 transitions. Second operand 13 states. [2018-11-28 13:28:37,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:28:37,869 INFO L93 Difference]: Finished difference Result 141 states and 147 transitions. [2018-11-28 13:28:37,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-28 13:28:37,870 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 62 [2018-11-28 13:28:37,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:28:37,871 INFO L225 Difference]: With dead ends: 141 [2018-11-28 13:28:37,871 INFO L226 Difference]: Without dead ends: 141 [2018-11-28 13:28:37,871 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 49 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=101, Invalid=405, Unknown=0, NotChecked=0, Total=506 [2018-11-28 13:28:37,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-11-28 13:28:37,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 128. [2018-11-28 13:28:37,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-11-28 13:28:37,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 135 transitions. [2018-11-28 13:28:37,874 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 135 transitions. Word has length 62 [2018-11-28 13:28:37,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:28:37,874 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 135 transitions. [2018-11-28 13:28:37,875 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-28 13:28:37,875 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 135 transitions. [2018-11-28 13:28:37,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-28 13:28:37,875 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:28:37,876 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:28:37,876 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:28:37,876 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:28:37,876 INFO L82 PathProgramCache]: Analyzing trace with hash 1976737197, now seen corresponding path program 1 times [2018-11-28 13:28:37,877 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:28:37,877 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 41 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:28:37,893 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:28:38,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:28:38,018 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:28:38,368 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:28:38,368 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:28:39,316 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2018-11-28 13:28:39,316 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:28:39,340 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-11-28 13:28:39,340 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:28:39,358 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-28 13:28:39,358 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:27 [2018-11-28 13:28:41,287 WARN L180 SmtUtils]: Spent 262.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 44 [2018-11-28 13:28:41,553 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:28:41,555 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:28:41,556 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 33 [2018-11-28 13:28:41,556 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-11-28 13:28:41,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-11-28 13:28:41,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=1031, Unknown=0, NotChecked=0, Total=1122 [2018-11-28 13:28:41,556 INFO L87 Difference]: Start difference. First operand 128 states and 135 transitions. Second operand 34 states. [2018-11-28 13:28:44,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:28:44,787 INFO L93 Difference]: Finished difference Result 127 states and 133 transitions. [2018-11-28 13:28:44,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-28 13:28:44,788 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 62 [2018-11-28 13:28:44,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:28:44,789 INFO L225 Difference]: With dead ends: 127 [2018-11-28 13:28:44,789 INFO L226 Difference]: Without dead ends: 127 [2018-11-28 13:28:44,790 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 258 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=178, Invalid=1892, Unknown=0, NotChecked=0, Total=2070 [2018-11-28 13:28:44,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-11-28 13:28:44,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-11-28 13:28:44,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-11-28 13:28:44,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 133 transitions. [2018-11-28 13:28:44,792 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 133 transitions. Word has length 62 [2018-11-28 13:28:44,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:28:44,793 INFO L480 AbstractCegarLoop]: Abstraction has 127 states and 133 transitions. [2018-11-28 13:28:44,793 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-11-28 13:28:44,793 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 133 transitions. [2018-11-28 13:28:44,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-11-28 13:28:44,793 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:28:44,793 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:28:44,794 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:28:44,794 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:28:44,794 INFO L82 PathProgramCache]: Analyzing trace with hash 998588711, now seen corresponding path program 1 times [2018-11-28 13:28:44,794 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:28:44,795 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 42 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:28:44,810 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:28:44,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:28:44,935 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:28:44,943 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-28 13:28:44,943 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:44,944 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:44,944 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-11-28 13:28:45,124 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-11-28 13:28:45,124 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 13:28:45,127 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:28:45,127 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-11-28 13:28:45,127 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-28 13:28:45,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-28 13:28:45,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-11-28 13:28:45,127 INFO L87 Difference]: Start difference. First operand 127 states and 133 transitions. Second operand 15 states. [2018-11-28 13:28:45,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:28:45,772 INFO L93 Difference]: Finished difference Result 130 states and 136 transitions. [2018-11-28 13:28:45,773 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-28 13:28:45,773 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 63 [2018-11-28 13:28:45,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:28:45,773 INFO L225 Difference]: With dead ends: 130 [2018-11-28 13:28:45,773 INFO L226 Difference]: Without dead ends: 130 [2018-11-28 13:28:45,774 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=369, Unknown=0, NotChecked=0, Total=420 [2018-11-28 13:28:45,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-11-28 13:28:45,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 103. [2018-11-28 13:28:45,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-11-28 13:28:45,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 107 transitions. [2018-11-28 13:28:45,777 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 107 transitions. Word has length 63 [2018-11-28 13:28:45,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:28:45,777 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 107 transitions. [2018-11-28 13:28:45,777 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-28 13:28:45,777 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 107 transitions. [2018-11-28 13:28:45,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-28 13:28:45,777 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:28:45,777 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:28:45,778 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:28:45,778 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:28:45,778 INFO L82 PathProgramCache]: Analyzing trace with hash -877383698, now seen corresponding path program 1 times [2018-11-28 13:28:45,778 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:28:45,778 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:28:45,797 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:28:45,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:28:45,911 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:28:45,968 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 13:28:45,971 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 13:28:45,971 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:45,974 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:45,976 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:45,976 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-28 13:28:46,471 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-11-28 13:28:46,473 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-11-28 13:28:46,474 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:46,484 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-28 13:28:46,484 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:46,488 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:46,489 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:46,489 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:22, output treesize:3 [2018-11-28 13:28:46,543 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:28:46,543 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:28:47,878 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-28 13:28:47,880 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-28 13:28:47,880 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:47,882 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:47,886 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-28 13:28:47,886 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:7 [2018-11-28 13:28:48,056 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-28 13:28:48,058 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-28 13:28:48,058 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:48,060 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:48,068 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-28 13:28:48,068 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-11-28 13:28:48,222 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-28 13:28:48,224 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-28 13:28:48,224 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:48,226 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:48,234 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-28 13:28:48,234 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-11-28 13:28:48,355 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-11-28 13:28:48,358 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:28:48,358 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [22] total 35 [2018-11-28 13:28:48,358 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-11-28 13:28:48,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-11-28 13:28:48,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=1168, Unknown=0, NotChecked=0, Total=1260 [2018-11-28 13:28:48,359 INFO L87 Difference]: Start difference. First operand 103 states and 107 transitions. Second operand 36 states. [2018-11-28 13:28:50,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:28:50,623 INFO L93 Difference]: Finished difference Result 102 states and 106 transitions. [2018-11-28 13:28:50,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-28 13:28:50,624 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 71 [2018-11-28 13:28:50,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:28:50,624 INFO L225 Difference]: With dead ends: 102 [2018-11-28 13:28:50,624 INFO L226 Difference]: Without dead ends: 102 [2018-11-28 13:28:50,625 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 319 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=174, Invalid=2178, Unknown=0, NotChecked=0, Total=2352 [2018-11-28 13:28:50,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-11-28 13:28:50,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 102. [2018-11-28 13:28:50,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-11-28 13:28:50,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 106 transitions. [2018-11-28 13:28:50,627 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 106 transitions. Word has length 71 [2018-11-28 13:28:50,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:28:50,627 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 106 transitions. [2018-11-28 13:28:50,627 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-11-28 13:28:50,627 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 106 transitions. [2018-11-28 13:28:50,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-28 13:28:50,627 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:28:50,627 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:28:50,628 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:28:50,628 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:28:50,628 INFO L82 PathProgramCache]: Analyzing trace with hash -1429090481, now seen corresponding path program 1 times [2018-11-28 13:28:50,628 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:28:50,628 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 44 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:28:50,643 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:28:50,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:28:50,758 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:28:50,847 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 13:28:50,850 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 13:28:50,850 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:50,853 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:50,856 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:50,856 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-28 13:28:51,359 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-11-28 13:28:51,361 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-28 13:28:51,361 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:51,366 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:51,367 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:51,367 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:22, output treesize:3 [2018-11-28 13:28:51,451 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:28:51,451 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:28:52,725 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-28 13:28:52,727 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-28 13:28:52,728 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:52,729 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:52,733 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-28 13:28:52,733 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:7 [2018-11-28 13:28:52,898 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-28 13:28:52,900 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-28 13:28:52,900 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:52,902 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:52,909 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-28 13:28:52,910 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-11-28 13:28:53,062 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-28 13:28:53,064 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-28 13:28:53,064 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:53,066 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:53,074 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-28 13:28:53,074 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-11-28 13:28:53,169 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-11-28 13:28:53,172 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:28:53,172 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [24] total 37 [2018-11-28 13:28:53,172 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-11-28 13:28:53,173 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-11-28 13:28:53,173 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1238, Unknown=0, NotChecked=0, Total=1332 [2018-11-28 13:28:53,173 INFO L87 Difference]: Start difference. First operand 102 states and 106 transitions. Second operand 37 states. [2018-11-28 13:28:54,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:28:54,991 INFO L93 Difference]: Finished difference Result 100 states and 103 transitions. [2018-11-28 13:28:54,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-28 13:28:54,991 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 72 [2018-11-28 13:28:54,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:28:54,991 INFO L225 Difference]: With dead ends: 100 [2018-11-28 13:28:54,992 INFO L226 Difference]: Without dead ends: 99 [2018-11-28 13:28:54,992 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 301 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=174, Invalid=2082, Unknown=0, NotChecked=0, Total=2256 [2018-11-28 13:28:54,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-11-28 13:28:54,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-11-28 13:28:54,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-11-28 13:28:54,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 102 transitions. [2018-11-28 13:28:54,994 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 102 transitions. Word has length 72 [2018-11-28 13:28:54,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:28:54,995 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 102 transitions. [2018-11-28 13:28:54,995 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-11-28 13:28:54,995 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 102 transitions. [2018-11-28 13:28:54,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-11-28 13:28:54,995 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:28:54,995 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:28:54,996 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:28:54,996 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:28:54,996 INFO L82 PathProgramCache]: Analyzing trace with hash -1351942458, now seen corresponding path program 1 times [2018-11-28 13:28:54,996 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:28:54,996 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:28:55,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:28:55,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:28:55,076 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:28:55,085 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:28:55,085 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:28:55,117 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:28:55,118 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:28:55,118 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-11-28 13:28:55,118 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:28:55,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:28:55,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:28:55,119 INFO L87 Difference]: Start difference. First operand 99 states and 102 transitions. Second operand 5 states. [2018-11-28 13:28:55,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:28:55,139 INFO L93 Difference]: Finished difference Result 98 states and 101 transitions. [2018-11-28 13:28:55,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:28:55,140 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2018-11-28 13:28:55,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:28:55,140 INFO L225 Difference]: With dead ends: 98 [2018-11-28 13:28:55,140 INFO L226 Difference]: Without dead ends: 98 [2018-11-28 13:28:55,140 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:28:55,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-11-28 13:28:55,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-11-28 13:28:55,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-11-28 13:28:55,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 101 transitions. [2018-11-28 13:28:55,142 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 101 transitions. Word has length 73 [2018-11-28 13:28:55,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:28:55,142 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 101 transitions. [2018-11-28 13:28:55,142 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:28:55,142 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 101 transitions. [2018-11-28 13:28:55,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-28 13:28:55,142 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:28:55,143 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:28:55,143 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:28:55,143 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:28:55,143 INFO L82 PathProgramCache]: Analyzing trace with hash 1880210238, now seen corresponding path program 1 times [2018-11-28 13:28:55,143 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:28:55,143 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 46 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:28:55,159 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:28:55,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:28:55,283 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:28:55,286 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:28:55,286 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:55,287 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:55,287 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:28:55,303 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:28:55,304 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:28:55,324 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:28:55,324 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:28:55,341 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:28:55,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:28:55,368 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:28:55,370 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:28:55,370 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:55,371 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:55,372 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:28:55,376 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:28:55,376 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:28:55,409 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:28:55,409 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-11-28 13:28:55,409 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 13:28:55,409 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 13:28:55,409 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=26, Unknown=4, NotChecked=0, Total=42 [2018-11-28 13:28:55,410 INFO L87 Difference]: Start difference. First operand 98 states and 101 transitions. Second operand 6 states. [2018-11-28 13:28:55,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:28:55,661 INFO L93 Difference]: Finished difference Result 105 states and 109 transitions. [2018-11-28 13:28:55,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 13:28:55,661 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 75 [2018-11-28 13:28:55,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:28:55,662 INFO L225 Difference]: With dead ends: 105 [2018-11-28 13:28:55,662 INFO L226 Difference]: Without dead ends: 105 [2018-11-28 13:28:55,662 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 158 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=26, Unknown=4, NotChecked=0, Total=42 [2018-11-28 13:28:55,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-11-28 13:28:55,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2018-11-28 13:28:55,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-11-28 13:28:55,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 109 transitions. [2018-11-28 13:28:55,664 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 109 transitions. Word has length 75 [2018-11-28 13:28:55,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:28:55,665 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 109 transitions. [2018-11-28 13:28:55,665 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 13:28:55,665 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 109 transitions. [2018-11-28 13:28:55,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-28 13:28:55,666 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:28:55,667 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:28:55,667 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:28:55,667 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:28:55,667 INFO L82 PathProgramCache]: Analyzing trace with hash 247406239, now seen corresponding path program 1 times [2018-11-28 13:28:55,667 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:28:55,667 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 48 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:28:55,695 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:28:55,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:28:55,913 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:28:55,916 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:28:55,916 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:55,920 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:55,921 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 13:28:55,953 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:55,954 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:55,954 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:28:55,954 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:55,958 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:55,958 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-11-28 13:28:55,983 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-28 13:28:55,983 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:56,010 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:28:56,012 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:28:56,012 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:56,015 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:56,030 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:28:56,032 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:28:56,033 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:56,035 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:56,044 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:56,044 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:35, output treesize:22 [2018-11-28 13:28:58,072 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_71 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_71) (_ bv0 32)) v_entry_point_~c11~0.base_BEFORE_CALL_71))) is different from true [2018-11-28 13:28:58,114 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-11-28 13:28:58,117 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:28:58,117 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:58,126 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:58,151 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-11-28 13:28:58,154 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:28:58,154 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:58,163 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:58,175 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:58,175 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:58, output treesize:27 [2018-11-28 13:28:58,404 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 17 [2018-11-28 13:28:58,406 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-28 13:28:58,406 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:28:58,408 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:28:58,420 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 23 [2018-11-28 13:28:58,421 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-28 13:28:58,422 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:28:58,431 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-11-28 13:28:58,431 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:58,436 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-28 13:28:58,436 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:28:58,440 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-28 13:28:58,444 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-28 13:28:58,444 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:19, output treesize:15 [2018-11-28 13:28:58,540 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 13:28:58,542 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 5 [2018-11-28 13:28:58,542 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:58,550 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-11-28 13:28:58,550 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:58,552 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:58,554 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:58,554 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:41, output treesize:5 [2018-11-28 13:28:58,596 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 8 refuted. 4 times theorem prover too weak. 2 trivial. 6 not checked. [2018-11-28 13:28:58,596 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:28:58,639 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:28:58,640 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:28:58,648 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:28:58,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:28:58,680 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:28:58,684 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:28:58,685 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:58,686 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:28:58,687 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:28:59,834 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-11-28 13:28:59,838 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:28:59,838 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-11-28 13:28:59,839 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:28:59,840 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:28:59,840 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-11-28 13:29:02,625 WARN L180 SmtUtils]: Spent 667.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 11 [2018-11-28 13:29:02,628 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:29:02,629 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:29:02,630 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-11-28 13:29:02,630 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:29:02,636 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:29:02,636 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-11-28 13:29:02,684 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 2 not checked. [2018-11-28 13:29:02,685 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:29:02,749 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:29:02,750 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 9] total 25 [2018-11-28 13:29:02,750 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-11-28 13:29:02,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-11-28 13:29:02,750 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=537, Unknown=5, NotChecked=94, Total=702 [2018-11-28 13:29:02,750 INFO L87 Difference]: Start difference. First operand 105 states and 109 transitions. Second operand 26 states. [2018-11-28 13:29:05,034 WARN L180 SmtUtils]: Spent 749.00 ms on a formula simplification that was a NOOP. DAG size: 27 [2018-11-28 13:29:12,224 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 24 [2018-11-28 13:29:17,329 WARN L180 SmtUtils]: Spent 3.03 s on a formula simplification that was a NOOP. DAG size: 33 [2018-11-28 13:29:53,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:29:53,514 INFO L93 Difference]: Finished difference Result 104 states and 108 transitions. [2018-11-28 13:29:53,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-11-28 13:29:53,515 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 75 [2018-11-28 13:29:53,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:29:53,515 INFO L225 Difference]: With dead ends: 104 [2018-11-28 13:29:53,515 INFO L226 Difference]: Without dead ends: 104 [2018-11-28 13:29:53,516 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 137 SyntacticMatches, 4 SemanticMatches, 51 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 415 ImplicationChecksByTransitivity, 22.0s TimeCoverageRelationStatistics Valid=317, Invalid=2227, Unknown=14, NotChecked=198, Total=2756 [2018-11-28 13:29:53,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-11-28 13:29:53,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 97. [2018-11-28 13:29:53,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-11-28 13:29:53,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 100 transitions. [2018-11-28 13:29:53,518 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 100 transitions. Word has length 75 [2018-11-28 13:29:53,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:29:53,519 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 100 transitions. [2018-11-28 13:29:53,519 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-11-28 13:29:53,519 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 100 transitions. [2018-11-28 13:29:53,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-11-28 13:29:53,519 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:29:53,519 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:29:53,520 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:29:53,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:29:53,520 INFO L82 PathProgramCache]: Analyzing trace with hash -1809008570, now seen corresponding path program 1 times [2018-11-28 13:29:53,520 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:29:53,520 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 50 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:29:53,550 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:29:53,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:29:53,748 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:29:53,750 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:29:53,750 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:29:53,752 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:29:53,752 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:29:53,787 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:29:53,788 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:29:53,788 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:29:53,789 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:29:53,790 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:29:53,790 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-11-28 13:29:53,827 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:29:53,827 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-11-28 13:29:53,827 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:29:53,833 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:29:53,833 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:12 [2018-11-28 13:29:53,851 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:29:53,851 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:29:53,887 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:29:53,887 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:29:53,895 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:29:53,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:29:53,925 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:29:53,927 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:29:53,927 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:29:53,930 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:29:53,930 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:29:53,936 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:29:53,937 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:29:53,938 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:29:53,938 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:29:53,941 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:29:53,942 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-11-28 13:29:53,979 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:29:53,979 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-11-28 13:29:53,980 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:29:53,987 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:29:53,987 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:12 [2018-11-28 13:29:53,990 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:29:53,990 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:29:54,060 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:29:54,060 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2018-11-28 13:29:54,060 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 13:29:54,060 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 13:29:54,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=101, Unknown=6, NotChecked=0, Total=132 [2018-11-28 13:29:54,061 INFO L87 Difference]: Start difference. First operand 97 states and 100 transitions. Second operand 11 states. [2018-11-28 13:29:58,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:29:58,639 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2018-11-28 13:29:58,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 13:29:58,639 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 76 [2018-11-28 13:29:58,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:29:58,640 INFO L225 Difference]: With dead ends: 106 [2018-11-28 13:29:58,640 INFO L226 Difference]: Without dead ends: 106 [2018-11-28 13:29:58,640 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 156 SyntacticMatches, 4 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=140, Unknown=7, NotChecked=0, Total=182 [2018-11-28 13:29:58,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-11-28 13:29:58,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-11-28 13:29:58,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-11-28 13:29:58,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 110 transitions. [2018-11-28 13:29:58,642 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 110 transitions. Word has length 76 [2018-11-28 13:29:58,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:29:58,642 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 110 transitions. [2018-11-28 13:29:58,642 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 13:29:58,642 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 110 transitions. [2018-11-28 13:29:58,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-28 13:29:58,642 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:29:58,643 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:29:58,643 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:29:58,643 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:29:58,643 INFO L82 PathProgramCache]: Analyzing trace with hash 1534208129, now seen corresponding path program 1 times [2018-11-28 13:29:58,643 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:29:58,643 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 52 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:29:58,661 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:29:58,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:29:58,906 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:29:58,909 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:29:58,910 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:29:58,918 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:29:58,919 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:29:58,947 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:29:58,948 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:29:58,948 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:29:58,948 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:29:58,950 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:29:58,950 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-11-28 13:30:00,984 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-11-28 13:30:00,988 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:30:00,988 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-11-28 13:30:00,988 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:30:00,990 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:30:00,990 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-11-28 13:30:04,871 WARN L180 SmtUtils]: Spent 3.86 s on a formula simplification. DAG size of input: 16 DAG size of output: 11 [2018-11-28 13:30:04,875 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:30:04,876 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:30:04,876 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-11-28 13:30:04,876 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:30:04,883 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:30:04,884 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:23, output treesize:20 [2018-11-28 13:30:04,919 INFO L683 Elim1Store]: detected equality via solver [2018-11-28 13:30:04,926 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 34 [2018-11-28 13:30:04,927 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-11-28 13:30:04,951 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-11-28 13:30:04,951 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:26, output treesize:38 [2018-11-28 13:30:06,992 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 4 not checked. [2018-11-28 13:30:06,992 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:30:07,029 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:30:07,029 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:30:07,041 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:30:07,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:30:07,084 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:30:07,086 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:30:07,086 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:30:07,089 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:30:07,089 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:30:07,093 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:30:07,093 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:30:07,094 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:30:07,094 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:30:07,095 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:30:07,095 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:30:07,100 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:30:07,100 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-11-28 13:30:07,100 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:30:07,101 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:30:07,102 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-11-28 13:30:07,121 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:30:07,122 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:30:07,122 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-11-28 13:30:07,122 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:30:07,129 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:30:07,129 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:23, output treesize:20 [2018-11-28 13:30:07,135 INFO L683 Elim1Store]: detected equality via solver [2018-11-28 13:30:07,141 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 34 [2018-11-28 13:30:07,141 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-11-28 13:30:07,165 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-11-28 13:30:07,165 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:26, output treesize:38 [2018-11-28 13:30:09,190 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 4 not checked. [2018-11-28 13:30:09,190 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:30:09,239 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:30:09,239 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 14 [2018-11-28 13:30:09,239 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-28 13:30:09,239 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-28 13:30:09,239 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=4, NotChecked=26, Total=240 [2018-11-28 13:30:09,239 INFO L87 Difference]: Start difference. First operand 106 states and 110 transitions. Second operand 15 states. [2018-11-28 13:30:14,504 WARN L180 SmtUtils]: Spent 2.17 s on a formula simplification. DAG size of input: 25 DAG size of output: 18 [2018-11-28 13:30:29,678 WARN L854 $PredicateComparison]: unable to prove that (and (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) (exists ((v_prenex_50 (_ BitVec 32))) (and (= (store |c_old(#valid)| v_prenex_50 (_ bv1 1)) |c_#valid|) (= (select |c_old(#valid)| v_prenex_50) (_ bv0 1))))) is different from true [2018-11-28 13:31:00,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:31:00,183 INFO L93 Difference]: Finished difference Result 105 states and 109 transitions. [2018-11-28 13:31:00,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-28 13:31:00,184 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 77 [2018-11-28 13:31:00,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:31:00,184 INFO L225 Difference]: With dead ends: 105 [2018-11-28 13:31:00,184 INFO L226 Difference]: Without dead ends: 105 [2018-11-28 13:31:00,184 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 178 GetRequests, 153 SyntacticMatches, 6 SemanticMatches, 19 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 16.3s TimeCoverageRelationStatistics Valid=70, Invalid=275, Unknown=5, NotChecked=70, Total=420 [2018-11-28 13:31:00,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-11-28 13:31:00,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 96. [2018-11-28 13:31:00,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-11-28 13:31:00,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 99 transitions. [2018-11-28 13:31:00,186 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 99 transitions. Word has length 77 [2018-11-28 13:31:00,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:31:00,186 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 99 transitions. [2018-11-28 13:31:00,186 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-28 13:31:00,186 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 99 transitions. [2018-11-28 13:31:00,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-11-28 13:31:00,187 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:31:00,187 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:31:00,187 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:31:00,187 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:31:00,187 INFO L82 PathProgramCache]: Analyzing trace with hash 1004533000, now seen corresponding path program 1 times [2018-11-28 13:31:00,188 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:31:00,188 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 54 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:31:00,218 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:31:00,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:31:00,389 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:31:00,390 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:31:00,391 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:00,392 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:00,392 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:31:00,417 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:00,418 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:00,418 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:31:00,418 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:00,420 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:00,420 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-11-28 13:31:00,454 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:00,454 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:00,455 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:31:00,455 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:00,460 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:00,460 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:9 [2018-11-28 13:31:00,643 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:00,643 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-11-28 13:31:00,644 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:00,653 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:31:00,653 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:17 [2018-11-28 13:31:00,688 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:00,690 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:00,691 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-11-28 13:31:00,691 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:00,701 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:31:00,701 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-11-28 13:31:00,738 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:31:00,738 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:31:00,909 WARN L288 Elim1Store]: Array PQE input equivalent to true [2018-11-28 13:31:00,909 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:00,920 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:31:00,920 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:00,929 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:31:00,929 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:00,934 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-28 13:31:00,934 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-11-28 13:31:01,067 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:31:01,067 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:31:01,076 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:31:01,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:31:01,124 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:31:01,126 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:31:01,126 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:01,129 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:01,129 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:31:01,139 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:01,141 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:01,142 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:31:01,142 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:01,145 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:01,145 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:31:01,149 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:01,150 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:01,151 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:31:01,151 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:01,160 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:01,160 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:9 [2018-11-28 13:31:01,255 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:01,256 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-11-28 13:31:01,256 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:01,266 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:31:01,266 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:17 [2018-11-28 13:31:01,269 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:01,272 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:01,272 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-11-28 13:31:01,273 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:01,282 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:31:01,282 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-11-28 13:31:01,287 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:31:01,287 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:31:01,379 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:31:01,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17] total 21 [2018-11-28 13:31:01,379 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-28 13:31:01,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-28 13:31:01,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=553, Unknown=3, NotChecked=0, Total=650 [2018-11-28 13:31:01,380 INFO L87 Difference]: Start difference. First operand 96 states and 99 transitions. Second operand 22 states. [2018-11-28 13:31:06,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:31:06,597 INFO L93 Difference]: Finished difference Result 107 states and 111 transitions. [2018-11-28 13:31:06,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-28 13:31:06,598 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 78 [2018-11-28 13:31:06,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:31:06,598 INFO L225 Difference]: With dead ends: 107 [2018-11-28 13:31:06,598 INFO L226 Difference]: Without dead ends: 107 [2018-11-28 13:31:06,599 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 232 GetRequests, 183 SyntacticMatches, 13 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 443 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=189, Invalid=1214, Unknown=3, NotChecked=0, Total=1406 [2018-11-28 13:31:06,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-11-28 13:31:06,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 107. [2018-11-28 13:31:06,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-11-28 13:31:06,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 111 transitions. [2018-11-28 13:31:06,601 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 111 transitions. Word has length 78 [2018-11-28 13:31:06,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:31:06,601 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 111 transitions. [2018-11-28 13:31:06,601 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-28 13:31:06,601 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 111 transitions. [2018-11-28 13:31:06,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-11-28 13:31:06,602 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:31:06,602 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:31:06,602 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:31:06,602 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:31:06,603 INFO L82 PathProgramCache]: Analyzing trace with hash 1200243331, now seen corresponding path program 1 times [2018-11-28 13:31:06,603 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:31:06,603 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 56 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:31:06,632 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:31:06,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:31:06,834 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:31:06,836 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:31:06,836 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:06,837 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:06,838 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:31:06,862 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:06,863 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:06,864 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:31:06,864 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:06,865 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:06,865 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-11-28 13:31:06,899 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:06,900 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:06,901 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:31:06,901 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:06,906 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:06,906 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:9 [2018-11-28 13:31:07,103 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:07,104 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-11-28 13:31:07,104 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,113 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:31:07,113 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:17 [2018-11-28 13:31:07,151 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:07,153 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:07,153 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-11-28 13:31:07,153 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,164 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:31:07,164 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-11-28 13:31:07,204 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-28 13:31:07,204 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:31:07,416 WARN L288 Elim1Store]: Array PQE input equivalent to true [2018-11-28 13:31:07,416 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,426 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:31:07,427 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,435 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:31:07,435 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,440 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-28 13:31:07,440 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:43, output treesize:9 [2018-11-28 13:31:07,483 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 7 [2018-11-28 13:31:07,483 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,485 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,485 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:3 [2018-11-28 13:31:07,504 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 9 [2018-11-28 13:31:07,505 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,506 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,507 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:3 [2018-11-28 13:31:07,524 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-11-28 13:31:07,524 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,526 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,526 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:3 [2018-11-28 13:31:07,591 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:31:07,591 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:31:07,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:31:07,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:31:07,638 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:31:07,640 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:31:07,640 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,641 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,642 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:31:07,646 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:07,647 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:07,648 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:31:07,648 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,650 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,650 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-11-28 13:31:07,654 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:07,655 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:07,655 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 13:31:07,656 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,661 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,661 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:9 [2018-11-28 13:31:07,691 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:07,692 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-11-28 13:31:07,692 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,701 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:31:07,701 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:17 [2018-11-28 13:31:07,704 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:07,706 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:07,707 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-11-28 13:31:07,707 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:07,716 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:31:07,716 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-11-28 13:31:07,726 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-28 13:31:07,726 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:31:07,861 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:31:07,861 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 20] total 22 [2018-11-28 13:31:07,862 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-11-28 13:31:07,862 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-11-28 13:31:07,862 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=567, Unknown=11, NotChecked=0, Total=650 [2018-11-28 13:31:07,862 INFO L87 Difference]: Start difference. First operand 107 states and 111 transitions. Second operand 23 states. [2018-11-28 13:31:13,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:31:13,115 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2018-11-28 13:31:13,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-28 13:31:13,115 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 79 [2018-11-28 13:31:13,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:31:13,116 INFO L225 Difference]: With dead ends: 106 [2018-11-28 13:31:13,116 INFO L226 Difference]: Without dead ends: 106 [2018-11-28 13:31:13,116 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 191 SyntacticMatches, 8 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 239 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=153, Invalid=1239, Unknown=14, NotChecked=0, Total=1406 [2018-11-28 13:31:13,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-11-28 13:31:13,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 95. [2018-11-28 13:31:13,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-11-28 13:31:13,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 98 transitions. [2018-11-28 13:31:13,118 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 98 transitions. Word has length 79 [2018-11-28 13:31:13,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:31:13,118 INFO L480 AbstractCegarLoop]: Abstraction has 95 states and 98 transitions. [2018-11-28 13:31:13,118 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-11-28 13:31:13,118 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 98 transitions. [2018-11-28 13:31:13,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-11-28 13:31:13,118 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:31:13,118 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:31:13,119 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:31:13,119 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:31:13,119 INFO L82 PathProgramCache]: Analyzing trace with hash -1289079286, now seen corresponding path program 1 times [2018-11-28 13:31:13,119 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:31:13,119 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 58 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:31:13,136 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:31:13,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:31:13,448 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:31:13,484 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 17 [2018-11-28 13:31:13,489 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:13,494 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 15 [2018-11-28 13:31:13,494 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-11-28 13:31:13,502 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-28 13:31:13,504 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 15 [2018-11-28 13:31:13,506 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:31:13,506 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2018-11-28 13:31:13,507 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:31:13,512 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:31:13,520 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 13:31:13,520 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:18, output treesize:19 [2018-11-28 13:31:20,627 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 20 [2018-11-28 13:31:33,938 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 21 [2018-11-28 13:31:35,943 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~fe~1.base (_ BitVec 32)) (entry_point_~c11~0.base (_ BitVec 32)) (entry_point_~cfg~1.base (_ BitVec 32))) (let ((.cse1 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (let ((.cse0 (store .cse1 entry_point_~cfg~1.base (_ bv1 1)))) (and (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= |c_#valid| (store (store (store .cse0 entry_point_~fe~1.base (_ bv0 1)) entry_point_~cfg~1.base (_ bv0 1)) entry_point_~c11~0.base (_ bv0 1))) (= (select .cse1 entry_point_~cfg~1.base) (_ bv0 1)) (= (_ bv0 1) (select .cse0 entry_point_~fe~1.base)))))) is different from true [2018-11-28 13:31:36,039 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:31:36,039 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:31:36,450 WARN L180 SmtUtils]: Spent 281.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 67 [2018-11-28 13:31:38,494 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_40 (_ BitVec 32)) (v_entry_point_~cfg~1.base_33 (_ BitVec 32)) (v_entry_point_~fe~1.base_32 (_ BitVec 32))) (let ((.cse1 (store |c_#valid| v_entry_point_~c11~0.base_40 (_ bv1 1)))) (let ((.cse0 (store .cse1 v_entry_point_~cfg~1.base_33 (_ bv1 1)))) (or (not (= (select |c_#valid| v_entry_point_~c11~0.base_40) (_ bv0 1))) (= (store (store (store .cse0 v_entry_point_~fe~1.base_32 (_ bv0 1)) v_entry_point_~cfg~1.base_33 (_ bv0 1)) v_entry_point_~c11~0.base_40 (_ bv0 1)) |c_old(#valid)|) (not (= (_ bv0 1) (select .cse1 v_entry_point_~cfg~1.base_33))) (not (= (_ bv0 1) (select .cse0 v_entry_point_~fe~1.base_32))))))) is different from false [2018-11-28 13:31:38,499 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:31:38,499 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/z3 Starting monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:31:38,510 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:31:38,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:31:38,564 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:31:38,584 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:31:38,585 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 13:31:38,822 WARN L180 SmtUtils]: Spent 119.00 ms on a formula simplification that was a NOOP. DAG size: 67 [2018-11-28 13:31:40,864 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_44 (_ BitVec 32)) (v_entry_point_~fe~1.base_35 (_ BitVec 32)) (v_entry_point_~cfg~1.base_36 (_ BitVec 32))) (let ((.cse0 (store |c_#valid| v_entry_point_~c11~0.base_44 (_ bv1 1)))) (let ((.cse1 (store .cse0 v_entry_point_~cfg~1.base_36 (_ bv1 1)))) (or (not (= (select .cse0 v_entry_point_~cfg~1.base_36) (_ bv0 1))) (not (= (_ bv0 1) (select .cse1 v_entry_point_~fe~1.base_35))) (not (= (select |c_#valid| v_entry_point_~c11~0.base_44) (_ bv0 1))) (= (store (store (store .cse1 v_entry_point_~fe~1.base_35 (_ bv0 1)) v_entry_point_~cfg~1.base_36 (_ bv0 1)) v_entry_point_~c11~0.base_44 (_ bv0 1)) |c_old(#valid)|))))) is different from false [2018-11-28 13:31:40,882 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:31:40,882 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 12] total 17 [2018-11-28 13:31:40,882 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-28 13:31:40,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-28 13:31:40,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=218, Unknown=12, NotChecked=96, Total=380 [2018-11-28 13:31:40,883 INFO L87 Difference]: Start difference. First operand 95 states and 98 transitions. Second operand 18 states. [2018-11-28 13:32:24,618 WARN L180 SmtUtils]: Spent 4.01 s on a formula simplification. DAG size of input: 23 DAG size of output: 21 [2018-11-28 13:32:24,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:32:24,702 INFO L93 Difference]: Finished difference Result 109 states and 112 transitions. [2018-11-28 13:32:24,702 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-28 13:32:24,702 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 81 [2018-11-28 13:32:24,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:32:24,703 INFO L225 Difference]: With dead ends: 109 [2018-11-28 13:32:24,703 INFO L226 Difference]: Without dead ends: 79 [2018-11-28 13:32:24,703 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 146 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 32.5s TimeCoverageRelationStatistics Valid=70, Invalid=310, Unknown=12, NotChecked=114, Total=506 [2018-11-28 13:32:24,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-11-28 13:32:24,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-11-28 13:32:24,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-11-28 13:32:24,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 79 transitions. [2018-11-28 13:32:24,705 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 79 transitions. Word has length 81 [2018-11-28 13:32:24,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:32:24,705 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 79 transitions. [2018-11-28 13:32:24,705 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-28 13:32:24,705 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 79 transitions. [2018-11-28 13:32:24,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-28 13:32:24,705 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:32:24,705 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:32:24,705 INFO L423 AbstractCegarLoop]: === Iteration 41 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-11-28 13:32:24,705 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:32:24,706 INFO L82 PathProgramCache]: Analyzing trace with hash 846770863, now seen corresponding path program 1 times [2018-11-28 13:32:24,706 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 13:32:24,706 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e524682c-9eda-4702-a469-75d9a509589c/bin-2019/uautomizer/cvc4 Starting monitored process 60 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 13:32:24,728 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:32:25,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 13:32:25,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 13:32:25,488 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 13:32:25,505 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-11-28 13:32:25,511 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 13:32:25,511 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 13:32:25,525 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 01:32:25 BoogieIcfgContainer [2018-11-28 13:32:25,525 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 13:32:25,525 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 13:32:25,525 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 13:32:25,526 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 13:32:25,526 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 01:21:41" (3/4) ... [2018-11-28 13:32:25,529 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-11-28 13:32:25,529 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 13:32:25,530 INFO L168 Benchmark]: Toolchain (without parser) took 645780.61 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 149.4 MB). Free memory was 938.0 MB in the beginning and 976.4 MB in the end (delta: -38.4 MB). Peak memory consumption was 111.0 MB. Max. memory is 11.5 GB. [2018-11-28 13:32:25,530 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 13:32:25,530 INFO L168 Benchmark]: CACSL2BoogieTranslator took 488.46 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 146.3 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -176.8 MB). Peak memory consumption was 37.5 MB. Max. memory is 11.5 GB. [2018-11-28 13:32:25,530 INFO L168 Benchmark]: Boogie Preprocessor took 55.45 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.5 MB). Peak memory consumption was 6.5 MB. Max. memory is 11.5 GB. [2018-11-28 13:32:25,531 INFO L168 Benchmark]: RCFGBuilder took 1110.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 992.6 MB in the end (delta: 115.7 MB). Peak memory consumption was 115.7 MB. Max. memory is 11.5 GB. [2018-11-28 13:32:25,531 INFO L168 Benchmark]: TraceAbstraction took 644118.64 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 3.1 MB). Free memory was 992.6 MB in the beginning and 976.4 MB in the end (delta: 16.2 MB). Peak memory consumption was 19.3 MB. Max. memory is 11.5 GB. [2018-11-28 13:32:25,531 INFO L168 Benchmark]: Witness Printer took 3.70 ms. Allocated memory is still 1.2 GB. Free memory is still 976.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 13:32:25,532 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 488.46 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 146.3 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -176.8 MB). Peak memory consumption was 37.5 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 55.45 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.5 MB). Peak memory consumption was 6.5 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1110.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 992.6 MB in the end (delta: 115.7 MB). Peak memory consumption was 115.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 644118.64 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 3.1 MB). Free memory was 992.6 MB in the beginning and 976.4 MB in the end (delta: 16.2 MB). Peak memory consumption was 19.3 MB. Max. memory is 11.5 GB. * Witness Printer took 3.70 ms. Allocated memory is still 1.2 GB. Free memory is still 976.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1512]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1512. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={-2129561025:0}] [L1513] CALL entry_point() VAL [ldv_global_msg_list={-2129561025:0}] [L1490] CALL, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [\old(size)=20, ldv_global_msg_list={-2129561025:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=20, \result={1820205349:0}, ldv_global_msg_list={-2129561025:0}, malloc(size)={1820205349:0}, size=20] [L1490] RET, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [ldv_global_msg_list={-2129561025:0}, ldv_malloc(sizeof(struct ldv_i2c_client))={1820205349:0}] [L1490] struct ldv_i2c_client *c11 = (struct ldv_i2c_client *)ldv_malloc(sizeof(struct ldv_i2c_client)); [L1491] COND FALSE !(!c11) VAL [c11={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1493] CALL, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [\old(size)=4, ldv_global_msg_list={-2129561025:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={-1894694275:0}, ldv_global_msg_list={-2129561025:0}, malloc(size)={-1894694275:0}, size=4] [L1493] RET, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [c11={1820205349:0}, ldv_global_msg_list={-2129561025:0}, ldv_malloc(sizeof(struct ldv_m88ts2022_config))={-1894694275:0}] [L1492-L1493] struct ldv_m88ts2022_config *cfg = (struct ldv_m88ts2022_config *) ldv_malloc(sizeof(struct ldv_m88ts2022_config)); [L1494] COND FALSE !(!cfg) VAL [c11={1820205349:0}, cfg={-1894694275:0}, ldv_global_msg_list={-2129561025:0}] [L1495] c11->dev.platform_data = cfg VAL [c11={1820205349:0}, cfg={-1894694275:0}, ldv_global_msg_list={-2129561025:0}] [L1497] CALL, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [\old(size)=4, ldv_global_msg_list={-2129561025:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, malloc(size)={-1820205348:0}, size=4] [L1497] RET, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [c11={1820205349:0}, cfg={-1894694275:0}, ldv_global_msg_list={-2129561025:0}, ldv_malloc(sizeof(struct ldv_dvb_frontend))={-1820205348:0}] [L1496-L1497] struct ldv_dvb_frontend *fe = (struct ldv_dvb_frontend *) ldv_malloc(sizeof(struct ldv_dvb_frontend)); [L1498] COND FALSE !(!fe) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1499] cfg->fe = fe VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1500] CALL alloc_3_11(c11) VAL [client={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1470] EXPR client->dev.platform_data VAL [client={1820205349:0}, client={1820205349:0}, client->dev.platform_data={-1894694275:0}, ldv_global_msg_list={-2129561025:0}] [L1470] struct ldv_m88ts2022_config *cfg = client->dev.platform_data; [L1471] EXPR cfg->fe VAL [cfg={-1894694275:0}, cfg->fe={-1820205348:0}, client={1820205349:0}, client={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1471] struct ldv_dvb_frontend *fe = cfg->fe; [L1472] CALL, EXPR ldv_malloc(sizeof(struct Data11)) VAL [\old(size)=12, ldv_global_msg_list={-2129561025:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=12, \result={17922623:0}, ldv_global_msg_list={-2129561025:0}, malloc(size)={17922623:0}, size=12] [L1472] RET, EXPR ldv_malloc(sizeof(struct Data11)) VAL [cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, ldv_malloc(sizeof(struct Data11))={17922623:0}] [L1472] struct Data11 *priv = (struct Data11*)ldv_malloc(sizeof(struct Data11)); [L1473] COND FALSE !(!priv) VAL [cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, priv={17922623:0}] [L1474] fe->tuner_priv = priv VAL [cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, priv={17922623:0}] [L1475] CALL ldv_i2c_set_clientdata(client, 0) VAL [data={0:0}, dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1462] CALL ldv_dev_set_drvdata(&dev->dev, data) VAL [data={0:0}, dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1198] dev->driver_data = data VAL [data={0:0}, data={0:0}, dev={1820205349:0}, dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1462] RET ldv_dev_set_drvdata(&dev->dev, data) VAL [data={0:0}, data={0:0}, dev={1820205349:0}, dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1475] RET ldv_i2c_set_clientdata(client, 0) VAL [cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, priv={17922623:0}] [L1476] return 0; VAL [\result=0, cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, priv={17922623:0}] [L1500] RET alloc_3_11(c11) VAL [alloc_3_11(c11)=0, c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1501] CALL free_11(c11) VAL [client={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1483] CALL, EXPR ldv_i2c_get_clientdata(client) VAL [dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1457] CALL, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1193] EXPR dev->driver_data VAL [dev={1820205349:0}, dev={1820205349:0}, dev->driver_data={0:0}, ldv_global_msg_list={-2129561025:0}] [L1193] return dev->driver_data; [L1457] RET, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={1820205349:0}, dev={1820205349:0}, ldv_dev_get_drvdata(&dev->dev)={0:0}, ldv_global_msg_list={-2129561025:0}] [L1457] return ldv_dev_get_drvdata(&dev->dev); [L1483] RET, EXPR ldv_i2c_get_clientdata(client) VAL [client={1820205349:0}, client={1820205349:0}, ldv_global_msg_list={-2129561025:0}, ldv_i2c_get_clientdata(client)={0:0}] [L1483] void *priv = (struct Data11*)ldv_i2c_get_clientdata(client); [L1484] COND FALSE !(\read(*priv)) VAL [client={1820205349:0}, client={1820205349:0}, ldv_global_msg_list={-2129561025:0}, priv={0:0}] [L1501] RET free_11(c11) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1503] free(fe) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1503] free(fe) [L1505] free(cfg) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1505] free(cfg) [L1507] free(c11) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1507] free(c11) [L1513] RET entry_point() VAL [ldv_global_msg_list={-2129561025:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 47 procedures, 374 locations, 85 error locations. UNSAFE Result, 644.0s OverallTime, 41 OverallIterations, 4 TraceHistogramMax, 480.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3274 SDtfs, 3053 SDslu, 17085 SDs, 0 SdLazy, 21755 SolverSat, 1306 SolverUnsat, 442 SolverUnknown, 0 SolverNotchecked, 367.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3739 GetRequests, 2842 SyntacticMatches, 80 SemanticMatches, 817 ConstructedPredicates, 32 IntricatePredicates, 1 DeprecatedPredicates, 4623 ImplicationChecksByTransitivity, 254.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=170occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 40 MinimizatonAttempts, 724 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.5s SsaConstructionTime, 4.2s SatisfiabilityAnalysisTime, 156.5s InterpolantComputationTime, 2837 NumberOfCodeBlocks, 2837 NumberOfCodeBlocksAsserted, 59 NumberOfCheckSat, 3131 ConstructedInterpolants, 321 QuantifiedInterpolants, 1073475 SizeOfPredicates, 472 NumberOfNonLiveVariables, 10435 ConjunctsInSsa, 1384 ConjunctsInUnsatCore, 68 InterpolantComputations, 15 PerfectInterpolantSequences, 782/1144 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...