./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test17_2_false-valid-free.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 0cd3be1d Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test17_2_false-valid-free.i -s /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 708e975f6ded0cfba15d7fd51cdde51c174d1f46 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test17_2_false-valid-free.i -s /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 708e975f6ded0cfba15d7fd51cdde51c174d1f46 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(valid-free) --- Real Ultimate output --- This is Ultimate 0.1.23-0cd3be1 [2018-11-28 11:26:03,204 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 11:26:03,205 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 11:26:03,212 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 11:26:03,213 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 11:26:03,213 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 11:26:03,214 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 11:26:03,215 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 11:26:03,216 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 11:26:03,217 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 11:26:03,217 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 11:26:03,218 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 11:26:03,218 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 11:26:03,219 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 11:26:03,220 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 11:26:03,220 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 11:26:03,221 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 11:26:03,222 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 11:26:03,223 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 11:26:03,224 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 11:26:03,225 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 11:26:03,226 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 11:26:03,228 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 11:26:03,228 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 11:26:03,228 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 11:26:03,229 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 11:26:03,229 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 11:26:03,230 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 11:26:03,231 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 11:26:03,231 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 11:26:03,231 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 11:26:03,232 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 11:26:03,232 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 11:26:03,232 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 11:26:03,233 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 11:26:03,233 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 11:26:03,234 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-11-28 11:26:03,243 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 11:26:03,243 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 11:26:03,244 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 11:26:03,244 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 11:26:03,244 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 11:26:03,244 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 11:26:03,244 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 11:26:03,245 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 11:26:03,245 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 11:26:03,245 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-28 11:26:03,245 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 11:26:03,245 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 11:26:03,245 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 11:26:03,245 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-11-28 11:26:03,245 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-11-28 11:26:03,246 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-11-28 11:26:03,246 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 11:26:03,246 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 11:26:03,246 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 11:26:03,246 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 11:26:03,246 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 11:26:03,246 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 11:26:03,247 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 11:26:03,247 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 11:26:03,247 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 11:26:03,247 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 11:26:03,247 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-28 11:26:03,247 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 11:26:03,247 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 708e975f6ded0cfba15d7fd51cdde51c174d1f46 [2018-11-28 11:26:03,270 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 11:26:03,279 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 11:26:03,281 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 11:26:03,282 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 11:26:03,282 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 11:26:03,283 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test17_2_false-valid-free.i [2018-11-28 11:26:03,318 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/data/89e853666/13f8b09f3fe64368a6f710e9e67cae24/FLAG10440b0be [2018-11-28 11:26:03,706 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 11:26:03,706 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/sv-benchmarks/c/ldv-memsafety/memleaks_test17_2_false-valid-free.i [2018-11-28 11:26:03,716 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/data/89e853666/13f8b09f3fe64368a6f710e9e67cae24/FLAG10440b0be [2018-11-28 11:26:04,080 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/data/89e853666/13f8b09f3fe64368a6f710e9e67cae24 [2018-11-28 11:26:04,082 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 11:26:04,084 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-11-28 11:26:04,084 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 11:26:04,084 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 11:26:04,087 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 11:26:04,088 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 11:26:04" (1/1) ... [2018-11-28 11:26:04,090 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6412a871 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:26:04, skipping insertion in model container [2018-11-28 11:26:04,090 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 11:26:04" (1/1) ... [2018-11-28 11:26:04,096 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 11:26:04,131 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 11:26:04,403 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 11:26:04,416 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 11:26:04,457 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 11:26:04,505 INFO L195 MainTranslator]: Completed translation [2018-11-28 11:26:04,505 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:26:04 WrapperNode [2018-11-28 11:26:04,505 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 11:26:04,506 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 11:26:04,506 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 11:26:04,506 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 11:26:04,517 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:26:04" (1/1) ... [2018-11-28 11:26:04,517 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:26:04" (1/1) ... [2018-11-28 11:26:04,530 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:26:04" (1/1) ... [2018-11-28 11:26:04,530 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:26:04" (1/1) ... [2018-11-28 11:26:04,549 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:26:04" (1/1) ... [2018-11-28 11:26:04,553 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:26:04" (1/1) ... [2018-11-28 11:26:04,557 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:26:04" (1/1) ... [2018-11-28 11:26:04,564 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 11:26:04,564 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 11:26:04,564 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 11:26:04,564 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 11:26:04,565 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:26:04" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 11:26:04,601 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-28 11:26:04,601 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 11:26:04,601 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-11-28 11:26:04,601 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-11-28 11:26:04,601 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-11-28 11:26:04,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-11-28 11:26:04,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-11-28 11:26:04,604 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-11-28 11:26:04,604 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-11-28 11:26:04,604 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-11-28 11:26:04,604 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-11-28 11:26:04,604 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_unsafe_17 [2018-11-28 11:26:04,604 INFO L138 BoogieDeclarations]: Found implementation of procedure free_17 [2018-11-28 11:26:04,604 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-11-28 11:26:04,604 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-28 11:26:04,604 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-11-28 11:26:04,604 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-11-28 11:26:04,604 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-11-28 11:26:04,604 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-11-28 11:26:04,604 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-11-28 11:26:04,604 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-11-28 11:26:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-11-28 11:26:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-11-28 11:26:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-11-28 11:26:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-11-28 11:26:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-11-28 11:26:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-11-28 11:26:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-11-28 11:26:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-11-28 11:26:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-11-28 11:26:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-11-28 11:26:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-11-28 11:26:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-11-28 11:26:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-11-28 11:26:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-11-28 11:26:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-11-28 11:26:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-11-28 11:26:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-11-28 11:26:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-11-28 11:26:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-11-28 11:26:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-11-28 11:26:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-11-28 11:26:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-11-28 11:26:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-11-28 11:26:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-11-28 11:26:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-11-28 11:26:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-28 11:26:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-28 11:26:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-11-28 11:26:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-11-28 11:26:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-11-28 11:26:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-11-28 11:26:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-11-28 11:26:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-11-28 11:26:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 11:26:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-11-28 11:26:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-11-28 11:26:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-11-28 11:26:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-28 11:26:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-11-28 11:26:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-11-28 11:26:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-11-28 11:26:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-28 11:26:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-11-28 11:26:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-11-28 11:26:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-11-28 11:26:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-11-28 11:26:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-11-28 11:26:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-11-28 11:26:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 11:26:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-11-28 11:26:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-11-28 11:26:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-11-28 11:26:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-11-28 11:26:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-11-28 11:26:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-28 11:26:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-28 11:26:04,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-11-28 11:26:04,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-11-28 11:26:04,615 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-11-28 11:26:04,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-11-28 11:26:04,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-11-28 11:26:04,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-11-28 11:26:04,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-11-28 11:26:04,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-11-28 11:26:04,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-11-28 11:26:04,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-11-28 11:26:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-11-28 11:26:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-11-28 11:26:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-11-28 11:26:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-11-28 11:26:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-11-28 11:26:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-11-28 11:26:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-11-28 11:26:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_unsafe_17 [2018-11-28 11:26:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure free_17 [2018-11-28 11:26:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-11-28 11:26:04,617 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-28 11:26:04,617 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-28 11:26:04,617 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-11-28 11:26:04,617 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 11:26:04,617 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-11-28 11:26:04,617 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2018-11-28 11:26:04,617 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-11-28 11:26:04,617 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-11-28 11:26:04,920 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-28 11:26:05,093 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-28 11:26:05,315 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 11:26:05,315 INFO L280 CfgBuilder]: Removed 5 assue(true) statements. [2018-11-28 11:26:05,316 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 11:26:05 BoogieIcfgContainer [2018-11-28 11:26:05,316 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 11:26:05,317 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 11:26:05,317 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 11:26:05,320 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 11:26:05,320 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 11:26:04" (1/3) ... [2018-11-28 11:26:05,321 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@442ec01f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 11:26:05, skipping insertion in model container [2018-11-28 11:26:05,321 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:26:04" (2/3) ... [2018-11-28 11:26:05,321 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@442ec01f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 11:26:05, skipping insertion in model container [2018-11-28 11:26:05,321 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 11:26:05" (3/3) ... [2018-11-28 11:26:05,323 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test17_2_false-valid-free.i [2018-11-28 11:26:05,332 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 11:26:05,339 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 81 error locations. [2018-11-28 11:26:05,353 INFO L257 AbstractCegarLoop]: Starting to check reachability of 81 error locations. [2018-11-28 11:26:05,378 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 11:26:05,379 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 11:26:05,379 INFO L383 AbstractCegarLoop]: Hoare is false [2018-11-28 11:26:05,379 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 11:26:05,379 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 11:26:05,379 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 11:26:05,380 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 11:26:05,380 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 11:26:05,380 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 11:26:05,399 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states. [2018-11-28 11:26:05,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-28 11:26:05,408 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:05,409 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:05,411 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:05,416 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:05,417 INFO L82 PathProgramCache]: Analyzing trace with hash -1363255309, now seen corresponding path program 1 times [2018-11-28 11:26:05,419 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:05,419 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:05,469 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:05,469 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:05,469 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:05,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:05,605 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:05,607 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:26:05,607 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 11:26:05,611 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 11:26:05,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 11:26:05,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:26:05,626 INFO L87 Difference]: Start difference. First operand 137 states. Second operand 5 states. [2018-11-28 11:26:05,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:05,794 INFO L93 Difference]: Finished difference Result 77 states and 88 transitions. [2018-11-28 11:26:05,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 11:26:05,795 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-28 11:26:05,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:05,805 INFO L225 Difference]: With dead ends: 77 [2018-11-28 11:26:05,805 INFO L226 Difference]: Without dead ends: 74 [2018-11-28 11:26:05,806 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:26:05,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-11-28 11:26:05,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 70. [2018-11-28 11:26:05,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-11-28 11:26:05,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 81 transitions. [2018-11-28 11:26:05,843 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 81 transitions. Word has length 16 [2018-11-28 11:26:05,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:05,843 INFO L480 AbstractCegarLoop]: Abstraction has 70 states and 81 transitions. [2018-11-28 11:26:05,843 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 11:26:05,844 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 81 transitions. [2018-11-28 11:26:05,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-28 11:26:05,845 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:05,845 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:05,846 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:05,846 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:05,846 INFO L82 PathProgramCache]: Analyzing trace with hash -1363255308, now seen corresponding path program 1 times [2018-11-28 11:26:05,846 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:05,846 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:05,848 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:05,848 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:05,848 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:05,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:05,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:05,947 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:26:05,948 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 11:26:05,948 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 11:26:05,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 11:26:05,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:26:05,949 INFO L87 Difference]: Start difference. First operand 70 states and 81 transitions. Second operand 8 states. [2018-11-28 11:26:06,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:06,085 INFO L93 Difference]: Finished difference Result 80 states and 93 transitions. [2018-11-28 11:26:06,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 11:26:06,085 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 16 [2018-11-28 11:26:06,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:06,086 INFO L225 Difference]: With dead ends: 80 [2018-11-28 11:26:06,087 INFO L226 Difference]: Without dead ends: 80 [2018-11-28 11:26:06,087 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2018-11-28 11:26:06,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-11-28 11:26:06,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 72. [2018-11-28 11:26:06,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-11-28 11:26:06,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 83 transitions. [2018-11-28 11:26:06,094 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 83 transitions. Word has length 16 [2018-11-28 11:26:06,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:06,095 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 83 transitions. [2018-11-28 11:26:06,095 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 11:26:06,095 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 83 transitions. [2018-11-28 11:26:06,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-28 11:26:06,095 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:06,095 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:06,096 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:06,096 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:06,096 INFO L82 PathProgramCache]: Analyzing trace with hash -475751628, now seen corresponding path program 1 times [2018-11-28 11:26:06,096 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:06,096 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:06,097 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:06,097 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:06,098 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:06,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:06,136 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:06,137 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:26:06,137 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 11:26:06,137 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 11:26:06,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 11:26:06,137 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:26:06,137 INFO L87 Difference]: Start difference. First operand 72 states and 83 transitions. Second operand 5 states. [2018-11-28 11:26:06,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:06,158 INFO L93 Difference]: Finished difference Result 71 states and 79 transitions. [2018-11-28 11:26:06,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 11:26:06,159 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-28 11:26:06,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:06,160 INFO L225 Difference]: With dead ends: 71 [2018-11-28 11:26:06,160 INFO L226 Difference]: Without dead ends: 71 [2018-11-28 11:26:06,160 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:26:06,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-11-28 11:26:06,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 69. [2018-11-28 11:26:06,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-11-28 11:26:06,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 77 transitions. [2018-11-28 11:26:06,166 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 77 transitions. Word has length 16 [2018-11-28 11:26:06,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:06,166 INFO L480 AbstractCegarLoop]: Abstraction has 69 states and 77 transitions. [2018-11-28 11:26:06,166 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 11:26:06,167 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 77 transitions. [2018-11-28 11:26:06,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-28 11:26:06,167 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:06,167 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:06,168 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:06,168 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:06,168 INFO L82 PathProgramCache]: Analyzing trace with hash 688745984, now seen corresponding path program 1 times [2018-11-28 11:26:06,168 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:06,168 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:06,169 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:06,170 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:06,170 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:06,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:06,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:06,201 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:26:06,201 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 11:26:06,201 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 11:26:06,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 11:26:06,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:26:06,202 INFO L87 Difference]: Start difference. First operand 69 states and 77 transitions. Second operand 5 states. [2018-11-28 11:26:06,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:06,218 INFO L93 Difference]: Finished difference Result 71 states and 78 transitions. [2018-11-28 11:26:06,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 11:26:06,222 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-11-28 11:26:06,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:06,223 INFO L225 Difference]: With dead ends: 71 [2018-11-28 11:26:06,223 INFO L226 Difference]: Without dead ends: 71 [2018-11-28 11:26:06,223 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:26:06,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-11-28 11:26:06,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 69. [2018-11-28 11:26:06,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-11-28 11:26:06,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 76 transitions. [2018-11-28 11:26:06,227 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 76 transitions. Word has length 17 [2018-11-28 11:26:06,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:06,228 INFO L480 AbstractCegarLoop]: Abstraction has 69 states and 76 transitions. [2018-11-28 11:26:06,228 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 11:26:06,228 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 76 transitions. [2018-11-28 11:26:06,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-28 11:26:06,228 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:06,229 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:06,229 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:06,229 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:06,229 INFO L82 PathProgramCache]: Analyzing trace with hash -1863410977, now seen corresponding path program 1 times [2018-11-28 11:26:06,229 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:06,230 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:06,231 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:06,231 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:06,231 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:06,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:06,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:06,260 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:26:06,260 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-28 11:26:06,261 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 11:26:06,261 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 11:26:06,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 11:26:06,261 INFO L87 Difference]: Start difference. First operand 69 states and 76 transitions. Second operand 3 states. [2018-11-28 11:26:06,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:06,311 INFO L93 Difference]: Finished difference Result 102 states and 114 transitions. [2018-11-28 11:26:06,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 11:26:06,311 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-11-28 11:26:06,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:06,312 INFO L225 Difference]: With dead ends: 102 [2018-11-28 11:26:06,312 INFO L226 Difference]: Without dead ends: 97 [2018-11-28 11:26:06,313 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 11:26:06,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-11-28 11:26:06,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 67. [2018-11-28 11:26:06,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-11-28 11:26:06,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 73 transitions. [2018-11-28 11:26:06,318 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 73 transitions. Word has length 17 [2018-11-28 11:26:06,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:06,319 INFO L480 AbstractCegarLoop]: Abstraction has 67 states and 73 transitions. [2018-11-28 11:26:06,319 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 11:26:06,319 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 73 transitions. [2018-11-28 11:26:06,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-11-28 11:26:06,319 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:06,320 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:06,320 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:06,320 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:06,320 INFO L82 PathProgramCache]: Analyzing trace with hash 472214760, now seen corresponding path program 1 times [2018-11-28 11:26:06,321 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:06,321 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:06,322 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:06,322 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:06,322 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:06,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:06,425 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:06,425 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:06,425 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:06,433 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:06,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:06,457 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:06,495 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:26:06,496 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:06,501 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:06,501 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-11-28 11:26:06,625 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:06,650 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:26:06,651 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 13 [2018-11-28 11:26:06,651 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-28 11:26:06,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-28 11:26:06,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-11-28 11:26:06,652 INFO L87 Difference]: Start difference. First operand 67 states and 73 transitions. Second operand 14 states. [2018-11-28 11:26:06,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:06,955 INFO L93 Difference]: Finished difference Result 72 states and 80 transitions. [2018-11-28 11:26:06,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 11:26:06,956 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 19 [2018-11-28 11:26:06,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:06,957 INFO L225 Difference]: With dead ends: 72 [2018-11-28 11:26:06,957 INFO L226 Difference]: Without dead ends: 72 [2018-11-28 11:26:06,957 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 13 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=83, Invalid=337, Unknown=0, NotChecked=0, Total=420 [2018-11-28 11:26:06,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-11-28 11:26:06,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 68. [2018-11-28 11:26:06,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-11-28 11:26:06,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 74 transitions. [2018-11-28 11:26:06,960 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 74 transitions. Word has length 19 [2018-11-28 11:26:06,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:06,961 INFO L480 AbstractCegarLoop]: Abstraction has 68 states and 74 transitions. [2018-11-28 11:26:06,961 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-28 11:26:06,961 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 74 transitions. [2018-11-28 11:26:06,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-28 11:26:06,961 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:06,962 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:06,962 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:06,962 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:06,962 INFO L82 PathProgramCache]: Analyzing trace with hash 1616068070, now seen corresponding path program 1 times [2018-11-28 11:26:06,962 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:06,962 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:06,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:06,964 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:06,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:06,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:07,033 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-28 11:26:07,033 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:26:07,033 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 11:26:07,033 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 11:26:07,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 11:26:07,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-28 11:26:07,034 INFO L87 Difference]: Start difference. First operand 68 states and 74 transitions. Second operand 7 states. [2018-11-28 11:26:07,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:07,110 INFO L93 Difference]: Finished difference Result 90 states and 102 transitions. [2018-11-28 11:26:07,110 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 11:26:07,110 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-11-28 11:26:07,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:07,111 INFO L225 Difference]: With dead ends: 90 [2018-11-28 11:26:07,111 INFO L226 Difference]: Without dead ends: 90 [2018-11-28 11:26:07,111 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:26:07,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-11-28 11:26:07,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 71. [2018-11-28 11:26:07,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-11-28 11:26:07,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 79 transitions. [2018-11-28 11:26:07,115 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 79 transitions. Word has length 27 [2018-11-28 11:26:07,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:07,115 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 79 transitions. [2018-11-28 11:26:07,115 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 11:26:07,115 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 79 transitions. [2018-11-28 11:26:07,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-28 11:26:07,116 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:07,116 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:07,116 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:07,116 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:07,116 INFO L82 PathProgramCache]: Analyzing trace with hash 1616068071, now seen corresponding path program 1 times [2018-11-28 11:26:07,116 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:07,117 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:07,118 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:07,118 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:07,118 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:07,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:07,176 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:07,176 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:07,176 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:07,184 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:07,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:07,202 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:07,228 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:07,243 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:26:07,243 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2018-11-28 11:26:07,244 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 11:26:07,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 11:26:07,244 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=39, Unknown=0, NotChecked=0, Total=72 [2018-11-28 11:26:07,244 INFO L87 Difference]: Start difference. First operand 71 states and 79 transitions. Second operand 9 states. [2018-11-28 11:26:07,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:07,270 INFO L93 Difference]: Finished difference Result 76 states and 84 transitions. [2018-11-28 11:26:07,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 11:26:07,271 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 27 [2018-11-28 11:26:07,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:07,272 INFO L225 Difference]: With dead ends: 76 [2018-11-28 11:26:07,272 INFO L226 Difference]: Without dead ends: 76 [2018-11-28 11:26:07,272 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=39, Unknown=0, NotChecked=0, Total=72 [2018-11-28 11:26:07,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-11-28 11:26:07,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 74. [2018-11-28 11:26:07,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-11-28 11:26:07,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 82 transitions. [2018-11-28 11:26:07,275 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 82 transitions. Word has length 27 [2018-11-28 11:26:07,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:07,275 INFO L480 AbstractCegarLoop]: Abstraction has 74 states and 82 transitions. [2018-11-28 11:26:07,276 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 11:26:07,276 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 82 transitions. [2018-11-28 11:26:07,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-28 11:26:07,276 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:07,276 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:07,277 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:07,277 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:07,277 INFO L82 PathProgramCache]: Analyzing trace with hash 94261363, now seen corresponding path program 2 times [2018-11-28 11:26:07,277 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:07,277 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:07,282 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:07,283 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:07,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:07,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:07,349 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:07,349 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:07,349 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:07,368 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:26:07,394 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-11-28 11:26:07,394 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:26:07,396 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:07,424 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-28 11:26:07,439 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 11:26:07,439 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [7] total 9 [2018-11-28 11:26:07,439 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 11:26:07,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 11:26:07,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-11-28 11:26:07,440 INFO L87 Difference]: Start difference. First operand 74 states and 82 transitions. Second operand 9 states. [2018-11-28 11:26:07,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:07,518 INFO L93 Difference]: Finished difference Result 100 states and 112 transitions. [2018-11-28 11:26:07,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 11:26:07,519 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 30 [2018-11-28 11:26:07,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:07,519 INFO L225 Difference]: With dead ends: 100 [2018-11-28 11:26:07,519 INFO L226 Difference]: Without dead ends: 100 [2018-11-28 11:26:07,520 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2018-11-28 11:26:07,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-11-28 11:26:07,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 78. [2018-11-28 11:26:07,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-11-28 11:26:07,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 86 transitions. [2018-11-28 11:26:07,523 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 86 transitions. Word has length 30 [2018-11-28 11:26:07,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:07,523 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 86 transitions. [2018-11-28 11:26:07,523 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 11:26:07,524 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 86 transitions. [2018-11-28 11:26:07,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-28 11:26:07,524 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:07,524 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:07,524 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:07,525 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:07,525 INFO L82 PathProgramCache]: Analyzing trace with hash 1672535067, now seen corresponding path program 1 times [2018-11-28 11:26:07,525 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:07,525 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:07,526 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:07,526 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 11:26:07,526 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:07,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:07,586 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:26:07,586 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:07,586 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:07,597 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:07,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:07,626 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:07,687 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:07,702 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:26:07,702 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 13 [2018-11-28 11:26:07,703 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-28 11:26:07,703 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-28 11:26:07,703 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-11-28 11:26:07,703 INFO L87 Difference]: Start difference. First operand 78 states and 86 transitions. Second operand 13 states. [2018-11-28 11:26:07,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:07,728 INFO L93 Difference]: Finished difference Result 83 states and 91 transitions. [2018-11-28 11:26:07,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 11:26:07,729 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 38 [2018-11-28 11:26:07,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:07,730 INFO L225 Difference]: With dead ends: 83 [2018-11-28 11:26:07,730 INFO L226 Difference]: Without dead ends: 83 [2018-11-28 11:26:07,730 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-11-28 11:26:07,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-11-28 11:26:07,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 81. [2018-11-28 11:26:07,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-11-28 11:26:07,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 89 transitions. [2018-11-28 11:26:07,734 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 89 transitions. Word has length 38 [2018-11-28 11:26:07,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:07,735 INFO L480 AbstractCegarLoop]: Abstraction has 81 states and 89 transitions. [2018-11-28 11:26:07,735 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-28 11:26:07,735 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 89 transitions. [2018-11-28 11:26:07,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-28 11:26:07,737 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:07,737 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:07,737 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:07,737 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:07,737 INFO L82 PathProgramCache]: Analyzing trace with hash -1001588209, now seen corresponding path program 2 times [2018-11-28 11:26:07,738 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:07,738 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:07,739 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:07,739 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:07,739 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:07,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:07,815 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:26:07,815 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:07,815 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:07,827 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:26:07,847 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-28 11:26:07,847 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:26:07,849 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:07,907 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 4 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:07,924 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:26:07,924 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 15 [2018-11-28 11:26:07,925 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-28 11:26:07,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-28 11:26:07,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=120, Unknown=0, NotChecked=0, Total=210 [2018-11-28 11:26:07,925 INFO L87 Difference]: Start difference. First operand 81 states and 89 transitions. Second operand 15 states. [2018-11-28 11:26:07,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:07,965 INFO L93 Difference]: Finished difference Result 86 states and 94 transitions. [2018-11-28 11:26:07,966 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 11:26:07,966 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 41 [2018-11-28 11:26:07,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:07,967 INFO L225 Difference]: With dead ends: 86 [2018-11-28 11:26:07,967 INFO L226 Difference]: Without dead ends: 86 [2018-11-28 11:26:07,967 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=120, Unknown=0, NotChecked=0, Total=210 [2018-11-28 11:26:07,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-11-28 11:26:07,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 84. [2018-11-28 11:26:07,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-11-28 11:26:07,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 92 transitions. [2018-11-28 11:26:07,970 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 92 transitions. Word has length 41 [2018-11-28 11:26:07,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:07,971 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 92 transitions. [2018-11-28 11:26:07,971 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-28 11:26:07,971 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 92 transitions. [2018-11-28 11:26:07,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-28 11:26:07,972 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:07,972 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:07,972 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:07,972 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:07,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1540269979, now seen corresponding path program 3 times [2018-11-28 11:26:07,972 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:07,972 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:07,973 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:07,973 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 11:26:07,973 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:07,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:08,033 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:26:08,034 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:08,034 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:08,044 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-28 11:26:08,059 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-11-28 11:26:08,060 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:26:08,063 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:08,074 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:26:08,074 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:08,094 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:26:08,095 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:08,113 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:08,113 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-11-28 11:26:08,279 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:08,280 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:08,281 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:26:08,282 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:08,297 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 11:26:08,297 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:08,306 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:26:08,306 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:33, output treesize:17 [2018-11-28 11:26:08,332 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-11-28 11:26:08,356 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:26:08,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 19 [2018-11-28 11:26:08,357 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-28 11:26:08,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-28 11:26:08,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=284, Unknown=0, NotChecked=0, Total=342 [2018-11-28 11:26:08,357 INFO L87 Difference]: Start difference. First operand 84 states and 92 transitions. Second operand 19 states. [2018-11-28 11:26:10,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:10,433 INFO L93 Difference]: Finished difference Result 204 states and 235 transitions. [2018-11-28 11:26:10,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-28 11:26:10,433 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 44 [2018-11-28 11:26:10,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:10,434 INFO L225 Difference]: With dead ends: 204 [2018-11-28 11:26:10,434 INFO L226 Difference]: Without dead ends: 204 [2018-11-28 11:26:10,435 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 209 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=206, Invalid=1054, Unknown=0, NotChecked=0, Total=1260 [2018-11-28 11:26:10,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-11-28 11:26:10,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 114. [2018-11-28 11:26:10,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-11-28 11:26:10,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 138 transitions. [2018-11-28 11:26:10,439 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 138 transitions. Word has length 44 [2018-11-28 11:26:10,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:10,439 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 138 transitions. [2018-11-28 11:26:10,439 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-28 11:26:10,439 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 138 transitions. [2018-11-28 11:26:10,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 11:26:10,440 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:10,440 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:10,441 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:10,441 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:10,441 INFO L82 PathProgramCache]: Analyzing trace with hash 1469152910, now seen corresponding path program 1 times [2018-11-28 11:26:10,441 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:10,441 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:10,442 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:10,442 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 11:26:10,442 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:10,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:10,516 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:26:10,516 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:10,516 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:10,523 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:10,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:10,546 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:10,600 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 4 proven. 70 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:10,615 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:26:10,615 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 19 [2018-11-28 11:26:10,616 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-28 11:26:10,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-28 11:26:10,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=199, Unknown=0, NotChecked=0, Total=342 [2018-11-28 11:26:10,616 INFO L87 Difference]: Start difference. First operand 114 states and 138 transitions. Second operand 19 states. [2018-11-28 11:26:10,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:10,666 INFO L93 Difference]: Finished difference Result 119 states and 143 transitions. [2018-11-28 11:26:10,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 11:26:10,666 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-11-28 11:26:10,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:10,667 INFO L225 Difference]: With dead ends: 119 [2018-11-28 11:26:10,667 INFO L226 Difference]: Without dead ends: 119 [2018-11-28 11:26:10,668 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=143, Invalid=199, Unknown=0, NotChecked=0, Total=342 [2018-11-28 11:26:10,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-11-28 11:26:10,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 117. [2018-11-28 11:26:10,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-11-28 11:26:10,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 141 transitions. [2018-11-28 11:26:10,671 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 141 transitions. Word has length 47 [2018-11-28 11:26:10,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:10,672 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 141 transitions. [2018-11-28 11:26:10,672 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-28 11:26:10,672 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 141 transitions. [2018-11-28 11:26:10,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-28 11:26:10,673 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:10,673 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:10,673 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:10,673 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:10,673 INFO L82 PathProgramCache]: Analyzing trace with hash 239457050, now seen corresponding path program 2 times [2018-11-28 11:26:10,673 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:10,673 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:10,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:10,674 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:10,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:10,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:10,770 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-11-28 11:26:10,770 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:10,770 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:10,776 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:26:10,804 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-28 11:26:10,804 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:26:10,807 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:10,940 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 4 proven. 92 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:10,965 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:26:10,966 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 12] total 19 [2018-11-28 11:26:10,966 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-28 11:26:10,966 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-28 11:26:10,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=261, Unknown=0, NotChecked=0, Total=342 [2018-11-28 11:26:10,966 INFO L87 Difference]: Start difference. First operand 117 states and 141 transitions. Second operand 19 states. [2018-11-28 11:26:11,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:11,518 INFO L93 Difference]: Finished difference Result 172 states and 204 transitions. [2018-11-28 11:26:11,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-28 11:26:11,518 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 50 [2018-11-28 11:26:11,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:11,520 INFO L225 Difference]: With dead ends: 172 [2018-11-28 11:26:11,520 INFO L226 Difference]: Without dead ends: 172 [2018-11-28 11:26:11,520 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=273, Invalid=1059, Unknown=0, NotChecked=0, Total=1332 [2018-11-28 11:26:11,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-11-28 11:26:11,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 122. [2018-11-28 11:26:11,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-11-28 11:26:11,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 146 transitions. [2018-11-28 11:26:11,526 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 146 transitions. Word has length 50 [2018-11-28 11:26:11,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:11,526 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 146 transitions. [2018-11-28 11:26:11,526 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-28 11:26:11,526 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 146 transitions. [2018-11-28 11:26:11,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-28 11:26:11,527 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:11,527 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:11,527 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:11,527 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:11,528 INFO L82 PathProgramCache]: Analyzing trace with hash 870543578, now seen corresponding path program 1 times [2018-11-28 11:26:11,528 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:11,528 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:11,529 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:11,529 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 11:26:11,529 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:11,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:11,574 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-11-28 11:26:11,574 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:26:11,574 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 11:26:11,575 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 11:26:11,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 11:26:11,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:26:11,575 INFO L87 Difference]: Start difference. First operand 122 states and 146 transitions. Second operand 5 states. [2018-11-28 11:26:11,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:11,600 INFO L93 Difference]: Finished difference Result 149 states and 178 transitions. [2018-11-28 11:26:11,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 11:26:11,600 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 55 [2018-11-28 11:26:11,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:11,601 INFO L225 Difference]: With dead ends: 149 [2018-11-28 11:26:11,601 INFO L226 Difference]: Without dead ends: 149 [2018-11-28 11:26:11,601 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 11:26:11,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-11-28 11:26:11,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 124. [2018-11-28 11:26:11,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-11-28 11:26:11,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 147 transitions. [2018-11-28 11:26:11,606 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 147 transitions. Word has length 55 [2018-11-28 11:26:11,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:11,606 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 147 transitions. [2018-11-28 11:26:11,606 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 11:26:11,606 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 147 transitions. [2018-11-28 11:26:11,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-28 11:26:11,607 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:11,607 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:11,607 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:11,607 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:11,607 INFO L82 PathProgramCache]: Analyzing trace with hash -1681613383, now seen corresponding path program 1 times [2018-11-28 11:26:11,607 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:11,608 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:11,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:11,608 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:11,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:11,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:11,677 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:26:11,677 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:11,677 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:11,692 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:11,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:11,719 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:11,813 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 4 proven. 117 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:26:11,828 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:26:11,828 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 23 [2018-11-28 11:26:11,828 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-11-28 11:26:11,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-11-28 11:26:11,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=208, Invalid=298, Unknown=0, NotChecked=0, Total=506 [2018-11-28 11:26:11,829 INFO L87 Difference]: Start difference. First operand 124 states and 147 transitions. Second operand 23 states. [2018-11-28 11:26:11,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:11,894 INFO L93 Difference]: Finished difference Result 129 states and 152 transitions. [2018-11-28 11:26:11,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-28 11:26:11,895 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 55 [2018-11-28 11:26:11,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:11,895 INFO L225 Difference]: With dead ends: 129 [2018-11-28 11:26:11,896 INFO L226 Difference]: Without dead ends: 129 [2018-11-28 11:26:11,896 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 186 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=223, Invalid=329, Unknown=0, NotChecked=0, Total=552 [2018-11-28 11:26:11,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-11-28 11:26:11,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 127. [2018-11-28 11:26:11,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-11-28 11:26:11,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 150 transitions. [2018-11-28 11:26:11,900 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 150 transitions. Word has length 55 [2018-11-28 11:26:11,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:11,900 INFO L480 AbstractCegarLoop]: Abstraction has 127 states and 150 transitions. [2018-11-28 11:26:11,900 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-11-28 11:26:11,900 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 150 transitions. [2018-11-28 11:26:11,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-28 11:26:11,901 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:11,901 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:11,901 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:11,901 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:11,901 INFO L82 PathProgramCache]: Analyzing trace with hash -397302203, now seen corresponding path program 2 times [2018-11-28 11:26:11,902 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:11,902 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:11,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:11,903 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:11,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:11,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:11,951 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2018-11-28 11:26:11,951 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:26:11,951 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 11:26:11,951 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 11:26:11,951 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 11:26:11,952 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 11:26:11,952 INFO L87 Difference]: Start difference. First operand 127 states and 150 transitions. Second operand 4 states. [2018-11-28 11:26:11,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:11,971 INFO L93 Difference]: Finished difference Result 134 states and 157 transitions. [2018-11-28 11:26:11,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 11:26:11,972 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 58 [2018-11-28 11:26:11,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:11,973 INFO L225 Difference]: With dead ends: 134 [2018-11-28 11:26:11,973 INFO L226 Difference]: Without dead ends: 134 [2018-11-28 11:26:11,973 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:26:11,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-11-28 11:26:11,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 129. [2018-11-28 11:26:11,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-11-28 11:26:11,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 152 transitions. [2018-11-28 11:26:11,977 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 152 transitions. Word has length 58 [2018-11-28 11:26:11,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:11,977 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 152 transitions. [2018-11-28 11:26:11,977 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 11:26:11,977 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 152 transitions. [2018-11-28 11:26:11,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-11-28 11:26:11,978 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:11,978 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:11,982 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:11,982 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:11,982 INFO L82 PathProgramCache]: Analyzing trace with hash -63741682, now seen corresponding path program 1 times [2018-11-28 11:26:11,982 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:11,982 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:11,983 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:11,983 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 11:26:11,983 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:11,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:12,098 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2018-11-28 11:26:12,098 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:12,098 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:12,118 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:12,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:12,152 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:12,227 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2018-11-28 11:26:12,252 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:26:12,252 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 6] total 15 [2018-11-28 11:26:12,253 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-28 11:26:12,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-28 11:26:12,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2018-11-28 11:26:12,253 INFO L87 Difference]: Start difference. First operand 129 states and 152 transitions. Second operand 15 states. [2018-11-28 11:26:12,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:12,572 INFO L93 Difference]: Finished difference Result 193 states and 227 transitions. [2018-11-28 11:26:12,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-28 11:26:12,573 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 61 [2018-11-28 11:26:12,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:12,574 INFO L225 Difference]: With dead ends: 193 [2018-11-28 11:26:12,574 INFO L226 Difference]: Without dead ends: 193 [2018-11-28 11:26:12,574 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 57 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 163 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=207, Invalid=785, Unknown=0, NotChecked=0, Total=992 [2018-11-28 11:26:12,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-11-28 11:26:12,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 118. [2018-11-28 11:26:12,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-11-28 11:26:12,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 132 transitions. [2018-11-28 11:26:12,579 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 132 transitions. Word has length 61 [2018-11-28 11:26:12,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:12,579 INFO L480 AbstractCegarLoop]: Abstraction has 118 states and 132 transitions. [2018-11-28 11:26:12,579 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-28 11:26:12,579 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 132 transitions. [2018-11-28 11:26:12,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-28 11:26:12,580 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:12,580 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:12,580 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:12,580 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:12,581 INFO L82 PathProgramCache]: Analyzing trace with hash 760494574, now seen corresponding path program 1 times [2018-11-28 11:26:12,581 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:12,581 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:12,582 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:12,582 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:12,582 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:12,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:12,650 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:26:12,650 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:12,650 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:12,657 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:12,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:12,680 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:12,684 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:26:12,684 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:12,685 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:12,685 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 11:26:12,698 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:26:12,712 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:26:12,713 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2018-11-28 11:26:12,713 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 11:26:12,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 11:26:12,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:26:12,713 INFO L87 Difference]: Start difference. First operand 118 states and 132 transitions. Second operand 8 states. [2018-11-28 11:26:12,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:12,833 INFO L93 Difference]: Finished difference Result 163 states and 185 transitions. [2018-11-28 11:26:12,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 11:26:12,834 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 65 [2018-11-28 11:26:12,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:12,835 INFO L225 Difference]: With dead ends: 163 [2018-11-28 11:26:12,835 INFO L226 Difference]: Without dead ends: 163 [2018-11-28 11:26:12,835 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2018-11-28 11:26:12,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-11-28 11:26:12,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 141. [2018-11-28 11:26:12,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-11-28 11:26:12,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 165 transitions. [2018-11-28 11:26:12,843 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 165 transitions. Word has length 65 [2018-11-28 11:26:12,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:12,843 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 165 transitions. [2018-11-28 11:26:12,843 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 11:26:12,843 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 165 transitions. [2018-11-28 11:26:12,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-28 11:26:12,844 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:12,844 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:12,844 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:12,845 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:12,845 INFO L82 PathProgramCache]: Analyzing trace with hash 760494575, now seen corresponding path program 1 times [2018-11-28 11:26:12,845 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:12,845 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:12,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:12,846 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:12,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:12,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:12,931 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:26:12,931 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:12,931 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:12,948 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:12,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:12,974 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:12,993 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:26:12,993 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:13,003 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:13,004 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-11-28 11:26:13,127 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-11-28 11:26:13,144 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:26:13,144 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10] total 15 [2018-11-28 11:26:13,144 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-28 11:26:13,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-28 11:26:13,145 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=209, Unknown=0, NotChecked=0, Total=240 [2018-11-28 11:26:13,145 INFO L87 Difference]: Start difference. First operand 141 states and 165 transitions. Second operand 16 states. [2018-11-28 11:26:13,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:13,532 INFO L93 Difference]: Finished difference Result 187 states and 212 transitions. [2018-11-28 11:26:13,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 11:26:13,532 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 65 [2018-11-28 11:26:13,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:13,533 INFO L225 Difference]: With dead ends: 187 [2018-11-28 11:26:13,533 INFO L226 Difference]: Without dead ends: 187 [2018-11-28 11:26:13,533 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 60 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=74, Invalid=478, Unknown=0, NotChecked=0, Total=552 [2018-11-28 11:26:13,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-11-28 11:26:13,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 165. [2018-11-28 11:26:13,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-11-28 11:26:13,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 200 transitions. [2018-11-28 11:26:13,537 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 200 transitions. Word has length 65 [2018-11-28 11:26:13,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:13,538 INFO L480 AbstractCegarLoop]: Abstraction has 165 states and 200 transitions. [2018-11-28 11:26:13,538 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-28 11:26:13,538 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 200 transitions. [2018-11-28 11:26:13,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 11:26:13,538 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:13,539 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:13,539 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:13,539 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:13,539 INFO L82 PathProgramCache]: Analyzing trace with hash -2000736812, now seen corresponding path program 1 times [2018-11-28 11:26:13,539 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:13,539 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:13,540 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:13,540 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:13,540 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:13,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:13,724 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2018-11-28 11:26:13,724 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:13,724 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:13,731 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:13,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:13,761 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:13,785 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:26:13,785 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:13,791 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:26:13,791 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:13,796 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:13,796 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-11-28 11:26:13,986 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:13,987 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 11:26:13,988 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:13,999 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:14,000 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:14,000 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:26:14,000 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:14,006 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:26:14,006 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:33, output treesize:17 [2018-11-28 11:26:14,054 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:14,055 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:14,055 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:26:14,055 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:14,062 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 11:26:14,063 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:14,069 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:26:14,069 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:33, output treesize:17 [2018-11-28 11:26:14,098 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 2 proven. 30 refuted. 0 times theorem prover too weak. 130 trivial. 0 not checked. [2018-11-28 11:26:14,113 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:26:14,113 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 24 [2018-11-28 11:26:14,113 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-11-28 11:26:14,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-11-28 11:26:14,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=538, Unknown=0, NotChecked=0, Total=600 [2018-11-28 11:26:14,114 INFO L87 Difference]: Start difference. First operand 165 states and 200 transitions. Second operand 25 states. [2018-11-28 11:26:15,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:26:15,650 INFO L93 Difference]: Finished difference Result 347 states and 404 transitions. [2018-11-28 11:26:15,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-11-28 11:26:15,650 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 66 [2018-11-28 11:26:15,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:26:15,651 INFO L225 Difference]: With dead ends: 347 [2018-11-28 11:26:15,651 INFO L226 Difference]: Without dead ends: 347 [2018-11-28 11:26:15,652 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 56 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 649 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=403, Invalid=2677, Unknown=0, NotChecked=0, Total=3080 [2018-11-28 11:26:15,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2018-11-28 11:26:15,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 164. [2018-11-28 11:26:15,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-11-28 11:26:15,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 198 transitions. [2018-11-28 11:26:15,658 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 198 transitions. Word has length 66 [2018-11-28 11:26:15,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:26:15,658 INFO L480 AbstractCegarLoop]: Abstraction has 164 states and 198 transitions. [2018-11-28 11:26:15,658 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-11-28 11:26:15,658 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 198 transitions. [2018-11-28 11:26:15,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 11:26:15,659 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:26:15,659 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:26:15,659 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:26:15,660 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:26:15,660 INFO L82 PathProgramCache]: Analyzing trace with hash 2100495661, now seen corresponding path program 1 times [2018-11-28 11:26:15,660 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:26:15,660 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:26:15,661 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:15,661 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:15,661 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:26:15,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:16,350 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:26:16,350 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:26:16,351 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:26:16,357 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:26:16,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:26:16,383 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:26:16,419 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:26:16,421 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:26:16,421 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,422 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,426 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,427 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:18 [2018-11-28 11:26:16,455 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-28 11:26:16,456 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,457 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-28 11:26:16,457 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,460 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,464 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,464 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-11-28 11:26:16,497 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2018-11-28 11:26:16,503 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,504 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,504 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,505 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-28 11:26:16,505 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,510 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,515 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,515 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:34 [2018-11-28 11:26:16,562 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2018-11-28 11:26:16,564 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,565 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,566 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,566 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,567 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,568 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,568 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 93 [2018-11-28 11:26:16,569 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,581 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,589 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:26:16,589 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:54, output treesize:50 [2018-11-28 11:26:16,656 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 43 [2018-11-28 11:26:16,659 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,660 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,661 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,662 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,663 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,664 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,665 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,667 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,668 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,669 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,671 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 146 [2018-11-28 11:26:16,671 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,689 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,700 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 11:26:16,701 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:70, output treesize:66 [2018-11-28 11:26:16,784 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 52 [2018-11-28 11:26:16,788 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,789 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,790 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,791 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,792 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,794 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,795 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,796 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,797 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,798 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,800 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,801 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,802 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,803 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,804 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,806 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 211 [2018-11-28 11:26:16,806 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,832 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:16,846 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-28 11:26:16,846 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:86, output treesize:82 [2018-11-28 11:26:16,952 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 61 [2018-11-28 11:26:16,956 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,958 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,960 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,962 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,963 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,964 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,964 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,965 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,967 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,968 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,969 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,970 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,972 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,973 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,974 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,975 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,976 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,977 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,978 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,979 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,980 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:16,981 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 288 [2018-11-28 11:26:16,982 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:17,019 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:17,036 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-11-28 11:26:17,036 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:102, output treesize:98 [2018-11-28 11:26:17,207 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 70 [2018-11-28 11:26:17,211 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,215 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,216 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,217 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,218 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,222 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,224 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,224 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,225 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,226 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,227 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,229 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,230 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,230 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,231 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,232 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,233 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,234 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,235 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,236 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,237 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,238 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,239 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,240 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,241 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,243 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,244 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,245 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:17,246 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 377 [2018-11-28 11:26:17,247 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:17,301 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:17,322 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 1 xjuncts. [2018-11-28 11:26:17,322 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:118, output treesize:114 [2018-11-28 11:26:34,336 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 79 [2018-11-28 11:26:34,340 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,347 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,355 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,356 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,357 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,359 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,361 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,364 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,365 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,366 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,368 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,369 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,371 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,374 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,375 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,376 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,377 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,378 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,380 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,381 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,382 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,383 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,385 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,386 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,387 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,389 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,390 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,393 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:34,396 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 28 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 391 [2018-11-28 11:26:34,397 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:34,446 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:34,466 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: 7 dim-0 vars, and 1 xjuncts. [2018-11-28 11:26:34,466 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:129, output treesize:125 [2018-11-28 11:26:51,994 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 79 [2018-11-28 11:26:51,998 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:51,999 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,001 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,002 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,003 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,005 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,006 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,009 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,010 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,012 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,013 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,015 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,016 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,019 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,020 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,021 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,022 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,024 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,026 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,028 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,029 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,030 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,047 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,050 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,054 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,060 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,061 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,064 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:26:52,067 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 28 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 391 [2018-11-28 11:26:52,068 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:26:52,118 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:26:52,138 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: 7 dim-0 vars, and 1 xjuncts. [2018-11-28 11:26:52,138 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:129, output treesize:125 [2018-11-28 11:27:02,114 WARN L194 Executor]: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000) stderr output: (error "out of memory") [2018-11-28 11:27:02,315 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:27:02,315 FATAL L265 ToolchainWalker]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:208) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:225) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.WrapperScript.checkSat(WrapperScript.java:116) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.managedscript.ManagedScript.checkSat(ManagedScript.java:141) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:84) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:928) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:767) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:339) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:299) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:575) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:200) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:286) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:232) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:456) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:434) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:334) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:126) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1427) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:630) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:419) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:205) ... 39 more [2018-11-28 11:27:02,318 INFO L168 Benchmark]: Toolchain (without parser) took 58234.78 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 372.8 MB). Free memory was 956.0 MB in the beginning and 932.6 MB in the end (delta: 23.4 MB). Peak memory consumption was 396.1 MB. Max. memory is 11.5 GB. [2018-11-28 11:27:02,318 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 985.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 11:27:02,319 INFO L168 Benchmark]: CACSL2BoogieTranslator took 421.20 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -124.4 MB). Peak memory consumption was 33.1 MB. Max. memory is 11.5 GB. [2018-11-28 11:27:02,319 INFO L168 Benchmark]: Boogie Preprocessor took 58.30 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2018-11-28 11:27:02,319 INFO L168 Benchmark]: RCFGBuilder took 751.99 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 960.6 MB in the end (delta: 113.1 MB). Peak memory consumption was 113.1 MB. Max. memory is 11.5 GB. [2018-11-28 11:27:02,320 INFO L168 Benchmark]: TraceAbstraction took 57000.24 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 266.9 MB). Free memory was 960.6 MB in the beginning and 932.6 MB in the end (delta: 28.0 MB). Peak memory consumption was 294.8 MB. Max. memory is 11.5 GB. [2018-11-28 11:27:02,321 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 985.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 421.20 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -124.4 MB). Peak memory consumption was 33.1 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 58.30 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 751.99 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 960.6 MB in the end (delta: 113.1 MB). Peak memory consumption was 113.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 57000.24 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 266.9 MB). Free memory was 960.6 MB in the beginning and 932.6 MB in the end (delta: 28.0 MB). Peak memory consumption was 294.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:208) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-0cd3be1 [2018-11-28 11:27:03,529 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 11:27:03,531 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 11:27:03,538 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 11:27:03,538 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 11:27:03,539 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 11:27:03,540 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 11:27:03,541 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 11:27:03,542 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 11:27:03,543 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 11:27:03,543 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 11:27:03,543 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 11:27:03,544 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 11:27:03,545 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 11:27:03,546 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 11:27:03,547 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 11:27:03,547 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 11:27:03,548 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 11:27:03,550 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 11:27:03,551 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 11:27:03,552 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 11:27:03,553 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 11:27:03,555 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 11:27:03,555 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 11:27:03,556 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 11:27:03,556 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 11:27:03,557 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 11:27:03,558 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 11:27:03,559 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 11:27:03,559 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 11:27:03,560 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 11:27:03,560 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 11:27:03,561 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 11:27:03,561 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 11:27:03,561 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 11:27:03,562 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 11:27:03,562 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf [2018-11-28 11:27:03,573 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 11:27:03,573 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 11:27:03,574 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 11:27:03,574 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 11:27:03,574 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 11:27:03,574 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 11:27:03,575 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 11:27:03,575 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 11:27:03,575 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 11:27:03,575 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-28 11:27:03,575 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 11:27:03,575 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 11:27:03,575 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 11:27:03,575 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-11-28 11:27:03,576 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-11-28 11:27:03,576 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-11-28 11:27:03,576 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 11:27:03,576 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-28 11:27:03,576 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-28 11:27:03,576 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 11:27:03,576 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 11:27:03,576 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 11:27:03,577 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 11:27:03,577 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 11:27:03,577 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 11:27:03,577 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 11:27:03,577 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 11:27:03,577 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 11:27:03,577 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-28 11:27:03,577 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 11:27:03,577 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-11-28 11:27:03,577 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 708e975f6ded0cfba15d7fd51cdde51c174d1f46 [2018-11-28 11:27:03,605 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 11:27:03,614 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 11:27:03,616 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 11:27:03,617 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 11:27:03,617 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 11:27:03,618 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test17_2_false-valid-free.i [2018-11-28 11:27:03,656 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/data/73bd58a18/8680937f2ff444bb9759635d0f1c7be5/FLAG4a69e763c [2018-11-28 11:27:04,003 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 11:27:04,003 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/sv-benchmarks/c/ldv-memsafety/memleaks_test17_2_false-valid-free.i [2018-11-28 11:27:04,014 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/data/73bd58a18/8680937f2ff444bb9759635d0f1c7be5/FLAG4a69e763c [2018-11-28 11:27:04,026 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/data/73bd58a18/8680937f2ff444bb9759635d0f1c7be5 [2018-11-28 11:27:04,028 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 11:27:04,030 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-11-28 11:27:04,031 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 11:27:04,031 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 11:27:04,034 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 11:27:04,035 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 11:27:04" (1/1) ... [2018-11-28 11:27:04,037 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7d3986dc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:27:04, skipping insertion in model container [2018-11-28 11:27:04,037 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 11:27:04" (1/1) ... [2018-11-28 11:27:04,043 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 11:27:04,076 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 11:27:04,337 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 11:27:04,352 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 11:27:04,446 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 11:27:04,495 INFO L195 MainTranslator]: Completed translation [2018-11-28 11:27:04,495 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:27:04 WrapperNode [2018-11-28 11:27:04,495 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 11:27:04,496 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 11:27:04,496 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 11:27:04,496 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 11:27:04,507 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:27:04" (1/1) ... [2018-11-28 11:27:04,507 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:27:04" (1/1) ... [2018-11-28 11:27:04,519 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:27:04" (1/1) ... [2018-11-28 11:27:04,519 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:27:04" (1/1) ... [2018-11-28 11:27:04,539 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:27:04" (1/1) ... [2018-11-28 11:27:04,543 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:27:04" (1/1) ... [2018-11-28 11:27:04,548 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:27:04" (1/1) ... [2018-11-28 11:27:04,555 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 11:27:04,555 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 11:27:04,555 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 11:27:04,555 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 11:27:04,557 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:27:04" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 11:27:04,595 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-28 11:27:04,596 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 11:27:04,596 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-11-28 11:27:04,596 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-11-28 11:27:04,596 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-11-28 11:27:04,596 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-11-28 11:27:04,596 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-11-28 11:27:04,596 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-11-28 11:27:04,597 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-11-28 11:27:04,597 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-11-28 11:27:04,597 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-11-28 11:27:04,597 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-11-28 11:27:04,597 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-11-28 11:27:04,597 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-11-28 11:27:04,597 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-11-28 11:27:04,597 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-11-28 11:27:04,597 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-11-28 11:27:04,597 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-11-28 11:27:04,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-11-28 11:27:04,599 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-11-28 11:27:04,599 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-11-28 11:27:04,599 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-11-28 11:27:04,599 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-11-28 11:27:04,599 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-11-28 11:27:04,599 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-11-28 11:27:04,599 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_unsafe_17 [2018-11-28 11:27:04,599 INFO L138 BoogieDeclarations]: Found implementation of procedure free_17 [2018-11-28 11:27:04,599 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-11-28 11:27:04,599 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-28 11:27:04,599 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-11-28 11:27:04,600 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-11-28 11:27:04,600 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-11-28 11:27:04,600 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-11-28 11:27:04,600 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-11-28 11:27:04,600 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-11-28 11:27:04,600 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-11-28 11:27:04,600 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-11-28 11:27:04,600 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-11-28 11:27:04,600 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-11-28 11:27:04,600 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-11-28 11:27:04,600 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-11-28 11:27:04,600 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-11-28 11:27:04,600 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-11-28 11:27:04,600 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-11-28 11:27:04,601 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-11-28 11:27:04,601 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-11-28 11:27:04,601 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-11-28 11:27:04,601 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-11-28 11:27:04,601 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-11-28 11:27:04,601 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-11-28 11:27:04,601 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-11-28 11:27:04,601 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-11-28 11:27:04,601 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-11-28 11:27:04,601 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-11-28 11:27:04,601 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-11-28 11:27:04,601 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-11-28 11:27:04,601 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-11-28 11:27:04,602 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-11-28 11:27:04,602 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-11-28 11:27:04,602 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-11-28 11:27:04,602 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-11-28 11:27:04,602 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-11-28 11:27:04,602 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-11-28 11:27:04,602 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-11-28 11:27:04,602 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-11-28 11:27:04,602 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-11-28 11:27:04,602 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-11-28 11:27:04,603 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-11-28 11:27:04,603 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-11-28 11:27:04,603 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-11-28 11:27:04,603 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-11-28 11:27:04,603 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-11-28 11:27:04,603 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-11-28 11:27:04,603 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-11-28 11:27:04,603 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-11-28 11:27:04,603 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-11-28 11:27:04,604 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-11-28 11:27:04,604 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-11-28 11:27:04,604 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-11-28 11:27:04,604 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-11-28 11:27:04,604 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-11-28 11:27:04,604 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-11-28 11:27:04,604 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-11-28 11:27:04,604 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-11-28 11:27:04,604 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-11-28 11:27:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-11-28 11:27:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-11-28 11:27:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-11-28 11:27:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-11-28 11:27:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-11-28 11:27:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-11-28 11:27:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-11-28 11:27:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-11-28 11:27:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-11-28 11:27:04,605 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-11-28 11:27:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-11-28 11:27:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-11-28 11:27:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-11-28 11:27:04,606 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-11-28 11:27:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-11-28 11:27:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-11-28 11:27:04,607 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-11-28 11:27:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-11-28 11:27:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-11-28 11:27:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-11-28 11:27:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-11-28 11:27:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-11-28 11:27:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-11-28 11:27:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-11-28 11:27:04,608 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-11-28 11:27:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-11-28 11:27:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-11-28 11:27:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-11-28 11:27:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-11-28 11:27:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-11-28 11:27:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-11-28 11:27:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-11-28 11:27:04,609 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-11-28 11:27:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-11-28 11:27:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-11-28 11:27:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-11-28 11:27:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-11-28 11:27:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-11-28 11:27:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-11-28 11:27:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-11-28 11:27:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-11-28 11:27:04,610 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-11-28 11:27:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-11-28 11:27:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-11-28 11:27:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-11-28 11:27:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-11-28 11:27:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-11-28 11:27:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-11-28 11:27:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-11-28 11:27:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-28 11:27:04,611 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-28 11:27:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-11-28 11:27:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-11-28 11:27:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-11-28 11:27:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-11-28 11:27:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-11-28 11:27:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-11-28 11:27:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 11:27:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-11-28 11:27:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-11-28 11:27:04,612 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-11-28 11:27:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-28 11:27:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-11-28 11:27:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-11-28 11:27:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-11-28 11:27:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-28 11:27:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-11-28 11:27:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-11-28 11:27:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-11-28 11:27:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-11-28 11:27:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-11-28 11:27:04,613 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-11-28 11:27:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 11:27:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-11-28 11:27:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-11-28 11:27:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-11-28 11:27:04,614 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-11-28 11:27:04,618 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-11-28 11:27:04,618 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-28 11:27:04,618 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-28 11:27:04,619 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-11-28 11:27:04,619 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-11-28 11:27:04,619 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-11-28 11:27:04,619 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-11-28 11:27:04,619 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-11-28 11:27:04,619 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-11-28 11:27:04,619 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-11-28 11:27:04,619 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-11-28 11:27:04,619 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-11-28 11:27:04,619 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-11-28 11:27:04,619 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-11-28 11:27:04,620 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-11-28 11:27:04,620 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-11-28 11:27:04,620 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-11-28 11:27:04,620 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-11-28 11:27:04,620 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-11-28 11:27:04,620 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-11-28 11:27:04,620 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_unsafe_17 [2018-11-28 11:27:04,620 INFO L130 BoogieDeclarations]: Found specification of procedure free_17 [2018-11-28 11:27:04,620 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-11-28 11:27:04,620 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-28 11:27:04,620 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-28 11:27:04,621 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-11-28 11:27:04,621 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 11:27:04,621 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-11-28 11:27:04,621 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE4 [2018-11-28 11:27:04,621 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-11-28 11:27:04,621 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-11-28 11:27:04,986 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-28 11:27:05,257 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-28 11:27:05,594 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 11:27:05,594 INFO L280 CfgBuilder]: Removed 5 assue(true) statements. [2018-11-28 11:27:05,595 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 11:27:05 BoogieIcfgContainer [2018-11-28 11:27:05,595 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 11:27:05,595 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 11:27:05,595 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 11:27:05,597 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 11:27:05,598 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 11:27:04" (1/3) ... [2018-11-28 11:27:05,599 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1df14f9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 11:27:05, skipping insertion in model container [2018-11-28 11:27:05,599 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:27:04" (2/3) ... [2018-11-28 11:27:05,599 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1df14f9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 11:27:05, skipping insertion in model container [2018-11-28 11:27:05,600 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 11:27:05" (3/3) ... [2018-11-28 11:27:05,601 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test17_2_false-valid-free.i [2018-11-28 11:27:05,608 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 11:27:05,614 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 81 error locations. [2018-11-28 11:27:05,626 INFO L257 AbstractCegarLoop]: Starting to check reachability of 81 error locations. [2018-11-28 11:27:05,644 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 11:27:05,644 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 11:27:05,645 INFO L383 AbstractCegarLoop]: Hoare is false [2018-11-28 11:27:05,645 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 11:27:05,645 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 11:27:05,645 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 11:27:05,645 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 11:27:05,645 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 11:27:05,645 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 11:27:05,658 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states. [2018-11-28 11:27:05,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-28 11:27:05,664 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:05,665 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:05,667 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:05,673 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:05,673 INFO L82 PathProgramCache]: Analyzing trace with hash -1183403118, now seen corresponding path program 1 times [2018-11-28 11:27:05,677 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:05,677 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:05,697 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:05,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:05,753 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:05,781 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:05,782 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:05,787 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:05,787 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 11:27:05,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:05,819 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 11:27:05,823 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:27:05,824 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 11:27:05,826 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 11:27:05,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 11:27:05,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:27:05,837 INFO L87 Difference]: Start difference. First operand 137 states. Second operand 5 states. [2018-11-28 11:27:06,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:06,012 INFO L93 Difference]: Finished difference Result 77 states and 88 transitions. [2018-11-28 11:27:06,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 11:27:06,016 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-28 11:27:06,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:06,024 INFO L225 Difference]: With dead ends: 77 [2018-11-28 11:27:06,024 INFO L226 Difference]: Without dead ends: 74 [2018-11-28 11:27:06,025 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:27:06,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-11-28 11:27:06,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 70. [2018-11-28 11:27:06,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-11-28 11:27:06,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 81 transitions. [2018-11-28 11:27:06,058 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 81 transitions. Word has length 16 [2018-11-28 11:27:06,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:06,059 INFO L480 AbstractCegarLoop]: Abstraction has 70 states and 81 transitions. [2018-11-28 11:27:06,059 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 11:27:06,059 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 81 transitions. [2018-11-28 11:27:06,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-28 11:27:06,060 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:06,060 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:06,060 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:06,061 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:06,061 INFO L82 PathProgramCache]: Analyzing trace with hash -1183403117, now seen corresponding path program 1 times [2018-11-28 11:27:06,061 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:06,061 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:06,078 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:06,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:06,121 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:06,141 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:06,141 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:06,146 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:06,146 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:27:06,263 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:06,264 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 11:27:06,270 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:27:06,270 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 11:27:06,272 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 11:27:06,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 11:27:06,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:27:06,273 INFO L87 Difference]: Start difference. First operand 70 states and 81 transitions. Second operand 8 states. [2018-11-28 11:27:06,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:06,611 INFO L93 Difference]: Finished difference Result 80 states and 93 transitions. [2018-11-28 11:27:06,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 11:27:06,612 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 16 [2018-11-28 11:27:06,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:06,613 INFO L225 Difference]: With dead ends: 80 [2018-11-28 11:27:06,613 INFO L226 Difference]: Without dead ends: 80 [2018-11-28 11:27:06,614 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2018-11-28 11:27:06,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-11-28 11:27:06,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 72. [2018-11-28 11:27:06,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-11-28 11:27:06,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 83 transitions. [2018-11-28 11:27:06,621 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 83 transitions. Word has length 16 [2018-11-28 11:27:06,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:06,621 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 83 transitions. [2018-11-28 11:27:06,621 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 11:27:06,621 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 83 transitions. [2018-11-28 11:27:06,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-28 11:27:06,622 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:06,622 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:06,623 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:06,623 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:06,623 INFO L82 PathProgramCache]: Analyzing trace with hash -295899437, now seen corresponding path program 1 times [2018-11-28 11:27:06,623 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:06,623 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:06,640 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:06,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:06,685 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:06,727 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:06,727 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 11:27:06,730 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:27:06,730 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 11:27:06,730 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 11:27:06,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 11:27:06,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:27:06,731 INFO L87 Difference]: Start difference. First operand 72 states and 83 transitions. Second operand 5 states. [2018-11-28 11:27:06,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:06,770 INFO L93 Difference]: Finished difference Result 71 states and 79 transitions. [2018-11-28 11:27:06,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 11:27:06,772 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-28 11:27:06,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:06,773 INFO L225 Difference]: With dead ends: 71 [2018-11-28 11:27:06,773 INFO L226 Difference]: Without dead ends: 71 [2018-11-28 11:27:06,774 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:27:06,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-11-28 11:27:06,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 69. [2018-11-28 11:27:06,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-11-28 11:27:06,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 77 transitions. [2018-11-28 11:27:06,780 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 77 transitions. Word has length 16 [2018-11-28 11:27:06,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:06,781 INFO L480 AbstractCegarLoop]: Abstraction has 69 states and 77 transitions. [2018-11-28 11:27:06,781 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 11:27:06,781 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 77 transitions. [2018-11-28 11:27:06,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-28 11:27:06,781 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:06,781 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:06,782 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:06,782 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:06,782 INFO L82 PathProgramCache]: Analyzing trace with hash 1969196609, now seen corresponding path program 1 times [2018-11-28 11:27:06,782 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:06,782 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:06,806 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:06,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:06,825 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:06,854 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:06,854 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 11:27:06,859 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:27:06,859 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 11:27:06,859 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 11:27:06,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 11:27:06,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:27:06,860 INFO L87 Difference]: Start difference. First operand 69 states and 77 transitions. Second operand 5 states. [2018-11-28 11:27:06,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:06,922 INFO L93 Difference]: Finished difference Result 71 states and 78 transitions. [2018-11-28 11:27:06,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 11:27:06,922 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-11-28 11:27:06,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:06,923 INFO L225 Difference]: With dead ends: 71 [2018-11-28 11:27:06,923 INFO L226 Difference]: Without dead ends: 71 [2018-11-28 11:27:06,923 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:27:06,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-11-28 11:27:06,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 69. [2018-11-28 11:27:06,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-11-28 11:27:06,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 76 transitions. [2018-11-28 11:27:06,929 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 76 transitions. Word has length 17 [2018-11-28 11:27:06,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:06,929 INFO L480 AbstractCegarLoop]: Abstraction has 69 states and 76 transitions. [2018-11-28 11:27:06,929 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 11:27:06,929 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 76 transitions. [2018-11-28 11:27:06,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-28 11:27:06,930 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:06,930 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:06,931 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:06,931 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:06,931 INFO L82 PathProgramCache]: Analyzing trace with hash -582960352, now seen corresponding path program 1 times [2018-11-28 11:27:06,932 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:06,934 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:06,950 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:06,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:06,975 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:06,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:06,982 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 11:27:06,984 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:27:06,984 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-28 11:27:06,984 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 11:27:06,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 11:27:06,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 11:27:06,984 INFO L87 Difference]: Start difference. First operand 69 states and 76 transitions. Second operand 3 states. [2018-11-28 11:27:07,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:07,075 INFO L93 Difference]: Finished difference Result 102 states and 114 transitions. [2018-11-28 11:27:07,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 11:27:07,076 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-11-28 11:27:07,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:07,077 INFO L225 Difference]: With dead ends: 102 [2018-11-28 11:27:07,077 INFO L226 Difference]: Without dead ends: 97 [2018-11-28 11:27:07,077 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 11:27:07,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-11-28 11:27:07,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 67. [2018-11-28 11:27:07,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-11-28 11:27:07,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 73 transitions. [2018-11-28 11:27:07,083 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 73 transitions. Word has length 17 [2018-11-28 11:27:07,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:07,083 INFO L480 AbstractCegarLoop]: Abstraction has 67 states and 73 transitions. [2018-11-28 11:27:07,084 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 11:27:07,084 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 73 transitions. [2018-11-28 11:27:07,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-11-28 11:27:07,084 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:07,084 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:07,085 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:07,085 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:07,085 INFO L82 PathProgramCache]: Analyzing trace with hash -1670349560, now seen corresponding path program 1 times [2018-11-28 11:27:07,085 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:07,085 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:07,107 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:07,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:07,152 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:07,167 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:07,167 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:07,171 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:07,171 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:27:07,248 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:07,248 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:08,712 WARN L180 SmtUtils]: Spent 767.00 ms on a formula simplification that was a NOOP. DAG size: 37 [2018-11-28 11:27:08,933 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:08,939 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:27:08,939 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9] total 16 [2018-11-28 11:27:08,939 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-28 11:27:08,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-28 11:27:08,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=225, Unknown=0, NotChecked=0, Total=272 [2018-11-28 11:27:08,940 INFO L87 Difference]: Start difference. First operand 67 states and 73 transitions. Second operand 17 states. [2018-11-28 11:27:10,776 WARN L180 SmtUtils]: Spent 1.10 s on a formula simplification that was a NOOP. DAG size: 43 [2018-11-28 11:27:11,068 WARN L180 SmtUtils]: Spent 173.00 ms on a formula simplification that was a NOOP. DAG size: 39 [2018-11-28 11:27:11,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:11,479 INFO L93 Difference]: Finished difference Result 80 states and 91 transitions. [2018-11-28 11:27:11,479 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-28 11:27:11,479 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 19 [2018-11-28 11:27:11,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:11,480 INFO L225 Difference]: With dead ends: 80 [2018-11-28 11:27:11,480 INFO L226 Difference]: Without dead ends: 80 [2018-11-28 11:27:11,480 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 19 SyntacticMatches, 3 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=122, Invalid=528, Unknown=0, NotChecked=0, Total=650 [2018-11-28 11:27:11,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-11-28 11:27:11,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 76. [2018-11-28 11:27:11,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-11-28 11:27:11,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 84 transitions. [2018-11-28 11:27:11,483 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 84 transitions. Word has length 19 [2018-11-28 11:27:11,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:11,484 INFO L480 AbstractCegarLoop]: Abstraction has 76 states and 84 transitions. [2018-11-28 11:27:11,484 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-28 11:27:11,484 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 84 transitions. [2018-11-28 11:27:11,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-28 11:27:11,484 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:11,484 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:11,485 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:11,485 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:11,485 INFO L82 PathProgramCache]: Analyzing trace with hash -1768858233, now seen corresponding path program 1 times [2018-11-28 11:27:11,485 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:11,485 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:11,500 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:11,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:11,567 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:11,586 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:11,587 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:11,636 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:11,638 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:27:11,638 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-11-28 11:27:11,638 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 11:27:11,638 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 11:27:11,639 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-11-28 11:27:11,639 INFO L87 Difference]: Start difference. First operand 76 states and 84 transitions. Second operand 10 states. [2018-11-28 11:27:11,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:11,806 INFO L93 Difference]: Finished difference Result 82 states and 88 transitions. [2018-11-28 11:27:11,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 11:27:11,807 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 27 [2018-11-28 11:27:11,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:11,807 INFO L225 Difference]: With dead ends: 82 [2018-11-28 11:27:11,807 INFO L226 Difference]: Without dead ends: 82 [2018-11-28 11:27:11,807 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=63, Invalid=93, Unknown=0, NotChecked=0, Total=156 [2018-11-28 11:27:11,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-11-28 11:27:11,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 81. [2018-11-28 11:27:11,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-11-28 11:27:11,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 88 transitions. [2018-11-28 11:27:11,812 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 88 transitions. Word has length 27 [2018-11-28 11:27:11,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:11,812 INFO L480 AbstractCegarLoop]: Abstraction has 81 states and 88 transitions. [2018-11-28 11:27:11,812 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 11:27:11,812 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 88 transitions. [2018-11-28 11:27:11,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-28 11:27:11,813 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:11,813 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:11,813 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:11,813 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:11,814 INFO L82 PathProgramCache]: Analyzing trace with hash -1326683309, now seen corresponding path program 2 times [2018-11-28 11:27:11,814 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:11,814 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:11,827 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-28 11:27:11,909 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-28 11:27:11,909 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:27:11,911 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:11,919 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:11,919 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:11,925 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:11,925 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:27:12,030 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:12,030 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:13,221 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:13,223 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:27:13,223 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 21 [2018-11-28 11:27:13,223 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-28 11:27:13,223 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-28 11:27:13,224 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=381, Unknown=0, NotChecked=0, Total=462 [2018-11-28 11:27:13,224 INFO L87 Difference]: Start difference. First operand 81 states and 88 transitions. Second operand 22 states. [2018-11-28 11:27:16,598 WARN L180 SmtUtils]: Spent 1.69 s on a formula simplification that was a NOOP. DAG size: 28 [2018-11-28 11:27:17,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:17,291 INFO L93 Difference]: Finished difference Result 100 states and 115 transitions. [2018-11-28 11:27:17,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-28 11:27:17,292 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 28 [2018-11-28 11:27:17,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:17,293 INFO L225 Difference]: With dead ends: 100 [2018-11-28 11:27:17,293 INFO L226 Difference]: Without dead ends: 100 [2018-11-28 11:27:17,294 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 33 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 212 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=261, Invalid=1071, Unknown=0, NotChecked=0, Total=1332 [2018-11-28 11:27:17,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-11-28 11:27:17,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 94. [2018-11-28 11:27:17,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-11-28 11:27:17,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 104 transitions. [2018-11-28 11:27:17,298 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 104 transitions. Word has length 28 [2018-11-28 11:27:17,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:17,299 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 104 transitions. [2018-11-28 11:27:17,299 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-28 11:27:17,299 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 104 transitions. [2018-11-28 11:27:17,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-28 11:27:17,299 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:17,300 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:17,300 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:17,300 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:17,300 INFO L82 PathProgramCache]: Analyzing trace with hash -1771090489, now seen corresponding path program 2 times [2018-11-28 11:27:17,301 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:17,301 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:17,314 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:27:17,354 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-11-28 11:27:17,354 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:27:17,356 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:17,369 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-11-28 11:27:17,370 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 11:27:17,373 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:27:17,373 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 11:27:17,373 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 11:27:17,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 11:27:17,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 11:27:17,374 INFO L87 Difference]: Start difference. First operand 94 states and 104 transitions. Second operand 4 states. [2018-11-28 11:27:17,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:17,431 INFO L93 Difference]: Finished difference Result 107 states and 121 transitions. [2018-11-28 11:27:17,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 11:27:17,432 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2018-11-28 11:27:17,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:17,433 INFO L225 Difference]: With dead ends: 107 [2018-11-28 11:27:17,433 INFO L226 Difference]: Without dead ends: 107 [2018-11-28 11:27:17,433 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:27:17,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-11-28 11:27:17,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 100. [2018-11-28 11:27:17,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-11-28 11:27:17,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 114 transitions. [2018-11-28 11:27:17,438 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 114 transitions. Word has length 39 [2018-11-28 11:27:17,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:17,438 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 114 transitions. [2018-11-28 11:27:17,438 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 11:27:17,438 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 114 transitions. [2018-11-28 11:27:17,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-28 11:27:17,439 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:17,439 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:17,440 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:17,440 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:17,440 INFO L82 PathProgramCache]: Analyzing trace with hash 1164044378, now seen corresponding path program 1 times [2018-11-28 11:27:17,440 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:17,440 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:17,463 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 11:27:17,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:17,569 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:17,642 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 4 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:17,642 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:17,807 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:27:17,809 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:27:17,809 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 18 [2018-11-28 11:27:17,809 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-28 11:27:17,809 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-28 11:27:17,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=215, Unknown=0, NotChecked=0, Total=306 [2018-11-28 11:27:17,810 INFO L87 Difference]: Start difference. First operand 100 states and 114 transitions. Second operand 18 states. [2018-11-28 11:27:18,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:18,243 INFO L93 Difference]: Finished difference Result 100 states and 110 transitions. [2018-11-28 11:27:18,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-28 11:27:18,245 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 44 [2018-11-28 11:27:18,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:18,245 INFO L225 Difference]: With dead ends: 100 [2018-11-28 11:27:18,245 INFO L226 Difference]: Without dead ends: 100 [2018-11-28 11:27:18,246 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 71 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=133, Invalid=287, Unknown=0, NotChecked=0, Total=420 [2018-11-28 11:27:18,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-11-28 11:27:18,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2018-11-28 11:27:18,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-11-28 11:27:18,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 110 transitions. [2018-11-28 11:27:18,250 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 110 transitions. Word has length 44 [2018-11-28 11:27:18,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:18,250 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 110 transitions. [2018-11-28 11:27:18,250 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-28 11:27:18,250 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 110 transitions. [2018-11-28 11:27:18,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-28 11:27:18,251 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:18,251 INFO L402 BasicCegarLoop]: trace histogram [11, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:18,251 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:18,252 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:18,252 INFO L82 PathProgramCache]: Analyzing trace with hash 50819827, now seen corresponding path program 3 times [2018-11-28 11:27:18,252 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:18,252 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:18,279 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-28 11:27:18,596 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-11-28 11:27:18,596 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:27:18,601 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:18,613 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:18,613 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:18,619 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:18,619 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:27:18,991 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 10 proven. 145 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:18,991 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:19,454 WARN L180 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2018-11-28 11:27:20,799 WARN L180 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 32 [2018-11-28 11:27:25,376 WARN L180 SmtUtils]: Spent 1.76 s on a formula simplification. DAG size of input: 50 DAG size of output: 50 [2018-11-28 11:27:25,945 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:27:25,949 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:27:25,949 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 21] total 38 [2018-11-28 11:27:25,949 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-11-28 11:27:25,950 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-11-28 11:27:25,950 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=309, Invalid=1097, Unknown=0, NotChecked=0, Total=1406 [2018-11-28 11:27:25,950 INFO L87 Difference]: Start difference. First operand 100 states and 110 transitions. Second operand 38 states. [2018-11-28 11:27:27,430 WARN L180 SmtUtils]: Spent 1.01 s on a formula simplification that was a NOOP. DAG size: 56 [2018-11-28 11:27:28,059 WARN L180 SmtUtils]: Spent 242.00 ms on a formula simplification that was a NOOP. DAG size: 52 [2018-11-28 11:27:31,710 WARN L180 SmtUtils]: Spent 1.78 s on a formula simplification that was a NOOP. DAG size: 154 [2018-11-28 11:27:33,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:33,602 INFO L93 Difference]: Finished difference Result 100 states and 110 transitions. [2018-11-28 11:27:33,604 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-28 11:27:33,604 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 46 [2018-11-28 11:27:33,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:33,605 INFO L225 Difference]: With dead ends: 100 [2018-11-28 11:27:33,605 INFO L226 Difference]: Without dead ends: 100 [2018-11-28 11:27:33,605 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 49 SyntacticMatches, 6 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 469 ImplicationChecksByTransitivity, 11.0s TimeCoverageRelationStatistics Valid=358, Invalid=1364, Unknown=0, NotChecked=0, Total=1722 [2018-11-28 11:27:33,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-11-28 11:27:33,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 98. [2018-11-28 11:27:33,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-11-28 11:27:33,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 107 transitions. [2018-11-28 11:27:33,608 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 107 transitions. Word has length 46 [2018-11-28 11:27:33,608 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:33,608 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 107 transitions. [2018-11-28 11:27:33,608 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-11-28 11:27:33,609 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 107 transitions. [2018-11-28 11:27:33,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-28 11:27:33,609 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:33,609 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:33,610 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:33,610 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:33,610 INFO L82 PathProgramCache]: Analyzing trace with hash 1134198810, now seen corresponding path program 2 times [2018-11-28 11:27:33,610 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:33,610 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:33,627 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-28 11:27:33,779 ERROR L235 seRefinementStrategy]: Caught known exception: Array theory solver does not yet support write-chains connecting two different constant arrays [2018-11-28 11:27:33,780 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-28 11:27:33,780 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-28 11:27:33,787 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:27:33,830 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-28 11:27:33,830 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:27:33,836 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:33,838 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:33,838 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:33,840 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:33,840 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 11:27:35,887 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-11-28 11:27:35,893 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:35,894 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:35,894 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-28 11:27:35,895 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:35,908 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:27:35,908 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-11-28 11:27:35,926 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 2 not checked. [2018-11-28 11:27:35,926 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:35,972 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-11-28 11:27:35,972 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9] total 9 [2018-11-28 11:27:35,972 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 11:27:35,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 11:27:35,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=71, Unknown=1, NotChecked=16, Total=110 [2018-11-28 11:27:35,972 INFO L87 Difference]: Start difference. First operand 98 states and 107 transitions. Second operand 10 states. [2018-11-28 11:27:38,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:38,398 INFO L93 Difference]: Finished difference Result 144 states and 163 transitions. [2018-11-28 11:27:38,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 11:27:38,399 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 56 [2018-11-28 11:27:38,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:38,400 INFO L225 Difference]: With dead ends: 144 [2018-11-28 11:27:38,400 INFO L226 Difference]: Without dead ends: 144 [2018-11-28 11:27:38,400 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=42, Invalid=143, Unknown=1, NotChecked=24, Total=210 [2018-11-28 11:27:38,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-11-28 11:27:38,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 109. [2018-11-28 11:27:38,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-11-28 11:27:38,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 124 transitions. [2018-11-28 11:27:38,404 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 124 transitions. Word has length 56 [2018-11-28 11:27:38,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:38,404 INFO L480 AbstractCegarLoop]: Abstraction has 109 states and 124 transitions. [2018-11-28 11:27:38,404 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 11:27:38,404 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 124 transitions. [2018-11-28 11:27:38,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-28 11:27:38,405 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:38,405 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:38,405 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:38,405 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:38,405 INFO L82 PathProgramCache]: Analyzing trace with hash 1134198811, now seen corresponding path program 1 times [2018-11-28 11:27:38,406 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:38,406 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:38,429 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 11:27:38,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:38,745 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:38,758 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:38,758 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:38,766 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:38,767 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:38,773 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:38,773 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 11:27:39,778 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-11-28 11:27:39,783 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:39,784 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:39,785 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:27:39,785 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:39,798 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:27:39,798 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:39,808 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:39,808 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:28, output treesize:12 [2018-11-28 11:27:39,830 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 145 trivial. 2 not checked. [2018-11-28 11:27:39,830 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:40,138 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:27:40,138 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:27:40,144 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:40,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:40,199 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:40,202 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:40,202 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:40,210 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:40,210 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:40,217 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:40,217 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 11:27:40,238 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:40,241 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:40,242 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:27:40,242 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:40,263 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:27:40,264 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:40,276 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:40,276 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:28, output treesize:12 [2018-11-28 11:27:40,281 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 145 trivial. 2 not checked. [2018-11-28 11:27:40,282 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:40,480 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:27:40,480 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-11-28 11:27:40,481 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-28 11:27:40,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-28 11:27:40,481 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=129, Unknown=2, NotChecked=22, Total=182 [2018-11-28 11:27:40,481 INFO L87 Difference]: Start difference. First operand 109 states and 124 transitions. Second operand 12 states. [2018-11-28 11:27:41,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:41,287 INFO L93 Difference]: Finished difference Result 152 states and 175 transitions. [2018-11-28 11:27:41,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-28 11:27:41,288 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2018-11-28 11:27:41,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:41,289 INFO L225 Difference]: With dead ends: 152 [2018-11-28 11:27:41,289 INFO L226 Difference]: Without dead ends: 152 [2018-11-28 11:27:41,289 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 105 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=62, Invalid=320, Unknown=2, NotChecked=36, Total=420 [2018-11-28 11:27:41,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-11-28 11:27:41,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 129. [2018-11-28 11:27:41,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-11-28 11:27:41,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 153 transitions. [2018-11-28 11:27:41,294 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 153 transitions. Word has length 56 [2018-11-28 11:27:41,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:41,295 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 153 transitions. [2018-11-28 11:27:41,295 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-28 11:27:41,295 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 153 transitions. [2018-11-28 11:27:41,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-28 11:27:41,295 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:41,295 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:41,296 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:41,296 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:41,296 INFO L82 PathProgramCache]: Analyzing trace with hash -1795325877, now seen corresponding path program 1 times [2018-11-28 11:27:41,296 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:41,296 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:41,315 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:41,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:41,455 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:41,472 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:27:41,472 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 11:27:41,475 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:27:41,475 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 11:27:41,475 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 11:27:41,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 11:27:41,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:27:41,475 INFO L87 Difference]: Start difference. First operand 129 states and 153 transitions. Second operand 5 states. [2018-11-28 11:27:41,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:41,540 INFO L93 Difference]: Finished difference Result 142 states and 165 transitions. [2018-11-28 11:27:41,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 11:27:41,541 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2018-11-28 11:27:41,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:41,542 INFO L225 Difference]: With dead ends: 142 [2018-11-28 11:27:41,550 INFO L226 Difference]: Without dead ends: 137 [2018-11-28 11:27:41,550 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 11:27:41,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-11-28 11:27:41,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 129. [2018-11-28 11:27:41,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-11-28 11:27:41,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 152 transitions. [2018-11-28 11:27:41,555 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 152 transitions. Word has length 58 [2018-11-28 11:27:41,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:41,555 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 152 transitions. [2018-11-28 11:27:41,555 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 11:27:41,555 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 152 transitions. [2018-11-28 11:27:41,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-11-28 11:27:41,556 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:41,556 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:41,556 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:41,557 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:41,557 INFO L82 PathProgramCache]: Analyzing trace with hash -1796104243, now seen corresponding path program 1 times [2018-11-28 11:27:41,557 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:41,557 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:41,573 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:41,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:41,730 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:41,774 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2018-11-28 11:27:41,774 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:41,819 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2018-11-28 11:27:41,821 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:27:41,821 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-11-28 11:27:41,822 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 11:27:41,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 11:27:41,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-11-28 11:27:41,822 INFO L87 Difference]: Start difference. First operand 129 states and 152 transitions. Second operand 10 states. [2018-11-28 11:27:41,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:41,974 INFO L93 Difference]: Finished difference Result 234 states and 283 transitions. [2018-11-28 11:27:41,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 11:27:41,975 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 61 [2018-11-28 11:27:41,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:41,976 INFO L225 Difference]: With dead ends: 234 [2018-11-28 11:27:41,976 INFO L226 Difference]: Without dead ends: 234 [2018-11-28 11:27:41,976 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2018-11-28 11:27:41,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2018-11-28 11:27:41,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 157. [2018-11-28 11:27:41,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-11-28 11:27:41,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 196 transitions. [2018-11-28 11:27:41,983 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 196 transitions. Word has length 61 [2018-11-28 11:27:41,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:41,983 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 196 transitions. [2018-11-28 11:27:41,983 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 11:27:41,983 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 196 transitions. [2018-11-28 11:27:41,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-28 11:27:41,984 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:41,984 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:41,984 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:41,984 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:41,984 INFO L82 PathProgramCache]: Analyzing trace with hash 1365974700, now seen corresponding path program 1 times [2018-11-28 11:27:41,985 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:41,985 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:42,003 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:42,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:42,045 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:42,055 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2018-11-28 11:27:42,055 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 11:27:42,057 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:27:42,057 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 11:27:42,058 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 11:27:42,058 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 11:27:42,058 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:27:42,058 INFO L87 Difference]: Start difference. First operand 157 states and 196 transitions. Second operand 5 states. [2018-11-28 11:27:42,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:42,098 INFO L93 Difference]: Finished difference Result 196 states and 244 transitions. [2018-11-28 11:27:42,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 11:27:42,098 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2018-11-28 11:27:42,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:42,099 INFO L225 Difference]: With dead ends: 196 [2018-11-28 11:27:42,099 INFO L226 Difference]: Without dead ends: 196 [2018-11-28 11:27:42,100 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 11:27:42,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-11-28 11:27:42,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 161. [2018-11-28 11:27:42,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-11-28 11:27:42,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 199 transitions. [2018-11-28 11:27:42,105 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 199 transitions. Word has length 65 [2018-11-28 11:27:42,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:42,105 INFO L480 AbstractCegarLoop]: Abstraction has 161 states and 199 transitions. [2018-11-28 11:27:42,105 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 11:27:42,105 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 199 transitions. [2018-11-28 11:27:42,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-28 11:27:42,106 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:42,106 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:42,106 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:42,106 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:42,106 INFO L82 PathProgramCache]: Analyzing trace with hash -1421440787, now seen corresponding path program 1 times [2018-11-28 11:27:42,107 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:42,107 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:42,124 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:42,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:42,268 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:42,270 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:42,270 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:42,272 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:42,272 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 11:27:42,322 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:27:42,322 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:42,376 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:27:42,377 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:27:42,383 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:42,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:42,419 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:42,421 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:42,421 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:42,422 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:42,423 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 11:27:42,430 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:27:42,430 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:42,523 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:27:42,523 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2018-11-28 11:27:42,523 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 11:27:42,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 11:27:42,524 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=50, Unknown=6, NotChecked=0, Total=72 [2018-11-28 11:27:42,524 INFO L87 Difference]: Start difference. First operand 161 states and 199 transitions. Second operand 8 states. [2018-11-28 11:27:42,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:42,826 INFO L93 Difference]: Finished difference Result 186 states and 223 transitions. [2018-11-28 11:27:42,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 11:27:42,826 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 65 [2018-11-28 11:27:42,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:42,827 INFO L225 Difference]: With dead ends: 186 [2018-11-28 11:27:42,827 INFO L226 Difference]: Without dead ends: 186 [2018-11-28 11:27:42,827 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 144 SyntacticMatches, 5 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=89, Unknown=9, NotChecked=0, Total=132 [2018-11-28 11:27:42,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-11-28 11:27:42,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 166. [2018-11-28 11:27:42,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-11-28 11:27:42,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 205 transitions. [2018-11-28 11:27:42,832 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 205 transitions. Word has length 65 [2018-11-28 11:27:42,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:42,832 INFO L480 AbstractCegarLoop]: Abstraction has 166 states and 205 transitions. [2018-11-28 11:27:42,832 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 11:27:42,832 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 205 transitions. [2018-11-28 11:27:42,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-28 11:27:42,833 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:42,833 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:42,833 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:42,834 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:42,834 INFO L82 PathProgramCache]: Analyzing trace with hash -1421440786, now seen corresponding path program 1 times [2018-11-28 11:27:42,834 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:42,834 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:42,856 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:43,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:43,018 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:43,026 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:43,026 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:43,031 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:43,031 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:27:43,113 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:27:43,113 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:43,370 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:27:43,370 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:27:43,376 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:43,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:43,428 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:43,430 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:43,431 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:43,436 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:43,437 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:27:43,445 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:27:43,445 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:43,858 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:27:43,858 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2018-11-28 11:27:43,858 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 11:27:43,858 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 11:27:43,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2018-11-28 11:27:43,858 INFO L87 Difference]: Start difference. First operand 166 states and 205 transitions. Second operand 10 states. [2018-11-28 11:27:44,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:44,394 INFO L93 Difference]: Finished difference Result 210 states and 251 transitions. [2018-11-28 11:27:44,394 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 11:27:44,394 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2018-11-28 11:27:44,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:44,395 INFO L225 Difference]: With dead ends: 210 [2018-11-28 11:27:44,395 INFO L226 Difference]: Without dead ends: 210 [2018-11-28 11:27:44,395 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 143 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=67, Invalid=353, Unknown=0, NotChecked=0, Total=420 [2018-11-28 11:27:44,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-11-28 11:27:44,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 190. [2018-11-28 11:27:44,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-11-28 11:27:44,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 241 transitions. [2018-11-28 11:27:44,400 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 241 transitions. Word has length 65 [2018-11-28 11:27:44,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:44,400 INFO L480 AbstractCegarLoop]: Abstraction has 190 states and 241 transitions. [2018-11-28 11:27:44,400 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 11:27:44,400 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 241 transitions. [2018-11-28 11:27:44,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 11:27:44,401 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:44,401 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:44,402 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:44,402 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:44,402 INFO L82 PathProgramCache]: Analyzing trace with hash -4199915, now seen corresponding path program 1 times [2018-11-28 11:27:44,402 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:44,402 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:44,419 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:44,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:44,776 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:44,787 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:44,787 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:44,795 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:44,795 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:44,803 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:44,804 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 11:27:45,901 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-11-28 11:27:45,905 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:45,907 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:27:45,908 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:45,922 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:45,923 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:45,923 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 11:27:45,924 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:45,933 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:45,934 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:30, output treesize:12 [2018-11-28 11:27:45,989 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:45,990 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:45,991 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:27:45,991 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:46,010 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:27:46,011 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:46,023 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:46,023 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:28, output treesize:12 [2018-11-28 11:27:46,055 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 149 trivial. 4 not checked. [2018-11-28 11:27:46,055 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:46,390 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:27:46,391 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:27:46,396 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:46,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:46,454 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:46,457 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:46,458 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:46,466 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:46,466 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:46,471 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:46,472 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 11:27:46,482 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:46,483 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:46,484 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:27:46,484 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:46,500 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:27:46,501 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:46,511 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:46,512 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:28, output treesize:12 [2018-11-28 11:27:46,544 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:46,559 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:46,559 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:27:46,560 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:46,575 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:27:46,575 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:46,584 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:46,585 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:28, output treesize:12 [2018-11-28 11:27:46,602 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 149 trivial. 4 not checked. [2018-11-28 11:27:46,602 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:46,796 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:27:46,796 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 13 [2018-11-28 11:27:46,796 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-28 11:27:46,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-28 11:27:46,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=176, Unknown=1, NotChecked=26, Total=240 [2018-11-28 11:27:46,797 INFO L87 Difference]: Start difference. First operand 190 states and 241 transitions. Second operand 14 states. [2018-11-28 11:27:47,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:47,896 INFO L93 Difference]: Finished difference Result 248 states and 305 transitions. [2018-11-28 11:27:47,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-28 11:27:47,897 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 66 [2018-11-28 11:27:47,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:47,898 INFO L225 Difference]: With dead ends: 248 [2018-11-28 11:27:47,899 INFO L226 Difference]: Without dead ends: 248 [2018-11-28 11:27:47,899 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 122 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=79, Invalid=430, Unknown=1, NotChecked=42, Total=552 [2018-11-28 11:27:47,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2018-11-28 11:27:47,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 190. [2018-11-28 11:27:47,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-11-28 11:27:47,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 239 transitions. [2018-11-28 11:27:47,905 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 239 transitions. Word has length 66 [2018-11-28 11:27:47,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:47,905 INFO L480 AbstractCegarLoop]: Abstraction has 190 states and 239 transitions. [2018-11-28 11:27:47,905 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-28 11:27:47,905 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 239 transitions. [2018-11-28 11:27:47,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 11:27:47,906 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:47,906 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:47,907 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:47,907 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:47,907 INFO L82 PathProgramCache]: Analyzing trace with hash -1114991091, now seen corresponding path program 1 times [2018-11-28 11:27:47,907 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:47,907 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:47,935 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:48,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:48,180 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:48,206 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:27:48,207 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:27:48,208 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,209 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,214 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,215 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-11-28 11:27:48,242 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-28 11:27:48,245 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,245 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-28 11:27:48,246 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,250 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,257 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,258 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-11-28 11:27:48,292 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2018-11-28 11:27:48,295 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,296 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,297 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,297 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-28 11:27:48,298 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,305 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,314 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,314 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:34 [2018-11-28 11:27:48,361 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:27:48,363 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,364 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,364 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,365 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,366 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,367 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,367 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 85 [2018-11-28 11:27:48,368 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,379 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,390 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,391 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:43 [2018-11-28 11:27:48,449 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 39 [2018-11-28 11:27:48,456 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,458 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,460 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,461 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,462 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,463 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,465 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,466 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,467 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,469 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,469 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 126 [2018-11-28 11:27:48,470 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,486 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,500 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,500 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:52 [2018-11-28 11:27:48,581 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 46 [2018-11-28 11:27:48,586 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,588 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,590 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,591 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,593 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,595 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,597 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,598 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,600 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,602 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,604 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,606 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,607 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,608 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,609 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,610 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 175 [2018-11-28 11:27:48,611 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,638 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,657 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,657 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:65, output treesize:61 [2018-11-28 11:27:48,750 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 53 [2018-11-28 11:27:48,756 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,758 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,760 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,762 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,765 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,766 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,767 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,769 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,771 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,773 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,775 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,777 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,779 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,781 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,784 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,786 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,787 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,789 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,791 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,793 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,796 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,797 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 232 [2018-11-28 11:27:48,797 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,832 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,853 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:48,853 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:74, output treesize:70 [2018-11-28 11:27:48,969 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 60 [2018-11-28 11:27:48,977 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,979 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,982 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,985 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,990 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,995 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:48,997 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,001 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,005 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,009 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,011 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,013 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,016 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,019 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,022 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,025 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,028 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,030 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,033 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,036 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,040 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,042 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,045 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,048 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,050 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,053 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,056 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,058 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,059 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 297 [2018-11-28 11:27:49,060 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:49,108 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:49,133 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:49,133 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:83, output treesize:79 [2018-11-28 11:27:49,264 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 67 [2018-11-28 11:27:49,274 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,276 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,280 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,283 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,289 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,292 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,295 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,298 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,300 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,303 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,306 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,308 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,311 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,312 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,315 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,318 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,321 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,324 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,327 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,330 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,332 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,335 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,337 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,340 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,343 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,346 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,350 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,353 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,356 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,359 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,361 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,365 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,367 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,370 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,373 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,376 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,376 INFO L303 Elim1Store]: Index analysis took 111 ms [2018-11-28 11:27:49,377 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 370 [2018-11-28 11:27:49,378 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:49,442 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:49,469 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:49,469 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:92, output treesize:88 [2018-11-28 11:27:49,619 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 72 [2018-11-28 11:27:49,623 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,623 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,624 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,625 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,625 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,626 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,627 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,627 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,628 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,629 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,629 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,630 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,630 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,631 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,632 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,632 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,633 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,634 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,634 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,635 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,635 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,636 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,637 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,637 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,638 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,639 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,639 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,640 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,641 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,641 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,642 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,642 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,643 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,644 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,644 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,645 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,646 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,646 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,647 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,648 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,648 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,649 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,649 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,650 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,651 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:49,652 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 431 [2018-11-28 11:27:49,653 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:49,739 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:49,767 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:49,767 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:96, output treesize:92 [2018-11-28 11:27:50,027 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 56 [2018-11-28 11:27:50,031 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 3 [2018-11-28 11:27:50,031 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,033 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,034 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,034 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:78, output treesize:3 [2018-11-28 11:27:50,097 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:27:50,098 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:50,295 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:27:50,295 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:27:50,301 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:50,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:50,363 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:50,429 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:27:50,429 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,433 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,433 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:27:50,608 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:27:50,609 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:27:50,610 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,611 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,619 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,619 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-11-28 11:27:50,733 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-28 11:27:50,736 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:50,736 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-28 11:27:50,737 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,741 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,750 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,750 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:36, output treesize:32 [2018-11-28 11:27:50,880 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 5 [2018-11-28 11:27:50,880 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,900 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-11-28 11:27:50,903 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:50,904 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:50,905 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:50,906 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 46 [2018-11-28 11:27:50,906 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,914 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,921 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:50,921 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:52, output treesize:29 [2018-11-28 11:27:50,988 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:27:50,991 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:50,991 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:50,993 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:50,995 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:27:50,996 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,008 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,020 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:27:51,020 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:27:51,108 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:27:51,111 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,113 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,116 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,120 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:27:51,120 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,132 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,144 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:27:51,144 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:27:51,232 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:27:51,234 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,235 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,237 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,239 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:27:51,239 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,250 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,262 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:27:51,262 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:27:51,360 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:27:51,364 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,379 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,382 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,386 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:27:51,386 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,397 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,409 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:27:51,409 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:27:51,496 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:27:51,500 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,501 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,504 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,508 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:27:51,508 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,521 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,533 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:27:51,533 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:27:51,628 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:27:51,631 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,632 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,635 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,639 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:27:51,639 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,651 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,662 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:27:51,662 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:27:51,750 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:27:51,754 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,755 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,759 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:51,763 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:27:51,764 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,775 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,787 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:27:51,787 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:27:51,979 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 21 [2018-11-28 11:27:51,980 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 3 [2018-11-28 11:27:51,980 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,982 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,983 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:51,983 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:3 [2018-11-28 11:27:51,990 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-11-28 11:27:51,990 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:52,070 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:27:52,071 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 16] total 41 [2018-11-28 11:27:52,071 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-11-28 11:27:52,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-11-28 11:27:52,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=187, Invalid=1883, Unknown=0, NotChecked=0, Total=2070 [2018-11-28 11:27:52,072 INFO L87 Difference]: Start difference. First operand 190 states and 239 transitions. Second operand 42 states. [2018-11-28 11:27:57,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:27:57,562 INFO L93 Difference]: Finished difference Result 221 states and 271 transitions. [2018-11-28 11:27:57,562 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-11-28 11:27:57,563 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 66 [2018-11-28 11:27:57,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:27:57,563 INFO L225 Difference]: With dead ends: 221 [2018-11-28 11:27:57,563 INFO L226 Difference]: Without dead ends: 221 [2018-11-28 11:27:57,564 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 109 SyntacticMatches, 8 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2033 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=507, Invalid=5813, Unknown=0, NotChecked=0, Total=6320 [2018-11-28 11:27:57,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-11-28 11:27:57,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 205. [2018-11-28 11:27:57,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2018-11-28 11:27:57,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 259 transitions. [2018-11-28 11:27:57,569 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 259 transitions. Word has length 66 [2018-11-28 11:27:57,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:27:57,570 INFO L480 AbstractCegarLoop]: Abstraction has 205 states and 259 transitions. [2018-11-28 11:27:57,570 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-11-28 11:27:57,570 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 259 transitions. [2018-11-28 11:27:57,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-11-28 11:27:57,570 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:27:57,570 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:27:57,571 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:27:57,571 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:27:57,571 INFO L82 PathProgramCache]: Analyzing trace with hash -204985043, now seen corresponding path program 1 times [2018-11-28 11:27:57,571 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:27:57,572 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:27:57,591 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:57,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:57,790 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:27:57,820 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:27:57,821 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:27:57,822 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:57,823 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:57,829 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:57,829 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-11-28 11:27:57,855 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-28 11:27:57,858 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:57,859 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-28 11:27:57,859 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:57,864 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:57,873 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:57,873 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-11-28 11:27:57,912 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2018-11-28 11:27:57,914 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:57,915 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:57,916 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:57,916 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-28 11:27:57,917 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:57,932 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:57,943 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:57,943 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:34 [2018-11-28 11:27:57,990 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:27:57,994 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:57,995 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:57,996 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:57,997 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:57,997 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:57,998 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:57,999 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 85 [2018-11-28 11:27:57,999 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,031 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,047 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,047 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:43 [2018-11-28 11:27:58,124 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 39 [2018-11-28 11:27:58,127 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,127 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,128 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,129 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,129 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,130 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,130 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,131 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,132 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,132 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,133 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 126 [2018-11-28 11:27:58,133 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,169 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,183 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,183 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:52 [2018-11-28 11:27:58,258 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 46 [2018-11-28 11:27:58,263 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,265 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,267 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,269 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,270 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,272 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,273 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,275 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,277 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,279 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,280 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,282 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,284 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,286 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,288 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,288 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 175 [2018-11-28 11:27:58,289 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,361 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,379 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,379 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:65, output treesize:61 [2018-11-28 11:27:58,486 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 53 [2018-11-28 11:27:58,491 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,492 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,493 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,493 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,494 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,495 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,495 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,496 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,497 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,498 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,498 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,499 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,500 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,501 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,501 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,502 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,503 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,504 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,504 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,505 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,507 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,508 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 232 [2018-11-28 11:27:58,508 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,551 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,573 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,573 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:74, output treesize:70 [2018-11-28 11:27:58,678 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 60 [2018-11-28 11:27:58,684 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,687 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,691 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,693 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,696 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,699 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,702 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,704 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,706 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,709 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,711 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,714 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,716 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,719 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,722 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,724 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,726 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,728 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,730 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,732 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,735 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,738 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,740 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,743 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,746 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,748 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,751 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,753 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,754 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 297 [2018-11-28 11:27:58,754 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,799 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,820 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:58,820 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:83, output treesize:79 [2018-11-28 11:27:58,946 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 67 [2018-11-28 11:27:58,954 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,960 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,963 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,966 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,968 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,972 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,975 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,978 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,980 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,983 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,985 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,988 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,992 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,996 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:58,999 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,003 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,005 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,008 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,011 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,014 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,017 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,020 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,023 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,027 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,029 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,032 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,035 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,037 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,040 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,043 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,047 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,049 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,051 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,055 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,058 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,061 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,061 INFO L303 Elim1Store]: Index analysis took 113 ms [2018-11-28 11:27:59,062 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 370 [2018-11-28 11:27:59,062 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:59,122 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:59,148 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:59,148 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:92, output treesize:88 [2018-11-28 11:27:59,298 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 72 [2018-11-28 11:27:59,302 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,302 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,303 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,303 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,304 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,305 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,305 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,306 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,306 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,307 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,308 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,308 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,309 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,309 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,310 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,311 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,311 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,312 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,312 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,313 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,313 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,314 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,315 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,315 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,316 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,316 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,317 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,318 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,318 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,319 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,320 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,320 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,321 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,321 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,322 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,322 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,323 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,324 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,324 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,325 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,325 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,326 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,327 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,327 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,328 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:27:59,329 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 431 [2018-11-28 11:27:59,330 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:59,410 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:59,436 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:59,436 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:96, output treesize:92 [2018-11-28 11:27:59,670 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 56 [2018-11-28 11:27:59,674 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 3 [2018-11-28 11:27:59,674 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:27:59,686 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:59,687 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:27:59,687 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:78, output treesize:3 [2018-11-28 11:27:59,726 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:27:59,726 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:27:59,900 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:27:59,900 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:27:59,906 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:27:59,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:27:59,967 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:28:00,041 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:28:00,041 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,045 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,045 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:28:00,218 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:28:00,219 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:28:00,219 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,221 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,228 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,228 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-11-28 11:28:00,343 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-28 11:28:00,345 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,346 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-28 11:28:00,346 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,350 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,359 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,359 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:36, output treesize:32 [2018-11-28 11:28:00,490 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 5 [2018-11-28 11:28:00,490 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,508 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-11-28 11:28:00,511 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,512 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,513 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,513 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 46 [2018-11-28 11:28:00,514 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,521 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,528 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,528 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:52, output treesize:29 [2018-11-28 11:28:00,592 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:28:00,595 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,596 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,597 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,600 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:28:00,600 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,611 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,623 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:00,623 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:28:00,711 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:28:00,714 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,714 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,716 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,718 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:28:00,719 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,730 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,741 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:00,741 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:28:00,828 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:28:00,831 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,832 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,833 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,836 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:28:00,836 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,847 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,861 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:00,862 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:28:00,949 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:28:00,952 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,952 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,954 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:00,956 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:28:00,957 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,968 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:00,981 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:00,981 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:28:01,070 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:28:01,072 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:01,073 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:01,075 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:01,077 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:28:01,077 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:01,089 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:01,100 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:01,100 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:28:01,186 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:28:01,188 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:01,189 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:01,191 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:01,193 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:28:01,193 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:01,208 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:01,221 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:01,221 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:28:01,348 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:28:01,351 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:01,352 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:01,354 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:01,356 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-28 11:28:01,357 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:01,371 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:01,389 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:01,389 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-11-28 11:28:01,660 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 21 [2018-11-28 11:28:01,662 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 3 [2018-11-28 11:28:01,662 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:01,664 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:01,665 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:01,665 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:3 [2018-11-28 11:28:01,672 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-11-28 11:28:01,673 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:28:01,747 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:28:01,748 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 16] total 41 [2018-11-28 11:28:01,748 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-11-28 11:28:01,748 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-11-28 11:28:01,749 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=187, Invalid=1883, Unknown=0, NotChecked=0, Total=2070 [2018-11-28 11:28:01,749 INFO L87 Difference]: Start difference. First operand 205 states and 259 transitions. Second operand 42 states. [2018-11-28 11:28:07,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:28:07,494 INFO L93 Difference]: Finished difference Result 218 states and 268 transitions. [2018-11-28 11:28:07,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-11-28 11:28:07,494 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 67 [2018-11-28 11:28:07,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:28:07,495 INFO L225 Difference]: With dead ends: 218 [2018-11-28 11:28:07,495 INFO L226 Difference]: Without dead ends: 218 [2018-11-28 11:28:07,496 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 197 GetRequests, 113 SyntacticMatches, 8 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1909 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=490, Invalid=5516, Unknown=0, NotChecked=0, Total=6006 [2018-11-28 11:28:07,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states. [2018-11-28 11:28:07,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 206. [2018-11-28 11:28:07,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-11-28 11:28:07,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 260 transitions. [2018-11-28 11:28:07,501 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 260 transitions. Word has length 67 [2018-11-28 11:28:07,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:28:07,502 INFO L480 AbstractCegarLoop]: Abstraction has 206 states and 260 transitions. [2018-11-28 11:28:07,502 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-11-28 11:28:07,502 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 260 transitions. [2018-11-28 11:28:07,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-28 11:28:07,502 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:28:07,502 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:28:07,503 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:28:07,503 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:28:07,503 INFO L82 PathProgramCache]: Analyzing trace with hash 2001615647, now seen corresponding path program 1 times [2018-11-28 11:28:07,503 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:28:07,503 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:28:07,525 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:28:07,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:28:07,707 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:28:07,798 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2018-11-28 11:28:07,798 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:28:08,165 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-11-28 11:28:08,166 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:08,199 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 17 [2018-11-28 11:28:08,200 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:08,232 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-28 11:28:08,232 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:44, output treesize:40 [2018-11-28 11:28:08,640 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2018-11-28 11:28:08,642 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:28:08,642 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 19 [2018-11-28 11:28:08,643 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-28 11:28:08,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-28 11:28:08,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=330, Unknown=0, NotChecked=0, Total=380 [2018-11-28 11:28:08,643 INFO L87 Difference]: Start difference. First operand 206 states and 260 transitions. Second operand 20 states. [2018-11-28 11:28:11,543 WARN L180 SmtUtils]: Spent 187.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 28 [2018-11-28 11:28:12,571 WARN L180 SmtUtils]: Spent 187.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 26 [2018-11-28 11:28:13,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:28:13,567 INFO L93 Difference]: Finished difference Result 305 states and 361 transitions. [2018-11-28 11:28:13,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-11-28 11:28:13,568 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 68 [2018-11-28 11:28:13,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:28:13,569 INFO L225 Difference]: With dead ends: 305 [2018-11-28 11:28:13,569 INFO L226 Difference]: Without dead ends: 305 [2018-11-28 11:28:13,570 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 360 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=371, Invalid=1699, Unknown=0, NotChecked=0, Total=2070 [2018-11-28 11:28:13,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305 states. [2018-11-28 11:28:13,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305 to 210. [2018-11-28 11:28:13,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-11-28 11:28:13,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 262 transitions. [2018-11-28 11:28:13,575 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 262 transitions. Word has length 68 [2018-11-28 11:28:13,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:28:13,576 INFO L480 AbstractCegarLoop]: Abstraction has 210 states and 262 transitions. [2018-11-28 11:28:13,576 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-28 11:28:13,576 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 262 transitions. [2018-11-28 11:28:13,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-11-28 11:28:13,576 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:28:13,576 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:28:13,576 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:28:13,576 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:28:13,576 INFO L82 PathProgramCache]: Analyzing trace with hash 1920543172, now seen corresponding path program 1 times [2018-11-28 11:28:13,577 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:28:13,577 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 31 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:28:13,602 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:28:13,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:28:13,768 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:28:13,820 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:28:13,822 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:28:13,823 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:13,825 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:13,833 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:13,833 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-11-28 11:28:13,898 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-28 11:28:13,899 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-28 11:28:13,899 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:13,900 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:13,901 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:13,901 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:3 [2018-11-28 11:28:13,913 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2018-11-28 11:28:13,913 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:28:14,052 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-11-28 11:28:14,055 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:28:14,055 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 8] total 18 [2018-11-28 11:28:14,055 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-28 11:28:14,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-28 11:28:14,056 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=296, Unknown=0, NotChecked=0, Total=342 [2018-11-28 11:28:14,056 INFO L87 Difference]: Start difference. First operand 210 states and 262 transitions. Second operand 19 states. [2018-11-28 11:28:15,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:28:15,181 INFO L93 Difference]: Finished difference Result 246 states and 306 transitions. [2018-11-28 11:28:15,181 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-28 11:28:15,182 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 69 [2018-11-28 11:28:15,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:28:15,182 INFO L225 Difference]: With dead ends: 246 [2018-11-28 11:28:15,182 INFO L226 Difference]: Without dead ends: 246 [2018-11-28 11:28:15,183 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 122 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 264 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=229, Invalid=1253, Unknown=0, NotChecked=0, Total=1482 [2018-11-28 11:28:15,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-11-28 11:28:15,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 212. [2018-11-28 11:28:15,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-11-28 11:28:15,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 264 transitions. [2018-11-28 11:28:15,187 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 264 transitions. Word has length 69 [2018-11-28 11:28:15,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:28:15,188 INFO L480 AbstractCegarLoop]: Abstraction has 212 states and 264 transitions. [2018-11-28 11:28:15,188 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-28 11:28:15,188 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 264 transitions. [2018-11-28 11:28:15,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 11:28:15,188 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:28:15,189 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:28:15,189 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:28:15,189 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:28:15,189 INFO L82 PathProgramCache]: Analyzing trace with hash -592703458, now seen corresponding path program 1 times [2018-11-28 11:28:15,189 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:28:15,190 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:28:15,215 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:28:15,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:28:15,406 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:28:15,450 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:28:15,450 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:15,451 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:15,451 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 11:28:15,487 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:28:15,489 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:28:15,489 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:15,491 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:15,499 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:15,499 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:20 [2018-11-28 11:28:15,534 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-11-28 11:28:15,534 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:15,535 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:15,535 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:3 [2018-11-28 11:28:15,565 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-11-28 11:28:15,566 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-28 11:28:15,566 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:15,567 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:15,569 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:15,569 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-11-28 11:28:15,585 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2018-11-28 11:28:15,585 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:28:15,797 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 10 proven. 4 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2018-11-28 11:28:15,800 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:28:15,800 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 9] total 20 [2018-11-28 11:28:15,800 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-28 11:28:15,800 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-28 11:28:15,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=372, Unknown=0, NotChecked=0, Total=420 [2018-11-28 11:28:15,800 INFO L87 Difference]: Start difference. First operand 212 states and 264 transitions. Second operand 21 states. [2018-11-28 11:28:24,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:28:24,034 INFO L93 Difference]: Finished difference Result 277 states and 342 transitions. [2018-11-28 11:28:24,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-11-28 11:28:24,035 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 70 [2018-11-28 11:28:24,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:28:24,035 INFO L225 Difference]: With dead ends: 277 [2018-11-28 11:28:24,035 INFO L226 Difference]: Without dead ends: 277 [2018-11-28 11:28:24,036 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 125 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 419 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=245, Invalid=1917, Unknown=0, NotChecked=0, Total=2162 [2018-11-28 11:28:24,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states. [2018-11-28 11:28:24,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 232. [2018-11-28 11:28:24,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-11-28 11:28:24,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 294 transitions. [2018-11-28 11:28:24,040 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 294 transitions. Word has length 70 [2018-11-28 11:28:24,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:28:24,040 INFO L480 AbstractCegarLoop]: Abstraction has 232 states and 294 transitions. [2018-11-28 11:28:24,040 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-28 11:28:24,040 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 294 transitions. [2018-11-28 11:28:24,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 11:28:24,041 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:28:24,041 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:28:24,041 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:28:24,041 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:28:24,042 INFO L82 PathProgramCache]: Analyzing trace with hash 734487730, now seen corresponding path program 1 times [2018-11-28 11:28:24,042 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:28:24,042 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 33 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:28:24,058 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:28:24,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:28:24,463 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:28:24,465 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:28:24,466 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,470 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,470 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:13 [2018-11-28 11:28:24,518 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:28:24,521 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:28:24,521 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,523 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,533 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,533 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-11-28 11:28:24,567 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-28 11:28:24,570 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,570 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-28 11:28:24,571 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,575 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,585 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,585 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:40, output treesize:36 [2018-11-28 11:28:24,629 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2018-11-28 11:28:24,631 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,631 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,632 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,632 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-28 11:28:24,633 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,640 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,651 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,651 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:49, output treesize:45 [2018-11-28 11:28:24,709 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:28:24,711 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,712 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,713 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,713 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,714 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,715 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,715 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 85 [2018-11-28 11:28:24,715 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,727 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,741 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,742 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:58, output treesize:54 [2018-11-28 11:28:24,831 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 39 [2018-11-28 11:28:24,834 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,835 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,835 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,836 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,837 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,837 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,838 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,838 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,839 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,840 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,840 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 126 [2018-11-28 11:28:24,841 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,858 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,874 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:24,874 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:67, output treesize:63 [2018-11-28 11:28:24,962 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 46 [2018-11-28 11:28:24,967 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,969 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,973 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,975 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,977 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,979 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,982 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,984 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,985 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,988 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,989 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,992 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,994 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,996 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,998 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:24,999 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 175 [2018-11-28 11:28:25,000 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:25,027 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:25,047 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:25,047 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:76, output treesize:72 [2018-11-28 11:28:25,164 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 53 [2018-11-28 11:28:25,169 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,171 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,173 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,175 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,177 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,179 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,182 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,184 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,185 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,187 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,189 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,191 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,193 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,195 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,197 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,199 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,202 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,204 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,207 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,209 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,211 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,212 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 232 [2018-11-28 11:28:25,212 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:25,246 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:25,267 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:25,268 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:85, output treesize:81 [2018-11-28 11:28:25,389 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 60 [2018-11-28 11:28:25,392 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,393 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,394 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,395 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,395 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,396 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,396 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,397 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,398 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,398 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,399 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,400 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,400 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,401 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,401 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,402 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,403 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,403 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,404 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,404 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,405 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,406 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,406 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,407 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,408 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,408 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,409 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,409 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,410 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 297 [2018-11-28 11:28:25,411 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:25,455 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:25,480 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:25,480 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:94, output treesize:90 [2018-11-28 11:28:25,618 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 67 [2018-11-28 11:28:25,626 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,629 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,632 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,634 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,636 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,640 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,642 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,645 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,648 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,651 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,653 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,657 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,660 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,662 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,665 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,667 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,671 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,674 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,677 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,680 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,683 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,685 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,688 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,691 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,693 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,696 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,698 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,701 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,704 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,707 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,710 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,713 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,716 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,719 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,722 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,725 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:25,725 INFO L303 Elim1Store]: Index analysis took 105 ms [2018-11-28 11:28:25,726 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 370 [2018-11-28 11:28:25,726 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:25,785 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:25,814 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:25,814 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:103, output treesize:99 [2018-11-28 11:28:25,984 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 72 [2018-11-28 11:28:25,997 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,000 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,004 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,008 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,011 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,018 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,023 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,027 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,032 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,039 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,043 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,049 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,056 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,060 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,065 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,070 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,074 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,078 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,081 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,085 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,089 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,091 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,095 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,099 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,103 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,107 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,111 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,115 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,119 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,123 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,127 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,131 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,133 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,137 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,139 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,143 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,147 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,150 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,154 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,158 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,162 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,165 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,168 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,172 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,176 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,176 INFO L303 Elim1Store]: Index analysis took 191 ms [2018-11-28 11:28:26,177 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 431 [2018-11-28 11:28:26,177 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:26,260 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:26,291 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:26,292 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:112, output treesize:101 [2018-11-28 11:28:26,636 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 56 [2018-11-28 11:28:26,639 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 3 [2018-11-28 11:28:26,640 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:26,643 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:26,649 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:26,649 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:89, output treesize:15 [2018-11-28 11:28:26,697 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:26,698 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-11-28 11:28:26,698 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:26,703 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:26,703 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:12 [2018-11-28 11:28:26,757 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 2 proven. 149 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:28:26,757 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:28:27,084 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:28:27,084 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:28:27,090 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:28:27,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:28:27,165 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:28:27,254 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:28:27,254 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:27,260 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:27,260 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:13 [2018-11-28 11:28:27,462 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:28:27,464 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:28:27,464 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:27,467 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:27,475 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:27,475 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-11-28 11:28:27,615 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-28 11:28:27,617 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:27,618 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-28 11:28:27,618 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:27,623 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:27,634 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:27,634 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:40, output treesize:36 [2018-11-28 11:28:27,781 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 8 [2018-11-28 11:28:27,781 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:27,815 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2018-11-28 11:28:27,817 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:27,818 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:27,818 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:27,819 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-28 11:28:27,819 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:27,826 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:27,841 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:27,841 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:66, output treesize:38 [2018-11-28 11:28:28,005 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:28:28,007 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,008 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,009 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,009 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,010 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,011 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,011 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 85 [2018-11-28 11:28:28,012 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:28,025 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:28,038 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:28,038 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-11-28 11:28:28,209 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 39 [2018-11-28 11:28:28,212 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,212 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,213 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,214 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,214 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,215 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,216 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,216 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,217 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,218 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,218 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 126 [2018-11-28 11:28:28,219 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:28,235 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:28,249 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:28,250 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-11-28 11:28:28,443 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 46 [2018-11-28 11:28:28,445 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,446 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,447 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,447 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,448 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,449 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,449 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,450 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,450 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,451 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,452 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,452 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,453 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,453 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,454 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,455 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 175 [2018-11-28 11:28:28,455 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:28,478 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:28,495 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:28,496 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:69, output treesize:65 [2018-11-28 11:28:28,715 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-11-28 11:28:28,717 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,718 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,719 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,719 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,720 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,721 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,721 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,722 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,723 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,723 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,724 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,725 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,725 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,726 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,727 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,727 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,728 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,728 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,729 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,730 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,730 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,731 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 218 [2018-11-28 11:28:28,731 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:28,763 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:28,782 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:28,782 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:73, output treesize:69 [2018-11-28 11:28:28,908 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 60 [2018-11-28 11:28:28,912 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,913 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,914 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,915 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,916 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,917 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,920 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,921 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,922 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,923 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,924 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,926 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,927 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,927 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,928 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,930 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,931 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,931 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,933 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,934 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,935 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:28,938 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 21 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 232 [2018-11-28 11:28:28,939 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:28,982 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:29,007 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:29,007 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:84, output treesize:80 [2018-11-28 11:28:29,148 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 60 [2018-11-28 11:28:29,152 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,153 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,154 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,155 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,155 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,156 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,158 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,159 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,159 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,160 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,161 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,162 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,163 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,164 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,164 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,166 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,167 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,167 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,169 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,170 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,171 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,174 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 21 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 232 [2018-11-28 11:28:29,174 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:29,216 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:29,241 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:29,241 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:84, output treesize:80 [2018-11-28 11:28:29,378 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 60 [2018-11-28 11:28:29,382 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,383 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,384 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,384 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,385 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,386 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,388 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,389 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,389 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,390 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,391 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,393 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,394 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,394 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,395 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,397 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,398 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,399 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,400 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,401 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,403 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,405 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 21 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 232 [2018-11-28 11:28:29,406 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:29,448 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:29,472 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:29,473 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:84, output treesize:80 [2018-11-28 11:28:29,901 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 41 [2018-11-28 11:28:29,903 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 21 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 3 [2018-11-28 11:28:29,903 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:29,904 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:29,909 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:29,909 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:66, output treesize:13 [2018-11-28 11:28:29,946 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:29,946 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-11-28 11:28:29,947 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:29,950 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:29,951 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:12 [2018-11-28 11:28:29,965 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 135 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-28 11:28:29,965 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:28:29,985 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-28 11:28:29,985 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:29,988 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:29,988 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:25, output treesize:12 [2018-11-28 11:28:30,348 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:28:30,348 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 25] total 52 [2018-11-28 11:28:30,348 INFO L459 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-11-28 11:28:30,348 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-11-28 11:28:30,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=254, Invalid=3644, Unknown=8, NotChecked=0, Total=3906 [2018-11-28 11:28:30,349 INFO L87 Difference]: Start difference. First operand 232 states and 294 transitions. Second operand 53 states. [2018-11-28 11:28:38,686 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 75 [2018-11-28 11:28:40,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:28:40,670 INFO L93 Difference]: Finished difference Result 269 states and 329 transitions. [2018-11-28 11:28:40,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-11-28 11:28:40,671 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 70 [2018-11-28 11:28:40,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:28:40,671 INFO L225 Difference]: With dead ends: 269 [2018-11-28 11:28:40,671 INFO L226 Difference]: Without dead ends: 269 [2018-11-28 11:28:40,673 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 212 GetRequests, 111 SyntacticMatches, 5 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2855 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=643, Invalid=8855, Unknown=8, NotChecked=0, Total=9506 [2018-11-28 11:28:40,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2018-11-28 11:28:40,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 235. [2018-11-28 11:28:40,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 235 states. [2018-11-28 11:28:40,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 299 transitions. [2018-11-28 11:28:40,676 INFO L78 Accepts]: Start accepts. Automaton has 235 states and 299 transitions. Word has length 70 [2018-11-28 11:28:40,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:28:40,677 INFO L480 AbstractCegarLoop]: Abstraction has 235 states and 299 transitions. [2018-11-28 11:28:40,677 INFO L481 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-11-28 11:28:40,677 INFO L276 IsEmpty]: Start isEmpty. Operand 235 states and 299 transitions. [2018-11-28 11:28:40,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 11:28:40,678 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:28:40,678 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:28:40,678 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:28:40,678 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:28:40,678 INFO L82 PathProgramCache]: Analyzing trace with hash 734487731, now seen corresponding path program 1 times [2018-11-28 11:28:40,678 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:28:40,679 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:28:40,703 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:28:40,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:28:40,895 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:28:40,912 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:28:40,912 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:40,920 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:40,920 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:28:41,044 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:28:41,044 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:28:43,819 WARN L180 SmtUtils]: Spent 2.09 s on a formula simplification that was a NOOP. DAG size: 58 [2018-11-28 11:28:43,838 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:28:43,838 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:28:43,845 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:28:43,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:28:43,913 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:28:43,916 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:28:43,916 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:43,934 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:43,934 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:28:43,943 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:28:43,944 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:28:44,299 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:28:44,299 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2018-11-28 11:28:44,299 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 11:28:44,299 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 11:28:44,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2018-11-28 11:28:44,300 INFO L87 Difference]: Start difference. First operand 235 states and 299 transitions. Second operand 11 states. [2018-11-28 11:28:45,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:28:45,032 INFO L93 Difference]: Finished difference Result 272 states and 329 transitions. [2018-11-28 11:28:45,033 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 11:28:45,033 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 70 [2018-11-28 11:28:45,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:28:45,034 INFO L225 Difference]: With dead ends: 272 [2018-11-28 11:28:45,034 INFO L226 Difference]: Without dead ends: 272 [2018-11-28 11:28:45,034 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 157 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=112, Invalid=644, Unknown=0, NotChecked=0, Total=756 [2018-11-28 11:28:45,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272 states. [2018-11-28 11:28:45,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272 to 240. [2018-11-28 11:28:45,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 240 states. [2018-11-28 11:28:45,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240 states to 240 states and 307 transitions. [2018-11-28 11:28:45,038 INFO L78 Accepts]: Start accepts. Automaton has 240 states and 307 transitions. Word has length 70 [2018-11-28 11:28:45,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:28:45,039 INFO L480 AbstractCegarLoop]: Abstraction has 240 states and 307 transitions. [2018-11-28 11:28:45,039 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 11:28:45,039 INFO L276 IsEmpty]: Start isEmpty. Operand 240 states and 307 transitions. [2018-11-28 11:28:45,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 11:28:45,040 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:28:45,040 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:28:45,040 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:28:45,040 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:28:45,040 INFO L82 PathProgramCache]: Analyzing trace with hash -1001527683, now seen corresponding path program 2 times [2018-11-28 11:28:45,041 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:28:45,041 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:28:45,063 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-28 11:28:45,234 ERROR L235 seRefinementStrategy]: Caught known exception: Array theory solver does not yet support write-chains connecting two different constant arrays [2018-11-28 11:28:45,234 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-28 11:28:45,234 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-28 11:28:45,241 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:28:45,283 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-28 11:28:45,283 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:28:45,288 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:28:45,328 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2018-11-28 11:28:45,328 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 11:28:45,344 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:28:45,344 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 11:28:45,344 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 11:28:45,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 11:28:45,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:28:45,344 INFO L87 Difference]: Start difference. First operand 240 states and 307 transitions. Second operand 5 states. [2018-11-28 11:28:45,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:28:45,361 INFO L93 Difference]: Finished difference Result 177 states and 201 transitions. [2018-11-28 11:28:45,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 11:28:45,361 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2018-11-28 11:28:45,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:28:45,362 INFO L225 Difference]: With dead ends: 177 [2018-11-28 11:28:45,362 INFO L226 Difference]: Without dead ends: 177 [2018-11-28 11:28:45,362 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:28:45,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-11-28 11:28:45,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 155. [2018-11-28 11:28:45,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-11-28 11:28:45,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 177 transitions. [2018-11-28 11:28:45,364 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 177 transitions. Word has length 70 [2018-11-28 11:28:45,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:28:45,364 INFO L480 AbstractCegarLoop]: Abstraction has 155 states and 177 transitions. [2018-11-28 11:28:45,364 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 11:28:45,364 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 177 transitions. [2018-11-28 11:28:45,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-28 11:28:45,365 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:28:45,365 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:28:45,365 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:28:45,365 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:28:45,365 INFO L82 PathProgramCache]: Analyzing trace with hash -1101385093, now seen corresponding path program 1 times [2018-11-28 11:28:45,365 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:28:45,365 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 39 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:28:45,379 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 11:28:45,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:28:45,532 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:28:45,551 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2018-11-28 11:28:45,552 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-28 11:28:45,554 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:28:45,554 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 11:28:45,554 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 11:28:45,555 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 11:28:45,555 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:28:45,555 INFO L87 Difference]: Start difference. First operand 155 states and 177 transitions. Second operand 5 states. [2018-11-28 11:28:45,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:28:45,594 INFO L93 Difference]: Finished difference Result 165 states and 184 transitions. [2018-11-28 11:28:45,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 11:28:45,595 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 71 [2018-11-28 11:28:45,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:28:45,596 INFO L225 Difference]: With dead ends: 165 [2018-11-28 11:28:45,596 INFO L226 Difference]: Without dead ends: 161 [2018-11-28 11:28:45,596 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 11:28:45,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-11-28 11:28:45,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 148. [2018-11-28 11:28:45,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-11-28 11:28:45,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 166 transitions. [2018-11-28 11:28:45,599 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 166 transitions. Word has length 71 [2018-11-28 11:28:45,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:28:45,599 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 166 transitions. [2018-11-28 11:28:45,599 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 11:28:45,599 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 166 transitions. [2018-11-28 11:28:45,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-28 11:28:45,600 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:28:45,600 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:28:45,600 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:28:45,601 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:28:45,601 INFO L82 PathProgramCache]: Analyzing trace with hash 1294283496, now seen corresponding path program 1 times [2018-11-28 11:28:45,601 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:28:45,601 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 40 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:28:45,620 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:28:45,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:28:45,857 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:28:45,923 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:28:45,928 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:28:45,928 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:45,930 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:45,938 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:45,938 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-11-28 11:28:45,976 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:28:45,979 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:45,979 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-11-28 11:28:45,979 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:45,984 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:45,992 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:45,992 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-11-28 11:28:46,036 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:28:46,039 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,039 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,040 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,041 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 58 [2018-11-28 11:28:46,041 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,048 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,072 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,072 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:40, output treesize:36 [2018-11-28 11:28:46,132 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2018-11-28 11:28:46,135 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,137 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,139 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,140 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,141 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,142 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,142 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 93 [2018-11-28 11:28:46,143 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,154 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,168 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,169 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:49, output treesize:45 [2018-11-28 11:28:46,244 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 41 [2018-11-28 11:28:46,247 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,248 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,248 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,249 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,250 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,250 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,251 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,252 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,252 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,253 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,254 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 136 [2018-11-28 11:28:46,254 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,271 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,289 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,289 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:58, output treesize:54 [2018-11-28 11:28:46,380 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 48 [2018-11-28 11:28:46,385 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,387 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,389 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,392 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,394 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,396 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,398 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,400 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,402 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,404 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,406 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,408 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,409 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,411 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,413 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,414 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 187 [2018-11-28 11:28:46,414 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,439 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,460 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,460 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:67, output treesize:63 [2018-11-28 11:28:46,571 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 55 [2018-11-28 11:28:46,577 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,579 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,582 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,584 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,586 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,587 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,590 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,592 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,594 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,596 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,598 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,599 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,602 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,604 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,606 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,609 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,612 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,615 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,617 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,619 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,621 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,622 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 246 [2018-11-28 11:28:46,622 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,660 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,684 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,684 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:76, output treesize:72 [2018-11-28 11:28:46,817 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 62 [2018-11-28 11:28:46,820 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,821 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,822 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,823 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,823 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,824 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,825 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,825 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,826 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,827 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,827 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,828 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,829 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,829 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,830 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,831 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,832 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,832 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,833 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,834 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,834 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,835 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,836 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,836 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,837 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,838 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,838 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,839 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:46,840 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 313 [2018-11-28 11:28:46,840 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,890 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,921 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:46,921 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:85, output treesize:81 [2018-11-28 11:28:47,134 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 67 [2018-11-28 11:28:47,144 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,149 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,153 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,158 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,162 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,165 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,169 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,173 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,177 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,181 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,185 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,190 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,194 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,197 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,200 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,204 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,207 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,210 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,214 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,217 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,221 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,225 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,229 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,232 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,234 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,238 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,242 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,244 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,247 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,249 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,252 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,256 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,259 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,262 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,265 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,269 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:47,269 INFO L303 Elim1Store]: Index analysis took 134 ms [2018-11-28 11:28:47,270 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 370 [2018-11-28 11:28:47,271 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:47,338 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:47,367 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:47,367 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:89, output treesize:85 [2018-11-28 11:28:47,946 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 51 [2018-11-28 11:28:47,948 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 36 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 3 [2018-11-28 11:28:47,948 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:47,949 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:47,950 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:47,951 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:71, output treesize:3 [2018-11-28 11:28:48,003 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 0 proven. 150 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:28:48,003 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:28:48,340 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:28:48,340 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:28:48,347 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:28:48,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:28:48,463 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:28:48,567 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:28:48,567 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:48,571 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:48,571 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:28:48,866 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:28:48,868 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:28:48,868 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:48,870 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:48,877 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:48,878 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-11-28 11:28:49,029 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 8 [2018-11-28 11:28:49,030 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,049 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:28:49,052 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,052 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-11-28 11:28:49,053 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,057 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,065 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,065 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:55, output treesize:27 [2018-11-28 11:28:49,070 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2018-11-28 11:28:49,073 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,074 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,075 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,076 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-28 11:28:49,076 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,084 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,093 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,093 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:35, output treesize:31 [2018-11-28 11:28:49,183 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2018-11-28 11:28:49,187 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,188 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,192 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,196 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 63 [2018-11-28 11:28:49,196 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,208 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,222 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:49,222 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:46, output treesize:42 [2018-11-28 11:28:49,343 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2018-11-28 11:28:49,348 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,350 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,354 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,361 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 63 [2018-11-28 11:28:49,361 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,373 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,388 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:49,388 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:46, output treesize:42 [2018-11-28 11:28:49,611 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2018-11-28 11:28:49,615 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,616 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,619 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,624 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 63 [2018-11-28 11:28:49,624 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,635 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,650 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:49,650 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:46, output treesize:42 [2018-11-28 11:28:49,826 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2018-11-28 11:28:49,830 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,832 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,835 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:49,839 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 63 [2018-11-28 11:28:49,839 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,850 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:49,865 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:49,865 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:46, output treesize:42 [2018-11-28 11:28:50,024 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2018-11-28 11:28:50,027 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:50,028 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:50,030 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:50,032 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 63 [2018-11-28 11:28:50,032 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:50,043 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:50,057 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:50,058 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:46, output treesize:42 [2018-11-28 11:28:50,229 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2018-11-28 11:28:50,233 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:50,235 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:50,238 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:50,242 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 63 [2018-11-28 11:28:50,242 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:50,261 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:50,278 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:28:50,278 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:46, output treesize:42 [2018-11-28 11:28:50,622 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 21 [2018-11-28 11:28:50,623 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 3 [2018-11-28 11:28:50,623 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:50,624 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:50,625 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:50,625 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:3 [2018-11-28 11:28:50,634 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 0 proven. 94 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2018-11-28 11:28:50,634 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:28:50,753 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:28:50,754 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 18] total 41 [2018-11-28 11:28:50,754 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-11-28 11:28:50,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-11-28 11:28:50,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=181, Invalid=1981, Unknown=0, NotChecked=0, Total=2162 [2018-11-28 11:28:50,755 INFO L87 Difference]: Start difference. First operand 148 states and 166 transitions. Second operand 42 states. [2018-11-28 11:28:57,433 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 81 [2018-11-28 11:28:58,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:28:58,236 INFO L93 Difference]: Finished difference Result 161 states and 175 transitions. [2018-11-28 11:28:58,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-11-28 11:28:58,237 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 71 [2018-11-28 11:28:58,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:28:58,237 INFO L225 Difference]: With dead ends: 161 [2018-11-28 11:28:58,237 INFO L226 Difference]: Without dead ends: 161 [2018-11-28 11:28:58,239 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 129 SyntacticMatches, 7 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2115 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=524, Invalid=6282, Unknown=0, NotChecked=0, Total=6806 [2018-11-28 11:28:58,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-11-28 11:28:58,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 149. [2018-11-28 11:28:58,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-11-28 11:28:58,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 167 transitions. [2018-11-28 11:28:58,242 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 167 transitions. Word has length 71 [2018-11-28 11:28:58,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:28:58,242 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 167 transitions. [2018-11-28 11:28:58,243 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-11-28 11:28:58,243 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 167 transitions. [2018-11-28 11:28:58,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-28 11:28:58,243 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:28:58,243 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:28:58,244 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:28:58,244 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:28:58,244 INFO L82 PathProgramCache]: Analyzing trace with hash 1468083122, now seen corresponding path program 1 times [2018-11-28 11:28:58,244 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:28:58,244 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 42 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:28:58,263 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:28:58,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:28:58,703 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:28:58,721 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:28:58,722 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:28:58,722 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:58,724 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:58,731 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:58,731 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-11-28 11:28:58,762 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-28 11:28:58,764 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:58,765 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-28 11:28:58,765 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:58,771 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:58,779 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:58,779 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-11-28 11:28:58,821 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2018-11-28 11:28:58,824 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:58,824 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:58,825 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:58,826 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-28 11:28:58,826 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:58,834 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:58,845 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:58,845 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:34 [2018-11-28 11:28:58,902 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-28 11:28:58,905 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:58,906 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:58,907 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:58,907 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:58,908 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:58,909 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:58,909 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 85 [2018-11-28 11:28:58,910 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:58,923 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:58,937 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:58,937 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:43 [2018-11-28 11:28:59,006 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 39 [2018-11-28 11:28:59,008 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,009 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,010 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,010 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,011 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,012 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,012 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,013 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,014 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,014 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,015 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 126 [2018-11-28 11:28:59,015 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,032 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,046 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,046 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:52 [2018-11-28 11:28:59,122 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 46 [2018-11-28 11:28:59,125 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,125 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,126 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,127 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,128 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,128 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,129 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,129 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,130 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,131 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,131 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,132 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,133 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,133 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,134 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,135 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 175 [2018-11-28 11:28:59,135 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,159 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,176 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,177 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:65, output treesize:61 [2018-11-28 11:28:59,269 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 53 [2018-11-28 11:28:59,273 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,273 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,274 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,275 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,275 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,276 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,277 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,277 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,278 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,279 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,279 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,280 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,281 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,281 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,282 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,283 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,283 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,284 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,285 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,286 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,286 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,287 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 232 [2018-11-28 11:28:59,288 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,323 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,345 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,346 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:74, output treesize:70 [2018-11-28 11:28:59,459 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 60 [2018-11-28 11:28:59,465 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,468 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,470 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,472 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,474 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,477 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,479 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,480 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,482 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,486 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,488 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,490 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,492 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,495 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,498 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,500 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,503 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,506 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,509 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,511 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,514 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,516 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,519 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,521 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,524 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,526 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,528 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,531 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,532 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 297 [2018-11-28 11:28:59,533 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,581 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,604 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,604 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:83, output treesize:79 [2018-11-28 11:28:59,736 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 67 [2018-11-28 11:28:59,758 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,761 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,765 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,768 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,770 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,773 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,777 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,780 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,784 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,788 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,792 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,795 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,799 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,802 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,805 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,807 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,811 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,812 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,815 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,819 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,822 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,825 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,828 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,830 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,833 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,836 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,838 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,842 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,844 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,847 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,850 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,854 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,856 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,858 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,861 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,864 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:28:59,864 INFO L303 Elim1Store]: Index analysis took 127 ms [2018-11-28 11:28:59,865 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 370 [2018-11-28 11:28:59,865 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,927 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,956 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:28:59,956 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:92, output treesize:88 [2018-11-28 11:29:00,112 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 72 [2018-11-28 11:29:00,115 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,116 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,117 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,118 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,118 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,119 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,120 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,121 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,121 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,122 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,123 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,124 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,124 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,125 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,126 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,127 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,128 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,128 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,129 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,130 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,131 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,131 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,132 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,133 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,134 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,134 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,135 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,136 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,137 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,138 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,138 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,139 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,140 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,141 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,141 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,142 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,143 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,144 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,144 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,145 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,146 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,147 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,148 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,149 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,150 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:00,151 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 431 [2018-11-28 11:29:00,152 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:00,236 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:00,263 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:00,263 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:96, output treesize:92 [2018-11-28 11:29:00,597 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 56 [2018-11-28 11:29:00,599 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 3 [2018-11-28 11:29:00,600 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:00,601 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:00,602 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:00,602 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:78, output treesize:3 [2018-11-28 11:29:00,648 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 151 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:29:00,648 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:00,951 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:29:00,951 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:29:00,960 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:29:01,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:29:01,058 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:01,142 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:29:01,143 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,147 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,147 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:29:01,411 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:29:01,413 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:29:01,413 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,415 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,423 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,423 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-11-28 11:29:01,576 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 5 [2018-11-28 11:29:01,576 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,596 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-28 11:29:01,600 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:01,601 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-28 11:29:01,601 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,607 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,615 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,615 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:45, output treesize:22 [2018-11-28 11:29:01,693 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:01,696 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:01,699 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:01,700 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,707 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,719 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:01,719 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:33 [2018-11-28 11:29:01,836 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:01,839 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:01,843 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:01,843 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,853 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,865 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:01,865 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:33 [2018-11-28 11:29:01,962 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:01,966 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:01,969 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:01,969 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,977 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:01,987 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:01,988 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:33 [2018-11-28 11:29:02,085 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:02,089 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:02,093 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:02,093 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:02,102 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:02,113 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:02,113 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:33 [2018-11-28 11:29:02,231 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:02,234 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:02,237 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:02,238 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:02,247 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:02,261 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:02,261 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:33 [2018-11-28 11:29:02,365 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:02,368 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:02,371 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:02,371 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:02,380 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:02,392 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:02,393 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:33 [2018-11-28 11:29:02,485 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:02,487 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:02,490 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:02,490 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:02,499 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:02,510 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:02,510 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:33 [2018-11-28 11:29:02,764 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-11-28 11:29:02,766 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 3 [2018-11-28 11:29:02,766 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:02,767 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:02,768 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:02,768 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:3 [2018-11-28 11:29:02,776 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-11-28 11:29:02,776 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:02,866 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:29:02,866 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 16] total 42 [2018-11-28 11:29:02,866 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-11-28 11:29:02,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-11-28 11:29:02,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=184, Invalid=2072, Unknown=0, NotChecked=0, Total=2256 [2018-11-28 11:29:02,866 INFO L87 Difference]: Start difference. First operand 149 states and 167 transitions. Second operand 43 states. [2018-11-28 11:29:09,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:29:09,422 INFO L93 Difference]: Finished difference Result 160 states and 174 transitions. [2018-11-28 11:29:09,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-11-28 11:29:09,423 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 72 [2018-11-28 11:29:09,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:29:09,423 INFO L225 Difference]: With dead ends: 160 [2018-11-28 11:29:09,424 INFO L226 Difference]: Without dead ends: 160 [2018-11-28 11:29:09,425 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 131 SyntacticMatches, 8 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2063 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=512, Invalid=6130, Unknown=0, NotChecked=0, Total=6642 [2018-11-28 11:29:09,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-11-28 11:29:09,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 150. [2018-11-28 11:29:09,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-11-28 11:29:09,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 168 transitions. [2018-11-28 11:29:09,428 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 168 transitions. Word has length 72 [2018-11-28 11:29:09,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:29:09,428 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 168 transitions. [2018-11-28 11:29:09,428 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-11-28 11:29:09,429 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 168 transitions. [2018-11-28 11:29:09,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-11-28 11:29:09,429 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:29:09,429 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:29:09,430 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:29:09,430 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:29:09,430 INFO L82 PathProgramCache]: Analyzing trace with hash -617810198, now seen corresponding path program 1 times [2018-11-28 11:29:09,430 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:29:09,430 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 44 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:29:09,456 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:29:09,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:29:09,642 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:09,655 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2018-11-28 11:29:09,655 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:09,701 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2018-11-28 11:29:09,704 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:29:09,704 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-11-28 11:29:09,704 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 11:29:09,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 11:29:09,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-11-28 11:29:09,704 INFO L87 Difference]: Start difference. First operand 150 states and 168 transitions. Second operand 10 states. [2018-11-28 11:29:09,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:29:09,831 INFO L93 Difference]: Finished difference Result 158 states and 176 transitions. [2018-11-28 11:29:09,831 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 11:29:09,831 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 73 [2018-11-28 11:29:09,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:29:09,832 INFO L225 Difference]: With dead ends: 158 [2018-11-28 11:29:09,832 INFO L226 Difference]: Without dead ends: 158 [2018-11-28 11:29:09,832 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 137 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2018-11-28 11:29:09,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-11-28 11:29:09,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 155. [2018-11-28 11:29:09,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-11-28 11:29:09,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 173 transitions. [2018-11-28 11:29:09,835 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 173 transitions. Word has length 73 [2018-11-28 11:29:09,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:29:09,835 INFO L480 AbstractCegarLoop]: Abstraction has 155 states and 173 transitions. [2018-11-28 11:29:09,835 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 11:29:09,835 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 173 transitions. [2018-11-28 11:29:09,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-11-28 11:29:09,836 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:29:09,836 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:29:09,836 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:29:09,836 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:29:09,836 INFO L82 PathProgramCache]: Analyzing trace with hash -968055921, now seen corresponding path program 2 times [2018-11-28 11:29:09,836 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:29:09,837 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:29:09,864 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-28 11:29:10,278 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-28 11:29:10,278 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:29:10,286 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:10,295 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:29:10,296 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:10,305 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:29:10,305 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:10,311 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:10,311 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 11:29:11,288 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-11-28 11:29:11,293 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:11,295 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:11,295 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:29:11,295 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:11,311 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:29:11,311 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:11,321 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:11,321 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:28, output treesize:12 [2018-11-28 11:29:11,361 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:11,363 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:29:11,363 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:11,378 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:11,379 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:11,379 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:29:11,379 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:11,389 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:11,389 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:28, output treesize:12 [2018-11-28 11:29:11,461 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:11,462 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:11,462 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-28 11:29:11,463 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:11,479 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:29:11,479 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:11,489 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:11,490 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:30, output treesize:12 [2018-11-28 11:29:11,519 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 3 proven. 19 refuted. 0 times theorem prover too weak. 157 trivial. 6 not checked. [2018-11-28 11:29:11,519 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:11,879 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:29:11,879 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:29:11,888 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:29:11,952 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-28 11:29:11,952 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:29:11,959 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:11,961 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:29:11,962 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:11,971 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:29:11,971 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:11,978 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:11,978 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-28 11:29:11,988 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:11,990 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:29:11,990 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:12,006 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:12,007 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:12,008 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:29:12,008 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:12,018 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:12,018 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:28, output treesize:12 [2018-11-28 11:29:12,025 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:12,026 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:12,026 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:29:12,027 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:12,043 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:29:12,043 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:12,054 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:12,054 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:28, output treesize:12 [2018-11-28 11:29:12,087 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:12,089 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:12,089 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:29:12,089 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:12,106 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:29:12,106 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:12,117 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:12,117 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:28, output treesize:12 [2018-11-28 11:29:12,127 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 3 proven. 19 refuted. 0 times theorem prover too weak. 157 trivial. 6 not checked. [2018-11-28 11:29:12,127 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:12,334 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:29:12,335 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 15 [2018-11-28 11:29:12,335 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-28 11:29:12,335 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-28 11:29:12,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=230, Unknown=1, NotChecked=30, Total=306 [2018-11-28 11:29:12,335 INFO L87 Difference]: Start difference. First operand 155 states and 173 transitions. Second operand 16 states. [2018-11-28 11:29:13,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:29:13,351 INFO L93 Difference]: Finished difference Result 187 states and 206 transitions. [2018-11-28 11:29:13,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-28 11:29:13,351 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 76 [2018-11-28 11:29:13,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:29:13,352 INFO L225 Difference]: With dead ends: 187 [2018-11-28 11:29:13,352 INFO L226 Difference]: Without dead ends: 187 [2018-11-28 11:29:13,352 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 139 SyntacticMatches, 3 SemanticMatches, 23 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=78, Invalid=477, Unknown=1, NotChecked=44, Total=600 [2018-11-28 11:29:13,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-11-28 11:29:13,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 155. [2018-11-28 11:29:13,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-11-28 11:29:13,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 172 transitions. [2018-11-28 11:29:13,355 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 172 transitions. Word has length 76 [2018-11-28 11:29:13,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:29:13,355 INFO L480 AbstractCegarLoop]: Abstraction has 155 states and 172 transitions. [2018-11-28 11:29:13,355 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-28 11:29:13,355 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 172 transitions. [2018-11-28 11:29:13,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-28 11:29:13,355 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:29:13,355 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:29:13,356 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:29:13,356 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:29:13,356 INFO L82 PathProgramCache]: Analyzing trace with hash 12721165, now seen corresponding path program 2 times [2018-11-28 11:29:13,356 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:29:13,356 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 47 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:29:13,375 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:29:13,557 ERROR L235 seRefinementStrategy]: Caught known exception: Array theory solver does not yet support write-chains connecting two different constant arrays [2018-11-28 11:29:13,557 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-28 11:29:13,557 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-28 11:29:13,565 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:29:13,673 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-28 11:29:13,673 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:29:13,679 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:13,690 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:29:13,690 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,696 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,696 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:13 [2018-11-28 11:29:13,755 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:29:13,756 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:29:13,756 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,758 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,767 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,768 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-11-28 11:29:13,813 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 5 [2018-11-28 11:29:13,814 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,831 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-28 11:29:13,834 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:13,834 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-28 11:29:13,834 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,839 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,846 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,846 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:49, output treesize:26 [2018-11-28 11:29:13,871 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:13,874 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:13,876 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:13,877 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,885 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,898 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:13,898 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:37 [2018-11-28 11:29:13,926 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:13,929 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:13,931 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:13,932 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,940 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,952 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:13,952 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:37 [2018-11-28 11:29:13,978 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:13,981 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:13,983 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:13,984 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:13,991 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,003 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:14,004 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:37 [2018-11-28 11:29:14,030 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:14,033 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:14,035 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:14,036 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,044 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,056 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:14,056 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:37 [2018-11-28 11:29:14,082 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:14,086 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:14,090 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:14,091 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,099 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,111 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:14,111 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:37 [2018-11-28 11:29:14,138 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:14,140 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:14,143 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:14,143 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,151 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,164 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:14,164 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:37 [2018-11-28 11:29:14,190 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-11-28 11:29:14,192 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:14,195 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-11-28 11:29:14,195 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,203 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,215 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:14,215 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:37 [2018-11-28 11:29:14,369 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-11-28 11:29:14,371 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 3 [2018-11-28 11:29:14,371 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,373 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,377 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,377 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:13 [2018-11-28 11:29:14,403 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:14,403 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-11-28 11:29:14,403 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,408 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,408 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:12 [2018-11-28 11:29:14,441 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 0 proven. 80 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-11-28 11:29:14,442 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:14,505 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-28 11:29:14,505 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,508 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:14,508 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:25, output treesize:12 [2018-11-28 11:29:14,794 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-11-28 11:29:14,794 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-11-28 11:29:14,794 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-28 11:29:14,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-28 11:29:14,795 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=536, Unknown=0, NotChecked=0, Total=600 [2018-11-28 11:29:14,795 INFO L87 Difference]: Start difference. First operand 155 states and 172 transitions. Second operand 18 states. [2018-11-28 11:29:16,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:29:16,509 INFO L93 Difference]: Finished difference Result 174 states and 188 transitions. [2018-11-28 11:29:16,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-28 11:29:16,510 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 75 [2018-11-28 11:29:16,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:29:16,510 INFO L225 Difference]: With dead ends: 174 [2018-11-28 11:29:16,510 INFO L226 Difference]: Without dead ends: 174 [2018-11-28 11:29:16,511 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 69 SyntacticMatches, 7 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 333 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=213, Invalid=1679, Unknown=0, NotChecked=0, Total=1892 [2018-11-28 11:29:16,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-11-28 11:29:16,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 158. [2018-11-28 11:29:16,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-11-28 11:29:16,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 177 transitions. [2018-11-28 11:29:16,514 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 177 transitions. Word has length 75 [2018-11-28 11:29:16,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:29:16,514 INFO L480 AbstractCegarLoop]: Abstraction has 158 states and 177 transitions. [2018-11-28 11:29:16,514 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-28 11:29:16,514 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 177 transitions. [2018-11-28 11:29:16,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-28 11:29:16,515 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:29:16,515 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:29:16,515 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:29:16,515 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:29:16,515 INFO L82 PathProgramCache]: Analyzing trace with hash 12721166, now seen corresponding path program 2 times [2018-11-28 11:29:16,516 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:29:16,516 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 49 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:29:16,535 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:29:16,744 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-28 11:29:16,744 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:29:16,748 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:16,762 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:29:16,762 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:16,768 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:16,768 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:29:16,900 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:29:16,901 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:17,879 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:29:17,880 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:29:17,888 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:29:17,936 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-28 11:29:17,936 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:29:17,943 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:17,946 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:29:17,946 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:17,951 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:17,951 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:29:17,962 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:29:17,962 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:18,332 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:29:18,332 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-11-28 11:29:18,332 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-28 11:29:18,332 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-28 11:29:18,333 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=399, Unknown=1, NotChecked=0, Total=462 [2018-11-28 11:29:18,333 INFO L87 Difference]: Start difference. First operand 158 states and 177 transitions. Second operand 12 states. [2018-11-28 11:29:19,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:29:19,143 INFO L93 Difference]: Finished difference Result 174 states and 188 transitions. [2018-11-28 11:29:19,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-28 11:29:19,144 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 75 [2018-11-28 11:29:19,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:29:19,145 INFO L225 Difference]: With dead ends: 174 [2018-11-28 11:29:19,145 INFO L226 Difference]: Without dead ends: 174 [2018-11-28 11:29:19,145 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 175 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=138, Invalid=791, Unknown=1, NotChecked=0, Total=930 [2018-11-28 11:29:19,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-11-28 11:29:19,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 158. [2018-11-28 11:29:19,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-11-28 11:29:19,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 176 transitions. [2018-11-28 11:29:19,148 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 176 transitions. Word has length 75 [2018-11-28 11:29:19,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:29:19,148 INFO L480 AbstractCegarLoop]: Abstraction has 158 states and 176 transitions. [2018-11-28 11:29:19,148 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-28 11:29:19,148 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 176 transitions. [2018-11-28 11:29:19,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-11-28 11:29:19,149 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:29:19,149 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:29:19,149 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:29:19,149 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:29:19,149 INFO L82 PathProgramCache]: Analyzing trace with hash -2001312128, now seen corresponding path program 1 times [2018-11-28 11:29:19,150 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:29:19,150 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 51 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:29:19,179 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 11:29:19,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:29:19,352 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:19,385 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2018-11-28 11:29:19,385 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:19,503 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2018-11-28 11:29:19,505 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:29:19,506 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2018-11-28 11:29:19,506 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 11:29:19,506 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 11:29:19,506 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-11-28 11:29:19,506 INFO L87 Difference]: Start difference. First operand 158 states and 176 transitions. Second operand 9 states. [2018-11-28 11:29:19,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:29:19,597 INFO L93 Difference]: Finished difference Result 175 states and 192 transitions. [2018-11-28 11:29:19,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 11:29:19,599 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 76 [2018-11-28 11:29:19,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:29:19,600 INFO L225 Difference]: With dead ends: 175 [2018-11-28 11:29:19,600 INFO L226 Difference]: Without dead ends: 171 [2018-11-28 11:29:19,600 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2018-11-28 11:29:19,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-11-28 11:29:19,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 159. [2018-11-28 11:29:19,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-11-28 11:29:19,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 180 transitions. [2018-11-28 11:29:19,603 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 180 transitions. Word has length 76 [2018-11-28 11:29:19,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:29:19,604 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 180 transitions. [2018-11-28 11:29:19,604 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 11:29:19,604 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 180 transitions. [2018-11-28 11:29:19,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-11-28 11:29:19,604 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:29:19,605 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:29:19,605 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:29:19,605 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:29:19,605 INFO L82 PathProgramCache]: Analyzing trace with hash 394356461, now seen corresponding path program 2 times [2018-11-28 11:29:19,605 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:29:19,606 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 52 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:29:19,637 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-28 11:29:19,845 ERROR L235 seRefinementStrategy]: Caught known exception: Array theory solver does not yet support write-chains connecting two different constant arrays [2018-11-28 11:29:19,845 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-28 11:29:19,845 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-28 11:29:19,855 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:29:19,987 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-28 11:29:19,987 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:29:19,994 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:20,000 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:29:20,001 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,007 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,007 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:29:20,074 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 11:29:20,076 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 11:29:20,076 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,078 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,086 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,086 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:36, output treesize:20 [2018-11-28 11:29:20,109 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:20,112 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:20,112 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,118 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,128 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:20,128 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:20,153 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:20,157 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:20,157 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,162 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,173 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:20,173 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:20,197 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:20,200 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:20,200 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,206 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,216 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:20,216 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:20,240 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:20,244 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:20,245 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,251 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,261 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:20,261 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:20,285 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:20,289 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:20,289 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,294 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,304 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:20,304 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:20,330 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:20,334 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:20,334 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,339 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,349 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:20,350 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:20,374 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:20,377 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:20,377 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,383 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,394 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:20,394 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:20,557 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 1 [2018-11-28 11:29:20,557 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,561 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-28 11:29:20,563 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-28 11:29:20,563 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,564 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,565 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:20,565 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:27, output treesize:3 [2018-11-28 11:29:20,592 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 1 proven. 82 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-11-28 11:29:20,592 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:21,202 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-11-28 11:29:21,202 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-11-28 11:29:21,203 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-28 11:29:21,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-28 11:29:21,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=494, Unknown=2, NotChecked=0, Total=552 [2018-11-28 11:29:21,203 INFO L87 Difference]: Start difference. First operand 159 states and 180 transitions. Second operand 18 states. [2018-11-28 11:29:22,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:29:22,868 INFO L93 Difference]: Finished difference Result 174 states and 191 transitions. [2018-11-28 11:29:22,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-28 11:29:22,868 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 76 [2018-11-28 11:29:22,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:29:22,869 INFO L225 Difference]: With dead ends: 174 [2018-11-28 11:29:22,869 INFO L226 Difference]: Without dead ends: 174 [2018-11-28 11:29:22,869 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 71 SyntacticMatches, 7 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 284 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=210, Invalid=1594, Unknown=2, NotChecked=0, Total=1806 [2018-11-28 11:29:22,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-11-28 11:29:22,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 160. [2018-11-28 11:29:22,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-11-28 11:29:22,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 181 transitions. [2018-11-28 11:29:22,873 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 181 transitions. Word has length 76 [2018-11-28 11:29:22,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:29:22,873 INFO L480 AbstractCegarLoop]: Abstraction has 160 states and 181 transitions. [2018-11-28 11:29:22,873 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-28 11:29:22,873 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 181 transitions. [2018-11-28 11:29:22,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-28 11:29:22,874 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:29:22,874 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:29:22,874 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:29:22,874 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:29:22,874 INFO L82 PathProgramCache]: Analyzing trace with hash -659851187, now seen corresponding path program 2 times [2018-11-28 11:29:22,875 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:29:22,875 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 54 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:29:22,903 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:29:23,143 ERROR L235 seRefinementStrategy]: Caught known exception: Array theory solver does not yet support write-chains connecting two different constant arrays [2018-11-28 11:29:23,144 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-28 11:29:23,144 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-28 11:29:23,152 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-28 11:29:23,259 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-28 11:29:23,259 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:29:23,271 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:23,280 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:29:23,280 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,287 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,287 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:29:23,379 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 11:29:23,380 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 11:29:23,381 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,383 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,392 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,392 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:36, output treesize:20 [2018-11-28 11:29:23,414 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:23,417 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:23,417 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,423 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,433 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:23,433 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:23,460 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:23,463 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:23,463 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,469 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,481 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:23,481 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:23,508 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:23,511 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:23,511 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,517 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,528 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:23,528 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:23,552 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:23,556 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:23,556 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,563 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,573 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:23,574 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:23,600 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:23,605 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:23,605 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,612 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,629 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:23,629 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:23,660 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:23,667 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:23,667 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,673 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,685 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:23,685 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:23,715 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:29:23,720 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:29:23,720 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,729 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,744 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:23,744 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-28 11:29:23,916 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 1 [2018-11-28 11:29:23,916 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,923 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-28 11:29:23,924 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-28 11:29:23,925 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,926 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,930 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:23,930 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:27, output treesize:3 [2018-11-28 11:29:23,957 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 1 proven. 84 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-11-28 11:29:23,957 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:24,605 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-11-28 11:29:24,605 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-11-28 11:29:24,606 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-28 11:29:24,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-28 11:29:24,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=494, Unknown=2, NotChecked=0, Total=552 [2018-11-28 11:29:24,606 INFO L87 Difference]: Start difference. First operand 160 states and 181 transitions. Second operand 18 states. [2018-11-28 11:29:26,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:29:26,099 INFO L93 Difference]: Finished difference Result 173 states and 190 transitions. [2018-11-28 11:29:26,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-28 11:29:26,100 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 77 [2018-11-28 11:29:26,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:29:26,100 INFO L225 Difference]: With dead ends: 173 [2018-11-28 11:29:26,100 INFO L226 Difference]: Without dead ends: 173 [2018-11-28 11:29:26,101 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 73 SyntacticMatches, 7 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=164, Invalid=1316, Unknown=2, NotChecked=0, Total=1482 [2018-11-28 11:29:26,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-11-28 11:29:26,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 161. [2018-11-28 11:29:26,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-11-28 11:29:26,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 182 transitions. [2018-11-28 11:29:26,104 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 182 transitions. Word has length 77 [2018-11-28 11:29:26,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:29:26,104 INFO L480 AbstractCegarLoop]: Abstraction has 161 states and 182 transitions. [2018-11-28 11:29:26,104 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-28 11:29:26,104 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 182 transitions. [2018-11-28 11:29:26,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-11-28 11:29:26,105 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:29:26,105 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:29:26,105 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:29:26,105 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:29:26,106 INFO L82 PathProgramCache]: Analyzing trace with hash 1018072148, now seen corresponding path program 1 times [2018-11-28 11:29:26,106 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:29:26,106 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 56 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:29:26,130 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 11:29:26,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:29:26,304 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:26,338 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2018-11-28 11:29:26,338 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:26,445 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2018-11-28 11:29:26,448 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:29:26,448 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 11 [2018-11-28 11:29:26,448 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 11:29:26,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 11:29:26,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2018-11-28 11:29:26,449 INFO L87 Difference]: Start difference. First operand 161 states and 182 transitions. Second operand 11 states. [2018-11-28 11:29:26,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:29:26,573 INFO L93 Difference]: Finished difference Result 187 states and 203 transitions. [2018-11-28 11:29:26,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 11:29:26,573 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 78 [2018-11-28 11:29:26,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:29:26,574 INFO L225 Difference]: With dead ends: 187 [2018-11-28 11:29:26,574 INFO L226 Difference]: Without dead ends: 183 [2018-11-28 11:29:26,574 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2018-11-28 11:29:26,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-11-28 11:29:26,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 166. [2018-11-28 11:29:26,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-11-28 11:29:26,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 190 transitions. [2018-11-28 11:29:26,577 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 190 transitions. Word has length 78 [2018-11-28 11:29:26,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:29:26,577 INFO L480 AbstractCegarLoop]: Abstraction has 166 states and 190 transitions. [2018-11-28 11:29:26,577 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 11:29:26,577 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 190 transitions. [2018-11-28 11:29:26,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-11-28 11:29:26,578 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:29:26,578 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:29:26,578 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:29:26,578 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:29:26,578 INFO L82 PathProgramCache]: Analyzing trace with hash 2039951880, now seen corresponding path program 1 times [2018-11-28 11:29:26,578 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:29:26,578 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 57 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:29:26,607 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:29:26,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:29:26,859 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:26,861 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:29:26,862 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:26,870 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:26,870 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:29:26,959 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:29:26,962 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:29:26,962 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:26,965 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:26,979 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:26,979 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:28 [2018-11-28 11:29:27,044 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-11-28 11:29:27,044 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:27,048 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-28 11:29:27,048 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:27,049 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:27,049 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:18, output treesize:3 [2018-11-28 11:29:27,081 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-11-28 11:29:27,085 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-28 11:29:27,085 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:27,091 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:27,098 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:27,098 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:11 [2018-11-28 11:29:27,128 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:27,134 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:29:27,134 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-11-28 11:29:27,144 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 11:29:27,145 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:28 [2018-11-28 11:29:27,181 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:27,182 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:27,183 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 15 [2018-11-28 11:29:27,183 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:27,193 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:27,193 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:42, output treesize:11 [2018-11-28 11:29:27,292 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2018-11-28 11:29:27,292 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:27,573 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-28 11:29:27,573 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:27,577 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:27,577 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:23, output treesize:6 [2018-11-28 11:29:27,790 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-11-28 11:29:27,791 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:27,800 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:27,800 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:44, output treesize:36 [2018-11-28 11:29:27,935 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-11-28 11:29:27,935 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:27,937 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:29:27,937 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:27,944 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-28 11:29:27,944 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:23, output treesize:26 [2018-11-28 11:29:28,126 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:29:28,126 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:29:28,136 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:29:28,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:29:28,200 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:28,201 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:29:28,202 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,208 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,208 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:29:28,227 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-28 11:29:28,231 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 11:29:28,231 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,236 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,260 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,260 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:28 [2018-11-28 11:29:28,264 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-11-28 11:29:28,265 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,271 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-28 11:29:28,271 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,272 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,272 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:18, output treesize:3 [2018-11-28 11:29:28,275 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-11-28 11:29:28,278 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-28 11:29:28,278 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,280 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,284 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,285 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:11 [2018-11-28 11:29:28,288 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:28,297 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 11:29:28,297 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-11-28 11:29:28,311 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 11:29:28,311 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:28 [2018-11-28 11:29:28,314 WARN L854 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#valid| |c_alloc_unsafe_17_#in~array.base|))) (or (and (= (_ bv1 1) .cse0) (exists ((|v_alloc_unsafe_17_#t~mem41.base_16| (_ BitVec 32))) (and (= (_ bv0 1) (select |c_old(#valid)| |v_alloc_unsafe_17_#t~mem41.base_16|)) (= (select |c_#valid| |v_alloc_unsafe_17_#t~mem41.base_16|) (_ bv0 1))))) (and (= (_ bv0 1) .cse0) (= (_ bv0 1) (select |c_old(#valid)| |c_alloc_unsafe_17_#in~array.base|))))) is different from true [2018-11-28 11:29:28,318 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:28,319 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:29:28,319 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 15 [2018-11-28 11:29:28,319 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,330 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:28,330 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:42, output treesize:11 [2018-11-28 11:29:28,369 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 147 trivial. 1 not checked. [2018-11-28 11:29:28,369 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:28,597 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-28 11:29:28,597 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,601 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,601 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:6 [2018-11-28 11:29:28,635 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-11-28 11:29:28,635 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:28,654 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:28,654 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:44, output treesize:36 [2018-11-28 11:29:32,734 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-11-28 11:29:32,734 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:32,736 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:29:32,736 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:32,742 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-28 11:29:32,742 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:23, output treesize:26 [2018-11-28 11:29:32,828 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:29:32,828 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-11-28 11:29:32,829 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-28 11:29:32,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-28 11:29:32,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=834, Unknown=8, NotChecked=58, Total=992 [2018-11-28 11:29:32,829 INFO L87 Difference]: Start difference. First operand 166 states and 190 transitions. Second operand 19 states. [2018-11-28 11:29:42,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:29:42,665 INFO L93 Difference]: Finished difference Result 183 states and 204 transitions. [2018-11-28 11:29:42,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-28 11:29:42,665 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 80 [2018-11-28 11:29:42,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:29:42,666 INFO L225 Difference]: With dead ends: 183 [2018-11-28 11:29:42,666 INFO L226 Difference]: Without dead ends: 183 [2018-11-28 11:29:42,667 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 225 GetRequests, 182 SyntacticMatches, 5 SemanticMatches, 38 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=158, Invalid=1320, Unknown=8, NotChecked=74, Total=1560 [2018-11-28 11:29:42,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-11-28 11:29:42,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 174. [2018-11-28 11:29:42,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-11-28 11:29:42,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 200 transitions. [2018-11-28 11:29:42,670 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 200 transitions. Word has length 80 [2018-11-28 11:29:42,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:29:42,670 INFO L480 AbstractCegarLoop]: Abstraction has 174 states and 200 transitions. [2018-11-28 11:29:42,670 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-28 11:29:42,670 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 200 transitions. [2018-11-28 11:29:42,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-11-28 11:29:42,671 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:29:42,671 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:29:42,671 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:29:42,671 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:29:42,671 INFO L82 PathProgramCache]: Analyzing trace with hash 2039951881, now seen corresponding path program 1 times [2018-11-28 11:29:42,671 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:29:42,672 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 59 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:29:42,697 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:29:42,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:29:42,937 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:43,069 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 148 trivial. 0 not checked. [2018-11-28 11:29:43,070 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:43,322 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2018-11-28 11:29:43,323 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:43,342 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 10 [2018-11-28 11:29:43,342 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:43,359 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-28 11:29:43,359 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:23 [2018-11-28 11:29:43,598 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 23 [2018-11-28 11:29:43,599 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-11-28 11:29:43,643 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-11-28 11:29:43,643 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:29, output treesize:54 [2018-11-28 11:29:43,867 WARN L180 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 24 [2018-11-28 11:29:43,872 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:29:43,872 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:29:43,881 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:29:43,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:29:43,932 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:44,004 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 148 trivial. 0 not checked. [2018-11-28 11:29:44,005 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:44,073 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2018-11-28 11:29:44,073 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:44,085 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:44,085 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:12 [2018-11-28 11:29:44,962 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 37 [2018-11-28 11:29:44,964 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-11-28 11:29:45,034 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 21 [2018-11-28 11:29:45,034 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:29:45,103 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: 4 dim-0 vars, and 3 xjuncts. [2018-11-28 11:29:45,103 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:63, output treesize:83 [2018-11-28 11:29:45,376 WARN L180 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 27 [2018-11-28 11:29:45,395 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:29:45,395 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-11-28 11:29:45,395 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-28 11:29:45,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-28 11:29:45,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=402, Unknown=0, NotChecked=0, Total=462 [2018-11-28 11:29:45,395 INFO L87 Difference]: Start difference. First operand 174 states and 200 transitions. Second operand 12 states. [2018-11-28 11:29:46,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:29:46,180 INFO L93 Difference]: Finished difference Result 201 states and 230 transitions. [2018-11-28 11:29:46,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-28 11:29:46,180 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 80 [2018-11-28 11:29:46,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:29:46,181 INFO L225 Difference]: With dead ends: 201 [2018-11-28 11:29:46,181 INFO L226 Difference]: Without dead ends: 201 [2018-11-28 11:29:46,181 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 223 GetRequests, 195 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=110, Invalid=646, Unknown=0, NotChecked=0, Total=756 [2018-11-28 11:29:46,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-11-28 11:29:46,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 190. [2018-11-28 11:29:46,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-11-28 11:29:46,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 225 transitions. [2018-11-28 11:29:46,184 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 225 transitions. Word has length 80 [2018-11-28 11:29:46,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:29:46,184 INFO L480 AbstractCegarLoop]: Abstraction has 190 states and 225 transitions. [2018-11-28 11:29:46,184 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-28 11:29:46,184 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 225 transitions. [2018-11-28 11:29:46,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-11-28 11:29:46,185 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:29:46,185 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:29:46,185 INFO L423 AbstractCegarLoop]: === Iteration 41 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:29:46,185 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:29:46,185 INFO L82 PathProgramCache]: Analyzing trace with hash -1186000814, now seen corresponding path program 1 times [2018-11-28 11:29:46,186 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:29:46,186 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 61 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:29:46,213 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:29:46,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:29:46,428 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:29:46,486 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 11:29:46,487 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 11:29:46,487 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:46,489 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:46,491 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:46,491 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-11-28 11:29:46,573 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-28 11:29:46,574 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-28 11:29:46,575 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:46,576 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:46,578 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:46,578 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:3 [2018-11-28 11:29:46,596 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 150 trivial. 0 not checked. [2018-11-28 11:29:46,596 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:29:46,752 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-28 11:29:46,754 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2018-11-28 11:29:46,754 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:29:46,757 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:29:46,765 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-28 11:29:46,766 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:14 [2018-11-28 11:29:46,900 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 154 trivial. 0 not checked. [2018-11-28 11:29:46,903 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:29:46,903 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 10] total 19 [2018-11-28 11:29:46,903 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-28 11:29:46,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-28 11:29:46,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=323, Unknown=0, NotChecked=0, Total=380 [2018-11-28 11:29:46,904 INFO L87 Difference]: Start difference. First operand 190 states and 225 transitions. Second operand 20 states. [2018-11-28 11:29:51,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:29:51,793 INFO L93 Difference]: Finished difference Result 217 states and 240 transitions. [2018-11-28 11:29:51,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-28 11:29:51,794 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 81 [2018-11-28 11:29:51,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:29:51,794 INFO L225 Difference]: With dead ends: 217 [2018-11-28 11:29:51,795 INFO L226 Difference]: Without dead ends: 217 [2018-11-28 11:29:51,795 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 143 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 150 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=130, Invalid=800, Unknown=0, NotChecked=0, Total=930 [2018-11-28 11:29:51,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-11-28 11:29:51,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 196. [2018-11-28 11:29:51,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-11-28 11:29:51,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 229 transitions. [2018-11-28 11:29:51,798 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 229 transitions. Word has length 81 [2018-11-28 11:29:51,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:29:51,798 INFO L480 AbstractCegarLoop]: Abstraction has 196 states and 229 transitions. [2018-11-28 11:29:51,798 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-28 11:29:51,798 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 229 transitions. [2018-11-28 11:29:51,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-11-28 11:29:51,799 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:29:51,799 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 4, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:29:51,799 INFO L423 AbstractCegarLoop]: === Iteration 42 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:29:51,799 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:29:51,800 INFO L82 PathProgramCache]: Analyzing trace with hash 439010706, now seen corresponding path program 3 times [2018-11-28 11:29:51,800 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:29:51,800 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 62 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:29:51,829 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-28 11:29:51,893 ERROR L235 seRefinementStrategy]: Caught known exception: Array theory solver does not yet support write-chains connecting two different constant arrays [2018-11-28 11:29:51,893 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-28 11:29:51,893 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-28 11:29:51,900 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-28 11:30:13,824 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-11-28 11:30:13,824 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:30:13,837 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:30:13,845 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:30:13,845 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:13,852 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:13,852 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:13 [2018-11-28 11:30:13,926 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 11:30:13,928 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 11:30:13,928 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:13,930 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:13,939 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:13,939 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:40, output treesize:24 [2018-11-28 11:30:13,963 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:30:13,966 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:30:13,967 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:13,973 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:13,984 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:30:13,984 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:39, output treesize:35 [2018-11-28 11:30:14,012 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:30:14,015 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:30:14,015 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,020 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,031 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:30:14,032 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:39, output treesize:35 [2018-11-28 11:30:14,057 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:30:14,060 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:30:14,060 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,066 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,078 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:30:14,078 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:39, output treesize:35 [2018-11-28 11:30:14,104 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:30:14,107 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:30:14,107 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,112 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,124 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:30:14,124 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:39, output treesize:35 [2018-11-28 11:30:14,150 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:30:14,154 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:30:14,154 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,160 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,172 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:30:14,172 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:39, output treesize:35 [2018-11-28 11:30:14,210 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:30:14,214 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:30:14,214 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,222 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,236 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:30:14,237 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:39, output treesize:35 [2018-11-28 11:30:14,274 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-11-28 11:30:14,277 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-28 11:30:14,277 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,284 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,301 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:30:14,302 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:39, output treesize:35 [2018-11-28 11:30:14,453 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 1 [2018-11-28 11:30:14,453 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,460 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-28 11:30:14,461 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-28 11:30:14,461 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,463 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,467 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,467 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:36, output treesize:13 [2018-11-28 11:30:14,491 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:30:14,491 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-11-28 11:30:14,491 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,496 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,496 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:12 [2018-11-28 11:30:14,529 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 1 proven. 92 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-11-28 11:30:14,529 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:30:14,612 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-28 11:30:14,612 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,628 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:14,628 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:44, output treesize:32 [2018-11-28 11:30:15,288 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-11-28 11:30:15,288 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2018-11-28 11:30:15,288 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-28 11:30:15,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-28 11:30:15,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=634, Unknown=2, NotChecked=0, Total=702 [2018-11-28 11:30:15,288 INFO L87 Difference]: Start difference. First operand 196 states and 229 transitions. Second operand 19 states. [2018-11-28 11:30:17,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:30:17,058 INFO L93 Difference]: Finished difference Result 215 states and 245 transitions. [2018-11-28 11:30:17,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-28 11:30:17,059 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 80 [2018-11-28 11:30:17,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:30:17,059 INFO L225 Difference]: With dead ends: 215 [2018-11-28 11:30:17,059 INFO L226 Difference]: Without dead ends: 215 [2018-11-28 11:30:17,059 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 76 SyntacticMatches, 7 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 291 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=200, Invalid=1690, Unknown=2, NotChecked=0, Total=1892 [2018-11-28 11:30:17,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2018-11-28 11:30:17,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 199. [2018-11-28 11:30:17,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-11-28 11:30:17,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 234 transitions. [2018-11-28 11:30:17,062 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 234 transitions. Word has length 80 [2018-11-28 11:30:17,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:30:17,062 INFO L480 AbstractCegarLoop]: Abstraction has 199 states and 234 transitions. [2018-11-28 11:30:17,062 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-28 11:30:17,062 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 234 transitions. [2018-11-28 11:30:17,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-11-28 11:30:17,063 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:30:17,063 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 4, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:30:17,063 INFO L423 AbstractCegarLoop]: === Iteration 43 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:30:17,063 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:30:17,063 INFO L82 PathProgramCache]: Analyzing trace with hash 439010707, now seen corresponding path program 3 times [2018-11-28 11:30:17,063 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:30:17,063 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 64 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:30:17,084 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-28 11:30:17,231 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-28 11:30:17,231 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:30:17,235 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:30:17,245 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:30:17,245 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:17,251 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:17,251 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:30:17,405 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 1 proven. 24 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:30:17,406 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:30:17,912 WARN L180 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 22 [2018-11-28 11:30:18,901 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:30:18,902 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/z3 Starting monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:30:18,911 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-28 11:30:18,963 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-28 11:30:18,963 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-28 11:30:18,967 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:30:18,969 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:30:18,969 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:30:18,978 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:30:18,978 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-28 11:30:19,014 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 1 proven. 24 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-28 11:30:19,015 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-28 11:30:20,841 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:30:20,841 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 12 [2018-11-28 11:30:20,842 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-28 11:30:20,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-28 11:30:20,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=605, Unknown=0, NotChecked=0, Total=702 [2018-11-28 11:30:20,842 INFO L87 Difference]: Start difference. First operand 199 states and 234 transitions. Second operand 13 states. [2018-11-28 11:30:21,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:30:21,744 INFO L93 Difference]: Finished difference Result 215 states and 245 transitions. [2018-11-28 11:30:21,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-28 11:30:21,745 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 80 [2018-11-28 11:30:21,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:30:21,746 INFO L225 Difference]: With dead ends: 215 [2018-11-28 11:30:21,746 INFO L226 Difference]: Without dead ends: 215 [2018-11-28 11:30:21,747 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 189 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=203, Invalid=1129, Unknown=0, NotChecked=0, Total=1332 [2018-11-28 11:30:21,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2018-11-28 11:30:21,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 199. [2018-11-28 11:30:21,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-11-28 11:30:21,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 233 transitions. [2018-11-28 11:30:21,750 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 233 transitions. Word has length 80 [2018-11-28 11:30:21,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:30:21,750 INFO L480 AbstractCegarLoop]: Abstraction has 199 states and 233 transitions. [2018-11-28 11:30:21,750 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-28 11:30:21,750 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 233 transitions. [2018-11-28 11:30:21,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-28 11:30:21,750 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:30:21,750 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:30:21,751 INFO L423 AbstractCegarLoop]: === Iteration 44 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, alloc_unsafe_17Err1REQUIRES_VIOLATION, alloc_unsafe_17Err2REQUIRES_VIOLATION, alloc_unsafe_17Err5ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err4ASSERT_VIOLATIONMEMORY_FREE, alloc_unsafe_17Err3REQUIRES_VIOLATION, alloc_unsafe_17Err0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, free_17Err2ASSERT_VIOLATIONMEMORY_FREE, free_17Err0REQUIRES_VIOLATION, free_17Err1REQUIRES_VIOLATION, free_17Err3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:30:21,751 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:30:21,751 INFO L82 PathProgramCache]: Analyzing trace with hash 1888680840, now seen corresponding path program 1 times [2018-11-28 11:30:21,751 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-28 11:30:21,751 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/cvc4 Starting monitored process 66 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-11-28 11:30:21,768 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 11:30:22,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 11:30:23,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 11:30:23,553 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 11:30:23,575 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 11:30:23,576 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 11:30:23,595 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 11:30:23 BoogieIcfgContainer [2018-11-28 11:30:23,595 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 11:30:23,595 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 11:30:23,595 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 11:30:23,595 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 11:30:23,595 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 11:27:05" (3/4) ... [2018-11-28 11:30:23,597 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-28 11:30:23,606 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 11:30:23,606 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 11:30:23,668 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_e2efd1d0-2daa-4d8d-8578-e36642063872/bin-2019/uautomizer/witness.graphml [2018-11-28 11:30:23,669 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 11:30:23,669 INFO L168 Benchmark]: Toolchain (without parser) took 199640.46 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 188.2 MB). Free memory was 943.4 MB in the beginning and 1.2 GB in the end (delta: -229.3 MB). Peak memory consumption was 345.8 MB. Max. memory is 11.5 GB. [2018-11-28 11:30:23,670 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 978.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 11:30:23,670 INFO L168 Benchmark]: CACSL2BoogieTranslator took 464.66 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.0 MB). Free memory was 943.4 MB in the beginning and 1.1 GB in the end (delta: -164.9 MB). Peak memory consumption was 37.8 MB. Max. memory is 11.5 GB. [2018-11-28 11:30:23,670 INFO L168 Benchmark]: Boogie Preprocessor took 59.32 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 11:30:23,670 INFO L168 Benchmark]: RCFGBuilder took 1039.59 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 989.2 MB in the end (delta: 119.0 MB). Peak memory consumption was 119.0 MB. Max. memory is 11.5 GB. [2018-11-28 11:30:23,671 INFO L168 Benchmark]: TraceAbstraction took 197999.33 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 53.5 MB). Free memory was 989.2 MB in the beginning and 792.6 MB in the end (delta: 196.6 MB). Peak memory consumption was 250.1 MB. Max. memory is 11.5 GB. [2018-11-28 11:30:23,671 INFO L168 Benchmark]: Witness Printer took 73.80 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: -6.3 MB). Free memory was 792.6 MB in the beginning and 1.2 GB in the end (delta: -380.1 MB). Peak memory consumption was 524.3 kB. Max. memory is 11.5 GB. [2018-11-28 11:30:23,672 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 978.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 464.66 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.0 MB). Free memory was 943.4 MB in the beginning and 1.1 GB in the end (delta: -164.9 MB). Peak memory consumption was 37.8 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 59.32 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 1039.59 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 989.2 MB in the end (delta: 119.0 MB). Peak memory consumption was 119.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 197999.33 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 53.5 MB). Free memory was 989.2 MB in the beginning and 792.6 MB in the end (delta: 196.6 MB). Peak memory consumption was 250.1 MB. Max. memory is 11.5 GB. * Witness Printer took 73.80 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: -6.3 MB). Free memory was 792.6 MB in the beginning and 1.2 GB in the end (delta: -380.1 MB). Peak memory consumption was 524.3 kB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1460]: free of unallocated memory possible free of unallocated memory possible We found a FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={1296962930:0}] [L1478] CALL entry_point() VAL [ldv_global_msg_list={1296962930:0}] [L1465] int i; [L1466] int len = 10; VAL [ldv_global_msg_list={1296962930:0}, len=10] [L1467] CALL, EXPR ldv_malloc(sizeof(struct A17*)*len) VAL [\old(size)=40, ldv_global_msg_list={1296962930:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=40, \result={-155845675:0}, ldv_global_msg_list={1296962930:0}, malloc(size)={-155845675:0}, size=40] [L1467] RET, EXPR ldv_malloc(sizeof(struct A17*)*len) VAL [ldv_global_msg_list={1296962930:0}, ldv_malloc(sizeof(struct A17*)*len)={-155845675:0}, len=10] [L1467] struct A17 **array = (struct A17 **)ldv_malloc(sizeof(struct A17*)*len); [L1468] COND FALSE !(!array) [L1469] i=0 VAL [array={-155845675:0}, i=0, ldv_global_msg_list={1296962930:0}, len=10] [L1469] COND TRUE i=0 VAL [\old(len)=10, array={-155845675:0}, array={-155845675:0}, i=1, j=0, ldv_global_msg_list={1296962930:0}, len=10, p={0:0}] [L1451] EXPR array[j] VAL [\old(len)=10, array={-155845675:0}, array={-155845675:0}, array[j]={223220794:0}, i=1, j=0, ldv_global_msg_list={1296962930:0}, len=10, p={0:0}] [L1451] free(array[j]) VAL [\old(len)=10, array={-155845675:0}, array={-155845675:0}, array[j]={223220794:0}, i=1, j=0, ldv_global_msg_list={1296962930:0}, len=10, p={0:0}] [L1451] free(array[j]) [L1450] j-- VAL [\old(len)=10, array={-155845675:0}, array={-155845675:0}, i=1, j=4294967295, ldv_global_msg_list={1296962930:0}, len=10, p={0:0}] [L1450] COND FALSE !(j>=0) VAL [\old(len)=10, array={-155845675:0}, array={-155845675:0}, i=1, j=4294967295, ldv_global_msg_list={1296962930:0}, len=10, p={0:0}] [L1454] return - -3; VAL [\old(len)=10, \result=3, array={-155845675:0}, array={-155845675:0}, i=1, j=4294967295, ldv_global_msg_list={1296962930:0}, len=10, p={0:0}] [L1472] RET alloc_unsafe_17(array, len) VAL [alloc_unsafe_17(array, len)=3, array={-155845675:0}, i=10, ldv_global_msg_list={1296962930:0}, len=10] [L1473] CALL free_17(array, len) VAL [\old(len)=10, array={-155845675:0}, ldv_global_msg_list={1296962930:0}] [L1458] int i; [L1459] i=0 VAL [\old(len)=10, array={-155845675:0}, array={-155845675:0}, i=0, ldv_global_msg_list={1296962930:0}, len=10] [L1459] COND TRUE i