./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test19_false-valid-free.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 0cd3be1d Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test19_false-valid-free.i -s /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 927b64548732fdfa523149393b95aeee194275ea ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(valid-free) --- Real Ultimate output --- This is Ultimate 0.1.23-0cd3be1 [2018-11-28 11:19:51,716 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 11:19:51,718 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 11:19:51,724 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 11:19:51,724 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 11:19:51,725 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 11:19:51,726 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 11:19:51,727 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 11:19:51,728 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 11:19:51,728 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 11:19:51,729 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 11:19:51,729 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 11:19:51,730 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 11:19:51,731 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 11:19:51,731 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 11:19:51,732 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 11:19:51,732 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 11:19:51,734 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 11:19:51,735 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 11:19:51,736 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 11:19:51,737 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 11:19:51,738 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 11:19:51,740 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 11:19:51,740 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 11:19:51,740 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 11:19:51,741 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 11:19:51,741 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 11:19:51,742 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 11:19:51,743 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 11:19:51,743 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 11:19:51,744 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 11:19:51,744 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 11:19:51,744 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 11:19:51,744 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 11:19:51,745 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 11:19:51,746 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 11:19:51,746 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-11-28 11:19:51,756 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 11:19:51,757 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 11:19:51,757 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 11:19:51,757 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 11:19:51,758 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 11:19:51,758 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 11:19:51,758 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 11:19:51,758 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 11:19:51,758 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 11:19:51,759 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-28 11:19:51,759 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 11:19:51,759 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 11:19:51,759 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 11:19:51,759 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-11-28 11:19:51,759 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-11-28 11:19:51,759 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-11-28 11:19:51,760 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 11:19:51,760 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 11:19:51,760 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 11:19:51,760 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 11:19:51,760 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 11:19:51,760 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 11:19:51,760 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 11:19:51,761 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 11:19:51,761 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 11:19:51,761 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 11:19:51,761 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-28 11:19:51,761 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 11:19:51,761 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 927b64548732fdfa523149393b95aeee194275ea [2018-11-28 11:19:51,785 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 11:19:51,794 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 11:19:51,797 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 11:19:51,798 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 11:19:51,798 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 11:19:51,799 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test19_false-valid-free.i [2018-11-28 11:19:51,837 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/data/50557e774/87c58e17a7b44cb8b3f21bcf60ceb7c6/FLAG9afea77ab [2018-11-28 11:19:52,283 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 11:19:52,284 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/sv-benchmarks/c/ldv-memsafety/memleaks_test19_false-valid-free.i [2018-11-28 11:19:52,292 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/data/50557e774/87c58e17a7b44cb8b3f21bcf60ceb7c6/FLAG9afea77ab [2018-11-28 11:19:52,301 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/data/50557e774/87c58e17a7b44cb8b3f21bcf60ceb7c6 [2018-11-28 11:19:52,303 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 11:19:52,304 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-11-28 11:19:52,305 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 11:19:52,305 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 11:19:52,308 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 11:19:52,308 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 11:19:52" (1/1) ... [2018-11-28 11:19:52,311 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@fee3476 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:19:52, skipping insertion in model container [2018-11-28 11:19:52,311 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 11:19:52" (1/1) ... [2018-11-28 11:19:52,317 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 11:19:52,348 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 11:19:52,649 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 11:19:52,665 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 11:19:52,701 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 11:19:52,743 INFO L195 MainTranslator]: Completed translation [2018-11-28 11:19:52,744 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:19:52 WrapperNode [2018-11-28 11:19:52,744 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 11:19:52,744 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 11:19:52,745 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 11:19:52,745 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 11:19:52,754 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:19:52" (1/1) ... [2018-11-28 11:19:52,754 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:19:52" (1/1) ... [2018-11-28 11:19:52,771 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:19:52" (1/1) ... [2018-11-28 11:19:52,771 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:19:52" (1/1) ... [2018-11-28 11:19:52,797 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:19:52" (1/1) ... [2018-11-28 11:19:52,801 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:19:52" (1/1) ... [2018-11-28 11:19:52,805 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:19:52" (1/1) ... [2018-11-28 11:19:52,813 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 11:19:52,813 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 11:19:52,813 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 11:19:52,813 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 11:19:52,814 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:19:52" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 11:19:52,849 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-28 11:19:52,850 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 11:19:52,850 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-11-28 11:19:52,850 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-11-28 11:19:52,850 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-11-28 11:19:52,850 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-11-28 11:19:52,850 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-11-28 11:19:52,850 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-11-28 11:19:52,850 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-11-28 11:19:52,850 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-11-28 11:19:52,851 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-11-28 11:19:52,851 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-11-28 11:19:52,851 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-11-28 11:19:52,851 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-11-28 11:19:52,851 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-11-28 11:19:52,851 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-11-28 11:19:52,851 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-11-28 11:19:52,851 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-11-28 11:19:52,852 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-11-28 11:19:52,852 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-11-28 11:19:52,852 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-11-28 11:19:52,852 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-11-28 11:19:52,852 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-11-28 11:19:52,852 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-11-28 11:19:52,852 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-11-28 11:19:52,852 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-11-28 11:19:52,852 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-11-28 11:19:52,852 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-11-28 11:19:52,852 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-11-28 11:19:52,852 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-11-28 11:19:52,853 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-11-28 11:19:52,853 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-11-28 11:19:52,853 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-11-28 11:19:52,853 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-11-28 11:19:52,853 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-11-28 11:19:52,853 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-11-28 11:19:52,853 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-11-28 11:19:52,853 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-11-28 11:19:52,853 INFO L138 BoogieDeclarations]: Found implementation of procedure f19 [2018-11-28 11:19:52,854 INFO L138 BoogieDeclarations]: Found implementation of procedure f19_undo [2018-11-28 11:19:52,854 INFO L138 BoogieDeclarations]: Found implementation of procedure g19 [2018-11-28 11:19:52,854 INFO L138 BoogieDeclarations]: Found implementation of procedure probe_unsafe_19 [2018-11-28 11:19:52,854 INFO L138 BoogieDeclarations]: Found implementation of procedure disconnect_19 [2018-11-28 11:19:52,854 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-11-28 11:19:52,854 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-28 11:19:52,854 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-11-28 11:19:52,854 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-11-28 11:19:52,854 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-11-28 11:19:52,855 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-11-28 11:19:52,855 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-11-28 11:19:52,855 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-11-28 11:19:52,855 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-11-28 11:19:52,855 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-11-28 11:19:52,855 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-11-28 11:19:52,855 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-11-28 11:19:52,855 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-11-28 11:19:52,856 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-11-28 11:19:52,856 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-11-28 11:19:52,856 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-11-28 11:19:52,856 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-11-28 11:19:52,856 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-11-28 11:19:52,856 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-11-28 11:19:52,856 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-11-28 11:19:52,856 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-11-28 11:19:52,856 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-11-28 11:19:52,856 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-11-28 11:19:52,857 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-11-28 11:19:52,857 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-11-28 11:19:52,857 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-11-28 11:19:52,857 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-11-28 11:19:52,857 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-11-28 11:19:52,857 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-11-28 11:19:52,857 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-11-28 11:19:52,857 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-11-28 11:19:52,857 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-11-28 11:19:52,858 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-11-28 11:19:52,858 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-11-28 11:19:52,858 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-11-28 11:19:52,858 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-11-28 11:19:52,858 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-11-28 11:19:52,858 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-11-28 11:19:52,858 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-11-28 11:19:52,858 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-11-28 11:19:52,858 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-11-28 11:19:52,859 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-11-28 11:19:52,859 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-11-28 11:19:52,859 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-11-28 11:19:52,859 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-11-28 11:19:52,859 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-11-28 11:19:52,859 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-11-28 11:19:52,859 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-11-28 11:19:52,859 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-11-28 11:19:52,859 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-11-28 11:19:52,859 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-11-28 11:19:52,860 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-11-28 11:19:52,860 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-11-28 11:19:52,860 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-11-28 11:19:52,860 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-11-28 11:19:52,860 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-11-28 11:19:52,860 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-11-28 11:19:52,860 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-11-28 11:19:52,860 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-11-28 11:19:52,860 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-11-28 11:19:52,860 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-11-28 11:19:52,861 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-11-28 11:19:52,861 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-11-28 11:19:52,861 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-11-28 11:19:52,861 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-11-28 11:19:52,861 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-11-28 11:19:52,861 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-11-28 11:19:52,861 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-11-28 11:19:52,861 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-11-28 11:19:52,861 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-11-28 11:19:52,861 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-11-28 11:19:52,862 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-11-28 11:19:52,862 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-11-28 11:19:52,862 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-11-28 11:19:52,862 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-11-28 11:19:52,862 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-11-28 11:19:52,862 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-11-28 11:19:52,862 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-11-28 11:19:52,862 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-11-28 11:19:52,862 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-11-28 11:19:52,863 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-11-28 11:19:52,863 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-11-28 11:19:52,863 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-11-28 11:19:52,863 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-11-28 11:19:52,863 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-11-28 11:19:52,863 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-11-28 11:19:52,863 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-11-28 11:19:52,863 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-11-28 11:19:52,863 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-11-28 11:19:52,863 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-11-28 11:19:52,863 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-11-28 11:19:52,864 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-11-28 11:19:52,864 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-11-28 11:19:52,864 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-11-28 11:19:52,864 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-11-28 11:19:52,864 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-11-28 11:19:52,864 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-11-28 11:19:52,864 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-11-28 11:19:52,864 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-11-28 11:19:52,864 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-11-28 11:19:52,864 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-11-28 11:19:52,865 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-11-28 11:19:52,865 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-11-28 11:19:52,865 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-11-28 11:19:52,865 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-11-28 11:19:52,865 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-11-28 11:19:52,865 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-11-28 11:19:52,865 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-28 11:19:52,865 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-28 11:19:52,865 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-11-28 11:19:52,865 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-11-28 11:19:52,866 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-11-28 11:19:52,866 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-11-28 11:19:52,866 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-11-28 11:19:52,866 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-11-28 11:19:52,866 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 11:19:52,866 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-11-28 11:19:52,866 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-11-28 11:19:52,866 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-11-28 11:19:52,866 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-28 11:19:52,866 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-11-28 11:19:52,867 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-11-28 11:19:52,867 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-11-28 11:19:52,867 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-28 11:19:52,867 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-11-28 11:19:52,867 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-11-28 11:19:52,867 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-11-28 11:19:52,867 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-11-28 11:19:52,867 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-11-28 11:19:52,867 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-11-28 11:19:52,868 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 11:19:52,868 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-11-28 11:19:52,868 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-11-28 11:19:52,868 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-11-28 11:19:52,868 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-11-28 11:19:52,868 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-11-28 11:19:52,868 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-28 11:19:52,868 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-28 11:19:52,868 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-11-28 11:19:52,868 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-11-28 11:19:52,869 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-11-28 11:19:52,869 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-11-28 11:19:52,869 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-11-28 11:19:52,869 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-11-28 11:19:52,869 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-11-28 11:19:52,869 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-11-28 11:19:52,869 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-11-28 11:19:52,869 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-11-28 11:19:52,869 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-11-28 11:19:52,869 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-11-28 11:19:52,870 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-11-28 11:19:52,870 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-11-28 11:19:52,870 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-11-28 11:19:52,870 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-11-28 11:19:52,870 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-11-28 11:19:52,870 INFO L130 BoogieDeclarations]: Found specification of procedure f19 [2018-11-28 11:19:52,870 INFO L130 BoogieDeclarations]: Found specification of procedure f19_undo [2018-11-28 11:19:52,870 INFO L130 BoogieDeclarations]: Found specification of procedure g19 [2018-11-28 11:19:52,870 INFO L130 BoogieDeclarations]: Found specification of procedure probe_unsafe_19 [2018-11-28 11:19:52,870 INFO L130 BoogieDeclarations]: Found specification of procedure disconnect_19 [2018-11-28 11:19:52,871 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-11-28 11:19:52,871 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-28 11:19:52,871 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-28 11:19:52,871 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-11-28 11:19:52,871 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 11:19:52,871 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-11-28 11:19:52,871 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-11-28 11:19:52,871 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-11-28 11:19:52,871 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2018-11-28 11:19:53,243 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-28 11:19:53,495 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-28 11:19:53,641 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 11:19:53,641 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-11-28 11:19:53,641 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 11:19:53 BoogieIcfgContainer [2018-11-28 11:19:53,642 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 11:19:53,642 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 11:19:53,642 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 11:19:53,648 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 11:19:53,648 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 11:19:52" (1/3) ... [2018-11-28 11:19:53,649 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@33f715c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 11:19:53, skipping insertion in model container [2018-11-28 11:19:53,649 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:19:52" (2/3) ... [2018-11-28 11:19:53,649 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@33f715c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 11:19:53, skipping insertion in model container [2018-11-28 11:19:53,650 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 11:19:53" (3/3) ... [2018-11-28 11:19:53,651 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test19_false-valid-free.i [2018-11-28 11:19:53,658 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 11:19:53,664 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 87 error locations. [2018-11-28 11:19:53,674 INFO L257 AbstractCegarLoop]: Starting to check reachability of 87 error locations. [2018-11-28 11:19:53,690 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 11:19:53,690 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 11:19:53,691 INFO L383 AbstractCegarLoop]: Hoare is false [2018-11-28 11:19:53,691 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 11:19:53,691 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 11:19:53,691 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 11:19:53,691 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 11:19:53,691 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 11:19:53,691 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 11:19:53,705 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states. [2018-11-28 11:19:53,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-11-28 11:19:53,711 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:19:53,712 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:19:53,713 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:19:53,717 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:19:53,718 INFO L82 PathProgramCache]: Analyzing trace with hash -2073205213, now seen corresponding path program 1 times [2018-11-28 11:19:53,719 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:19:53,719 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:19:53,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:53,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:53,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:53,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:53,980 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:19:53,982 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:19:53,982 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 11:19:53,984 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 11:19:53,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 11:19:53,993 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-28 11:19:53,994 INFO L87 Difference]: Start difference. First operand 156 states. Second operand 7 states. [2018-11-28 11:19:54,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:19:54,362 INFO L93 Difference]: Finished difference Result 149 states and 173 transitions. [2018-11-28 11:19:54,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 11:19:54,364 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 15 [2018-11-28 11:19:54,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:19:54,373 INFO L225 Difference]: With dead ends: 149 [2018-11-28 11:19:54,373 INFO L226 Difference]: Without dead ends: 146 [2018-11-28 11:19:54,375 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-11-28 11:19:54,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-11-28 11:19:54,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 82. [2018-11-28 11:19:54,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-11-28 11:19:54,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 90 transitions. [2018-11-28 11:19:54,411 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 90 transitions. Word has length 15 [2018-11-28 11:19:54,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:19:54,412 INFO L480 AbstractCegarLoop]: Abstraction has 82 states and 90 transitions. [2018-11-28 11:19:54,412 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 11:19:54,412 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 90 transitions. [2018-11-28 11:19:54,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-11-28 11:19:54,413 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:19:54,413 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:19:54,414 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:19:54,414 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:19:54,414 INFO L82 PathProgramCache]: Analyzing trace with hash -2073205212, now seen corresponding path program 1 times [2018-11-28 11:19:54,415 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:19:54,415 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:19:54,417 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:54,417 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:54,417 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:54,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:54,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:19:54,548 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:19:54,548 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 11:19:54,549 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 11:19:54,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 11:19:54,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:19:54,550 INFO L87 Difference]: Start difference. First operand 82 states and 90 transitions. Second operand 8 states. [2018-11-28 11:19:54,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:19:54,918 INFO L93 Difference]: Finished difference Result 145 states and 170 transitions. [2018-11-28 11:19:54,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 11:19:54,918 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 15 [2018-11-28 11:19:54,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:19:54,919 INFO L225 Difference]: With dead ends: 145 [2018-11-28 11:19:54,919 INFO L226 Difference]: Without dead ends: 145 [2018-11-28 11:19:54,920 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2018-11-28 11:19:54,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-11-28 11:19:54,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 79. [2018-11-28 11:19:54,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-11-28 11:19:54,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 86 transitions. [2018-11-28 11:19:54,926 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 86 transitions. Word has length 15 [2018-11-28 11:19:54,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:19:54,927 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 86 transitions. [2018-11-28 11:19:54,927 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 11:19:54,927 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 86 transitions. [2018-11-28 11:19:54,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-28 11:19:54,928 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:19:54,928 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:19:54,928 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:19:54,929 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:19:54,929 INFO L82 PathProgramCache]: Analyzing trace with hash -413123169, now seen corresponding path program 1 times [2018-11-28 11:19:54,929 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:19:54,929 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:19:54,930 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:54,930 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:54,930 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:54,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:55,039 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:19:55,039 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:19:55,039 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 11:19:55,040 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 11:19:55,040 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 11:19:55,040 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-28 11:19:55,040 INFO L87 Difference]: Start difference. First operand 79 states and 86 transitions. Second operand 7 states. [2018-11-28 11:19:55,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:19:55,241 INFO L93 Difference]: Finished difference Result 126 states and 148 transitions. [2018-11-28 11:19:55,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 11:19:55,242 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2018-11-28 11:19:55,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:19:55,243 INFO L225 Difference]: With dead ends: 126 [2018-11-28 11:19:55,243 INFO L226 Difference]: Without dead ends: 126 [2018-11-28 11:19:55,243 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-11-28 11:19:55,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-11-28 11:19:55,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 77. [2018-11-28 11:19:55,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-11-28 11:19:55,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 84 transitions. [2018-11-28 11:19:55,250 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 84 transitions. Word has length 26 [2018-11-28 11:19:55,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:19:55,250 INFO L480 AbstractCegarLoop]: Abstraction has 77 states and 84 transitions. [2018-11-28 11:19:55,251 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 11:19:55,251 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 84 transitions. [2018-11-28 11:19:55,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-28 11:19:55,251 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:19:55,251 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:19:55,252 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:19:55,252 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:19:55,252 INFO L82 PathProgramCache]: Analyzing trace with hash -413123168, now seen corresponding path program 1 times [2018-11-28 11:19:55,252 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:19:55,252 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:19:55,254 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:55,254 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:55,254 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:55,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:55,379 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:19:55,379 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:19:55,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-28 11:19:55,379 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 11:19:55,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 11:19:55,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-11-28 11:19:55,380 INFO L87 Difference]: Start difference. First operand 77 states and 84 transitions. Second operand 11 states. [2018-11-28 11:19:55,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:19:55,833 INFO L93 Difference]: Finished difference Result 136 states and 161 transitions. [2018-11-28 11:19:55,833 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-28 11:19:55,834 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 26 [2018-11-28 11:19:55,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:19:55,835 INFO L225 Difference]: With dead ends: 136 [2018-11-28 11:19:55,835 INFO L226 Difference]: Without dead ends: 136 [2018-11-28 11:19:55,835 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 73 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=103, Invalid=403, Unknown=0, NotChecked=0, Total=506 [2018-11-28 11:19:55,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-11-28 11:19:55,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 75. [2018-11-28 11:19:55,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-11-28 11:19:55,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 82 transitions. [2018-11-28 11:19:55,841 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 82 transitions. Word has length 26 [2018-11-28 11:19:55,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:19:55,841 INFO L480 AbstractCegarLoop]: Abstraction has 75 states and 82 transitions. [2018-11-28 11:19:55,841 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 11:19:55,841 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 82 transitions. [2018-11-28 11:19:55,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-28 11:19:55,842 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:19:55,842 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:19:55,842 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:19:55,843 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:19:55,843 INFO L82 PathProgramCache]: Analyzing trace with hash 951306512, now seen corresponding path program 1 times [2018-11-28 11:19:55,843 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:19:55,843 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:19:55,844 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:55,844 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:55,844 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:55,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:55,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:19:55,892 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:19:55,892 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 11:19:55,892 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 11:19:55,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 11:19:55,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 11:19:55,892 INFO L87 Difference]: Start difference. First operand 75 states and 82 transitions. Second operand 6 states. [2018-11-28 11:19:55,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:19:55,919 INFO L93 Difference]: Finished difference Result 82 states and 91 transitions. [2018-11-28 11:19:55,919 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 11:19:55,920 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-11-28 11:19:55,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:19:55,920 INFO L225 Difference]: With dead ends: 82 [2018-11-28 11:19:55,920 INFO L226 Difference]: Without dead ends: 82 [2018-11-28 11:19:55,920 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:19:55,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-11-28 11:19:55,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 81. [2018-11-28 11:19:55,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-11-28 11:19:55,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 89 transitions. [2018-11-28 11:19:55,924 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 89 transitions. Word has length 26 [2018-11-28 11:19:55,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:19:55,924 INFO L480 AbstractCegarLoop]: Abstraction has 81 states and 89 transitions. [2018-11-28 11:19:55,924 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 11:19:55,924 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 89 transitions. [2018-11-28 11:19:55,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-28 11:19:55,925 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:19:55,925 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:19:55,925 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:19:55,925 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:19:55,925 INFO L82 PathProgramCache]: Analyzing trace with hash -1836108975, now seen corresponding path program 1 times [2018-11-28 11:19:55,925 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:19:55,926 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:19:55,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:55,927 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:55,927 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:55,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:55,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:19:55,985 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:19:55,985 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 11:19:55,985 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 11:19:55,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 11:19:55,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:19:55,986 INFO L87 Difference]: Start difference. First operand 81 states and 89 transitions. Second operand 8 states. [2018-11-28 11:19:56,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:19:56,091 INFO L93 Difference]: Finished difference Result 95 states and 105 transitions. [2018-11-28 11:19:56,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 11:19:56,091 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-11-28 11:19:56,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:19:56,092 INFO L225 Difference]: With dead ends: 95 [2018-11-28 11:19:56,092 INFO L226 Difference]: Without dead ends: 95 [2018-11-28 11:19:56,092 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-28 11:19:56,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-11-28 11:19:56,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 89. [2018-11-28 11:19:56,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-11-28 11:19:56,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 100 transitions. [2018-11-28 11:19:56,097 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 100 transitions. Word has length 26 [2018-11-28 11:19:56,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:19:56,097 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 100 transitions. [2018-11-28 11:19:56,097 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 11:19:56,098 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 100 transitions. [2018-11-28 11:19:56,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-28 11:19:56,098 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:19:56,098 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:19:56,099 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:19:56,099 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:19:56,099 INFO L82 PathProgramCache]: Analyzing trace with hash -1836108974, now seen corresponding path program 1 times [2018-11-28 11:19:56,099 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:19:56,099 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:19:56,100 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:56,100 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:56,101 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:56,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:56,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:19:56,158 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:19:56,158 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 11:19:56,158 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 11:19:56,158 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 11:19:56,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 11:19:56,158 INFO L87 Difference]: Start difference. First operand 89 states and 100 transitions. Second operand 6 states. [2018-11-28 11:19:56,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:19:56,178 INFO L93 Difference]: Finished difference Result 89 states and 97 transitions. [2018-11-28 11:19:56,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 11:19:56,179 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-11-28 11:19:56,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:19:56,179 INFO L225 Difference]: With dead ends: 89 [2018-11-28 11:19:56,180 INFO L226 Difference]: Without dead ends: 89 [2018-11-28 11:19:56,180 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-28 11:19:56,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-11-28 11:19:56,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 86. [2018-11-28 11:19:56,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-11-28 11:19:56,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 94 transitions. [2018-11-28 11:19:56,184 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 94 transitions. Word has length 26 [2018-11-28 11:19:56,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:19:56,184 INFO L480 AbstractCegarLoop]: Abstraction has 86 states and 94 transitions. [2018-11-28 11:19:56,184 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 11:19:56,184 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 94 transitions. [2018-11-28 11:19:56,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-28 11:19:56,185 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:19:56,185 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:19:56,185 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:19:56,185 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:19:56,186 INFO L82 PathProgramCache]: Analyzing trace with hash -1084190059, now seen corresponding path program 1 times [2018-11-28 11:19:56,186 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:19:56,186 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:19:56,191 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:56,191 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:56,191 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:56,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:56,249 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:19:56,250 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:19:56,250 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 11:19:56,250 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 11:19:56,250 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 11:19:56,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 11:19:56,250 INFO L87 Difference]: Start difference. First operand 86 states and 94 transitions. Second operand 4 states. [2018-11-28 11:19:56,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:19:56,341 INFO L93 Difference]: Finished difference Result 113 states and 129 transitions. [2018-11-28 11:19:56,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 11:19:56,342 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-11-28 11:19:56,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:19:56,343 INFO L225 Difference]: With dead ends: 113 [2018-11-28 11:19:56,343 INFO L226 Difference]: Without dead ends: 104 [2018-11-28 11:19:56,343 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 11:19:56,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-11-28 11:19:56,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 97. [2018-11-28 11:19:56,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-11-28 11:19:56,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 110 transitions. [2018-11-28 11:19:56,354 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 110 transitions. Word has length 27 [2018-11-28 11:19:56,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:19:56,354 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 110 transitions. [2018-11-28 11:19:56,354 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 11:19:56,354 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 110 transitions. [2018-11-28 11:19:56,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-28 11:19:56,355 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:19:56,355 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:19:56,356 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:19:56,356 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:19:56,356 INFO L82 PathProgramCache]: Analyzing trace with hash 43118944, now seen corresponding path program 1 times [2018-11-28 11:19:56,356 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:19:56,356 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:19:56,357 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:56,357 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:56,357 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:56,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:56,408 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:19:56,409 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:19:56,409 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 11:19:56,409 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 11:19:56,409 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 11:19:56,409 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:19:56,409 INFO L87 Difference]: Start difference. First operand 97 states and 110 transitions. Second operand 5 states. [2018-11-28 11:19:56,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:19:56,422 INFO L93 Difference]: Finished difference Result 112 states and 127 transitions. [2018-11-28 11:19:56,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 11:19:56,424 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-11-28 11:19:56,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:19:56,425 INFO L225 Difference]: With dead ends: 112 [2018-11-28 11:19:56,425 INFO L226 Difference]: Without dead ends: 112 [2018-11-28 11:19:56,425 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:19:56,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-11-28 11:19:56,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 105. [2018-11-28 11:19:56,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-11-28 11:19:56,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 120 transitions. [2018-11-28 11:19:56,431 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 120 transitions. Word has length 35 [2018-11-28 11:19:56,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:19:56,432 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 120 transitions. [2018-11-28 11:19:56,432 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 11:19:56,432 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 120 transitions. [2018-11-28 11:19:56,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-28 11:19:56,433 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:19:56,433 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:19:56,433 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:19:56,433 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:19:56,434 INFO L82 PathProgramCache]: Analyzing trace with hash 930622625, now seen corresponding path program 1 times [2018-11-28 11:19:56,434 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:19:56,434 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:19:56,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:56,439 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:56,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:56,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:56,482 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:19:56,482 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:19:56,483 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 11:19:56,483 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 11:19:56,483 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 11:19:56,483 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 11:19:56,483 INFO L87 Difference]: Start difference. First operand 105 states and 120 transitions. Second operand 6 states. [2018-11-28 11:19:56,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:19:56,519 INFO L93 Difference]: Finished difference Result 103 states and 116 transitions. [2018-11-28 11:19:56,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 11:19:56,522 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-11-28 11:19:56,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:19:56,523 INFO L225 Difference]: With dead ends: 103 [2018-11-28 11:19:56,523 INFO L226 Difference]: Without dead ends: 103 [2018-11-28 11:19:56,524 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:19:56,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-11-28 11:19:56,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 103. [2018-11-28 11:19:56,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-11-28 11:19:56,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 116 transitions. [2018-11-28 11:19:56,528 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 116 transitions. Word has length 35 [2018-11-28 11:19:56,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:19:56,529 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 116 transitions. [2018-11-28 11:19:56,529 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 11:19:56,529 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 116 transitions. [2018-11-28 11:19:56,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-28 11:19:56,530 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:19:56,530 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:19:56,530 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:19:56,530 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:19:56,530 INFO L82 PathProgramCache]: Analyzing trace with hash 637219618, now seen corresponding path program 1 times [2018-11-28 11:19:56,531 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:19:56,531 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:19:56,532 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:56,532 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:56,532 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:56,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:56,719 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:19:56,719 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:19:56,720 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:19:56,733 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:56,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:56,782 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:19:56,846 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 11:19:56,851 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 11:19:56,851 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:19:56,852 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:19:56,853 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:19:56,854 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-28 11:19:57,269 WARN L854 $PredicateComparison]: unable to prove that (exists ((f19_~a.offset Int)) (= (store |c_old(#memory_$Pointer$.offset)| |c_f19_#in~a.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_f19_#in~a.base|) f19_~a.offset 0)) |c_#memory_$Pointer$.offset|)) is different from true [2018-11-28 11:19:57,277 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-28 11:19:57,280 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 17 [2018-11-28 11:19:57,281 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:19:57,283 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:19:57,286 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:19:57,287 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:17 [2018-11-28 11:19:57,303 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-28 11:19:57,304 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-28 11:19:57,305 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:19:57,306 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:19:57,307 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:19:57,307 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-28 11:19:57,310 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:19:57,326 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 11:19:57,327 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [13] total 17 [2018-11-28 11:19:57,327 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-28 11:19:57,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-28 11:19:57,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=227, Unknown=1, NotChecked=30, Total=306 [2018-11-28 11:19:57,328 INFO L87 Difference]: Start difference. First operand 103 states and 116 transitions. Second operand 18 states. [2018-11-28 11:19:58,875 WARN L180 SmtUtils]: Spent 330.00 ms on a formula simplification that was a NOOP. DAG size: 22 [2018-11-28 11:19:59,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:19:59,034 INFO L93 Difference]: Finished difference Result 102 states and 115 transitions. [2018-11-28 11:19:59,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-28 11:19:59,034 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 35 [2018-11-28 11:19:59,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:19:59,035 INFO L225 Difference]: With dead ends: 102 [2018-11-28 11:19:59,035 INFO L226 Difference]: Without dead ends: 102 [2018-11-28 11:19:59,036 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 28 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=115, Invalid=587, Unknown=4, NotChecked=50, Total=756 [2018-11-28 11:19:59,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-11-28 11:19:59,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 102. [2018-11-28 11:19:59,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-11-28 11:19:59,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 115 transitions. [2018-11-28 11:19:59,038 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 115 transitions. Word has length 35 [2018-11-28 11:19:59,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:19:59,039 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 115 transitions. [2018-11-28 11:19:59,039 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-28 11:19:59,039 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 115 transitions. [2018-11-28 11:19:59,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-28 11:19:59,040 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:19:59,040 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:19:59,040 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:19:59,040 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:19:59,040 INFO L82 PathProgramCache]: Analyzing trace with hash -1721028121, now seen corresponding path program 1 times [2018-11-28 11:19:59,041 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:19:59,041 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:19:59,043 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:59,043 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:59,043 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:19:59,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:59,247 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:19:59,247 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:19:59,247 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:19:59,254 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:19:59,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:19:59,283 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:19:59,286 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:19:59,286 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:19:59,287 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:19:59,288 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 11:19:59,311 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 11:19:59,313 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 11:19:59,313 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:19:59,315 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:19:59,318 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:19:59,318 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:11 [2018-11-28 11:20:03,033 WARN L180 SmtUtils]: Spent 451.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-11-28 11:20:03,046 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-28 11:20:03,056 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 28 [2018-11-28 11:20:03,057 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 11:20:03,067 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 11:20:03,080 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-28 11:20:03,080 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:23, output treesize:35 [2018-11-28 11:20:03,111 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-11-28 11:20:03,112 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-28 11:20:03,113 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:03,115 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:03,124 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-11-28 11:20:03,129 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 16 [2018-11-28 11:20:03,130 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-11-28 11:20:03,136 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-28 11:20:03,146 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 3 xjuncts. [2018-11-28 11:20:03,146 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:53, output treesize:24 [2018-11-28 11:20:03,172 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:20:03,196 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:20:03,197 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12] total 21 [2018-11-28 11:20:03,197 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-28 11:20:03,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-28 11:20:03,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=389, Unknown=8, NotChecked=0, Total=462 [2018-11-28 11:20:03,198 INFO L87 Difference]: Start difference. First operand 102 states and 115 transitions. Second operand 22 states. [2018-11-28 11:20:20,036 WARN L180 SmtUtils]: Spent 358.00 ms on a formula simplification that was a NOOP. DAG size: 25 [2018-11-28 11:20:25,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:25,231 INFO L93 Difference]: Finished difference Result 117 states and 134 transitions. [2018-11-28 11:20:25,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-28 11:20:25,232 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 36 [2018-11-28 11:20:25,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:25,233 INFO L225 Difference]: With dead ends: 117 [2018-11-28 11:20:25,233 INFO L226 Difference]: Without dead ends: 117 [2018-11-28 11:20:25,233 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 30 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=158, Invalid=950, Unknown=14, NotChecked=0, Total=1122 [2018-11-28 11:20:25,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-11-28 11:20:25,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 105. [2018-11-28 11:20:25,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-11-28 11:20:25,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 118 transitions. [2018-11-28 11:20:25,237 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 118 transitions. Word has length 36 [2018-11-28 11:20:25,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:25,237 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 118 transitions. [2018-11-28 11:20:25,238 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-28 11:20:25,238 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 118 transitions. [2018-11-28 11:20:25,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-28 11:20:25,239 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:25,239 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:25,240 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:25,240 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:25,240 INFO L82 PathProgramCache]: Analyzing trace with hash 496729832, now seen corresponding path program 1 times [2018-11-28 11:20:25,240 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:25,240 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:25,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:25,242 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:25,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:25,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:25,296 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:20:25,296 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:20:25,296 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:20:25,313 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:25,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:25,345 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:20:25,360 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 11:20:25,361 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 11:20:25,361 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:25,367 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:25,372 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 11:20:25,374 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 11:20:25,374 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:25,376 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:25,379 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:25,379 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-11-28 11:20:25,385 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-28 11:20:25,390 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-28 11:20:25,390 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:25,392 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:25,397 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-28 11:20:25,399 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-28 11:20:25,399 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:25,400 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:25,402 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:25,403 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:37, output treesize:7 [2018-11-28 11:20:25,405 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:20:25,421 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 11:20:25,421 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 6 [2018-11-28 11:20:25,421 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 11:20:25,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 11:20:25,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 11:20:25,422 INFO L87 Difference]: Start difference. First operand 105 states and 118 transitions. Second operand 6 states. [2018-11-28 11:20:25,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:25,455 INFO L93 Difference]: Finished difference Result 92 states and 98 transitions. [2018-11-28 11:20:25,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 11:20:25,456 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-11-28 11:20:25,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:25,457 INFO L225 Difference]: With dead ends: 92 [2018-11-28 11:20:25,457 INFO L226 Difference]: Without dead ends: 88 [2018-11-28 11:20:25,457 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 34 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:20:25,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-11-28 11:20:25,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 86. [2018-11-28 11:20:25,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-11-28 11:20:25,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 92 transitions. [2018-11-28 11:20:25,461 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 92 transitions. Word has length 36 [2018-11-28 11:20:25,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:25,461 INFO L480 AbstractCegarLoop]: Abstraction has 86 states and 92 transitions. [2018-11-28 11:20:25,461 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 11:20:25,461 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 92 transitions. [2018-11-28 11:20:25,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-28 11:20:25,462 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:25,462 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:25,462 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:25,463 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:25,463 INFO L82 PathProgramCache]: Analyzing trace with hash 1752841694, now seen corresponding path program 1 times [2018-11-28 11:20:25,463 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:25,463 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:25,464 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:25,464 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:25,464 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:25,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:25,521 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:20:25,521 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:20:25,521 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 11:20:25,521 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 11:20:25,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 11:20:25,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:20:25,522 INFO L87 Difference]: Start difference. First operand 86 states and 92 transitions. Second operand 8 states. [2018-11-28 11:20:25,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:25,602 INFO L93 Difference]: Finished difference Result 95 states and 101 transitions. [2018-11-28 11:20:25,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 11:20:25,602 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-11-28 11:20:25,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:25,603 INFO L225 Difference]: With dead ends: 95 [2018-11-28 11:20:25,603 INFO L226 Difference]: Without dead ends: 95 [2018-11-28 11:20:25,603 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-28 11:20:25,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-11-28 11:20:25,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 88. [2018-11-28 11:20:25,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-11-28 11:20:25,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 95 transitions. [2018-11-28 11:20:25,605 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 95 transitions. Word has length 42 [2018-11-28 11:20:25,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:25,605 INFO L480 AbstractCegarLoop]: Abstraction has 88 states and 95 transitions. [2018-11-28 11:20:25,605 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 11:20:25,605 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 95 transitions. [2018-11-28 11:20:25,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-28 11:20:25,605 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:25,605 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:25,606 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:25,606 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:25,606 INFO L82 PathProgramCache]: Analyzing trace with hash 1752841695, now seen corresponding path program 1 times [2018-11-28 11:20:25,606 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:25,606 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:25,607 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:25,607 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:25,607 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:25,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:25,743 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:20:25,744 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:20:25,744 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-28 11:20:25,744 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 11:20:25,744 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 11:20:25,744 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-11-28 11:20:25,744 INFO L87 Difference]: Start difference. First operand 88 states and 95 transitions. Second operand 11 states. [2018-11-28 11:20:25,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:25,836 INFO L93 Difference]: Finished difference Result 94 states and 99 transitions. [2018-11-28 11:20:25,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 11:20:25,836 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 42 [2018-11-28 11:20:25,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:25,837 INFO L225 Difference]: With dead ends: 94 [2018-11-28 11:20:25,837 INFO L226 Difference]: Without dead ends: 94 [2018-11-28 11:20:25,837 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2018-11-28 11:20:25,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-11-28 11:20:25,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 92. [2018-11-28 11:20:25,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-11-28 11:20:25,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 99 transitions. [2018-11-28 11:20:25,840 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 99 transitions. Word has length 42 [2018-11-28 11:20:25,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:25,840 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 99 transitions. [2018-11-28 11:20:25,841 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 11:20:25,841 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 99 transitions. [2018-11-28 11:20:25,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-28 11:20:25,841 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:25,841 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:25,842 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:25,842 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:25,842 INFO L82 PathProgramCache]: Analyzing trace with hash -1496482347, now seen corresponding path program 1 times [2018-11-28 11:20:25,842 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:25,843 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:25,844 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:25,844 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:25,844 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:25,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:26,017 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:20:26,018 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:20:26,018 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-28 11:20:26,018 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 11:20:26,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 11:20:26,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-11-28 11:20:26,019 INFO L87 Difference]: Start difference. First operand 92 states and 99 transitions. Second operand 11 states. [2018-11-28 11:20:26,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:26,146 INFO L93 Difference]: Finished difference Result 93 states and 98 transitions. [2018-11-28 11:20:26,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 11:20:26,146 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 43 [2018-11-28 11:20:26,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:26,147 INFO L225 Difference]: With dead ends: 93 [2018-11-28 11:20:26,147 INFO L226 Difference]: Without dead ends: 93 [2018-11-28 11:20:26,147 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=144, Unknown=0, NotChecked=0, Total=182 [2018-11-28 11:20:26,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-11-28 11:20:26,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 92. [2018-11-28 11:20:26,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-11-28 11:20:26,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 98 transitions. [2018-11-28 11:20:26,150 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 98 transitions. Word has length 43 [2018-11-28 11:20:26,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:26,150 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 98 transitions. [2018-11-28 11:20:26,150 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 11:20:26,150 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 98 transitions. [2018-11-28 11:20:26,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-28 11:20:26,151 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:26,151 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:26,151 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:26,152 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:26,152 INFO L82 PathProgramCache]: Analyzing trace with hash 853687550, now seen corresponding path program 1 times [2018-11-28 11:20:26,152 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:26,152 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:26,153 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:26,153 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:26,153 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:26,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:26,225 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:20:26,225 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:20:26,225 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-28 11:20:26,225 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 11:20:26,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 11:20:26,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-11-28 11:20:26,226 INFO L87 Difference]: Start difference. First operand 92 states and 98 transitions. Second operand 11 states. [2018-11-28 11:20:26,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:26,351 INFO L93 Difference]: Finished difference Result 106 states and 115 transitions. [2018-11-28 11:20:26,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 11:20:26,352 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 44 [2018-11-28 11:20:26,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:26,353 INFO L225 Difference]: With dead ends: 106 [2018-11-28 11:20:26,353 INFO L226 Difference]: Without dead ends: 106 [2018-11-28 11:20:26,353 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=144, Unknown=0, NotChecked=0, Total=182 [2018-11-28 11:20:26,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-11-28 11:20:26,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 104. [2018-11-28 11:20:26,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-11-28 11:20:26,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 113 transitions. [2018-11-28 11:20:26,356 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 113 transitions. Word has length 44 [2018-11-28 11:20:26,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:26,357 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 113 transitions. [2018-11-28 11:20:26,357 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 11:20:26,357 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 113 transitions. [2018-11-28 11:20:26,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-28 11:20:26,357 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:26,358 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:26,358 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:26,358 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:26,358 INFO L82 PathProgramCache]: Analyzing trace with hash -1184368739, now seen corresponding path program 1 times [2018-11-28 11:20:26,358 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:26,358 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:26,359 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:26,359 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:26,359 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:26,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:26,432 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:20:26,432 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:20:26,432 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-28 11:20:26,432 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 11:20:26,432 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 11:20:26,433 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-11-28 11:20:26,433 INFO L87 Difference]: Start difference. First operand 104 states and 113 transitions. Second operand 11 states. [2018-11-28 11:20:26,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:26,555 INFO L93 Difference]: Finished difference Result 114 states and 121 transitions. [2018-11-28 11:20:26,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 11:20:26,555 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 44 [2018-11-28 11:20:26,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:26,556 INFO L225 Difference]: With dead ends: 114 [2018-11-28 11:20:26,556 INFO L226 Difference]: Without dead ends: 114 [2018-11-28 11:20:26,556 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=144, Unknown=0, NotChecked=0, Total=182 [2018-11-28 11:20:26,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-11-28 11:20:26,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 92. [2018-11-28 11:20:26,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-11-28 11:20:26,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 97 transitions. [2018-11-28 11:20:26,560 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 97 transitions. Word has length 44 [2018-11-28 11:20:26,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:26,560 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 97 transitions. [2018-11-28 11:20:26,560 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 11:20:26,560 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 97 transitions. [2018-11-28 11:20:26,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-28 11:20:26,561 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:26,561 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:26,561 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:26,561 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:26,561 INFO L82 PathProgramCache]: Analyzing trace with hash -219716567, now seen corresponding path program 1 times [2018-11-28 11:20:26,561 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:26,562 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:26,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:26,567 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:26,567 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:26,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:26,631 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:20:26,631 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:20:26,632 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 11:20:26,632 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 11:20:26,632 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 11:20:26,632 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:20:26,632 INFO L87 Difference]: Start difference. First operand 92 states and 97 transitions. Second operand 8 states. [2018-11-28 11:20:26,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:26,668 INFO L93 Difference]: Finished difference Result 100 states and 104 transitions. [2018-11-28 11:20:26,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 11:20:26,669 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-11-28 11:20:26,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:26,669 INFO L225 Difference]: With dead ends: 100 [2018-11-28 11:20:26,669 INFO L226 Difference]: Without dead ends: 100 [2018-11-28 11:20:26,670 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-11-28 11:20:26,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-11-28 11:20:26,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 97. [2018-11-28 11:20:26,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-11-28 11:20:26,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 101 transitions. [2018-11-28 11:20:26,672 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 101 transitions. Word has length 44 [2018-11-28 11:20:26,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:26,672 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 101 transitions. [2018-11-28 11:20:26,672 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 11:20:26,672 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 101 transitions. [2018-11-28 11:20:26,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-28 11:20:26,672 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:26,672 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:26,673 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:26,673 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:26,673 INFO L82 PathProgramCache]: Analyzing trace with hash -616877014, now seen corresponding path program 1 times [2018-11-28 11:20:26,673 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:26,673 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:26,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:26,674 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:26,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:26,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:26,748 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:20:26,749 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:20:26,749 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-28 11:20:26,749 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 11:20:26,749 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 11:20:26,749 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-11-28 11:20:26,749 INFO L87 Difference]: Start difference. First operand 97 states and 101 transitions. Second operand 10 states. [2018-11-28 11:20:26,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:26,907 INFO L93 Difference]: Finished difference Result 110 states and 116 transitions. [2018-11-28 11:20:26,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 11:20:26,908 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 46 [2018-11-28 11:20:26,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:26,909 INFO L225 Difference]: With dead ends: 110 [2018-11-28 11:20:26,909 INFO L226 Difference]: Without dead ends: 110 [2018-11-28 11:20:26,909 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-11-28 11:20:26,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-11-28 11:20:26,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 104. [2018-11-28 11:20:26,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-11-28 11:20:26,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 111 transitions. [2018-11-28 11:20:26,913 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 111 transitions. Word has length 46 [2018-11-28 11:20:26,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:26,913 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 111 transitions. [2018-11-28 11:20:26,913 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 11:20:26,913 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 111 transitions. [2018-11-28 11:20:26,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-28 11:20:26,914 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:26,914 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:26,922 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:26,923 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:26,923 INFO L82 PathProgramCache]: Analyzing trace with hash -616877013, now seen corresponding path program 1 times [2018-11-28 11:20:26,923 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:26,923 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:26,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:26,924 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:26,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:26,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:27,084 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:20:27,084 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:20:27,084 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-11-28 11:20:27,084 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-28 11:20:27,085 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-28 11:20:27,085 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=148, Unknown=0, NotChecked=0, Total=182 [2018-11-28 11:20:27,085 INFO L87 Difference]: Start difference. First operand 104 states and 111 transitions. Second operand 14 states. [2018-11-28 11:20:27,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:27,537 INFO L93 Difference]: Finished difference Result 121 states and 130 transitions. [2018-11-28 11:20:27,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-28 11:20:27,537 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 46 [2018-11-28 11:20:27,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:27,538 INFO L225 Difference]: With dead ends: 121 [2018-11-28 11:20:27,538 INFO L226 Difference]: Without dead ends: 121 [2018-11-28 11:20:27,538 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=119, Invalid=531, Unknown=0, NotChecked=0, Total=650 [2018-11-28 11:20:27,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-11-28 11:20:27,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 103. [2018-11-28 11:20:27,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-11-28 11:20:27,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 109 transitions. [2018-11-28 11:20:27,542 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 109 transitions. Word has length 46 [2018-11-28 11:20:27,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:27,542 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 109 transitions. [2018-11-28 11:20:27,542 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-28 11:20:27,542 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 109 transitions. [2018-11-28 11:20:27,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 11:20:27,543 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:27,543 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:27,543 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:27,544 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:27,544 INFO L82 PathProgramCache]: Analyzing trace with hash 1704507390, now seen corresponding path program 1 times [2018-11-28 11:20:27,544 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:27,544 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:27,545 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:27,545 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:27,545 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:27,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:27,685 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:20:27,685 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:20:27,685 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-28 11:20:27,685 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-28 11:20:27,686 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-28 11:20:27,686 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-11-28 11:20:27,686 INFO L87 Difference]: Start difference. First operand 103 states and 109 transitions. Second operand 13 states. [2018-11-28 11:20:28,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:28,016 INFO L93 Difference]: Finished difference Result 122 states and 131 transitions. [2018-11-28 11:20:28,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-28 11:20:28,017 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 47 [2018-11-28 11:20:28,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:28,018 INFO L225 Difference]: With dead ends: 122 [2018-11-28 11:20:28,018 INFO L226 Difference]: Without dead ends: 122 [2018-11-28 11:20:28,018 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=64, Invalid=316, Unknown=0, NotChecked=0, Total=380 [2018-11-28 11:20:28,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-11-28 11:20:28,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 112. [2018-11-28 11:20:28,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-11-28 11:20:28,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 121 transitions. [2018-11-28 11:20:28,022 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 121 transitions. Word has length 47 [2018-11-28 11:20:28,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:28,023 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 121 transitions. [2018-11-28 11:20:28,023 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-28 11:20:28,023 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 121 transitions. [2018-11-28 11:20:28,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 11:20:28,023 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:28,024 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:28,024 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:28,024 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:28,024 INFO L82 PathProgramCache]: Analyzing trace with hash -1943318218, now seen corresponding path program 1 times [2018-11-28 11:20:28,024 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:28,024 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:28,025 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:28,025 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:28,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:28,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:28,314 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:20:28,315 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:20:28,315 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:20:28,331 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:28,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:28,360 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:20:28,401 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 11:20:28,403 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 11:20:28,403 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:28,405 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:28,408 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:28,408 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-11-28 11:20:28,916 WARN L854 $PredicateComparison]: unable to prove that (exists ((f19_~a.offset Int)) (= (store |c_old(#memory_$Pointer$.offset)| |c_f19_#in~a.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_f19_#in~a.base|) f19_~a.offset 0)) |c_#memory_$Pointer$.offset|)) is different from true [2018-11-28 11:20:28,922 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-28 11:20:28,925 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 17 [2018-11-28 11:20:28,925 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:28,928 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:28,930 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:20:28,931 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:17 [2018-11-28 11:20:29,029 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-28 11:20:29,030 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-28 11:20:29,030 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:29,031 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:29,033 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:29,033 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-28 11:20:29,036 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:20:29,053 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 11:20:29,053 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [15] total 26 [2018-11-28 11:20:29,053 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-11-28 11:20:29,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-11-28 11:20:29,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=569, Unknown=1, NotChecked=48, Total=702 [2018-11-28 11:20:29,054 INFO L87 Difference]: Start difference. First operand 112 states and 121 transitions. Second operand 27 states. [2018-11-28 11:20:32,550 WARN L180 SmtUtils]: Spent 2.42 s on a formula simplification that was a NOOP. DAG size: 30 [2018-11-28 11:20:33,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:33,204 INFO L93 Difference]: Finished difference Result 111 states and 120 transitions. [2018-11-28 11:20:33,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-28 11:20:33,204 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 47 [2018-11-28 11:20:33,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:33,204 INFO L225 Difference]: With dead ends: 111 [2018-11-28 11:20:33,204 INFO L226 Difference]: Without dead ends: 111 [2018-11-28 11:20:33,205 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 36 SyntacticMatches, 3 SemanticMatches, 40 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 377 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=217, Invalid=1423, Unknown=4, NotChecked=78, Total=1722 [2018-11-28 11:20:33,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-11-28 11:20:33,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-11-28 11:20:33,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-11-28 11:20:33,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 120 transitions. [2018-11-28 11:20:33,208 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 120 transitions. Word has length 47 [2018-11-28 11:20:33,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:33,209 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 120 transitions. [2018-11-28 11:20:33,209 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-11-28 11:20:33,209 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 120 transitions. [2018-11-28 11:20:33,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 11:20:33,209 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:33,209 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:33,209 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:33,210 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:33,210 INFO L82 PathProgramCache]: Analyzing trace with hash -372701953, now seen corresponding path program 1 times [2018-11-28 11:20:33,210 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:33,210 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:33,211 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:33,211 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:33,211 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:33,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:33,315 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:20:33,315 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:20:33,315 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-28 11:20:33,316 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-28 11:20:33,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-28 11:20:33,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2018-11-28 11:20:33,316 INFO L87 Difference]: Start difference. First operand 111 states and 120 transitions. Second operand 12 states. [2018-11-28 11:20:33,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:33,551 INFO L93 Difference]: Finished difference Result 111 states and 119 transitions. [2018-11-28 11:20:33,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-28 11:20:33,553 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 47 [2018-11-28 11:20:33,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:33,554 INFO L225 Difference]: With dead ends: 111 [2018-11-28 11:20:33,554 INFO L226 Difference]: Without dead ends: 110 [2018-11-28 11:20:33,554 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=253, Unknown=0, NotChecked=0, Total=306 [2018-11-28 11:20:33,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-11-28 11:20:33,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 108. [2018-11-28 11:20:33,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-11-28 11:20:33,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 115 transitions. [2018-11-28 11:20:33,562 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 115 transitions. Word has length 47 [2018-11-28 11:20:33,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:33,563 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 115 transitions. [2018-11-28 11:20:33,563 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-28 11:20:33,563 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 115 transitions. [2018-11-28 11:20:33,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-28 11:20:33,563 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:33,564 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:33,564 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:33,564 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:33,564 INFO L82 PathProgramCache]: Analyzing trace with hash 1779334333, now seen corresponding path program 1 times [2018-11-28 11:20:33,564 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:33,565 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:33,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:33,565 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:33,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:33,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:33,985 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:20:33,985 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:20:33,985 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:20:34,000 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:34,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:34,027 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:20:34,082 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 11:20:34,083 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 11:20:34,083 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:34,085 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:34,090 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:34,090 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:24 [2018-11-28 11:20:37,669 WARN L180 SmtUtils]: Spent 406.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-11-28 11:20:37,687 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 28 [2018-11-28 11:20:37,689 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:20:37,690 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 37 [2018-11-28 11:20:37,690 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:37,695 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:37,700 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:37,700 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:38, output treesize:24 [2018-11-28 11:20:37,706 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-11-28 11:20:37,708 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 12 [2018-11-28 11:20:37,709 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:37,711 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:37,713 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:37,713 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:33, output treesize:12 [2018-11-28 11:20:40,654 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:20:40,679 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 11:20:40,680 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 13] total 25 [2018-11-28 11:20:40,680 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-11-28 11:20:40,680 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-11-28 11:20:40,680 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=546, Unknown=18, NotChecked=0, Total=650 [2018-11-28 11:20:40,680 INFO L87 Difference]: Start difference. First operand 108 states and 115 transitions. Second operand 26 states. [2018-11-28 11:20:53,455 WARN L180 SmtUtils]: Spent 431.00 ms on a formula simplification that was a NOOP. DAG size: 28 [2018-11-28 11:20:55,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:55,961 INFO L93 Difference]: Finished difference Result 114 states and 120 transitions. [2018-11-28 11:20:55,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-28 11:20:55,962 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 45 [2018-11-28 11:20:55,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:55,962 INFO L225 Difference]: With dead ends: 114 [2018-11-28 11:20:55,963 INFO L226 Difference]: Without dead ends: 98 [2018-11-28 11:20:55,963 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 298 ImplicationChecksByTransitivity, 8.5s TimeCoverageRelationStatistics Valid=149, Invalid=1020, Unknown=21, NotChecked=0, Total=1190 [2018-11-28 11:20:55,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-11-28 11:20:55,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 96. [2018-11-28 11:20:55,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-11-28 11:20:55,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 102 transitions. [2018-11-28 11:20:55,965 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 102 transitions. Word has length 45 [2018-11-28 11:20:55,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:55,966 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 102 transitions. [2018-11-28 11:20:55,966 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-11-28 11:20:55,966 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 102 transitions. [2018-11-28 11:20:55,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 11:20:55,966 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:55,966 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:55,967 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:55,967 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:55,967 INFO L82 PathProgramCache]: Analyzing trace with hash -1942704932, now seen corresponding path program 1 times [2018-11-28 11:20:55,967 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:55,967 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:55,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:55,968 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:55,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:55,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:55,997 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:20:55,997 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:20:55,997 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 11:20:55,998 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 11:20:55,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 11:20:55,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:20:55,998 INFO L87 Difference]: Start difference. First operand 96 states and 102 transitions. Second operand 5 states. [2018-11-28 11:20:56,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:20:56,018 INFO L93 Difference]: Finished difference Result 99 states and 104 transitions. [2018-11-28 11:20:56,018 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 11:20:56,018 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-11-28 11:20:56,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:20:56,019 INFO L225 Difference]: With dead ends: 99 [2018-11-28 11:20:56,019 INFO L226 Difference]: Without dead ends: 99 [2018-11-28 11:20:56,019 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 11:20:56,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-11-28 11:20:56,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 96. [2018-11-28 11:20:56,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-11-28 11:20:56,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 101 transitions. [2018-11-28 11:20:56,022 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 101 transitions. Word has length 47 [2018-11-28 11:20:56,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:20:56,022 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 101 transitions. [2018-11-28 11:20:56,022 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 11:20:56,022 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 101 transitions. [2018-11-28 11:20:56,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-28 11:20:56,023 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:20:56,023 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:20:56,023 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:20:56,024 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:20:56,024 INFO L82 PathProgramCache]: Analyzing trace with hash -113322518, now seen corresponding path program 1 times [2018-11-28 11:20:56,024 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:20:56,024 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:20:56,024 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:56,025 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:56,025 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:20:56,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:56,291 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:20:56,291 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:20:56,291 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:20:56,297 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:20:56,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:20:56,318 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:20:56,330 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:20:56,330 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:56,333 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:56,333 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 11:20:56,351 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 11:20:56,353 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 11:20:56,353 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:56,356 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:56,360 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:56,360 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:15 [2018-11-28 11:20:57,122 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:20:57,123 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:20:57,123 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 39 [2018-11-28 11:20:57,124 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:57,133 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 26 [2018-11-28 11:20:57,145 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 26 treesize of output 32 [2018-11-28 11:20:57,147 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 11:20:57,157 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 11:20:57,167 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-28 11:20:57,167 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:34, output treesize:63 [2018-11-28 11:20:57,297 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-11-28 11:20:57,299 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-11-28 11:20:57,299 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:20:57,303 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:20:57,307 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:20:57,308 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:36, output treesize:15 [2018-11-28 11:20:57,332 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:20:57,346 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 11:20:57,346 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [18] total 31 [2018-11-28 11:20:57,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-11-28 11:20:57,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-11-28 11:20:57,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=886, Unknown=2, NotChecked=0, Total=992 [2018-11-28 11:20:57,347 INFO L87 Difference]: Start difference. First operand 96 states and 101 transitions. Second operand 32 states. [2018-11-28 11:21:06,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:21:06,020 INFO L93 Difference]: Finished difference Result 110 states and 115 transitions. [2018-11-28 11:21:06,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-28 11:21:06,020 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 48 [2018-11-28 11:21:06,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:21:06,021 INFO L225 Difference]: With dead ends: 110 [2018-11-28 11:21:06,021 INFO L226 Difference]: Without dead ends: 110 [2018-11-28 11:21:06,021 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 741 ImplicationChecksByTransitivity, 7.5s TimeCoverageRelationStatistics Valid=278, Invalid=2369, Unknown=5, NotChecked=0, Total=2652 [2018-11-28 11:21:06,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-11-28 11:21:06,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 101. [2018-11-28 11:21:06,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-11-28 11:21:06,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 105 transitions. [2018-11-28 11:21:06,024 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 105 transitions. Word has length 48 [2018-11-28 11:21:06,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:21:06,024 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 105 transitions. [2018-11-28 11:21:06,024 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-11-28 11:21:06,024 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 105 transitions. [2018-11-28 11:21:06,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-28 11:21:06,024 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:21:06,025 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:21:06,025 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:21:06,025 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:21:06,025 INFO L82 PathProgramCache]: Analyzing trace with hash 1649066462, now seen corresponding path program 1 times [2018-11-28 11:21:06,025 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:21:06,025 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:21:06,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:21:06,026 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:21:06,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:21:06,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:21:06,423 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:21:06,423 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:21:06,424 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:21:06,431 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:21:06,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:21:06,454 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:21:06,462 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:21:06,462 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:06,464 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:21:06,464 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 11:21:06,515 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 11:21:06,517 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 11:21:06,517 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:06,520 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:21:06,522 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:21:06,523 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:11 [2018-11-28 11:21:18,625 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:21:18,626 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:21:18,627 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 39 [2018-11-28 11:21:18,627 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:18,636 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 26 [2018-11-28 11:21:18,639 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:21:18,640 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 35 [2018-11-28 11:21:18,640 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:18,645 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:21:18,650 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:21:18,650 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:34, output treesize:35 [2018-11-28 11:21:18,746 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 14 [2018-11-28 11:21:18,747 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:18,750 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 11:21:18,751 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:38, output treesize:18 [2018-11-28 11:21:20,870 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 21 [2018-11-28 11:21:20,875 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:21:20,875 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 47 [2018-11-28 11:21:20,876 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:20,884 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 11:21:20,884 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:59, output treesize:35 [2018-11-28 11:21:20,919 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-28 11:21:20,920 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:21:20,921 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:21:20,921 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 21 [2018-11-28 11:21:20,922 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:21:20,926 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:21:20,929 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:21:20,929 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:30, output treesize:11 [2018-11-28 11:21:20,962 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:21:20,976 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 11:21:20,977 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [20] total 32 [2018-11-28 11:21:20,977 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-11-28 11:21:20,977 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-11-28 11:21:20,977 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=950, Unknown=6, NotChecked=0, Total=1056 [2018-11-28 11:21:20,978 INFO L87 Difference]: Start difference. First operand 101 states and 105 transitions. Second operand 33 states. [2018-11-28 11:21:34,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:21:34,804 INFO L93 Difference]: Finished difference Result 109 states and 114 transitions. [2018-11-28 11:21:34,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-28 11:21:34,805 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 49 [2018-11-28 11:21:34,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:21:34,805 INFO L225 Difference]: With dead ends: 109 [2018-11-28 11:21:34,805 INFO L226 Difference]: Without dead ends: 109 [2018-11-28 11:21:34,806 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 36 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 552 ImplicationChecksByTransitivity, 15.0s TimeCoverageRelationStatistics Valid=234, Invalid=2112, Unknown=6, NotChecked=0, Total=2352 [2018-11-28 11:21:34,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-11-28 11:21:34,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 100. [2018-11-28 11:21:34,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-11-28 11:21:34,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 104 transitions. [2018-11-28 11:21:34,808 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 104 transitions. Word has length 49 [2018-11-28 11:21:34,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:21:34,808 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 104 transitions. [2018-11-28 11:21:34,808 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-11-28 11:21:34,808 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 104 transitions. [2018-11-28 11:21:34,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-28 11:21:34,809 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:21:34,809 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:21:34,809 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:21:34,809 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:21:34,809 INFO L82 PathProgramCache]: Analyzing trace with hash -146387923, now seen corresponding path program 1 times [2018-11-28 11:21:34,809 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:21:34,809 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:21:34,810 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:21:34,810 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:21:34,810 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:21:34,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:21:35,286 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:21:35,293 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:21:35,293 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:21:35,305 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:21:35,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:21:35,333 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:21:35,343 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:21:35,343 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:35,351 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:21:35,351 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 11:21:35,409 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 11:21:35,411 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 11:21:35,411 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:35,413 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:21:35,417 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:21:35,418 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:20 [2018-11-28 11:21:35,533 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:21:35,533 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:21:35,534 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:21:35,534 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:35,545 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-28 11:21:35,554 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 28 [2018-11-28 11:21:35,554 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 11:21:35,563 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 11:21:35,575 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-28 11:21:35,575 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:38, output treesize:47 [2018-11-28 11:21:35,616 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 14 [2018-11-28 11:21:35,616 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:35,624 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-11-28 11:21:35,624 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 6 variables, input treesize:42, output treesize:31 [2018-11-28 11:21:37,741 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:21:37,743 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:21:37,744 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 20 [2018-11-28 11:21:37,744 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:37,773 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:21:37,774 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:21:37,774 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-28 11:21:37,774 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:37,785 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 11:21:37,785 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:57, output treesize:41 [2018-11-28 11:21:37,873 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-11-28 11:21:37,876 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 4 [2018-11-28 11:21:37,876 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:37,877 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:21:37,879 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:21:37,880 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:10 [2018-11-28 11:21:37,893 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:21:37,893 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-11-28 11:21:37,893 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:21:37,901 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:21:37,901 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-11-28 11:21:37,984 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:21:38,016 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 11:21:38,017 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [19] total 35 [2018-11-28 11:21:38,017 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-11-28 11:21:38,017 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-11-28 11:21:38,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=1160, Unknown=1, NotChecked=0, Total=1260 [2018-11-28 11:21:38,018 INFO L87 Difference]: Start difference. First operand 100 states and 104 transitions. Second operand 36 states. [2018-11-28 11:22:07,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:22:07,289 INFO L93 Difference]: Finished difference Result 108 states and 113 transitions. [2018-11-28 11:22:07,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-11-28 11:22:07,289 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 51 [2018-11-28 11:22:07,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:22:07,290 INFO L225 Difference]: With dead ends: 108 [2018-11-28 11:22:07,290 INFO L226 Difference]: Without dead ends: 108 [2018-11-28 11:22:07,291 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 36 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 728 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=315, Invalid=3223, Unknown=2, NotChecked=0, Total=3540 [2018-11-28 11:22:07,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-11-28 11:22:07,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 99. [2018-11-28 11:22:07,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-11-28 11:22:07,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 103 transitions. [2018-11-28 11:22:07,295 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 103 transitions. Word has length 51 [2018-11-28 11:22:07,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:22:07,295 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 103 transitions. [2018-11-28 11:22:07,295 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-11-28 11:22:07,295 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 103 transitions. [2018-11-28 11:22:07,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-28 11:22:07,296 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:22:07,296 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:22:07,296 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:22:07,296 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:22:07,297 INFO L82 PathProgramCache]: Analyzing trace with hash -146387922, now seen corresponding path program 1 times [2018-11-28 11:22:07,297 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:22:07,297 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:22:07,297 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:22:07,298 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:22:07,298 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:22:07,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:22:07,377 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:22:07,377 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:22:07,377 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 11:22:07,378 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 11:22:07,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 11:22:07,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:22:07,378 INFO L87 Difference]: Start difference. First operand 99 states and 103 transitions. Second operand 8 states. [2018-11-28 11:22:07,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:22:07,453 INFO L93 Difference]: Finished difference Result 98 states and 102 transitions. [2018-11-28 11:22:07,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 11:22:07,453 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 51 [2018-11-28 11:22:07,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:22:07,454 INFO L225 Difference]: With dead ends: 98 [2018-11-28 11:22:07,454 INFO L226 Difference]: Without dead ends: 98 [2018-11-28 11:22:07,454 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2018-11-28 11:22:07,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-11-28 11:22:07,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-11-28 11:22:07,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-11-28 11:22:07,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 102 transitions. [2018-11-28 11:22:07,456 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 102 transitions. Word has length 51 [2018-11-28 11:22:07,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:22:07,457 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 102 transitions. [2018-11-28 11:22:07,457 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 11:22:07,457 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 102 transitions. [2018-11-28 11:22:07,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-28 11:22:07,457 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:22:07,457 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:22:07,458 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:22:07,458 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:22:07,458 INFO L82 PathProgramCache]: Analyzing trace with hash -243058330, now seen corresponding path program 1 times [2018-11-28 11:22:07,458 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:22:07,458 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:22:07,458 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:22:07,458 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:22:07,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:22:07,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:22:07,692 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:22:07,692 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:22:07,693 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-11-28 11:22:07,693 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-28 11:22:07,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-28 11:22:07,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2018-11-28 11:22:07,693 INFO L87 Difference]: Start difference. First operand 98 states and 102 transitions. Second operand 15 states. [2018-11-28 11:22:07,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:22:07,881 INFO L93 Difference]: Finished difference Result 97 states and 101 transitions. [2018-11-28 11:22:07,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-28 11:22:07,882 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 52 [2018-11-28 11:22:07,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:22:07,883 INFO L225 Difference]: With dead ends: 97 [2018-11-28 11:22:07,883 INFO L226 Difference]: Without dead ends: 97 [2018-11-28 11:22:07,884 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-11-28 11:22:07,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-11-28 11:22:07,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2018-11-28 11:22:07,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-11-28 11:22:07,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 101 transitions. [2018-11-28 11:22:07,886 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 101 transitions. Word has length 52 [2018-11-28 11:22:07,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:22:07,886 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 101 transitions. [2018-11-28 11:22:07,886 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-28 11:22:07,886 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 101 transitions. [2018-11-28 11:22:07,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-28 11:22:07,887 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:22:07,887 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:22:07,887 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:22:07,887 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:22:07,888 INFO L82 PathProgramCache]: Analyzing trace with hash 1055126413, now seen corresponding path program 1 times [2018-11-28 11:22:07,888 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:22:07,888 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:22:07,888 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:22:07,888 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:22:07,889 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:22:07,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:22:08,415 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:22:08,415 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:22:08,415 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-11-28 11:22:08,415 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-11-28 11:22:08,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-11-28 11:22:08,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=542, Unknown=0, NotChecked=0, Total=600 [2018-11-28 11:22:08,416 INFO L87 Difference]: Start difference. First operand 97 states and 101 transitions. Second operand 25 states. [2018-11-28 11:22:09,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:22:09,076 INFO L93 Difference]: Finished difference Result 111 states and 117 transitions. [2018-11-28 11:22:09,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-28 11:22:09,076 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 53 [2018-11-28 11:22:09,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:22:09,077 INFO L225 Difference]: With dead ends: 111 [2018-11-28 11:22:09,077 INFO L226 Difference]: Without dead ends: 111 [2018-11-28 11:22:09,078 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 214 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=132, Invalid=1200, Unknown=0, NotChecked=0, Total=1332 [2018-11-28 11:22:09,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-11-28 11:22:09,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-11-28 11:22:09,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-11-28 11:22:09,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 117 transitions. [2018-11-28 11:22:09,081 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 117 transitions. Word has length 53 [2018-11-28 11:22:09,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:22:09,081 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 117 transitions. [2018-11-28 11:22:09,081 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-11-28 11:22:09,081 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 117 transitions. [2018-11-28 11:22:09,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-28 11:22:09,082 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:22:09,082 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:22:09,084 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:22:09,084 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:22:09,084 INFO L82 PathProgramCache]: Analyzing trace with hash 1405926350, now seen corresponding path program 1 times [2018-11-28 11:22:09,084 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:22:09,085 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:22:09,085 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:22:09,086 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:22:09,086 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:22:09,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:22:09,149 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 11:22:09,149 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:22:09,149 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 11:22:09,149 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 11:22:09,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 11:22:09,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 11:22:09,150 INFO L87 Difference]: Start difference. First operand 111 states and 117 transitions. Second operand 6 states. [2018-11-28 11:22:09,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:22:09,179 INFO L93 Difference]: Finished difference Result 92 states and 96 transitions. [2018-11-28 11:22:09,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 11:22:09,179 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2018-11-28 11:22:09,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:22:09,180 INFO L225 Difference]: With dead ends: 92 [2018-11-28 11:22:09,180 INFO L226 Difference]: Without dead ends: 86 [2018-11-28 11:22:09,180 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:22:09,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-11-28 11:22:09,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2018-11-28 11:22:09,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-11-28 11:22:09,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 90 transitions. [2018-11-28 11:22:09,183 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 90 transitions. Word has length 53 [2018-11-28 11:22:09,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:22:09,183 INFO L480 AbstractCegarLoop]: Abstraction has 86 states and 90 transitions. [2018-11-28 11:22:09,183 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 11:22:09,183 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 90 transitions. [2018-11-28 11:22:09,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-28 11:22:09,183 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:22:09,183 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:22:09,184 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:22:09,184 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:22:09,184 INFO L82 PathProgramCache]: Analyzing trace with hash -1261499104, now seen corresponding path program 1 times [2018-11-28 11:22:09,184 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:22:09,184 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:22:09,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:22:09,185 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:22:09,185 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:22:09,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:22:09,417 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 11:22:09,417 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 11:22:09,417 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 11:22:09,423 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:22:09,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:22:09,445 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 11:22:09,447 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 11:22:09,447 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:22:09,449 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:22:09,449 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 11:22:09,479 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 11:22:09,480 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 11:22:09,480 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:22:09,482 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:22:09,486 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:22:09,486 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:20 [2018-11-28 11:22:12,100 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:22:12,101 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:22:12,102 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 11:22:12,102 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:22:12,110 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-28 11:22:12,117 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 28 [2018-11-28 11:22:12,118 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 11:22:12,128 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-28 11:22:12,139 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-28 11:22:12,139 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:36, output treesize:43 [2018-11-28 11:22:12,667 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 8 [2018-11-28 11:22:12,668 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:22:12,671 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-11-28 11:22:12,671 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 6 variables, input treesize:31, output treesize:19 [2018-11-28 11:22:14,673 WARN L854 $PredicateComparison]: unable to prove that (or (exists ((v_probe_unsafe_19_~a.offset_BEFORE_CALL_11 Int) (|v_probe_unsafe_19_#in~a.base_BEFORE_CALL_12| Int)) (not (= (select (select |c_#memory_$Pointer$.base| |v_probe_unsafe_19_#in~a.base_BEFORE_CALL_12|) (+ v_probe_unsafe_19_~a.offset_BEFORE_CALL_11 4)) |v_probe_unsafe_19_#in~a.base_BEFORE_CALL_12|))) (exists ((v_prenex_10 Int) (f19_~a.offset Int)) (not (= v_prenex_10 (select (select |c_#memory_$Pointer$.base| v_prenex_10) f19_~a.offset))))) is different from true [2018-11-28 11:22:15,524 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 8 [2018-11-28 11:22:15,524 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:22:15,529 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-11-28 11:22:15,530 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 6 variables, input treesize:31, output treesize:19 [2018-11-28 11:22:17,534 WARN L854 $PredicateComparison]: unable to prove that (or (exists ((v_probe_unsafe_19_~a.base_BEFORE_CALL_16 Int) (f19_~a.offset Int)) (not (= (select (select |c_#memory_$Pointer$.base| v_probe_unsafe_19_~a.base_BEFORE_CALL_16) f19_~a.offset) v_probe_unsafe_19_~a.base_BEFORE_CALL_16))) (exists ((v_prenex_12 Int) (v_prenex_13 Int)) (not (= v_prenex_13 (select (select |c_#memory_$Pointer$.base| v_prenex_13) (+ v_prenex_12 4)))))) is different from true [2018-11-28 11:22:18,201 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 26 [2018-11-28 11:22:18,203 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 4 [2018-11-28 11:22:18,203 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:22:18,207 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 11:22:18,218 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-11-28 11:22:18,223 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 20 [2018-11-28 11:22:18,224 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-11-28 11:22:18,233 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-28 11:22:18,246 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 3 xjuncts. [2018-11-28 11:22:18,246 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:65, output treesize:42 [2018-11-28 11:22:18,912 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:22:18,917 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 20 [2018-11-28 11:22:18,918 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-11-28 11:22:18,932 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:22:18,933 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2018-11-28 11:22:18,933 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 11:22:18,948 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-11-28 11:22:18,948 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:39, output treesize:44 [2018-11-28 11:22:19,924 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:22:19,925 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 11:22:19,926 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 15 [2018-11-28 11:22:19,926 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 11:22:19,936 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 11:22:19,936 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:38, output treesize:11 [2018-11-28 11:22:20,008 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:22:20,025 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 11:22:20,025 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [17] total 32 [2018-11-28 11:22:20,025 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-11-28 11:22:20,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-11-28 11:22:20,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=835, Unknown=11, NotChecked=118, Total=1056 [2018-11-28 11:22:20,026 INFO L87 Difference]: Start difference. First operand 86 states and 90 transitions. Second operand 33 states. [2018-11-28 11:22:43,224 WARN L180 SmtUtils]: Spent 845.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 14 [2018-11-28 11:23:21,571 WARN L180 SmtUtils]: Spent 1.12 s on a formula simplification. DAG size of input: 21 DAG size of output: 11 [2018-11-28 11:23:44,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:23:44,964 INFO L93 Difference]: Finished difference Result 86 states and 90 transitions. [2018-11-28 11:23:44,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-28 11:23:44,964 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 57 [2018-11-28 11:23:44,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:23:44,965 INFO L225 Difference]: With dead ends: 86 [2018-11-28 11:23:44,965 INFO L226 Difference]: Without dead ends: 86 [2018-11-28 11:23:44,965 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 41 SyntacticMatches, 3 SemanticMatches, 50 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 573 ImplicationChecksByTransitivity, 75.2s TimeCoverageRelationStatistics Valid=224, Invalid=2189, Unknown=45, NotChecked=194, Total=2652 [2018-11-28 11:23:44,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-11-28 11:23:44,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 85. [2018-11-28 11:23:44,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-11-28 11:23:44,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 89 transitions. [2018-11-28 11:23:44,968 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 89 transitions. Word has length 57 [2018-11-28 11:23:44,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:23:44,968 INFO L480 AbstractCegarLoop]: Abstraction has 85 states and 89 transitions. [2018-11-28 11:23:44,968 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-11-28 11:23:44,968 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 89 transitions. [2018-11-28 11:23:44,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-28 11:23:44,969 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:23:44,969 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:23:44,969 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:23:44,969 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:23:44,969 INFO L82 PathProgramCache]: Analyzing trace with hash -451153242, now seen corresponding path program 1 times [2018-11-28 11:23:44,970 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:23:44,970 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:23:44,980 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:23:44,980 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:23:44,980 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:23:44,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 11:23:45,022 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 11:23:45,022 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 11:23:45,022 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 11:23:45,022 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 11:23:45,022 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 11:23:45,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-28 11:23:45,023 INFO L87 Difference]: Start difference. First operand 85 states and 89 transitions. Second operand 8 states. [2018-11-28 11:23:45,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 11:23:45,044 INFO L93 Difference]: Finished difference Result 85 states and 88 transitions. [2018-11-28 11:23:45,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 11:23:45,044 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 58 [2018-11-28 11:23:45,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 11:23:45,045 INFO L225 Difference]: With dead ends: 85 [2018-11-28 11:23:45,045 INFO L226 Difference]: Without dead ends: 85 [2018-11-28 11:23:45,045 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-11-28 11:23:45,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-11-28 11:23:45,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 85. [2018-11-28 11:23:45,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-11-28 11:23:45,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 88 transitions. [2018-11-28 11:23:45,048 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 88 transitions. Word has length 58 [2018-11-28 11:23:45,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 11:23:45,048 INFO L480 AbstractCegarLoop]: Abstraction has 85 states and 88 transitions. [2018-11-28 11:23:45,048 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 11:23:45,048 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 88 transitions. [2018-11-28 11:23:45,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-28 11:23:45,048 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 11:23:45,049 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 11:23:45,049 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr0REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-11-28 11:23:45,049 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 11:23:45,049 INFO L82 PathProgramCache]: Analyzing trace with hash -1119860384, now seen corresponding path program 1 times [2018-11-28 11:23:45,049 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 11:23:45,049 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 11:23:45,050 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:23:45,050 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 11:23:45,050 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 11:23:45,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 11:23:45,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 11:23:45,094 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 11:23:45,112 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 9 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 11:23:45,112 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 10 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 11:23:45,124 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 11:23:45 BoogieIcfgContainer [2018-11-28 11:23:45,124 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 11:23:45,124 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 11:23:45,124 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 11:23:45,125 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 11:23:45,125 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 11:19:53" (3/4) ... [2018-11-28 11:23:45,133 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-28 11:23:45,138 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 9 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 11:23:45,138 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 10 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 11:23:45,173 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_32c6b509-8b97-4307-807d-cb731a071296/bin-2019/uautomizer/witness.graphml [2018-11-28 11:23:45,174 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 11:23:45,174 INFO L168 Benchmark]: Toolchain (without parser) took 232870.75 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 329.3 MB). Free memory was 955.3 MB in the beginning and 1.3 GB in the end (delta: -320.2 MB). Peak memory consumption was 9.0 MB. Max. memory is 11.5 GB. [2018-11-28 11:23:45,175 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 984.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 11:23:45,175 INFO L168 Benchmark]: CACSL2BoogieTranslator took 439.45 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 137.4 MB). Free memory was 955.3 MB in the beginning and 1.1 GB in the end (delta: -153.2 MB). Peak memory consumption was 33.4 MB. Max. memory is 11.5 GB. [2018-11-28 11:23:45,175 INFO L168 Benchmark]: Boogie Preprocessor took 68.49 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.0 MB). Peak memory consumption was 5.0 MB. Max. memory is 11.5 GB. [2018-11-28 11:23:45,176 INFO L168 Benchmark]: RCFGBuilder took 828.46 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 992.1 MB in the end (delta: 111.3 MB). Peak memory consumption was 111.3 MB. Max. memory is 11.5 GB. [2018-11-28 11:23:45,176 INFO L168 Benchmark]: TraceAbstraction took 231481.74 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 191.9 MB). Free memory was 992.1 MB in the beginning and 1.3 GB in the end (delta: -283.4 MB). There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 11:23:45,176 INFO L168 Benchmark]: Witness Printer took 49.37 ms. Allocated memory is still 1.4 GB. Free memory is still 1.3 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 11:23:45,177 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 984.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 439.45 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 137.4 MB). Free memory was 955.3 MB in the beginning and 1.1 GB in the end (delta: -153.2 MB). Peak memory consumption was 33.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 68.49 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.0 MB). Peak memory consumption was 5.0 MB. Max. memory is 11.5 GB. * RCFGBuilder took 828.46 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 992.1 MB in the end (delta: 111.3 MB). Peak memory consumption was 111.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 231481.74 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 191.9 MB). Free memory was 992.1 MB in the beginning and 1.3 GB in the end (delta: -283.4 MB). There was no memory consumed. Max. memory is 11.5 GB. * Witness Printer took 49.37 ms. Allocated memory is still 1.4 GB. Free memory is still 1.3 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 10 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 10 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1478]: free of unallocated memory possible free of unallocated memory possible We found a FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={16:0}] [L1492] CALL entry_point() VAL [ldv_global_msg_list={16:0}] [L1483] struct A19 a19; VAL [a19={18:0}, ldv_global_msg_list={16:0}] [L1484] CALL, EXPR probe_unsafe_19(&a19) VAL [a={18:0}, ldv_global_msg_list={16:0}] [L1455] int ret = - -3; VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ret=3] [L1457] CALL, EXPR ldv_malloc(sizeof(int)) VAL [\old(size)=4, ldv_global_msg_list={16:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={12:0}, ldv_global_msg_list={16:0}, malloc(size)={12:0}, size=4] [L1457] RET, EXPR ldv_malloc(sizeof(int)) VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ldv_malloc(sizeof(int))={12:0}, ret=3] [L1457] a->q = (int *)ldv_malloc(sizeof(int)) VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ldv_malloc(sizeof(int))={12:0}, ret=3] [L1458] EXPR a->q VAL [a={18:0}, a={18:0}, a->q={12:0}, ldv_global_msg_list={16:0}, ret=3] [L1458] COND FALSE !(!a->q) [L1460] CALL, EXPR f19(a) VAL [a={18:0}, ldv_global_msg_list={16:0}] [L1440] CALL, EXPR ldv_malloc(sizeof(int)) VAL [\old(size)=4, ldv_global_msg_list={16:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={14:0}, ldv_global_msg_list={16:0}, malloc(size)={14:0}, size=4] [L1440] RET, EXPR ldv_malloc(sizeof(int)) VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ldv_malloc(sizeof(int))={14:0}] [L1440] a->p = (int *)ldv_malloc(sizeof(int)) VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ldv_malloc(sizeof(int))={14:0}] [L1441] a->p VAL [a={18:0}, a={18:0}, a->p={14:0}, ldv_global_msg_list={16:0}] [L1441] COND TRUE a->p [L1442] return 0; VAL [\result=0, a={18:0}, a={18:0}, ldv_global_msg_list={16:0}] [L1460] RET, EXPR f19(a) VAL [a={18:0}, a={18:0}, f19(a)=0, ldv_global_msg_list={16:0}, ret=3] [L1460] ret = f19(a) [L1461] COND FALSE !(\read(ret)) VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ret=0] [L1464] CALL, EXPR g19() VAL [ldv_global_msg_list={16:0}] [L1451] return __VERIFIER_nondet_int(); [L1464] RET, EXPR g19() VAL [a={18:0}, a={18:0}, g19()=0, ldv_global_msg_list={16:0}, ret=0] [L1464] COND TRUE !g19() [L1470] CALL f19_undo(a) VAL [a={18:0}, ldv_global_msg_list={16:0}] [L1447] EXPR a->p VAL [a={18:0}, a={18:0}, a->p={14:0}, ldv_global_msg_list={16:0}] [L1447] free(a->p) VAL [a={18:0}, a={18:0}, a->p={14:0}, ldv_global_msg_list={16:0}] [L1447] free(a->p) [L1470] RET f19_undo(a) VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ret=0] [L1472] EXPR a->q VAL [a={18:0}, a={18:0}, a->q={12:0}, ldv_global_msg_list={16:0}, ret=0] [L1472] free(a->q) VAL [a={18:0}, a={18:0}, a->q={12:0}, ldv_global_msg_list={16:0}, ret=0] [L1472] free(a->q) [L1474] return ret; VAL [\result=0, a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ret=0] [L1484] RET, EXPR probe_unsafe_19(&a19) VAL [a19={18:0}, ldv_global_msg_list={16:0}, probe_unsafe_19(&a19)=0] [L1484] int ret = probe_unsafe_19(&a19); [L1486] COND TRUE ret==0 VAL [a19={18:0}, ldv_global_msg_list={16:0}, ret=0] [L1487] CALL disconnect_19(&a19) VAL [a={18:0}, ldv_global_msg_list={16:0}] [L1478] EXPR a->q VAL [a={18:0}, a={18:0}, a->q={12:0}, ldv_global_msg_list={16:0}] [L1478] free(a->q) VAL [a={18:0}, a={18:0}, a->q={12:0}, ldv_global_msg_list={16:0}] [L1478] free(a->q) VAL [a={18:0}, a={18:0}, a->q={12:0}, ldv_global_msg_list={16:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 48 procedures, 374 locations, 87 error locations. UNSAFE Result, 231.4s OverallTime, 36 OverallIterations, 2 TraceHistogramMax, 184.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2552 SDtfs, 2187 SDslu, 13386 SDs, 0 SdLazy, 12397 SolverSat, 777 SolverUnsat, 144 SolverUnknown, 0 SolverNotchecked, 98.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1021 GetRequests, 362 SyntacticMatches, 27 SemanticMatches, 632 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 4267 ImplicationChecksByTransitivity, 128.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=156occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 35 MinimizatonAttempts, 384 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 45.5s InterpolantComputationTime, 1883 NumberOfCodeBlocks, 1883 NumberOfCodeBlocksAsserted, 45 NumberOfCheckSat, 1780 ConstructedInterpolants, 124 QuantifiedInterpolants, 649655 SizeOfPredicates, 94 NumberOfNonLiveVariables, 2195 ConjunctsInSsa, 333 ConjunctsInUnsatCore, 44 InterpolantComputations, 33 PerfectInterpolantSequences, 126/152 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...