./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix022_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0cd3be1d Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix022_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1398d7789ca651387da6bb20b30b26b45db8cb07 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-0cd3be1 [2018-11-28 10:33:48,651 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 10:33:48,652 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 10:33:48,660 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 10:33:48,661 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 10:33:48,661 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 10:33:48,662 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 10:33:48,664 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 10:33:48,665 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 10:33:48,665 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 10:33:48,666 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 10:33:48,666 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 10:33:48,667 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 10:33:48,667 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 10:33:48,668 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 10:33:48,668 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 10:33:48,668 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 10:33:48,670 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 10:33:48,671 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 10:33:48,672 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 10:33:48,673 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 10:33:48,673 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 10:33:48,674 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 10:33:48,675 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 10:33:48,675 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 10:33:48,675 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 10:33:48,676 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 10:33:48,676 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 10:33:48,677 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 10:33:48,677 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 10:33:48,677 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 10:33:48,678 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 10:33:48,678 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 10:33:48,678 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 10:33:48,679 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 10:33:48,679 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 10:33:48,679 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-28 10:33:48,686 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 10:33:48,687 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 10:33:48,687 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 10:33:48,687 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 10:33:48,688 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 10:33:48,688 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 10:33:48,688 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 10:33:48,688 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 10:33:48,689 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 10:33:48,689 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 10:33:48,689 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 10:33:48,689 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 10:33:48,689 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-28 10:33:48,689 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 10:33:48,689 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-28 10:33:48,690 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 10:33:48,690 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-28 10:33:48,690 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 10:33:48,690 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-28 10:33:48,690 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 10:33:48,690 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 10:33:48,691 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 10:33:48,691 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 10:33:48,691 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 10:33:48,691 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 10:33:48,691 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 10:33:48,691 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-28 10:33:48,692 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-28 10:33:48,692 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 10:33:48,692 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-28 10:33:48,692 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1398d7789ca651387da6bb20b30b26b45db8cb07 [2018-11-28 10:33:48,717 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 10:33:48,727 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 10:33:48,729 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 10:33:48,731 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 10:33:48,731 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 10:33:48,731 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix022_power.opt_false-unreach-call.i [2018-11-28 10:33:48,779 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer/data/01bc10727/43e08bcf4e964f38ba46c84a0bfa0bf4/FLAG84bd2e9c2 [2018-11-28 10:33:49,158 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 10:33:49,159 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/sv-benchmarks/c/pthread-wmm/mix022_power.opt_false-unreach-call.i [2018-11-28 10:33:49,169 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer/data/01bc10727/43e08bcf4e964f38ba46c84a0bfa0bf4/FLAG84bd2e9c2 [2018-11-28 10:33:49,537 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer/data/01bc10727/43e08bcf4e964f38ba46c84a0bfa0bf4 [2018-11-28 10:33:49,539 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 10:33:49,539 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-28 10:33:49,540 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 10:33:49,540 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 10:33:49,543 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 10:33:49,544 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 10:33:49" (1/1) ... [2018-11-28 10:33:49,546 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4e39e4ef and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:33:49, skipping insertion in model container [2018-11-28 10:33:49,546 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 10:33:49" (1/1) ... [2018-11-28 10:33:49,551 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 10:33:49,582 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 10:33:49,821 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 10:33:49,832 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 10:33:49,941 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 10:33:49,977 INFO L195 MainTranslator]: Completed translation [2018-11-28 10:33:49,977 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:33:49 WrapperNode [2018-11-28 10:33:49,977 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 10:33:49,978 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-28 10:33:49,978 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-28 10:33:49,978 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-28 10:33:49,983 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:33:49" (1/1) ... [2018-11-28 10:33:49,997 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:33:49" (1/1) ... [2018-11-28 10:33:50,016 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-28 10:33:50,017 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 10:33:50,017 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 10:33:50,017 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 10:33:50,024 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:33:49" (1/1) ... [2018-11-28 10:33:50,024 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:33:49" (1/1) ... [2018-11-28 10:33:50,027 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:33:49" (1/1) ... [2018-11-28 10:33:50,027 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:33:49" (1/1) ... [2018-11-28 10:33:50,033 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:33:49" (1/1) ... [2018-11-28 10:33:50,035 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:33:49" (1/1) ... [2018-11-28 10:33:50,037 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:33:49" (1/1) ... [2018-11-28 10:33:50,040 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 10:33:50,040 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 10:33:50,040 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 10:33:50,040 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 10:33:50,041 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:33:49" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 10:33:50,075 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 10:33:50,075 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-28 10:33:50,075 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-28 10:33:50,075 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 10:33:50,075 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-28 10:33:50,075 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-28 10:33:50,075 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-28 10:33:50,076 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-28 10:33:50,076 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-28 10:33:50,076 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 10:33:50,076 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 10:33:50,077 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-28 10:33:50,496 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 10:33:50,496 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-28 10:33:50,496 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 10:33:50 BoogieIcfgContainer [2018-11-28 10:33:50,497 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 10:33:50,497 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 10:33:50,497 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 10:33:50,500 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 10:33:50,500 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 10:33:49" (1/3) ... [2018-11-28 10:33:50,500 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c697520 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 10:33:50, skipping insertion in model container [2018-11-28 10:33:50,500 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:33:49" (2/3) ... [2018-11-28 10:33:50,501 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c697520 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 10:33:50, skipping insertion in model container [2018-11-28 10:33:50,501 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 10:33:50" (3/3) ... [2018-11-28 10:33:50,502 INFO L112 eAbstractionObserver]: Analyzing ICFG mix022_power.opt_false-unreach-call.i [2018-11-28 10:33:50,531 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,531 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,532 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,532 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,532 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,532 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,532 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,532 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,532 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,533 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,533 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,533 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,533 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,533 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,533 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,533 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,534 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,534 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,534 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,534 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,534 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,534 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,534 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,534 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,534 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,534 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,534 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,535 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,535 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,535 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,535 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,535 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,535 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,535 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,535 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,535 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,535 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,535 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,536 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,536 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,536 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,536 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,536 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,536 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,536 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,536 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,537 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,537 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,537 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,537 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,537 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,537 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,537 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,537 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,537 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,537 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,538 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,538 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,538 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,538 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,538 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,538 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,538 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,538 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,538 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,538 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,539 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,539 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,539 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,539 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,539 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,539 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,539 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,539 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,540 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,540 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,540 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,540 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,540 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,540 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,541 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,541 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,541 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,541 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,541 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,541 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,542 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,542 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,542 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,542 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,542 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,542 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,542 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,543 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,543 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,543 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,543 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,543 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,543 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,544 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,544 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,544 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,544 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,544 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,544 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,544 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,545 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,545 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,545 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,545 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,545 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,545 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,546 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,546 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,546 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,546 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,546 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,546 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,547 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,547 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,551 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,551 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,552 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,552 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,552 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,552 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,552 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,552 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,553 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,553 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,553 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,553 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,553 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,553 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,553 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,554 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,554 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,554 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,554 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,554 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,554 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,554 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,555 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,555 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,559 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,559 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,559 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,559 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,560 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,560 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,560 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,560 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,560 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,560 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,560 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,561 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,561 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,561 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,561 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,561 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,561 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,561 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,562 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,562 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 10:33:50,576 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-28 10:33:50,576 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 10:33:50,581 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-28 10:33:50,591 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-28 10:33:50,608 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 10:33:50,609 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 10:33:50,609 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-28 10:33:50,609 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 10:33:50,609 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 10:33:50,609 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 10:33:50,610 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 10:33:50,610 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 10:33:50,610 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 10:33:50,620 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 142places, 180 transitions [2018-11-28 10:33:52,685 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 34806 states. [2018-11-28 10:33:52,686 INFO L276 IsEmpty]: Start isEmpty. Operand 34806 states. [2018-11-28 10:33:52,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-28 10:33:52,692 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:33:52,692 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:33:52,694 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:33:52,698 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:33:52,698 INFO L82 PathProgramCache]: Analyzing trace with hash 2100747441, now seen corresponding path program 1 times [2018-11-28 10:33:52,700 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:33:52,700 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:33:52,738 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:52,739 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:33:52,739 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:52,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:33:52,876 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:33:52,878 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:33:52,879 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 10:33:52,882 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 10:33:52,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 10:33:52,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:33:52,892 INFO L87 Difference]: Start difference. First operand 34806 states. Second operand 4 states. [2018-11-28 10:33:53,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:33:53,663 INFO L93 Difference]: Finished difference Result 60790 states and 234493 transitions. [2018-11-28 10:33:53,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 10:33:53,665 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2018-11-28 10:33:53,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:33:53,885 INFO L225 Difference]: With dead ends: 60790 [2018-11-28 10:33:53,885 INFO L226 Difference]: Without dead ends: 44270 [2018-11-28 10:33:53,886 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:33:54,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44270 states. [2018-11-28 10:33:54,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44270 to 27338. [2018-11-28 10:33:54,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27338 states. [2018-11-28 10:33:54,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27338 states to 27338 states and 105499 transitions. [2018-11-28 10:33:54,955 INFO L78 Accepts]: Start accepts. Automaton has 27338 states and 105499 transitions. Word has length 33 [2018-11-28 10:33:54,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:33:54,955 INFO L480 AbstractCegarLoop]: Abstraction has 27338 states and 105499 transitions. [2018-11-28 10:33:54,956 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 10:33:54,956 INFO L276 IsEmpty]: Start isEmpty. Operand 27338 states and 105499 transitions. [2018-11-28 10:33:54,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-28 10:33:54,961 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:33:54,963 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:33:54,963 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:33:54,964 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:33:54,964 INFO L82 PathProgramCache]: Analyzing trace with hash 1664977985, now seen corresponding path program 1 times [2018-11-28 10:33:54,964 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:33:54,964 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:33:54,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:54,968 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:33:54,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:54,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:33:55,041 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:33:55,041 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:33:55,042 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 10:33:55,043 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 10:33:55,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 10:33:55,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:33:55,043 INFO L87 Difference]: Start difference. First operand 27338 states and 105499 transitions. Second operand 4 states. [2018-11-28 10:33:55,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:33:55,175 INFO L93 Difference]: Finished difference Result 8528 states and 28344 transitions. [2018-11-28 10:33:55,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 10:33:55,176 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 45 [2018-11-28 10:33:55,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:33:55,204 INFO L225 Difference]: With dead ends: 8528 [2018-11-28 10:33:55,204 INFO L226 Difference]: Without dead ends: 7466 [2018-11-28 10:33:55,205 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 10:33:55,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7466 states. [2018-11-28 10:33:55,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7466 to 7466. [2018-11-28 10:33:55,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7466 states. [2018-11-28 10:33:55,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7466 states to 7466 states and 24636 transitions. [2018-11-28 10:33:55,344 INFO L78 Accepts]: Start accepts. Automaton has 7466 states and 24636 transitions. Word has length 45 [2018-11-28 10:33:55,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:33:55,345 INFO L480 AbstractCegarLoop]: Abstraction has 7466 states and 24636 transitions. [2018-11-28 10:33:55,345 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 10:33:55,345 INFO L276 IsEmpty]: Start isEmpty. Operand 7466 states and 24636 transitions. [2018-11-28 10:33:55,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-28 10:33:55,346 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:33:55,346 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:33:55,347 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:33:55,347 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:33:55,348 INFO L82 PathProgramCache]: Analyzing trace with hash 1909915460, now seen corresponding path program 1 times [2018-11-28 10:33:55,348 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:33:55,348 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:33:55,351 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:55,351 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:33:55,351 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:55,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:33:55,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:33:55,434 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:33:55,434 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 10:33:55,434 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 10:33:55,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 10:33:55,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 10:33:55,434 INFO L87 Difference]: Start difference. First operand 7466 states and 24636 transitions. Second operand 5 states. [2018-11-28 10:33:55,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:33:55,726 INFO L93 Difference]: Finished difference Result 13998 states and 45805 transitions. [2018-11-28 10:33:55,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 10:33:55,726 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2018-11-28 10:33:55,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:33:55,755 INFO L225 Difference]: With dead ends: 13998 [2018-11-28 10:33:55,756 INFO L226 Difference]: Without dead ends: 13930 [2018-11-28 10:33:55,756 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-28 10:33:55,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13930 states. [2018-11-28 10:33:56,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13930 to 9441. [2018-11-28 10:33:56,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9441 states. [2018-11-28 10:33:56,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9441 states to 9441 states and 30542 transitions. [2018-11-28 10:33:56,052 INFO L78 Accepts]: Start accepts. Automaton has 9441 states and 30542 transitions. Word has length 46 [2018-11-28 10:33:56,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:33:56,053 INFO L480 AbstractCegarLoop]: Abstraction has 9441 states and 30542 transitions. [2018-11-28 10:33:56,053 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 10:33:56,053 INFO L276 IsEmpty]: Start isEmpty. Operand 9441 states and 30542 transitions. [2018-11-28 10:33:56,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-28 10:33:56,055 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:33:56,055 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:33:56,055 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:33:56,055 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:33:56,056 INFO L82 PathProgramCache]: Analyzing trace with hash -1845061814, now seen corresponding path program 1 times [2018-11-28 10:33:56,056 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:33:56,056 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:33:56,058 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:56,058 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:33:56,058 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:56,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:33:56,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:33:56,109 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:33:56,110 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 10:33:56,110 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 10:33:56,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 10:33:56,110 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 10:33:56,110 INFO L87 Difference]: Start difference. First operand 9441 states and 30542 transitions. Second operand 3 states. [2018-11-28 10:33:56,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:33:56,189 INFO L93 Difference]: Finished difference Result 13279 states and 42641 transitions. [2018-11-28 10:33:56,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 10:33:56,190 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2018-11-28 10:33:56,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:33:56,215 INFO L225 Difference]: With dead ends: 13279 [2018-11-28 10:33:56,216 INFO L226 Difference]: Without dead ends: 13279 [2018-11-28 10:33:56,216 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 10:33:56,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13279 states. [2018-11-28 10:33:56,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13279 to 9845. [2018-11-28 10:33:56,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9845 states. [2018-11-28 10:33:56,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9845 states to 9845 states and 31508 transitions. [2018-11-28 10:33:56,346 INFO L78 Accepts]: Start accepts. Automaton has 9845 states and 31508 transitions. Word has length 48 [2018-11-28 10:33:56,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:33:56,346 INFO L480 AbstractCegarLoop]: Abstraction has 9845 states and 31508 transitions. [2018-11-28 10:33:56,346 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 10:33:56,346 INFO L276 IsEmpty]: Start isEmpty. Operand 9845 states and 31508 transitions. [2018-11-28 10:33:56,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-28 10:33:56,348 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:33:56,348 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:33:56,348 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:33:56,348 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:33:56,348 INFO L82 PathProgramCache]: Analyzing trace with hash 484350805, now seen corresponding path program 1 times [2018-11-28 10:33:56,348 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:33:56,348 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:33:56,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:56,350 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:33:56,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:56,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:33:56,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:33:56,437 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:33:56,437 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 10:33:56,437 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 10:33:56,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 10:33:56,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-28 10:33:56,437 INFO L87 Difference]: Start difference. First operand 9845 states and 31508 transitions. Second operand 7 states. [2018-11-28 10:33:56,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:33:56,844 INFO L93 Difference]: Finished difference Result 12285 states and 38673 transitions. [2018-11-28 10:33:56,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 10:33:56,845 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2018-11-28 10:33:56,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:33:56,860 INFO L225 Difference]: With dead ends: 12285 [2018-11-28 10:33:56,860 INFO L226 Difference]: Without dead ends: 12213 [2018-11-28 10:33:56,860 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2018-11-28 10:33:56,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12213 states. [2018-11-28 10:33:56,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12213 to 10849. [2018-11-28 10:33:56,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10849 states. [2018-11-28 10:33:56,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10849 states to 10849 states and 34563 transitions. [2018-11-28 10:33:56,981 INFO L78 Accepts]: Start accepts. Automaton has 10849 states and 34563 transitions. Word has length 52 [2018-11-28 10:33:56,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:33:56,982 INFO L480 AbstractCegarLoop]: Abstraction has 10849 states and 34563 transitions. [2018-11-28 10:33:56,982 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 10:33:56,982 INFO L276 IsEmpty]: Start isEmpty. Operand 10849 states and 34563 transitions. [2018-11-28 10:33:56,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-28 10:33:56,986 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:33:56,986 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:33:56,986 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:33:56,987 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:33:56,987 INFO L82 PathProgramCache]: Analyzing trace with hash 1383304625, now seen corresponding path program 1 times [2018-11-28 10:33:56,987 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:33:56,987 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:33:56,988 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:56,989 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:33:56,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:56,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:33:57,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:33:57,042 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:33:57,042 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 10:33:57,042 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 10:33:57,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 10:33:57,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:33:57,043 INFO L87 Difference]: Start difference. First operand 10849 states and 34563 transitions. Second operand 4 states. [2018-11-28 10:33:57,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:33:57,134 INFO L93 Difference]: Finished difference Result 12396 states and 39572 transitions. [2018-11-28 10:33:57,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 10:33:57,134 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 60 [2018-11-28 10:33:57,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:33:57,151 INFO L225 Difference]: With dead ends: 12396 [2018-11-28 10:33:57,151 INFO L226 Difference]: Without dead ends: 12396 [2018-11-28 10:33:57,151 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 10:33:57,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12396 states. [2018-11-28 10:33:57,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12396 to 11369. [2018-11-28 10:33:57,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11369 states. [2018-11-28 10:33:57,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11369 states to 11369 states and 36236 transitions. [2018-11-28 10:33:57,316 INFO L78 Accepts]: Start accepts. Automaton has 11369 states and 36236 transitions. Word has length 60 [2018-11-28 10:33:57,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:33:57,316 INFO L480 AbstractCegarLoop]: Abstraction has 11369 states and 36236 transitions. [2018-11-28 10:33:57,316 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 10:33:57,317 INFO L276 IsEmpty]: Start isEmpty. Operand 11369 states and 36236 transitions. [2018-11-28 10:33:57,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-28 10:33:57,321 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:33:57,321 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:33:57,321 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:33:57,321 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:33:57,322 INFO L82 PathProgramCache]: Analyzing trace with hash -1168852336, now seen corresponding path program 1 times [2018-11-28 10:33:57,322 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:33:57,322 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:33:57,323 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:57,324 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:33:57,324 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:57,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:33:57,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:33:57,392 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:33:57,392 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 10:33:57,392 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 10:33:57,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 10:33:57,392 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 10:33:57,393 INFO L87 Difference]: Start difference. First operand 11369 states and 36236 transitions. Second operand 6 states. [2018-11-28 10:33:57,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:33:57,833 INFO L93 Difference]: Finished difference Result 20969 states and 66486 transitions. [2018-11-28 10:33:57,833 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 10:33:57,833 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2018-11-28 10:33:57,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:33:57,858 INFO L225 Difference]: With dead ends: 20969 [2018-11-28 10:33:57,858 INFO L226 Difference]: Without dead ends: 20898 [2018-11-28 10:33:57,858 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-11-28 10:33:57,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20898 states. [2018-11-28 10:33:58,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20898 to 13755. [2018-11-28 10:33:58,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13755 states. [2018-11-28 10:33:58,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13755 states to 13755 states and 43280 transitions. [2018-11-28 10:33:58,056 INFO L78 Accepts]: Start accepts. Automaton has 13755 states and 43280 transitions. Word has length 60 [2018-11-28 10:33:58,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:33:58,056 INFO L480 AbstractCegarLoop]: Abstraction has 13755 states and 43280 transitions. [2018-11-28 10:33:58,057 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 10:33:58,057 INFO L276 IsEmpty]: Start isEmpty. Operand 13755 states and 43280 transitions. [2018-11-28 10:33:58,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-28 10:33:58,062 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:33:58,062 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:33:58,062 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:33:58,062 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:33:58,062 INFO L82 PathProgramCache]: Analyzing trace with hash -221622989, now seen corresponding path program 1 times [2018-11-28 10:33:58,063 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:33:58,063 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:33:58,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:58,065 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:33:58,065 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:58,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:33:58,125 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:33:58,125 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:33:58,125 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 10:33:58,125 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 10:33:58,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 10:33:58,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:33:58,126 INFO L87 Difference]: Start difference. First operand 13755 states and 43280 transitions. Second operand 4 states. [2018-11-28 10:33:58,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:33:58,373 INFO L93 Difference]: Finished difference Result 23352 states and 74493 transitions. [2018-11-28 10:33:58,373 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 10:33:58,373 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 64 [2018-11-28 10:33:58,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:33:58,403 INFO L225 Difference]: With dead ends: 23352 [2018-11-28 10:33:58,404 INFO L226 Difference]: Without dead ends: 23352 [2018-11-28 10:33:58,404 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:33:58,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23352 states. [2018-11-28 10:33:58,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23352 to 14523. [2018-11-28 10:33:58,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14523 states. [2018-11-28 10:33:58,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14523 states to 14523 states and 45664 transitions. [2018-11-28 10:33:58,602 INFO L78 Accepts]: Start accepts. Automaton has 14523 states and 45664 transitions. Word has length 64 [2018-11-28 10:33:58,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:33:58,602 INFO L480 AbstractCegarLoop]: Abstraction has 14523 states and 45664 transitions. [2018-11-28 10:33:58,602 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 10:33:58,602 INFO L276 IsEmpty]: Start isEmpty. Operand 14523 states and 45664 transitions. [2018-11-28 10:33:58,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-28 10:33:58,607 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:33:58,607 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:33:58,607 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:33:58,607 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:33:58,607 INFO L82 PathProgramCache]: Analyzing trace with hash 71780018, now seen corresponding path program 1 times [2018-11-28 10:33:58,607 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:33:58,607 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:33:58,609 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:58,609 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:33:58,609 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:58,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:33:58,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:33:58,657 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:33:58,657 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 10:33:58,657 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 10:33:58,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 10:33:58,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:33:58,658 INFO L87 Difference]: Start difference. First operand 14523 states and 45664 transitions. Second operand 4 states. [2018-11-28 10:33:58,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:33:58,888 INFO L93 Difference]: Finished difference Result 18411 states and 56991 transitions. [2018-11-28 10:33:58,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 10:33:58,888 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 64 [2018-11-28 10:33:58,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:33:58,909 INFO L225 Difference]: With dead ends: 18411 [2018-11-28 10:33:58,909 INFO L226 Difference]: Without dead ends: 18411 [2018-11-28 10:33:58,909 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:33:58,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18411 states. [2018-11-28 10:33:59,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18411 to 16569. [2018-11-28 10:33:59,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16569 states. [2018-11-28 10:33:59,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16569 states to 16569 states and 51537 transitions. [2018-11-28 10:33:59,094 INFO L78 Accepts]: Start accepts. Automaton has 16569 states and 51537 transitions. Word has length 64 [2018-11-28 10:33:59,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:33:59,094 INFO L480 AbstractCegarLoop]: Abstraction has 16569 states and 51537 transitions. [2018-11-28 10:33:59,094 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 10:33:59,094 INFO L276 IsEmpty]: Start isEmpty. Operand 16569 states and 51537 transitions. [2018-11-28 10:33:59,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-28 10:33:59,099 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:33:59,099 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:33:59,100 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:33:59,100 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:33:59,100 INFO L82 PathProgramCache]: Analyzing trace with hash 1112746611, now seen corresponding path program 1 times [2018-11-28 10:33:59,100 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:33:59,100 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:33:59,102 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:59,102 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:33:59,102 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:59,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:33:59,229 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:33:59,229 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:33:59,229 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 10:33:59,229 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 10:33:59,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 10:33:59,230 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 10:33:59,230 INFO L87 Difference]: Start difference. First operand 16569 states and 51537 transitions. Second operand 3 states. [2018-11-28 10:33:59,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:33:59,370 INFO L93 Difference]: Finished difference Result 17193 states and 53232 transitions. [2018-11-28 10:33:59,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 10:33:59,371 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2018-11-28 10:33:59,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:33:59,389 INFO L225 Difference]: With dead ends: 17193 [2018-11-28 10:33:59,389 INFO L226 Difference]: Without dead ends: 17193 [2018-11-28 10:33:59,389 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 10:33:59,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17193 states. [2018-11-28 10:33:59,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17193 to 16901. [2018-11-28 10:33:59,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16901 states. [2018-11-28 10:33:59,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16901 states to 16901 states and 52431 transitions. [2018-11-28 10:33:59,555 INFO L78 Accepts]: Start accepts. Automaton has 16901 states and 52431 transitions. Word has length 64 [2018-11-28 10:33:59,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:33:59,555 INFO L480 AbstractCegarLoop]: Abstraction has 16901 states and 52431 transitions. [2018-11-28 10:33:59,556 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 10:33:59,556 INFO L276 IsEmpty]: Start isEmpty. Operand 16901 states and 52431 transitions. [2018-11-28 10:33:59,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 10:33:59,562 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:33:59,562 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:33:59,562 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:33:59,562 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:33:59,562 INFO L82 PathProgramCache]: Analyzing trace with hash -2016883427, now seen corresponding path program 1 times [2018-11-28 10:33:59,563 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:33:59,563 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:33:59,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:59,564 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:33:59,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:33:59,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:33:59,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:33:59,643 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:33:59,644 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 10:33:59,644 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 10:33:59,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 10:33:59,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-28 10:33:59,644 INFO L87 Difference]: Start difference. First operand 16901 states and 52431 transitions. Second operand 6 states. [2018-11-28 10:34:00,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:00,337 INFO L93 Difference]: Finished difference Result 20789 states and 63395 transitions. [2018-11-28 10:34:00,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 10:34:00,337 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2018-11-28 10:34:00,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:00,362 INFO L225 Difference]: With dead ends: 20789 [2018-11-28 10:34:00,362 INFO L226 Difference]: Without dead ends: 20789 [2018-11-28 10:34:00,362 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-28 10:34:00,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20789 states. [2018-11-28 10:34:00,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20789 to 19521. [2018-11-28 10:34:00,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19521 states. [2018-11-28 10:34:00,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19521 states to 19521 states and 60007 transitions. [2018-11-28 10:34:00,570 INFO L78 Accepts]: Start accepts. Automaton has 19521 states and 60007 transitions. Word has length 66 [2018-11-28 10:34:00,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:00,570 INFO L480 AbstractCegarLoop]: Abstraction has 19521 states and 60007 transitions. [2018-11-28 10:34:00,571 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 10:34:00,571 INFO L276 IsEmpty]: Start isEmpty. Operand 19521 states and 60007 transitions. [2018-11-28 10:34:00,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 10:34:00,578 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:00,578 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:00,578 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:00,578 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:00,578 INFO L82 PathProgramCache]: Analyzing trace with hash -1055269410, now seen corresponding path program 1 times [2018-11-28 10:34:00,579 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:00,579 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:00,580 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:00,580 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:00,580 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:00,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:00,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:00,679 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:00,679 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 10:34:00,679 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 10:34:00,679 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 10:34:00,679 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 10:34:00,680 INFO L87 Difference]: Start difference. First operand 19521 states and 60007 transitions. Second operand 6 states. [2018-11-28 10:34:01,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:01,038 INFO L93 Difference]: Finished difference Result 22441 states and 66578 transitions. [2018-11-28 10:34:01,038 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 10:34:01,038 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2018-11-28 10:34:01,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:01,060 INFO L225 Difference]: With dead ends: 22441 [2018-11-28 10:34:01,060 INFO L226 Difference]: Without dead ends: 22441 [2018-11-28 10:34:01,060 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-28 10:34:01,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22441 states. [2018-11-28 10:34:01,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22441 to 20085. [2018-11-28 10:34:01,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20085 states. [2018-11-28 10:34:01,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20085 states to 20085 states and 60622 transitions. [2018-11-28 10:34:01,301 INFO L78 Accepts]: Start accepts. Automaton has 20085 states and 60622 transitions. Word has length 66 [2018-11-28 10:34:01,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:01,301 INFO L480 AbstractCegarLoop]: Abstraction has 20085 states and 60622 transitions. [2018-11-28 10:34:01,301 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 10:34:01,301 INFO L276 IsEmpty]: Start isEmpty. Operand 20085 states and 60622 transitions. [2018-11-28 10:34:01,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 10:34:01,308 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:01,308 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:01,308 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:01,309 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:01,309 INFO L82 PathProgramCache]: Analyzing trace with hash 189495071, now seen corresponding path program 1 times [2018-11-28 10:34:01,309 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:01,309 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:01,310 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:01,310 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:01,311 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:01,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:01,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:01,383 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:01,383 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 10:34:01,383 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 10:34:01,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 10:34:01,383 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 10:34:01,383 INFO L87 Difference]: Start difference. First operand 20085 states and 60622 transitions. Second operand 5 states. [2018-11-28 10:34:01,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:01,651 INFO L93 Difference]: Finished difference Result 26432 states and 79262 transitions. [2018-11-28 10:34:01,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 10:34:01,651 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2018-11-28 10:34:01,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:01,685 INFO L225 Difference]: With dead ends: 26432 [2018-11-28 10:34:01,685 INFO L226 Difference]: Without dead ends: 26432 [2018-11-28 10:34:01,685 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-28 10:34:01,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26432 states. [2018-11-28 10:34:02,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26432 to 23813. [2018-11-28 10:34:02,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23813 states. [2018-11-28 10:34:02,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23813 states to 23813 states and 71372 transitions. [2018-11-28 10:34:02,052 INFO L78 Accepts]: Start accepts. Automaton has 23813 states and 71372 transitions. Word has length 66 [2018-11-28 10:34:02,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:02,053 INFO L480 AbstractCegarLoop]: Abstraction has 23813 states and 71372 transitions. [2018-11-28 10:34:02,053 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 10:34:02,053 INFO L276 IsEmpty]: Start isEmpty. Operand 23813 states and 71372 transitions. [2018-11-28 10:34:02,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 10:34:02,061 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:02,061 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:02,061 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:02,061 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:02,061 INFO L82 PathProgramCache]: Analyzing trace with hash -321039106, now seen corresponding path program 1 times [2018-11-28 10:34:02,061 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:02,061 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:02,062 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:02,062 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:02,062 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:02,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:02,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:02,124 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:02,124 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 10:34:02,124 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 10:34:02,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 10:34:02,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 10:34:02,125 INFO L87 Difference]: Start difference. First operand 23813 states and 71372 transitions. Second operand 5 states. [2018-11-28 10:34:02,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:02,454 INFO L93 Difference]: Finished difference Result 33063 states and 98211 transitions. [2018-11-28 10:34:02,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 10:34:02,454 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2018-11-28 10:34:02,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:02,495 INFO L225 Difference]: With dead ends: 33063 [2018-11-28 10:34:02,496 INFO L226 Difference]: Without dead ends: 33063 [2018-11-28 10:34:02,496 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-28 10:34:02,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33063 states. [2018-11-28 10:34:02,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33063 to 29343. [2018-11-28 10:34:02,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29343 states. [2018-11-28 10:34:02,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29343 states to 29343 states and 87599 transitions. [2018-11-28 10:34:02,838 INFO L78 Accepts]: Start accepts. Automaton has 29343 states and 87599 transitions. Word has length 66 [2018-11-28 10:34:02,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:02,838 INFO L480 AbstractCegarLoop]: Abstraction has 29343 states and 87599 transitions. [2018-11-28 10:34:02,838 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 10:34:02,839 INFO L276 IsEmpty]: Start isEmpty. Operand 29343 states and 87599 transitions. [2018-11-28 10:34:02,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 10:34:02,847 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:02,847 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:02,847 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:02,847 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:02,847 INFO L82 PathProgramCache]: Analyzing trace with hash -2128493569, now seen corresponding path program 1 times [2018-11-28 10:34:02,847 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:02,848 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:02,849 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:02,849 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:02,849 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:02,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:02,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:02,940 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:02,940 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 10:34:02,941 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 10:34:02,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 10:34:02,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:34:02,941 INFO L87 Difference]: Start difference. First operand 29343 states and 87599 transitions. Second operand 4 states. [2018-11-28 10:34:03,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:03,448 INFO L93 Difference]: Finished difference Result 38903 states and 116585 transitions. [2018-11-28 10:34:03,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 10:34:03,448 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2018-11-28 10:34:03,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:03,492 INFO L225 Difference]: With dead ends: 38903 [2018-11-28 10:34:03,492 INFO L226 Difference]: Without dead ends: 38671 [2018-11-28 10:34:03,493 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 10:34:03,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38671 states. [2018-11-28 10:34:03,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38671 to 35807. [2018-11-28 10:34:03,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35807 states. [2018-11-28 10:34:03,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35807 states to 35807 states and 107399 transitions. [2018-11-28 10:34:03,884 INFO L78 Accepts]: Start accepts. Automaton has 35807 states and 107399 transitions. Word has length 66 [2018-11-28 10:34:03,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:03,884 INFO L480 AbstractCegarLoop]: Abstraction has 35807 states and 107399 transitions. [2018-11-28 10:34:03,884 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 10:34:03,884 INFO L276 IsEmpty]: Start isEmpty. Operand 35807 states and 107399 transitions. [2018-11-28 10:34:03,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 10:34:03,893 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:03,893 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:03,894 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:03,894 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:03,894 INFO L82 PathProgramCache]: Analyzing trace with hash 369522368, now seen corresponding path program 1 times [2018-11-28 10:34:03,894 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:03,894 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:03,896 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:03,896 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:03,896 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:03,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:03,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:03,938 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:03,938 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 10:34:03,938 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 10:34:03,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 10:34:03,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 10:34:03,939 INFO L87 Difference]: Start difference. First operand 35807 states and 107399 transitions. Second operand 5 states. [2018-11-28 10:34:03,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:03,972 INFO L93 Difference]: Finished difference Result 9315 states and 22546 transitions. [2018-11-28 10:34:03,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 10:34:03,972 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2018-11-28 10:34:03,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:03,978 INFO L225 Difference]: With dead ends: 9315 [2018-11-28 10:34:03,978 INFO L226 Difference]: Without dead ends: 7463 [2018-11-28 10:34:03,978 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-28 10:34:03,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7463 states. [2018-11-28 10:34:04,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7463 to 6360. [2018-11-28 10:34:04,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6360 states. [2018-11-28 10:34:04,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6360 states to 6360 states and 15017 transitions. [2018-11-28 10:34:04,096 INFO L78 Accepts]: Start accepts. Automaton has 6360 states and 15017 transitions. Word has length 66 [2018-11-28 10:34:04,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:04,096 INFO L480 AbstractCegarLoop]: Abstraction has 6360 states and 15017 transitions. [2018-11-28 10:34:04,096 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 10:34:04,096 INFO L276 IsEmpty]: Start isEmpty. Operand 6360 states and 15017 transitions. [2018-11-28 10:34:04,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 10:34:04,101 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:04,101 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:04,102 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:04,102 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:04,102 INFO L82 PathProgramCache]: Analyzing trace with hash -1184013087, now seen corresponding path program 1 times [2018-11-28 10:34:04,102 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:04,102 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:04,103 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:04,103 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:04,103 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:04,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:04,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:04,146 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:04,146 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 10:34:04,146 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 10:34:04,146 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 10:34:04,147 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 10:34:04,147 INFO L87 Difference]: Start difference. First operand 6360 states and 15017 transitions. Second operand 3 states. [2018-11-28 10:34:04,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:04,185 INFO L93 Difference]: Finished difference Result 8819 states and 20756 transitions. [2018-11-28 10:34:04,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 10:34:04,186 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2018-11-28 10:34:04,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:04,191 INFO L225 Difference]: With dead ends: 8819 [2018-11-28 10:34:04,192 INFO L226 Difference]: Without dead ends: 8819 [2018-11-28 10:34:04,192 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 10:34:04,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8819 states. [2018-11-28 10:34:04,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8819 to 6299. [2018-11-28 10:34:04,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6299 states. [2018-11-28 10:34:04,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6299 states to 6299 states and 14557 transitions. [2018-11-28 10:34:04,249 INFO L78 Accepts]: Start accepts. Automaton has 6299 states and 14557 transitions. Word has length 66 [2018-11-28 10:34:04,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:04,250 INFO L480 AbstractCegarLoop]: Abstraction has 6299 states and 14557 transitions. [2018-11-28 10:34:04,250 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 10:34:04,250 INFO L276 IsEmpty]: Start isEmpty. Operand 6299 states and 14557 transitions. [2018-11-28 10:34:04,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-28 10:34:04,253 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:04,253 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:04,253 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:04,254 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:04,254 INFO L82 PathProgramCache]: Analyzing trace with hash 280585492, now seen corresponding path program 1 times [2018-11-28 10:34:04,254 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:04,254 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:04,255 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:04,255 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:04,255 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:04,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:04,310 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:04,311 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:04,311 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 10:34:04,311 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 10:34:04,311 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 10:34:04,311 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 10:34:04,311 INFO L87 Difference]: Start difference. First operand 6299 states and 14557 transitions. Second operand 5 states. [2018-11-28 10:34:04,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:04,425 INFO L93 Difference]: Finished difference Result 7469 states and 17198 transitions. [2018-11-28 10:34:04,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 10:34:04,426 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-11-28 10:34:04,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:04,431 INFO L225 Difference]: With dead ends: 7469 [2018-11-28 10:34:04,431 INFO L226 Difference]: Without dead ends: 7469 [2018-11-28 10:34:04,431 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-28 10:34:04,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7469 states. [2018-11-28 10:34:04,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7469 to 6743. [2018-11-28 10:34:04,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6743 states. [2018-11-28 10:34:04,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6743 states to 6743 states and 15561 transitions. [2018-11-28 10:34:04,487 INFO L78 Accepts]: Start accepts. Automaton has 6743 states and 15561 transitions. Word has length 72 [2018-11-28 10:34:04,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:04,488 INFO L480 AbstractCegarLoop]: Abstraction has 6743 states and 15561 transitions. [2018-11-28 10:34:04,488 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 10:34:04,488 INFO L276 IsEmpty]: Start isEmpty. Operand 6743 states and 15561 transitions. [2018-11-28 10:34:04,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-28 10:34:04,492 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:04,492 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:04,492 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:04,492 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:04,492 INFO L82 PathProgramCache]: Analyzing trace with hash 2023395827, now seen corresponding path program 1 times [2018-11-28 10:34:04,493 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:04,493 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:04,493 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:04,493 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:04,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:04,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:04,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:04,628 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:04,629 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-28 10:34:04,629 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 10:34:04,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 10:34:04,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-28 10:34:04,629 INFO L87 Difference]: Start difference. First operand 6743 states and 15561 transitions. Second operand 9 states. [2018-11-28 10:34:04,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:04,987 INFO L93 Difference]: Finished difference Result 8945 states and 20482 transitions. [2018-11-28 10:34:04,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-28 10:34:04,987 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 72 [2018-11-28 10:34:04,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:04,993 INFO L225 Difference]: With dead ends: 8945 [2018-11-28 10:34:04,993 INFO L226 Difference]: Without dead ends: 8826 [2018-11-28 10:34:04,993 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=74, Invalid=232, Unknown=0, NotChecked=0, Total=306 [2018-11-28 10:34:05,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8826 states. [2018-11-28 10:34:05,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8826 to 6840. [2018-11-28 10:34:05,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6840 states. [2018-11-28 10:34:05,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6840 states to 6840 states and 15654 transitions. [2018-11-28 10:34:05,055 INFO L78 Accepts]: Start accepts. Automaton has 6840 states and 15654 transitions. Word has length 72 [2018-11-28 10:34:05,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:05,055 INFO L480 AbstractCegarLoop]: Abstraction has 6840 states and 15654 transitions. [2018-11-28 10:34:05,055 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 10:34:05,055 INFO L276 IsEmpty]: Start isEmpty. Operand 6840 states and 15654 transitions. [2018-11-28 10:34:05,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-28 10:34:05,061 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:05,061 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:05,061 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:05,061 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:05,061 INFO L82 PathProgramCache]: Analyzing trace with hash 1044371189, now seen corresponding path program 1 times [2018-11-28 10:34:05,061 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:05,061 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:05,062 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:05,063 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:05,063 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:05,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:05,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:05,119 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:05,120 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 10:34:05,120 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 10:34:05,120 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 10:34:05,120 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:34:05,120 INFO L87 Difference]: Start difference. First operand 6840 states and 15654 transitions. Second operand 4 states. [2018-11-28 10:34:05,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:05,293 INFO L93 Difference]: Finished difference Result 10607 states and 24141 transitions. [2018-11-28 10:34:05,293 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 10:34:05,293 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 91 [2018-11-28 10:34:05,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:05,303 INFO L225 Difference]: With dead ends: 10607 [2018-11-28 10:34:05,303 INFO L226 Difference]: Without dead ends: 10607 [2018-11-28 10:34:05,303 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:34:05,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10607 states. [2018-11-28 10:34:05,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10607 to 7960. [2018-11-28 10:34:05,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7960 states. [2018-11-28 10:34:05,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7960 states to 7960 states and 17988 transitions. [2018-11-28 10:34:05,383 INFO L78 Accepts]: Start accepts. Automaton has 7960 states and 17988 transitions. Word has length 91 [2018-11-28 10:34:05,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:05,383 INFO L480 AbstractCegarLoop]: Abstraction has 7960 states and 17988 transitions. [2018-11-28 10:34:05,383 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 10:34:05,383 INFO L276 IsEmpty]: Start isEmpty. Operand 7960 states and 17988 transitions. [2018-11-28 10:34:05,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-28 10:34:05,389 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:05,389 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:05,389 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:05,389 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:05,389 INFO L82 PathProgramCache]: Analyzing trace with hash -1340787177, now seen corresponding path program 1 times [2018-11-28 10:34:05,389 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:05,389 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:05,390 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:05,390 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:05,390 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:05,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:05,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:05,448 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:05,448 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 10:34:05,448 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 10:34:05,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 10:34:05,448 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:34:05,449 INFO L87 Difference]: Start difference. First operand 7960 states and 17988 transitions. Second operand 4 states. [2018-11-28 10:34:05,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:05,526 INFO L93 Difference]: Finished difference Result 8525 states and 19281 transitions. [2018-11-28 10:34:05,526 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 10:34:05,526 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 91 [2018-11-28 10:34:05,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:05,532 INFO L225 Difference]: With dead ends: 8525 [2018-11-28 10:34:05,532 INFO L226 Difference]: Without dead ends: 8525 [2018-11-28 10:34:05,532 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 10:34:05,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8525 states. [2018-11-28 10:34:05,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8525 to 7866. [2018-11-28 10:34:05,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7866 states. [2018-11-28 10:34:05,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7866 states to 7866 states and 17883 transitions. [2018-11-28 10:34:05,594 INFO L78 Accepts]: Start accepts. Automaton has 7866 states and 17883 transitions. Word has length 91 [2018-11-28 10:34:05,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:05,594 INFO L480 AbstractCegarLoop]: Abstraction has 7866 states and 17883 transitions. [2018-11-28 10:34:05,594 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 10:34:05,594 INFO L276 IsEmpty]: Start isEmpty. Operand 7866 states and 17883 transitions. [2018-11-28 10:34:05,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 10:34:05,600 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:05,600 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:05,600 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:05,600 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:05,601 INFO L82 PathProgramCache]: Analyzing trace with hash 649003067, now seen corresponding path program 1 times [2018-11-28 10:34:05,601 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:05,601 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:05,602 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:05,602 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:05,602 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:05,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:05,667 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:05,667 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:05,668 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 10:34:05,668 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 10:34:05,668 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 10:34:05,668 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-28 10:34:05,668 INFO L87 Difference]: Start difference. First operand 7866 states and 17883 transitions. Second operand 7 states. [2018-11-28 10:34:06,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:06,102 INFO L93 Difference]: Finished difference Result 9704 states and 21991 transitions. [2018-11-28 10:34:06,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 10:34:06,102 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 93 [2018-11-28 10:34:06,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:06,109 INFO L225 Difference]: With dead ends: 9704 [2018-11-28 10:34:06,109 INFO L226 Difference]: Without dead ends: 9704 [2018-11-28 10:34:06,110 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-28 10:34:06,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9704 states. [2018-11-28 10:34:06,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9704 to 7978. [2018-11-28 10:34:06,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7978 states. [2018-11-28 10:34:06,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7978 states to 7978 states and 18203 transitions. [2018-11-28 10:34:06,182 INFO L78 Accepts]: Start accepts. Automaton has 7978 states and 18203 transitions. Word has length 93 [2018-11-28 10:34:06,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:06,182 INFO L480 AbstractCegarLoop]: Abstraction has 7978 states and 18203 transitions. [2018-11-28 10:34:06,182 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 10:34:06,182 INFO L276 IsEmpty]: Start isEmpty. Operand 7978 states and 18203 transitions. [2018-11-28 10:34:06,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 10:34:06,190 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:06,190 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:06,190 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:06,190 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:06,190 INFO L82 PathProgramCache]: Analyzing trace with hash 1087799072, now seen corresponding path program 1 times [2018-11-28 10:34:06,190 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:06,191 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:06,192 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:06,192 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:06,192 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:06,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:06,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:06,273 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:06,273 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 10:34:06,274 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 10:34:06,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 10:34:06,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 10:34:06,274 INFO L87 Difference]: Start difference. First operand 7978 states and 18203 transitions. Second operand 5 states. [2018-11-28 10:34:06,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:06,344 INFO L93 Difference]: Finished difference Result 8885 states and 20161 transitions. [2018-11-28 10:34:06,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 10:34:06,345 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2018-11-28 10:34:06,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:06,351 INFO L225 Difference]: With dead ends: 8885 [2018-11-28 10:34:06,351 INFO L226 Difference]: Without dead ends: 8885 [2018-11-28 10:34:06,352 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-28 10:34:06,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8885 states. [2018-11-28 10:34:06,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8885 to 6874. [2018-11-28 10:34:06,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6874 states. [2018-11-28 10:34:06,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6874 states to 6874 states and 15722 transitions. [2018-11-28 10:34:06,414 INFO L78 Accepts]: Start accepts. Automaton has 6874 states and 15722 transitions. Word has length 93 [2018-11-28 10:34:06,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:06,414 INFO L480 AbstractCegarLoop]: Abstraction has 6874 states and 15722 transitions. [2018-11-28 10:34:06,414 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 10:34:06,414 INFO L276 IsEmpty]: Start isEmpty. Operand 6874 states and 15722 transitions. [2018-11-28 10:34:06,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 10:34:06,420 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:06,420 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:06,420 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:06,421 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:06,421 INFO L82 PathProgramCache]: Analyzing trace with hash 833062527, now seen corresponding path program 1 times [2018-11-28 10:34:06,421 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:06,421 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:06,422 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:06,422 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:06,422 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:06,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:06,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:06,479 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:06,479 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 10:34:06,479 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 10:34:06,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 10:34:06,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 10:34:06,479 INFO L87 Difference]: Start difference. First operand 6874 states and 15722 transitions. Second operand 5 states. [2018-11-28 10:34:06,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:06,771 INFO L93 Difference]: Finished difference Result 11408 states and 26291 transitions. [2018-11-28 10:34:06,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 10:34:06,771 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2018-11-28 10:34:06,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:06,782 INFO L225 Difference]: With dead ends: 11408 [2018-11-28 10:34:06,782 INFO L226 Difference]: Without dead ends: 11330 [2018-11-28 10:34:06,782 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-28 10:34:06,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11330 states. [2018-11-28 10:34:06,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11330 to 8015. [2018-11-28 10:34:06,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8015 states. [2018-11-28 10:34:06,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8015 states to 8015 states and 18369 transitions. [2018-11-28 10:34:06,868 INFO L78 Accepts]: Start accepts. Automaton has 8015 states and 18369 transitions. Word has length 93 [2018-11-28 10:34:06,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:06,868 INFO L480 AbstractCegarLoop]: Abstraction has 8015 states and 18369 transitions. [2018-11-28 10:34:06,868 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 10:34:06,869 INFO L276 IsEmpty]: Start isEmpty. Operand 8015 states and 18369 transitions. [2018-11-28 10:34:06,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 10:34:06,874 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:06,874 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:06,874 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:06,874 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:06,874 INFO L82 PathProgramCache]: Analyzing trace with hash 2077827008, now seen corresponding path program 1 times [2018-11-28 10:34:06,874 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:06,874 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:06,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:06,875 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:06,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:06,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:06,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:06,933 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:06,933 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 10:34:06,933 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 10:34:06,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 10:34:06,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 10:34:06,934 INFO L87 Difference]: Start difference. First operand 8015 states and 18369 transitions. Second operand 6 states. [2018-11-28 10:34:07,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:07,144 INFO L93 Difference]: Finished difference Result 10150 states and 23091 transitions. [2018-11-28 10:34:07,145 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 10:34:07,145 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2018-11-28 10:34:07,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:07,154 INFO L225 Difference]: With dead ends: 10150 [2018-11-28 10:34:07,154 INFO L226 Difference]: Without dead ends: 10071 [2018-11-28 10:34:07,154 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-11-28 10:34:07,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10071 states. [2018-11-28 10:34:07,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10071 to 7614. [2018-11-28 10:34:07,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7614 states. [2018-11-28 10:34:07,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7614 states to 7614 states and 17479 transitions. [2018-11-28 10:34:07,244 INFO L78 Accepts]: Start accepts. Automaton has 7614 states and 17479 transitions. Word has length 93 [2018-11-28 10:34:07,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:07,244 INFO L480 AbstractCegarLoop]: Abstraction has 7614 states and 17479 transitions. [2018-11-28 10:34:07,244 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 10:34:07,244 INFO L276 IsEmpty]: Start isEmpty. Operand 7614 states and 17479 transitions. [2018-11-28 10:34:07,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 10:34:07,250 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:07,251 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:07,251 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:07,251 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:07,251 INFO L82 PathProgramCache]: Analyzing trace with hash 984217437, now seen corresponding path program 1 times [2018-11-28 10:34:07,251 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:07,251 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:07,252 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:07,252 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:07,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:07,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:07,348 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:07,349 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:07,349 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-28 10:34:07,349 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 10:34:07,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 10:34:07,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-28 10:34:07,349 INFO L87 Difference]: Start difference. First operand 7614 states and 17479 transitions. Second operand 9 states. [2018-11-28 10:34:07,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:07,676 INFO L93 Difference]: Finished difference Result 10662 states and 24405 transitions. [2018-11-28 10:34:07,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-28 10:34:07,676 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 93 [2018-11-28 10:34:07,676 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:07,684 INFO L225 Difference]: With dead ends: 10662 [2018-11-28 10:34:07,684 INFO L226 Difference]: Without dead ends: 10630 [2018-11-28 10:34:07,684 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=245, Unknown=0, NotChecked=0, Total=306 [2018-11-28 10:34:07,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10630 states. [2018-11-28 10:34:07,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10630 to 9163. [2018-11-28 10:34:07,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9163 states. [2018-11-28 10:34:07,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9163 states to 9163 states and 20929 transitions. [2018-11-28 10:34:07,780 INFO L78 Accepts]: Start accepts. Automaton has 9163 states and 20929 transitions. Word has length 93 [2018-11-28 10:34:07,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:07,781 INFO L480 AbstractCegarLoop]: Abstraction has 9163 states and 20929 transitions. [2018-11-28 10:34:07,781 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 10:34:07,781 INFO L276 IsEmpty]: Start isEmpty. Operand 9163 states and 20929 transitions. [2018-11-28 10:34:07,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 10:34:07,789 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:07,789 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:07,789 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:07,789 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:07,789 INFO L82 PathProgramCache]: Analyzing trace with hash -812733922, now seen corresponding path program 1 times [2018-11-28 10:34:07,789 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:07,789 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:07,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:07,790 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:07,791 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:07,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:07,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:07,902 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:07,903 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 10:34:07,903 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 10:34:07,903 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 10:34:07,903 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-28 10:34:07,903 INFO L87 Difference]: Start difference. First operand 9163 states and 20929 transitions. Second operand 8 states. [2018-11-28 10:34:08,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:08,318 INFO L93 Difference]: Finished difference Result 14219 states and 32893 transitions. [2018-11-28 10:34:08,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-28 10:34:08,319 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 93 [2018-11-28 10:34:08,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:08,333 INFO L225 Difference]: With dead ends: 14219 [2018-11-28 10:34:08,333 INFO L226 Difference]: Without dead ends: 14219 [2018-11-28 10:34:08,333 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-11-28 10:34:08,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14219 states. [2018-11-28 10:34:08,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14219 to 9753. [2018-11-28 10:34:08,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9753 states. [2018-11-28 10:34:08,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9753 states to 9753 states and 22460 transitions. [2018-11-28 10:34:08,475 INFO L78 Accepts]: Start accepts. Automaton has 9753 states and 22460 transitions. Word has length 93 [2018-11-28 10:34:08,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:08,476 INFO L480 AbstractCegarLoop]: Abstraction has 9753 states and 22460 transitions. [2018-11-28 10:34:08,476 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 10:34:08,476 INFO L276 IsEmpty]: Start isEmpty. Operand 9753 states and 22460 transitions. [2018-11-28 10:34:08,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 10:34:08,487 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:08,487 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:08,487 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:08,487 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:08,487 INFO L82 PathProgramCache]: Analyzing trace with hash 74769759, now seen corresponding path program 1 times [2018-11-28 10:34:08,487 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:08,487 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:08,488 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:08,488 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:08,489 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:08,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:08,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:08,664 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:08,664 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-28 10:34:08,665 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 10:34:08,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 10:34:08,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-11-28 10:34:08,665 INFO L87 Difference]: Start difference. First operand 9753 states and 22460 transitions. Second operand 10 states. [2018-11-28 10:34:09,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:09,310 INFO L93 Difference]: Finished difference Result 13625 states and 31492 transitions. [2018-11-28 10:34:09,310 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-28 10:34:09,311 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 93 [2018-11-28 10:34:09,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:09,320 INFO L225 Difference]: With dead ends: 13625 [2018-11-28 10:34:09,320 INFO L226 Difference]: Without dead ends: 13625 [2018-11-28 10:34:09,321 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2018-11-28 10:34:09,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13625 states. [2018-11-28 10:34:09,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13625 to 10970. [2018-11-28 10:34:09,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10970 states. [2018-11-28 10:34:09,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10970 states to 10970 states and 25091 transitions. [2018-11-28 10:34:09,420 INFO L78 Accepts]: Start accepts. Automaton has 10970 states and 25091 transitions. Word has length 93 [2018-11-28 10:34:09,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:09,420 INFO L480 AbstractCegarLoop]: Abstraction has 10970 states and 25091 transitions. [2018-11-28 10:34:09,420 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 10:34:09,420 INFO L276 IsEmpty]: Start isEmpty. Operand 10970 states and 25091 transitions. [2018-11-28 10:34:09,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 10:34:09,428 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:09,428 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:09,428 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:09,428 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:09,429 INFO L82 PathProgramCache]: Analyzing trace with hash -1657205793, now seen corresponding path program 1 times [2018-11-28 10:34:09,429 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:09,429 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:09,429 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:09,429 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:09,429 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:09,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:09,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:09,502 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:09,502 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 10:34:09,503 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 10:34:09,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 10:34:09,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 10:34:09,503 INFO L87 Difference]: Start difference. First operand 10970 states and 25091 transitions. Second operand 6 states. [2018-11-28 10:34:09,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:09,601 INFO L93 Difference]: Finished difference Result 10490 states and 23635 transitions. [2018-11-28 10:34:09,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 10:34:09,601 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2018-11-28 10:34:09,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:09,612 INFO L225 Difference]: With dead ends: 10490 [2018-11-28 10:34:09,612 INFO L226 Difference]: Without dead ends: 10490 [2018-11-28 10:34:09,612 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-28 10:34:09,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10490 states. [2018-11-28 10:34:09,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10490 to 7136. [2018-11-28 10:34:09,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7136 states. [2018-11-28 10:34:09,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7136 states to 7136 states and 16093 transitions. [2018-11-28 10:34:09,717 INFO L78 Accepts]: Start accepts. Automaton has 7136 states and 16093 transitions. Word has length 93 [2018-11-28 10:34:09,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:09,717 INFO L480 AbstractCegarLoop]: Abstraction has 7136 states and 16093 transitions. [2018-11-28 10:34:09,717 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 10:34:09,717 INFO L276 IsEmpty]: Start isEmpty. Operand 7136 states and 16093 transitions. [2018-11-28 10:34:09,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-28 10:34:09,722 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:09,722 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:09,722 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:09,722 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:09,722 INFO L82 PathProgramCache]: Analyzing trace with hash 1619496971, now seen corresponding path program 1 times [2018-11-28 10:34:09,722 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:09,722 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:09,723 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:09,723 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:09,723 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:09,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:09,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:09,860 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:09,861 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-28 10:34:09,861 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 10:34:09,861 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 10:34:09,861 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-11-28 10:34:09,861 INFO L87 Difference]: Start difference. First operand 7136 states and 16093 transitions. Second operand 9 states. [2018-11-28 10:34:10,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:10,188 INFO L93 Difference]: Finished difference Result 8480 states and 18944 transitions. [2018-11-28 10:34:10,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-28 10:34:10,189 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 95 [2018-11-28 10:34:10,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:10,195 INFO L225 Difference]: With dead ends: 8480 [2018-11-28 10:34:10,195 INFO L226 Difference]: Without dead ends: 8480 [2018-11-28 10:34:10,196 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=305, Unknown=0, NotChecked=0, Total=420 [2018-11-28 10:34:10,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8480 states. [2018-11-28 10:34:10,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8480 to 8214. [2018-11-28 10:34:10,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8214 states. [2018-11-28 10:34:10,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8214 states to 8214 states and 18420 transitions. [2018-11-28 10:34:10,264 INFO L78 Accepts]: Start accepts. Automaton has 8214 states and 18420 transitions. Word has length 95 [2018-11-28 10:34:10,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:10,264 INFO L480 AbstractCegarLoop]: Abstraction has 8214 states and 18420 transitions. [2018-11-28 10:34:10,264 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 10:34:10,264 INFO L276 IsEmpty]: Start isEmpty. Operand 8214 states and 18420 transitions. [2018-11-28 10:34:10,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-28 10:34:10,269 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:10,269 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:10,270 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:10,270 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:10,270 INFO L82 PathProgramCache]: Analyzing trace with hash -1787966644, now seen corresponding path program 1 times [2018-11-28 10:34:10,270 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:10,270 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:10,271 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:10,271 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:10,271 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:10,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:10,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:10,376 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:10,376 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-28 10:34:10,376 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 10:34:10,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 10:34:10,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-11-28 10:34:10,377 INFO L87 Difference]: Start difference. First operand 8214 states and 18420 transitions. Second operand 11 states. [2018-11-28 10:34:11,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:11,179 INFO L93 Difference]: Finished difference Result 15152 states and 34122 transitions. [2018-11-28 10:34:11,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-28 10:34:11,179 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 95 [2018-11-28 10:34:11,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:11,186 INFO L225 Difference]: With dead ends: 15152 [2018-11-28 10:34:11,186 INFO L226 Difference]: Without dead ends: 10596 [2018-11-28 10:34:11,186 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=86, Invalid=376, Unknown=0, NotChecked=0, Total=462 [2018-11-28 10:34:11,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10596 states. [2018-11-28 10:34:11,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10596 to 7968. [2018-11-28 10:34:11,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7968 states. [2018-11-28 10:34:11,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7968 states to 7968 states and 17844 transitions. [2018-11-28 10:34:11,258 INFO L78 Accepts]: Start accepts. Automaton has 7968 states and 17844 transitions. Word has length 95 [2018-11-28 10:34:11,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:11,258 INFO L480 AbstractCegarLoop]: Abstraction has 7968 states and 17844 transitions. [2018-11-28 10:34:11,258 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 10:34:11,258 INFO L276 IsEmpty]: Start isEmpty. Operand 7968 states and 17844 transitions. [2018-11-28 10:34:11,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-28 10:34:11,264 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:11,264 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:11,264 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:11,264 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:11,265 INFO L82 PathProgramCache]: Analyzing trace with hash -14379427, now seen corresponding path program 1 times [2018-11-28 10:34:11,265 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:11,265 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:11,266 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:11,266 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:11,266 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:11,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:11,352 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:11,352 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:11,352 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 10:34:11,352 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 10:34:11,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 10:34:11,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-28 10:34:11,353 INFO L87 Difference]: Start difference. First operand 7968 states and 17844 transitions. Second operand 6 states. [2018-11-28 10:34:11,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:11,489 INFO L93 Difference]: Finished difference Result 8947 states and 19761 transitions. [2018-11-28 10:34:11,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 10:34:11,490 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-28 10:34:11,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:11,496 INFO L225 Difference]: With dead ends: 8947 [2018-11-28 10:34:11,497 INFO L226 Difference]: Without dead ends: 8890 [2018-11-28 10:34:11,497 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-28 10:34:11,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8890 states. [2018-11-28 10:34:11,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8890 to 7966. [2018-11-28 10:34:11,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7966 states. [2018-11-28 10:34:11,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7966 states to 7966 states and 17669 transitions. [2018-11-28 10:34:11,565 INFO L78 Accepts]: Start accepts. Automaton has 7966 states and 17669 transitions. Word has length 95 [2018-11-28 10:34:11,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:11,565 INFO L480 AbstractCegarLoop]: Abstraction has 7966 states and 17669 transitions. [2018-11-28 10:34:11,565 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 10:34:11,566 INFO L276 IsEmpty]: Start isEmpty. Operand 7966 states and 17669 transitions. [2018-11-28 10:34:11,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-28 10:34:11,571 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:11,572 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:11,572 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:11,572 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:11,572 INFO L82 PathProgramCache]: Analyzing trace with hash 803757277, now seen corresponding path program 2 times [2018-11-28 10:34:11,572 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:11,572 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:11,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:11,573 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:11,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:11,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:11,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:11,640 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:11,640 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 10:34:11,640 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 10:34:11,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 10:34:11,641 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 10:34:11,641 INFO L87 Difference]: Start difference. First operand 7966 states and 17669 transitions. Second operand 6 states. [2018-11-28 10:34:11,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:11,758 INFO L93 Difference]: Finished difference Result 8186 states and 18114 transitions. [2018-11-28 10:34:11,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 10:34:11,759 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-28 10:34:11,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:11,765 INFO L225 Difference]: With dead ends: 8186 [2018-11-28 10:34:11,765 INFO L226 Difference]: Without dead ends: 8186 [2018-11-28 10:34:11,765 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-28 10:34:11,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8186 states. [2018-11-28 10:34:11,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8186 to 7872. [2018-11-28 10:34:11,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7872 states. [2018-11-28 10:34:11,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7872 states to 7872 states and 17459 transitions. [2018-11-28 10:34:11,828 INFO L78 Accepts]: Start accepts. Automaton has 7872 states and 17459 transitions. Word has length 95 [2018-11-28 10:34:11,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:11,828 INFO L480 AbstractCegarLoop]: Abstraction has 7872 states and 17459 transitions. [2018-11-28 10:34:11,828 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 10:34:11,828 INFO L276 IsEmpty]: Start isEmpty. Operand 7872 states and 17459 transitions. [2018-11-28 10:34:11,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-28 10:34:11,834 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:11,835 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:11,835 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:11,835 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:11,835 INFO L82 PathProgramCache]: Analyzing trace with hash 315386334, now seen corresponding path program 2 times [2018-11-28 10:34:11,835 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:11,835 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:11,836 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:11,837 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 10:34:11,837 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:11,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 10:34:11,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 10:34:11,889 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 10:34:11,986 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-28 10:34:11,987 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 10:34:11 BasicIcfg [2018-11-28 10:34:11,987 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 10:34:11,987 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 10:34:11,988 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 10:34:11,988 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 10:34:11,988 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 10:33:50" (3/4) ... [2018-11-28 10:34:11,992 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-28 10:34:12,093 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_614a190b-e024-4342-9558-80380c3cc1c6/bin-2019/uautomizer/witness.graphml [2018-11-28 10:34:12,093 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 10:34:12,095 INFO L168 Benchmark]: Toolchain (without parser) took 22555.84 ms. Allocated memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: 1.6 GB). Free memory was 949.5 MB in the beginning and 840.4 MB in the end (delta: 109.1 MB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. [2018-11-28 10:34:12,096 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 10:34:12,096 INFO L168 Benchmark]: CACSL2BoogieTranslator took 437.23 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 172.0 MB). Free memory was 949.5 MB in the beginning and 1.2 GB in the end (delta: -200.5 MB). Peak memory consumption was 33.8 MB. Max. memory is 11.5 GB. [2018-11-28 10:34:12,096 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.08 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. [2018-11-28 10:34:12,097 INFO L168 Benchmark]: Boogie Preprocessor took 23.16 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. [2018-11-28 10:34:12,097 INFO L168 Benchmark]: RCFGBuilder took 456.53 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.6 MB). Peak memory consumption was 44.6 MB. Max. memory is 11.5 GB. [2018-11-28 10:34:12,097 INFO L168 Benchmark]: TraceAbstraction took 21489.97 ms. Allocated memory was 1.2 GB in the beginning and 2.7 GB in the end (delta: 1.5 GB). Free memory was 1.1 GB in the beginning and 905.0 MB in the end (delta: 193.9 MB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. [2018-11-28 10:34:12,098 INFO L168 Benchmark]: Witness Printer took 105.78 ms. Allocated memory is still 2.7 GB. Free memory was 905.0 MB in the beginning and 840.4 MB in the end (delta: 64.5 MB). Peak memory consumption was 64.5 MB. Max. memory is 11.5 GB. [2018-11-28 10:34:12,104 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 437.23 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 172.0 MB). Free memory was 949.5 MB in the beginning and 1.2 GB in the end (delta: -200.5 MB). Peak memory consumption was 33.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.08 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.16 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. * RCFGBuilder took 456.53 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.6 MB). Peak memory consumption was 44.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 21489.97 ms. Allocated memory was 1.2 GB in the beginning and 2.7 GB in the end (delta: 1.5 GB). Free memory was 1.1 GB in the beginning and 905.0 MB in the end (delta: 193.9 MB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. * Witness Printer took 105.78 ms. Allocated memory is still 2.7 GB. Free memory was 905.0 MB in the beginning and 840.4 MB in the end (delta: 64.5 MB). Peak memory consumption was 64.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L675] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L676] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L677] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L679] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L681] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L682] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L683] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L684] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L685] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L686] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L687] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L688] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L689] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L690] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L691] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L692] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L693] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L694] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L695] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L696] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L697] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L773] -1 pthread_t t589; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L774] FCALL, FORK -1 pthread_create(&t589, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L701] 0 y$w_buff1 = y$w_buff0 [L702] 0 y$w_buff0 = 1 [L703] 0 y$w_buff1_used = y$w_buff0_used [L704] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L706] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L707] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L708] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L709] 0 y$r_buff0_thd1 = (_Bool)1 [L712] 0 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L715] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L775] -1 pthread_t t590; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L776] FCALL, FORK -1 pthread_create(&t590, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L729] 1 x = 2 [L732] 1 __unbuffered_p1_EAX = x [L735] 1 weak$$choice0 = __VERIFIER_nondet_pointer() [L736] 1 weak$$choice2 = __VERIFIER_nondet_pointer() [L737] 1 y$flush_delayed = weak$$choice2 [L738] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L739] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L739] 1 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L740] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L741] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L741] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L742] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used))=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L742] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L743] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L743] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L744] EXPR 1 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L744] 1 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L745] EXPR 1 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L745] 1 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L747] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L715] 0 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L747] 1 y = y$flush_delayed ? y$mem_tmp : y [L748] 1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L716] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L716] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L717] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L718] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 0 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L719] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L719] 0 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L722] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L751] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L751] EXPR 1 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L751] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L751] 1 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L752] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L752] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L753] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L753] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L754] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L754] 1 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L755] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L755] 1 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L758] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L778] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L782] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L782] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L782] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L782] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L783] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L783] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L784] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L784] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L785] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L786] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L786] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L789] -1 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 2 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 222 locations, 3 error locations. UNSAFE Result, 21.3s OverallTime, 34 OverallIterations, 1 TraceHistogramMax, 10.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 8825 SDtfs, 10261 SDslu, 20885 SDs, 0 SdLazy, 9764 SolverSat, 502 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 356 GetRequests, 90 SyntacticMatches, 32 SemanticMatches, 234 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 326 ImplicationChecksByTransitivity, 2.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=35807occurred in iteration=15, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 5.6s AutomataMinimizationTime, 33 MinimizatonAttempts, 93403 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.1s InterpolantComputationTime, 2543 NumberOfCodeBlocks, 2543 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 2415 ConstructedInterpolants, 0 QuantifiedInterpolants, 532614 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...