./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix028_tso.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0cd3be1d Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix028_tso.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bdc38a1b791b964a5d3ebef146a28040d23c9f7b ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-0cd3be1 [2018-11-28 12:52:13,193 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 12:52:13,194 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 12:52:13,201 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 12:52:13,201 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 12:52:13,202 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 12:52:13,203 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 12:52:13,205 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 12:52:13,206 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 12:52:13,207 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 12:52:13,207 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 12:52:13,207 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 12:52:13,208 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 12:52:13,209 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 12:52:13,210 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 12:52:13,210 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 12:52:13,211 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 12:52:13,212 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 12:52:13,214 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 12:52:13,215 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 12:52:13,216 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 12:52:13,216 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 12:52:13,218 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 12:52:13,218 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 12:52:13,219 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 12:52:13,219 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 12:52:13,220 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 12:52:13,221 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 12:52:13,221 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 12:52:13,222 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 12:52:13,222 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 12:52:13,223 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 12:52:13,223 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 12:52:13,223 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 12:52:13,224 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 12:52:13,224 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 12:52:13,224 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-28 12:52:13,235 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 12:52:13,235 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 12:52:13,236 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 12:52:13,236 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 12:52:13,236 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 12:52:13,237 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 12:52:13,237 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 12:52:13,237 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 12:52:13,237 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 12:52:13,237 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 12:52:13,237 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 12:52:13,237 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 12:52:13,238 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-28 12:52:13,238 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 12:52:13,238 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-28 12:52:13,238 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 12:52:13,238 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-28 12:52:13,238 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 12:52:13,239 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-28 12:52:13,239 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 12:52:13,239 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 12:52:13,239 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 12:52:13,239 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 12:52:13,239 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 12:52:13,240 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 12:52:13,240 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 12:52:13,240 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-28 12:52:13,240 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-28 12:52:13,240 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 12:52:13,240 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-28 12:52:13,240 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bdc38a1b791b964a5d3ebef146a28040d23c9f7b [2018-11-28 12:52:13,268 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 12:52:13,276 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 12:52:13,279 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 12:52:13,280 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 12:52:13,280 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 12:52:13,280 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix028_tso.opt_false-unreach-call.i [2018-11-28 12:52:13,319 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer/data/2764fc00a/e174031c23d24f419eb94d0eaf40e582/FLAG6b7c304d2 [2018-11-28 12:52:13,753 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 12:52:13,753 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/sv-benchmarks/c/pthread-wmm/mix028_tso.opt_false-unreach-call.i [2018-11-28 12:52:13,761 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer/data/2764fc00a/e174031c23d24f419eb94d0eaf40e582/FLAG6b7c304d2 [2018-11-28 12:52:13,772 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer/data/2764fc00a/e174031c23d24f419eb94d0eaf40e582 [2018-11-28 12:52:13,774 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 12:52:13,775 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-28 12:52:13,775 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 12:52:13,775 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 12:52:13,778 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 12:52:13,778 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:52:13" (1/1) ... [2018-11-28 12:52:13,781 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3e115a3f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:52:13, skipping insertion in model container [2018-11-28 12:52:13,781 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:52:13" (1/1) ... [2018-11-28 12:52:13,787 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 12:52:13,815 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 12:52:14,039 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 12:52:14,049 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 12:52:14,146 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 12:52:14,186 INFO L195 MainTranslator]: Completed translation [2018-11-28 12:52:14,186 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:52:14 WrapperNode [2018-11-28 12:52:14,186 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 12:52:14,187 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-28 12:52:14,187 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-28 12:52:14,187 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-28 12:52:14,194 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:52:14" (1/1) ... [2018-11-28 12:52:14,205 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:52:14" (1/1) ... [2018-11-28 12:52:14,225 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-28 12:52:14,225 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 12:52:14,225 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 12:52:14,225 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 12:52:14,231 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:52:14" (1/1) ... [2018-11-28 12:52:14,231 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:52:14" (1/1) ... [2018-11-28 12:52:14,234 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:52:14" (1/1) ... [2018-11-28 12:52:14,234 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:52:14" (1/1) ... [2018-11-28 12:52:14,241 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:52:14" (1/1) ... [2018-11-28 12:52:14,245 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:52:14" (1/1) ... [2018-11-28 12:52:14,247 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:52:14" (1/1) ... [2018-11-28 12:52:14,250 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 12:52:14,251 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 12:52:14,251 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 12:52:14,251 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 12:52:14,251 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:52:14" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 12:52:14,299 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 12:52:14,299 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-28 12:52:14,299 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-28 12:52:14,299 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 12:52:14,299 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-28 12:52:14,299 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-28 12:52:14,300 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-28 12:52:14,300 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-28 12:52:14,300 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-11-28 12:52:14,300 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-11-28 12:52:14,300 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-28 12:52:14,300 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 12:52:14,300 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 12:52:14,301 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-28 12:52:14,919 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 12:52:14,920 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-28 12:52:14,920 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:52:14 BoogieIcfgContainer [2018-11-28 12:52:14,920 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 12:52:14,921 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 12:52:14,921 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 12:52:14,923 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 12:52:14,923 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 12:52:13" (1/3) ... [2018-11-28 12:52:14,923 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7aa9ff51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:52:14, skipping insertion in model container [2018-11-28 12:52:14,924 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:52:14" (2/3) ... [2018-11-28 12:52:14,924 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7aa9ff51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:52:14, skipping insertion in model container [2018-11-28 12:52:14,924 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:52:14" (3/3) ... [2018-11-28 12:52:14,925 INFO L112 eAbstractionObserver]: Analyzing ICFG mix028_tso.opt_false-unreach-call.i [2018-11-28 12:52:14,956 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,957 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,957 WARN L317 ript$VariableManager]: TermVariabe Thread2_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,957 WARN L317 ript$VariableManager]: TermVariabe Thread2_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,957 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,957 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,957 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,957 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,958 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,958 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,958 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,958 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,958 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,959 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,959 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,959 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,959 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,959 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,959 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,960 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,960 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,960 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,960 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,960 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,960 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,960 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,961 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,961 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,961 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,961 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,961 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,961 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,962 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,962 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,962 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,962 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,962 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,962 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,962 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,963 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,963 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,963 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,963 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,963 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,964 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,964 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,964 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,964 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,964 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,965 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,965 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,965 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,965 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,965 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,965 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,965 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,966 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,966 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,966 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,966 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,966 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,966 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,966 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,966 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,966 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,967 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,967 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,967 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,967 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,967 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,967 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,968 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,968 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,968 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,968 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,968 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,968 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,969 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,969 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,969 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,969 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,969 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,969 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,970 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,970 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,970 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,970 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,970 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,971 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,971 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,971 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,971 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,971 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,971 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,972 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,972 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,972 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,972 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,972 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,972 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,973 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,973 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,973 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,973 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,973 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,973 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,973 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,974 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,974 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,974 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,974 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,974 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,974 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,975 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,975 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,975 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,975 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,975 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,975 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,976 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,976 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,976 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,977 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,977 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,977 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,977 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,977 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,978 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,978 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,979 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,979 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,979 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,979 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,979 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,979 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,980 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,980 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,980 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,980 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,980 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,980 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,981 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,981 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,981 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,981 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,981 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,981 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,981 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,981 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,982 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,982 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,982 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,982 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,982 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,982 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,982 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,982 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,983 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,983 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,983 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,983 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,983 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,983 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,983 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,983 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,984 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,984 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,984 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,984 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet40.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,984 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet40.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,984 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,984 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,984 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet40.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,985 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet40.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:52:14,994 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-28 12:52:14,994 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 12:52:15,001 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-28 12:52:15,011 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-28 12:52:15,030 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 12:52:15,031 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 12:52:15,031 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-28 12:52:15,031 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 12:52:15,031 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 12:52:15,031 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 12:52:15,031 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 12:52:15,031 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 12:52:15,031 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 12:52:15,041 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 198places, 256 transitions [2018-11-28 12:54:06,511 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 385953 states. [2018-11-28 12:54:06,513 INFO L276 IsEmpty]: Start isEmpty. Operand 385953 states. [2018-11-28 12:54:06,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-28 12:54:06,521 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:54:06,522 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:54:06,524 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:54:06,529 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:54:06,529 INFO L82 PathProgramCache]: Analyzing trace with hash 654477059, now seen corresponding path program 1 times [2018-11-28 12:54:06,531 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:54:06,531 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:54:06,572 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:54:06,572 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:54:06,572 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:54:06,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:54:06,720 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:54:06,722 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:54:06,722 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:54:06,725 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:54:06,733 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:54:06,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:54:06,735 INFO L87 Difference]: Start difference. First operand 385953 states. Second operand 4 states. [2018-11-28 12:54:15,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:54:15,021 INFO L93 Difference]: Finished difference Result 735793 states and 3585691 transitions. [2018-11-28 12:54:15,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:54:15,023 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 44 [2018-11-28 12:54:15,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:54:17,095 INFO L225 Difference]: With dead ends: 735793 [2018-11-28 12:54:17,095 INFO L226 Difference]: Without dead ends: 634643 [2018-11-28 12:54:17,096 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:54:29,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 634643 states. [2018-11-28 12:54:41,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 634643 to 340233. [2018-11-28 12:54:41,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340233 states. [2018-11-28 12:54:43,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340233 states to 340233 states and 1669458 transitions. [2018-11-28 12:54:43,290 INFO L78 Accepts]: Start accepts. Automaton has 340233 states and 1669458 transitions. Word has length 44 [2018-11-28 12:54:43,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:54:43,291 INFO L480 AbstractCegarLoop]: Abstraction has 340233 states and 1669458 transitions. [2018-11-28 12:54:43,291 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:54:43,291 INFO L276 IsEmpty]: Start isEmpty. Operand 340233 states and 1669458 transitions. [2018-11-28 12:54:43,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-28 12:54:43,299 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:54:43,299 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:54:43,299 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:54:43,299 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:54:43,300 INFO L82 PathProgramCache]: Analyzing trace with hash -837598066, now seen corresponding path program 1 times [2018-11-28 12:54:43,300 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:54:43,300 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:54:43,305 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:54:43,305 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:54:43,305 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:54:43,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:54:43,378 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:54:43,379 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:54:43,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:54:43,380 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:54:43,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:54:43,381 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:54:43,381 INFO L87 Difference]: Start difference. First operand 340233 states and 1669458 transitions. Second operand 5 states. [2018-11-28 12:54:56,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:54:56,925 INFO L93 Difference]: Finished difference Result 1007353 states and 4689304 transitions. [2018-11-28 12:54:56,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 12:54:56,926 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2018-11-28 12:54:56,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:55:00,527 INFO L225 Difference]: With dead ends: 1007353 [2018-11-28 12:55:00,527 INFO L226 Difference]: Without dead ends: 1006353 [2018-11-28 12:55:00,528 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:55:22,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1006353 states. [2018-11-28 12:55:32,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1006353 to 549408. [2018-11-28 12:55:32,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 549408 states. [2018-11-28 12:55:34,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 549408 states to 549408 states and 2556398 transitions. [2018-11-28 12:55:34,976 INFO L78 Accepts]: Start accepts. Automaton has 549408 states and 2556398 transitions. Word has length 51 [2018-11-28 12:55:34,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:55:34,977 INFO L480 AbstractCegarLoop]: Abstraction has 549408 states and 2556398 transitions. [2018-11-28 12:55:34,977 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:55:34,977 INFO L276 IsEmpty]: Start isEmpty. Operand 549408 states and 2556398 transitions. [2018-11-28 12:55:34,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-28 12:55:34,984 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:55:34,984 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:55:34,984 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:55:34,984 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:55:34,984 INFO L82 PathProgramCache]: Analyzing trace with hash -988308488, now seen corresponding path program 1 times [2018-11-28 12:55:34,984 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:55:34,985 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:55:34,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:55:34,989 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:55:34,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:55:35,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:55:35,045 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:55:35,045 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:55:35,046 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:55:35,046 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:55:35,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:55:35,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:55:35,046 INFO L87 Difference]: Start difference. First operand 549408 states and 2556398 transitions. Second operand 3 states. [2018-11-28 12:55:46,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:55:46,375 INFO L93 Difference]: Finished difference Result 549408 states and 2556033 transitions. [2018-11-28 12:55:46,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:55:46,376 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2018-11-28 12:55:46,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:55:47,830 INFO L225 Difference]: With dead ends: 549408 [2018-11-28 12:55:47,830 INFO L226 Difference]: Without dead ends: 549408 [2018-11-28 12:55:47,831 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:55:57,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 549408 states. [2018-11-28 12:56:03,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 549408 to 549408. [2018-11-28 12:56:03,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 549408 states. [2018-11-28 12:56:17,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 549408 states to 549408 states and 2556033 transitions. [2018-11-28 12:56:17,309 INFO L78 Accepts]: Start accepts. Automaton has 549408 states and 2556033 transitions. Word has length 52 [2018-11-28 12:56:17,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:17,310 INFO L480 AbstractCegarLoop]: Abstraction has 549408 states and 2556033 transitions. [2018-11-28 12:56:17,310 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:56:17,310 INFO L276 IsEmpty]: Start isEmpty. Operand 549408 states and 2556033 transitions. [2018-11-28 12:56:17,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-28 12:56:17,316 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:17,316 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:17,316 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:17,316 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:17,316 INFO L82 PathProgramCache]: Analyzing trace with hash 754501847, now seen corresponding path program 1 times [2018-11-28 12:56:17,316 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:17,316 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:17,318 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:17,318 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:17,318 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:17,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:17,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:17,376 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:17,376 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:56:17,376 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:56:17,377 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:56:17,377 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:56:17,377 INFO L87 Difference]: Start difference. First operand 549408 states and 2556033 transitions. Second operand 4 states. [2018-11-28 12:56:24,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:24,598 INFO L93 Difference]: Finished difference Result 472455 states and 2161069 transitions. [2018-11-28 12:56:24,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:56:24,598 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 52 [2018-11-28 12:56:24,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:26,314 INFO L225 Difference]: With dead ends: 472455 [2018-11-28 12:56:26,314 INFO L226 Difference]: Without dead ends: 463970 [2018-11-28 12:56:26,315 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:56:34,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 463970 states. [2018-11-28 12:56:40,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 463970 to 463970. [2018-11-28 12:56:40,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 463970 states. [2018-11-28 12:56:42,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 463970 states to 463970 states and 2131578 transitions. [2018-11-28 12:56:42,429 INFO L78 Accepts]: Start accepts. Automaton has 463970 states and 2131578 transitions. Word has length 52 [2018-11-28 12:56:42,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:42,430 INFO L480 AbstractCegarLoop]: Abstraction has 463970 states and 2131578 transitions. [2018-11-28 12:56:42,430 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:56:42,430 INFO L276 IsEmpty]: Start isEmpty. Operand 463970 states and 2131578 transitions. [2018-11-28 12:56:42,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-28 12:56:42,435 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:42,435 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:42,435 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:42,435 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:42,435 INFO L82 PathProgramCache]: Analyzing trace with hash -1302071129, now seen corresponding path program 1 times [2018-11-28 12:56:42,435 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:42,436 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:42,437 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:42,437 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:42,437 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:42,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:42,490 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:42,491 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:42,491 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:56:42,491 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:56:42,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:56:42,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:56:42,492 INFO L87 Difference]: Start difference. First operand 463970 states and 2131578 transitions. Second operand 5 states. [2018-11-28 12:56:42,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:42,937 INFO L93 Difference]: Finished difference Result 107974 states and 450057 transitions. [2018-11-28 12:56:42,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 12:56:42,937 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2018-11-28 12:56:42,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:43,157 INFO L225 Difference]: With dead ends: 107974 [2018-11-28 12:56:43,157 INFO L226 Difference]: Without dead ends: 100622 [2018-11-28 12:56:43,158 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:56:44,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100622 states. [2018-11-28 12:56:45,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100622 to 100622. [2018-11-28 12:56:45,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100622 states. [2018-11-28 12:56:45,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100622 states to 100622 states and 420923 transitions. [2018-11-28 12:56:45,681 INFO L78 Accepts]: Start accepts. Automaton has 100622 states and 420923 transitions. Word has length 53 [2018-11-28 12:56:45,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:45,682 INFO L480 AbstractCegarLoop]: Abstraction has 100622 states and 420923 transitions. [2018-11-28 12:56:45,682 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:56:45,682 INFO L276 IsEmpty]: Start isEmpty. Operand 100622 states and 420923 transitions. [2018-11-28 12:56:45,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 12:56:45,693 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:45,693 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:45,693 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:45,693 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:45,693 INFO L82 PathProgramCache]: Analyzing trace with hash -2137995013, now seen corresponding path program 1 times [2018-11-28 12:56:45,694 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:45,694 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:45,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:45,696 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:45,696 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:45,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:45,750 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:45,751 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:45,751 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:56:45,751 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:56:45,751 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:56:45,751 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:56:45,751 INFO L87 Difference]: Start difference. First operand 100622 states and 420923 transitions. Second operand 6 states. [2018-11-28 12:56:45,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:45,833 INFO L93 Difference]: Finished difference Result 15454 states and 53779 transitions. [2018-11-28 12:56:45,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:56:45,834 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2018-11-28 12:56:45,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:45,851 INFO L225 Difference]: With dead ends: 15454 [2018-11-28 12:56:45,851 INFO L226 Difference]: Without dead ends: 13166 [2018-11-28 12:56:45,851 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:56:45,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13166 states. [2018-11-28 12:56:48,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13166 to 13026. [2018-11-28 12:56:48,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13026 states. [2018-11-28 12:56:48,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13026 states to 13026 states and 44819 transitions. [2018-11-28 12:56:48,355 INFO L78 Accepts]: Start accepts. Automaton has 13026 states and 44819 transitions. Word has length 66 [2018-11-28 12:56:48,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:48,356 INFO L480 AbstractCegarLoop]: Abstraction has 13026 states and 44819 transitions. [2018-11-28 12:56:48,356 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:56:48,356 INFO L276 IsEmpty]: Start isEmpty. Operand 13026 states and 44819 transitions. [2018-11-28 12:56:48,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-11-28 12:56:48,370 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:48,370 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:48,370 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:48,370 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:48,370 INFO L82 PathProgramCache]: Analyzing trace with hash -1926362862, now seen corresponding path program 1 times [2018-11-28 12:56:48,370 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:48,370 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:48,372 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:48,372 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:48,372 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:48,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:48,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:48,460 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:48,460 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:56:48,461 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:56:48,461 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:56:48,461 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:56:48,461 INFO L87 Difference]: Start difference. First operand 13026 states and 44819 transitions. Second operand 6 states. [2018-11-28 12:56:48,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:48,962 INFO L93 Difference]: Finished difference Result 18286 states and 62027 transitions. [2018-11-28 12:56:48,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 12:56:48,962 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 115 [2018-11-28 12:56:48,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:48,983 INFO L225 Difference]: With dead ends: 18286 [2018-11-28 12:56:48,983 INFO L226 Difference]: Without dead ends: 18286 [2018-11-28 12:56:48,983 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=32, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:56:49,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18286 states. [2018-11-28 12:56:49,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18286 to 15541. [2018-11-28 12:56:49,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15541 states. [2018-11-28 12:56:49,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15541 states to 15541 states and 52911 transitions. [2018-11-28 12:56:49,167 INFO L78 Accepts]: Start accepts. Automaton has 15541 states and 52911 transitions. Word has length 115 [2018-11-28 12:56:49,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:49,167 INFO L480 AbstractCegarLoop]: Abstraction has 15541 states and 52911 transitions. [2018-11-28 12:56:49,167 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:56:49,167 INFO L276 IsEmpty]: Start isEmpty. Operand 15541 states and 52911 transitions. [2018-11-28 12:56:49,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-11-28 12:56:49,183 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:49,183 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:49,184 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:49,184 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:49,184 INFO L82 PathProgramCache]: Analyzing trace with hash -1887180308, now seen corresponding path program 2 times [2018-11-28 12:56:49,184 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:49,184 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:49,185 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:49,186 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:49,186 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:49,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:49,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:49,244 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:49,244 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:56:49,245 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:56:49,245 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:56:49,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:56:49,246 INFO L87 Difference]: Start difference. First operand 15541 states and 52911 transitions. Second operand 4 states. [2018-11-28 12:56:49,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:49,494 INFO L93 Difference]: Finished difference Result 22773 states and 75756 transitions. [2018-11-28 12:56:49,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:56:49,494 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 115 [2018-11-28 12:56:49,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:49,523 INFO L225 Difference]: With dead ends: 22773 [2018-11-28 12:56:49,524 INFO L226 Difference]: Without dead ends: 22773 [2018-11-28 12:56:49,524 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:56:49,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22773 states. [2018-11-28 12:56:49,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22773 to 17141. [2018-11-28 12:56:49,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17141 states. [2018-11-28 12:56:49,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17141 states to 17141 states and 58476 transitions. [2018-11-28 12:56:49,737 INFO L78 Accepts]: Start accepts. Automaton has 17141 states and 58476 transitions. Word has length 115 [2018-11-28 12:56:49,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:49,737 INFO L480 AbstractCegarLoop]: Abstraction has 17141 states and 58476 transitions. [2018-11-28 12:56:49,737 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:56:49,737 INFO L276 IsEmpty]: Start isEmpty. Operand 17141 states and 58476 transitions. [2018-11-28 12:56:49,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-11-28 12:56:49,755 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:49,755 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:49,755 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:49,756 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:49,756 INFO L82 PathProgramCache]: Analyzing trace with hash -1783360109, now seen corresponding path program 1 times [2018-11-28 12:56:49,756 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:49,756 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:49,757 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:49,757 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 12:56:49,757 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:49,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:49,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:49,833 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:49,833 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:56:49,833 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:56:49,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:56:49,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:56:49,833 INFO L87 Difference]: Start difference. First operand 17141 states and 58476 transitions. Second operand 4 states. [2018-11-28 12:56:49,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:49,966 INFO L93 Difference]: Finished difference Result 18996 states and 64220 transitions. [2018-11-28 12:56:49,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:56:49,967 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 115 [2018-11-28 12:56:49,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:49,989 INFO L225 Difference]: With dead ends: 18996 [2018-11-28 12:56:49,989 INFO L226 Difference]: Without dead ends: 18996 [2018-11-28 12:56:49,990 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:56:50,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18996 states. [2018-11-28 12:56:50,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18996 to 17116. [2018-11-28 12:56:50,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17116 states. [2018-11-28 12:56:50,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17116 states to 17116 states and 58281 transitions. [2018-11-28 12:56:50,185 INFO L78 Accepts]: Start accepts. Automaton has 17116 states and 58281 transitions. Word has length 115 [2018-11-28 12:56:50,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:50,186 INFO L480 AbstractCegarLoop]: Abstraction has 17116 states and 58281 transitions. [2018-11-28 12:56:50,186 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:56:50,186 INFO L276 IsEmpty]: Start isEmpty. Operand 17116 states and 58281 transitions. [2018-11-28 12:56:50,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-11-28 12:56:50,203 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:50,203 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:50,204 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:50,204 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:50,204 INFO L82 PathProgramCache]: Analyzing trace with hash -1972212949, now seen corresponding path program 1 times [2018-11-28 12:56:50,204 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:50,204 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:50,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:50,206 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:50,206 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:50,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:50,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:50,298 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:50,298 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:56:50,299 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:56:50,299 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:56:50,299 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:56:50,299 INFO L87 Difference]: Start difference. First operand 17116 states and 58281 transitions. Second operand 7 states. [2018-11-28 12:56:50,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:50,745 INFO L93 Difference]: Finished difference Result 20071 states and 67655 transitions. [2018-11-28 12:56:50,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:56:50,746 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 115 [2018-11-28 12:56:50,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:50,770 INFO L225 Difference]: With dead ends: 20071 [2018-11-28 12:56:50,770 INFO L226 Difference]: Without dead ends: 20071 [2018-11-28 12:56:50,771 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:56:50,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20071 states. [2018-11-28 12:56:51,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20071 to 17406. [2018-11-28 12:56:51,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17406 states. [2018-11-28 12:56:51,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17406 states to 17406 states and 59183 transitions. [2018-11-28 12:56:51,046 INFO L78 Accepts]: Start accepts. Automaton has 17406 states and 59183 transitions. Word has length 115 [2018-11-28 12:56:51,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:51,046 INFO L480 AbstractCegarLoop]: Abstraction has 17406 states and 59183 transitions. [2018-11-28 12:56:51,047 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:56:51,047 INFO L276 IsEmpty]: Start isEmpty. Operand 17406 states and 59183 transitions. [2018-11-28 12:56:51,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-11-28 12:56:51,063 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:51,063 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:51,063 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:51,063 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:51,063 INFO L82 PathProgramCache]: Analyzing trace with hash -2112962829, now seen corresponding path program 1 times [2018-11-28 12:56:51,064 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:51,064 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:51,065 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:51,065 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:51,065 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:51,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:51,150 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:51,151 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:51,151 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:56:51,151 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:56:51,151 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:56:51,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:56:51,152 INFO L87 Difference]: Start difference. First operand 17406 states and 59183 transitions. Second operand 5 states. [2018-11-28 12:56:51,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:51,275 INFO L93 Difference]: Finished difference Result 13026 states and 43919 transitions. [2018-11-28 12:56:51,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:56:51,275 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 115 [2018-11-28 12:56:51,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:51,290 INFO L225 Difference]: With dead ends: 13026 [2018-11-28 12:56:51,290 INFO L226 Difference]: Without dead ends: 13026 [2018-11-28 12:56:51,290 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:56:51,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13026 states. [2018-11-28 12:56:51,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13026 to 12966. [2018-11-28 12:56:51,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12966 states. [2018-11-28 12:56:51,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12966 states to 12966 states and 43731 transitions. [2018-11-28 12:56:51,430 INFO L78 Accepts]: Start accepts. Automaton has 12966 states and 43731 transitions. Word has length 115 [2018-11-28 12:56:51,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:51,430 INFO L480 AbstractCegarLoop]: Abstraction has 12966 states and 43731 transitions. [2018-11-28 12:56:51,430 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:56:51,430 INFO L276 IsEmpty]: Start isEmpty. Operand 12966 states and 43731 transitions. [2018-11-28 12:56:51,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-11-28 12:56:51,443 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:51,443 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:51,444 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:51,444 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:51,444 INFO L82 PathProgramCache]: Analyzing trace with hash -349580088, now seen corresponding path program 1 times [2018-11-28 12:56:51,444 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:51,444 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:51,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:51,446 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:51,446 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:51,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:51,500 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:51,500 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:51,500 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:56:51,500 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:56:51,500 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:56:51,500 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:56:51,502 INFO L87 Difference]: Start difference. First operand 12966 states and 43731 transitions. Second operand 4 states. [2018-11-28 12:56:51,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:51,669 INFO L93 Difference]: Finished difference Result 14404 states and 48287 transitions. [2018-11-28 12:56:51,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:56:51,670 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 117 [2018-11-28 12:56:51,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:51,686 INFO L225 Difference]: With dead ends: 14404 [2018-11-28 12:56:51,686 INFO L226 Difference]: Without dead ends: 14404 [2018-11-28 12:56:51,687 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:56:51,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14404 states. [2018-11-28 12:56:51,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14404 to 13176. [2018-11-28 12:56:51,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13176 states. [2018-11-28 12:56:51,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13176 states to 13176 states and 44384 transitions. [2018-11-28 12:56:51,834 INFO L78 Accepts]: Start accepts. Automaton has 13176 states and 44384 transitions. Word has length 117 [2018-11-28 12:56:51,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:51,834 INFO L480 AbstractCegarLoop]: Abstraction has 13176 states and 44384 transitions. [2018-11-28 12:56:51,834 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:56:51,834 INFO L276 IsEmpty]: Start isEmpty. Operand 13176 states and 44384 transitions. [2018-11-28 12:56:51,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-11-28 12:56:51,847 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:51,847 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:51,848 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:51,848 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:51,848 INFO L82 PathProgramCache]: Analyzing trace with hash 2009726921, now seen corresponding path program 1 times [2018-11-28 12:56:51,848 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:51,848 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:51,849 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:51,849 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:51,849 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:51,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:51,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:51,905 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:51,905 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:56:51,905 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:56:51,906 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:56:51,906 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:56:51,906 INFO L87 Difference]: Start difference. First operand 13176 states and 44384 transitions. Second operand 3 states. [2018-11-28 12:56:52,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:52,041 INFO L93 Difference]: Finished difference Result 16646 states and 54935 transitions. [2018-11-28 12:56:52,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:56:52,041 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 117 [2018-11-28 12:56:52,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:52,059 INFO L225 Difference]: With dead ends: 16646 [2018-11-28 12:56:52,059 INFO L226 Difference]: Without dead ends: 16646 [2018-11-28 12:56:52,059 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:56:52,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16646 states. [2018-11-28 12:56:52,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16646 to 15966. [2018-11-28 12:56:52,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15966 states. [2018-11-28 12:56:52,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15966 states to 15966 states and 52956 transitions. [2018-11-28 12:56:52,234 INFO L78 Accepts]: Start accepts. Automaton has 15966 states and 52956 transitions. Word has length 117 [2018-11-28 12:56:52,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:52,234 INFO L480 AbstractCegarLoop]: Abstraction has 15966 states and 52956 transitions. [2018-11-28 12:56:52,234 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:56:52,234 INFO L276 IsEmpty]: Start isEmpty. Operand 15966 states and 52956 transitions. [2018-11-28 12:56:52,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-11-28 12:56:52,248 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:52,249 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:52,249 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:52,249 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:52,249 INFO L82 PathProgramCache]: Analyzing trace with hash 328366779, now seen corresponding path program 2 times [2018-11-28 12:56:52,249 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:52,249 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:52,250 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:52,251 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:52,251 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:52,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:52,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:52,339 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:52,339 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:56:52,340 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:56:52,340 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:56:52,340 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:56:52,340 INFO L87 Difference]: Start difference. First operand 15966 states and 52956 transitions. Second operand 6 states. [2018-11-28 12:56:52,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:52,578 INFO L93 Difference]: Finished difference Result 19309 states and 62969 transitions. [2018-11-28 12:56:52,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 12:56:52,579 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 117 [2018-11-28 12:56:52,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:52,599 INFO L225 Difference]: With dead ends: 19309 [2018-11-28 12:56:52,599 INFO L226 Difference]: Without dead ends: 19309 [2018-11-28 12:56:52,600 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:56:52,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19309 states. [2018-11-28 12:56:52,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19309 to 14951. [2018-11-28 12:56:52,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14951 states. [2018-11-28 12:56:52,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14951 states to 14951 states and 49114 transitions. [2018-11-28 12:56:52,779 INFO L78 Accepts]: Start accepts. Automaton has 14951 states and 49114 transitions. Word has length 117 [2018-11-28 12:56:52,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:52,779 INFO L480 AbstractCegarLoop]: Abstraction has 14951 states and 49114 transitions. [2018-11-28 12:56:52,779 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:56:52,779 INFO L276 IsEmpty]: Start isEmpty. Operand 14951 states and 49114 transitions. [2018-11-28 12:56:52,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-11-28 12:56:52,793 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:52,793 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:52,793 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:52,793 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:52,794 INFO L82 PathProgramCache]: Analyzing trace with hash -2044621462, now seen corresponding path program 1 times [2018-11-28 12:56:52,794 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:52,794 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:52,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:52,795 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 12:56:52,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:52,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:52,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:52,885 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:52,886 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:56:52,886 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:56:52,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:56:52,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:56:52,886 INFO L87 Difference]: Start difference. First operand 14951 states and 49114 transitions. Second operand 7 states. [2018-11-28 12:56:53,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:53,089 INFO L93 Difference]: Finished difference Result 21301 states and 68469 transitions. [2018-11-28 12:56:53,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 12:56:53,090 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 119 [2018-11-28 12:56:53,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:53,112 INFO L225 Difference]: With dead ends: 21301 [2018-11-28 12:56:53,112 INFO L226 Difference]: Without dead ends: 21201 [2018-11-28 12:56:53,113 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:56:53,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21201 states. [2018-11-28 12:56:53,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21201 to 16756. [2018-11-28 12:56:53,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16756 states. [2018-11-28 12:56:53,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16756 states to 16756 states and 54648 transitions. [2018-11-28 12:56:53,352 INFO L78 Accepts]: Start accepts. Automaton has 16756 states and 54648 transitions. Word has length 119 [2018-11-28 12:56:53,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:53,353 INFO L480 AbstractCegarLoop]: Abstraction has 16756 states and 54648 transitions. [2018-11-28 12:56:53,353 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:56:53,353 INFO L276 IsEmpty]: Start isEmpty. Operand 16756 states and 54648 transitions. [2018-11-28 12:56:53,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-11-28 12:56:53,366 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:53,367 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:53,367 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:53,367 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:53,367 INFO L82 PathProgramCache]: Analyzing trace with hash 1584209415, now seen corresponding path program 1 times [2018-11-28 12:56:53,367 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:53,367 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:53,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:53,368 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:53,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:53,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:53,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:53,484 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:53,484 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:56:53,484 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:56:53,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:56:53,485 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:56:53,485 INFO L87 Difference]: Start difference. First operand 16756 states and 54648 transitions. Second operand 5 states. [2018-11-28 12:56:53,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:53,673 INFO L93 Difference]: Finished difference Result 16756 states and 53333 transitions. [2018-11-28 12:56:53,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:56:53,674 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 119 [2018-11-28 12:56:53,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:53,698 INFO L225 Difference]: With dead ends: 16756 [2018-11-28 12:56:53,698 INFO L226 Difference]: Without dead ends: 16756 [2018-11-28 12:56:53,699 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:56:53,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16756 states. [2018-11-28 12:56:53,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16756 to 16756. [2018-11-28 12:56:53,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16756 states. [2018-11-28 12:56:53,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16756 states to 16756 states and 53333 transitions. [2018-11-28 12:56:53,890 INFO L78 Accepts]: Start accepts. Automaton has 16756 states and 53333 transitions. Word has length 119 [2018-11-28 12:56:53,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:53,891 INFO L480 AbstractCegarLoop]: Abstraction has 16756 states and 53333 transitions. [2018-11-28 12:56:53,891 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:56:53,891 INFO L276 IsEmpty]: Start isEmpty. Operand 16756 states and 53333 transitions. [2018-11-28 12:56:53,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-11-28 12:56:53,905 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:53,905 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:53,905 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:53,905 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:53,905 INFO L82 PathProgramCache]: Analyzing trace with hash 142084357, now seen corresponding path program 1 times [2018-11-28 12:56:53,905 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:53,905 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:53,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:53,906 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:53,907 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:53,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:53,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:53,948 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:53,949 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:56:53,949 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:56:53,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:56:53,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:56:53,949 INFO L87 Difference]: Start difference. First operand 16756 states and 53333 transitions. Second operand 4 states. [2018-11-28 12:56:54,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:54,081 INFO L93 Difference]: Finished difference Result 18100 states and 58021 transitions. [2018-11-28 12:56:54,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:56:54,081 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 119 [2018-11-28 12:56:54,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:54,101 INFO L225 Difference]: With dead ends: 18100 [2018-11-28 12:56:54,101 INFO L226 Difference]: Without dead ends: 18100 [2018-11-28 12:56:54,101 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:56:54,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18100 states. [2018-11-28 12:56:54,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18100 to 17972. [2018-11-28 12:56:54,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17972 states. [2018-11-28 12:56:54,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17972 states to 17972 states and 57605 transitions. [2018-11-28 12:56:54,292 INFO L78 Accepts]: Start accepts. Automaton has 17972 states and 57605 transitions. Word has length 119 [2018-11-28 12:56:54,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:54,292 INFO L480 AbstractCegarLoop]: Abstraction has 17972 states and 57605 transitions. [2018-11-28 12:56:54,292 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:56:54,292 INFO L276 IsEmpty]: Start isEmpty. Operand 17972 states and 57605 transitions. [2018-11-28 12:56:54,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-11-28 12:56:54,308 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:54,308 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:54,309 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:54,309 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:54,309 INFO L82 PathProgramCache]: Analyzing trace with hash -1935124986, now seen corresponding path program 1 times [2018-11-28 12:56:54,309 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:54,309 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:54,310 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:54,311 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:54,311 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:54,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:54,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:54,401 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:54,401 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:56:54,401 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:56:54,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:56:54,401 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:56:54,401 INFO L87 Difference]: Start difference. First operand 17972 states and 57605 transitions. Second operand 7 states. [2018-11-28 12:56:54,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:54,740 INFO L93 Difference]: Finished difference Result 27610 states and 88102 transitions. [2018-11-28 12:56:54,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 12:56:54,740 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 119 [2018-11-28 12:56:54,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:54,770 INFO L225 Difference]: With dead ends: 27610 [2018-11-28 12:56:54,770 INFO L226 Difference]: Without dead ends: 27482 [2018-11-28 12:56:54,771 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2018-11-28 12:56:54,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27482 states. [2018-11-28 12:56:55,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27482 to 24557. [2018-11-28 12:56:55,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24557 states. [2018-11-28 12:56:55,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24557 states to 24557 states and 78710 transitions. [2018-11-28 12:56:55,057 INFO L78 Accepts]: Start accepts. Automaton has 24557 states and 78710 transitions. Word has length 119 [2018-11-28 12:56:55,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:55,057 INFO L480 AbstractCegarLoop]: Abstraction has 24557 states and 78710 transitions. [2018-11-28 12:56:55,057 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:56:55,057 INFO L276 IsEmpty]: Start isEmpty. Operand 24557 states and 78710 transitions. [2018-11-28 12:56:55,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-11-28 12:56:55,079 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:55,079 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:55,080 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:55,080 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:55,080 INFO L82 PathProgramCache]: Analyzing trace with hash -973510969, now seen corresponding path program 1 times [2018-11-28 12:56:55,080 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:55,080 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:55,081 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:55,081 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:55,081 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:55,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:55,164 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:55,165 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:55,165 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:56:55,165 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:56:55,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:56:55,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:56:55,166 INFO L87 Difference]: Start difference. First operand 24557 states and 78710 transitions. Second operand 7 states. [2018-11-28 12:56:55,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:55,594 INFO L93 Difference]: Finished difference Result 34058 states and 107822 transitions. [2018-11-28 12:56:55,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 12:56:55,594 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 119 [2018-11-28 12:56:55,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:55,700 INFO L225 Difference]: With dead ends: 34058 [2018-11-28 12:56:55,700 INFO L226 Difference]: Without dead ends: 34058 [2018-11-28 12:56:55,700 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=110, Unknown=0, NotChecked=0, Total=156 [2018-11-28 12:56:55,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34058 states. [2018-11-28 12:56:55,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34058 to 26543. [2018-11-28 12:56:55,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26543 states. [2018-11-28 12:56:55,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26543 states to 26543 states and 85434 transitions. [2018-11-28 12:56:55,977 INFO L78 Accepts]: Start accepts. Automaton has 26543 states and 85434 transitions. Word has length 119 [2018-11-28 12:56:55,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:55,977 INFO L480 AbstractCegarLoop]: Abstraction has 26543 states and 85434 transitions. [2018-11-28 12:56:55,978 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:56:55,978 INFO L276 IsEmpty]: Start isEmpty. Operand 26543 states and 85434 transitions. [2018-11-28 12:56:56,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-11-28 12:56:56,000 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:56,000 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:56,001 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:56,001 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:56,001 INFO L82 PathProgramCache]: Analyzing trace with hash 271253512, now seen corresponding path program 1 times [2018-11-28 12:56:56,001 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:56,001 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:56,002 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:56,002 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:56,002 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:56,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:56,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:56,093 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:56,094 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:56:56,094 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:56:56,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:56:56,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:56:56,094 INFO L87 Difference]: Start difference. First operand 26543 states and 85434 transitions. Second operand 7 states. [2018-11-28 12:56:56,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:56,328 INFO L93 Difference]: Finished difference Result 40573 states and 132476 transitions. [2018-11-28 12:56:56,328 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:56:56,328 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 119 [2018-11-28 12:56:56,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:56,393 INFO L225 Difference]: With dead ends: 40573 [2018-11-28 12:56:56,393 INFO L226 Difference]: Without dead ends: 40573 [2018-11-28 12:56:56,394 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:56:56,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40573 states. [2018-11-28 12:56:56,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40573 to 27918. [2018-11-28 12:56:56,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27918 states. [2018-11-28 12:56:56,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27918 states to 27918 states and 89434 transitions. [2018-11-28 12:56:56,775 INFO L78 Accepts]: Start accepts. Automaton has 27918 states and 89434 transitions. Word has length 119 [2018-11-28 12:56:56,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:56,775 INFO L480 AbstractCegarLoop]: Abstraction has 27918 states and 89434 transitions. [2018-11-28 12:56:56,776 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:56:56,776 INFO L276 IsEmpty]: Start isEmpty. Operand 27918 states and 89434 transitions. [2018-11-28 12:56:56,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-11-28 12:56:56,803 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:56,803 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:56,803 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:56,803 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:56,804 INFO L82 PathProgramCache]: Analyzing trace with hash -1946853815, now seen corresponding path program 1 times [2018-11-28 12:56:56,804 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:56,804 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:56,805 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:56,805 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:56,805 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:56,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:56,882 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:56,883 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:56,883 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:56:56,883 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:56:56,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:56:56,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:56:56,883 INFO L87 Difference]: Start difference. First operand 27918 states and 89434 transitions. Second operand 7 states. [2018-11-28 12:56:57,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:57,089 INFO L93 Difference]: Finished difference Result 29593 states and 94384 transitions. [2018-11-28 12:56:57,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 12:56:57,090 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 119 [2018-11-28 12:56:57,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:57,124 INFO L225 Difference]: With dead ends: 29593 [2018-11-28 12:56:57,124 INFO L226 Difference]: Without dead ends: 29593 [2018-11-28 12:56:57,125 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2018-11-28 12:56:57,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29593 states. [2018-11-28 12:56:57,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29593 to 28158. [2018-11-28 12:56:57,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28158 states. [2018-11-28 12:56:57,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28158 states to 28158 states and 90106 transitions. [2018-11-28 12:56:57,443 INFO L78 Accepts]: Start accepts. Automaton has 28158 states and 90106 transitions. Word has length 119 [2018-11-28 12:56:57,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:57,443 INFO L480 AbstractCegarLoop]: Abstraction has 28158 states and 90106 transitions. [2018-11-28 12:56:57,443 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:56:57,444 INFO L276 IsEmpty]: Start isEmpty. Operand 28158 states and 90106 transitions. [2018-11-28 12:56:57,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-11-28 12:56:57,471 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:57,471 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:57,471 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:57,471 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:57,471 INFO L82 PathProgramCache]: Analyzing trace with hash 1842631432, now seen corresponding path program 1 times [2018-11-28 12:56:57,471 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:57,472 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:57,473 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:57,473 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:57,473 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:57,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:57,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:57,547 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:57,547 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:56:57,548 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:56:57,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:56:57,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:56:57,548 INFO L87 Difference]: Start difference. First operand 28158 states and 90106 transitions. Second operand 6 states. [2018-11-28 12:56:57,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:57,802 INFO L93 Difference]: Finished difference Result 25726 states and 80922 transitions. [2018-11-28 12:56:57,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 12:56:57,803 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 119 [2018-11-28 12:56:57,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:57,838 INFO L225 Difference]: With dead ends: 25726 [2018-11-28 12:56:57,838 INFO L226 Difference]: Without dead ends: 25726 [2018-11-28 12:56:57,838 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:56:57,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25726 states. [2018-11-28 12:56:58,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25726 to 19059. [2018-11-28 12:56:58,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19059 states. [2018-11-28 12:56:58,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19059 states to 19059 states and 60514 transitions. [2018-11-28 12:56:58,057 INFO L78 Accepts]: Start accepts. Automaton has 19059 states and 60514 transitions. Word has length 119 [2018-11-28 12:56:58,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:58,057 INFO L480 AbstractCegarLoop]: Abstraction has 19059 states and 60514 transitions. [2018-11-28 12:56:58,057 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:56:58,058 INFO L276 IsEmpty]: Start isEmpty. Operand 19059 states and 60514 transitions. [2018-11-28 12:56:58,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-11-28 12:56:58,073 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:58,073 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:58,073 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:58,074 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:58,074 INFO L82 PathProgramCache]: Analyzing trace with hash -750756058, now seen corresponding path program 1 times [2018-11-28 12:56:58,074 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:58,074 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:58,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:58,075 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:58,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:58,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:58,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:58,113 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:58,113 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:56:58,114 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:56:58,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:56:58,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:56:58,114 INFO L87 Difference]: Start difference. First operand 19059 states and 60514 transitions. Second operand 5 states. [2018-11-28 12:56:58,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:58,308 INFO L93 Difference]: Finished difference Result 21912 states and 69118 transitions. [2018-11-28 12:56:58,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 12:56:58,309 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 119 [2018-11-28 12:56:58,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:58,332 INFO L225 Difference]: With dead ends: 21912 [2018-11-28 12:56:58,332 INFO L226 Difference]: Without dead ends: 21912 [2018-11-28 12:56:58,332 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:56:58,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21912 states. [2018-11-28 12:56:58,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21912 to 19109. [2018-11-28 12:56:58,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19109 states. [2018-11-28 12:56:58,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19109 states to 19109 states and 60654 transitions. [2018-11-28 12:56:58,546 INFO L78 Accepts]: Start accepts. Automaton has 19109 states and 60654 transitions. Word has length 119 [2018-11-28 12:56:58,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:58,546 INFO L480 AbstractCegarLoop]: Abstraction has 19109 states and 60654 transitions. [2018-11-28 12:56:58,547 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:56:58,547 INFO L276 IsEmpty]: Start isEmpty. Operand 19109 states and 60654 transitions. [2018-11-28 12:56:58,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-11-28 12:56:58,562 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:58,562 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:58,563 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:58,563 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:58,563 INFO L82 PathProgramCache]: Analyzing trace with hash -95385115, now seen corresponding path program 1 times [2018-11-28 12:56:58,563 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:58,563 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:58,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:58,564 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:58,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:58,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:58,636 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:58,636 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:58,636 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:56:58,636 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:56:58,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:56:58,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:56:58,637 INFO L87 Difference]: Start difference. First operand 19109 states and 60654 transitions. Second operand 5 states. [2018-11-28 12:56:58,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:58,792 INFO L93 Difference]: Finished difference Result 20389 states and 64814 transitions. [2018-11-28 12:56:58,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:56:58,793 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 121 [2018-11-28 12:56:58,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:58,813 INFO L225 Difference]: With dead ends: 20389 [2018-11-28 12:56:58,814 INFO L226 Difference]: Without dead ends: 20389 [2018-11-28 12:56:58,814 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:56:58,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20389 states. [2018-11-28 12:56:58,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20389 to 19301. [2018-11-28 12:56:58,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19301 states. [2018-11-28 12:56:59,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19301 states to 19301 states and 61278 transitions. [2018-11-28 12:56:59,018 INFO L78 Accepts]: Start accepts. Automaton has 19301 states and 61278 transitions. Word has length 121 [2018-11-28 12:56:59,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:59,019 INFO L480 AbstractCegarLoop]: Abstraction has 19301 states and 61278 transitions. [2018-11-28 12:56:59,019 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:56:59,019 INFO L276 IsEmpty]: Start isEmpty. Operand 19301 states and 61278 transitions. [2018-11-28 12:56:59,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-11-28 12:56:59,036 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:59,036 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:59,036 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:59,036 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:59,037 INFO L82 PathProgramCache]: Analyzing trace with hash 1149379366, now seen corresponding path program 1 times [2018-11-28 12:56:59,037 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:59,037 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:59,037 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:59,037 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:59,038 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:59,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:59,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:59,102 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:59,102 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:56:59,102 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:56:59,102 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:56:59,102 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:56:59,102 INFO L87 Difference]: Start difference. First operand 19301 states and 61278 transitions. Second operand 5 states. [2018-11-28 12:56:59,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:59,179 INFO L93 Difference]: Finished difference Result 27569 states and 87638 transitions. [2018-11-28 12:56:59,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:56:59,179 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 121 [2018-11-28 12:56:59,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:59,211 INFO L225 Difference]: With dead ends: 27569 [2018-11-28 12:56:59,211 INFO L226 Difference]: Without dead ends: 27569 [2018-11-28 12:56:59,212 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:56:59,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27569 states. [2018-11-28 12:56:59,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27569 to 19301. [2018-11-28 12:56:59,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19301 states. [2018-11-28 12:56:59,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19301 states to 19301 states and 60353 transitions. [2018-11-28 12:56:59,452 INFO L78 Accepts]: Start accepts. Automaton has 19301 states and 60353 transitions. Word has length 121 [2018-11-28 12:56:59,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:56:59,452 INFO L480 AbstractCegarLoop]: Abstraction has 19301 states and 60353 transitions. [2018-11-28 12:56:59,453 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:56:59,453 INFO L276 IsEmpty]: Start isEmpty. Operand 19301 states and 60353 transitions. [2018-11-28 12:56:59,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-11-28 12:56:59,470 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:56:59,470 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:56:59,470 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:56:59,471 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:56:59,471 INFO L82 PathProgramCache]: Analyzing trace with hash -1841194201, now seen corresponding path program 1 times [2018-11-28 12:56:59,471 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:56:59,471 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:56:59,472 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:59,472 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:56:59,472 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:56:59,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:56:59,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:56:59,531 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:56:59,531 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:56:59,531 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:56:59,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:56:59,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:56:59,532 INFO L87 Difference]: Start difference. First operand 19301 states and 60353 transitions. Second operand 4 states. [2018-11-28 12:56:59,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:56:59,700 INFO L93 Difference]: Finished difference Result 28852 states and 90594 transitions. [2018-11-28 12:56:59,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:56:59,701 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 121 [2018-11-28 12:56:59,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:56:59,731 INFO L225 Difference]: With dead ends: 28852 [2018-11-28 12:56:59,731 INFO L226 Difference]: Without dead ends: 28852 [2018-11-28 12:56:59,731 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:56:59,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28852 states. [2018-11-28 12:57:00,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28852 to 28503. [2018-11-28 12:57:00,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28503 states. [2018-11-28 12:57:00,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28503 states to 28503 states and 89608 transitions. [2018-11-28 12:57:00,048 INFO L78 Accepts]: Start accepts. Automaton has 28503 states and 89608 transitions. Word has length 121 [2018-11-28 12:57:00,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:00,048 INFO L480 AbstractCegarLoop]: Abstraction has 28503 states and 89608 transitions. [2018-11-28 12:57:00,048 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:57:00,048 INFO L276 IsEmpty]: Start isEmpty. Operand 28503 states and 89608 transitions. [2018-11-28 12:57:00,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-11-28 12:57:00,073 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:00,073 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:00,073 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:00,073 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:00,074 INFO L82 PathProgramCache]: Analyzing trace with hash 1566269414, now seen corresponding path program 1 times [2018-11-28 12:57:00,074 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:00,074 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:00,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:00,075 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:00,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:00,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:00,134 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:00,135 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:00,135 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:57:00,135 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:57:00,135 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:57:00,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:57:00,135 INFO L87 Difference]: Start difference. First operand 28503 states and 89608 transitions. Second operand 6 states. [2018-11-28 12:57:00,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:00,285 INFO L93 Difference]: Finished difference Result 52291 states and 164513 transitions. [2018-11-28 12:57:00,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 12:57:00,286 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 121 [2018-11-28 12:57:00,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:00,316 INFO L225 Difference]: With dead ends: 52291 [2018-11-28 12:57:00,316 INFO L226 Difference]: Without dead ends: 24684 [2018-11-28 12:57:00,316 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:57:00,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24684 states. [2018-11-28 12:57:00,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24684 to 24684. [2018-11-28 12:57:00,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24684 states. [2018-11-28 12:57:00,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24684 states to 24684 states and 77404 transitions. [2018-11-28 12:57:00,581 INFO L78 Accepts]: Start accepts. Automaton has 24684 states and 77404 transitions. Word has length 121 [2018-11-28 12:57:00,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:00,581 INFO L480 AbstractCegarLoop]: Abstraction has 24684 states and 77404 transitions. [2018-11-28 12:57:00,581 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:57:00,581 INFO L276 IsEmpty]: Start isEmpty. Operand 24684 states and 77404 transitions. [2018-11-28 12:57:00,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-11-28 12:57:00,603 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:00,603 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:00,603 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:00,603 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:00,603 INFO L82 PathProgramCache]: Analyzing trace with hash 920726836, now seen corresponding path program 2 times [2018-11-28 12:57:00,603 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:00,603 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:00,604 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:00,604 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:00,604 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:00,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:00,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:00,675 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:00,675 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:57:00,675 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:57:00,675 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:57:00,675 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:57:00,676 INFO L87 Difference]: Start difference. First operand 24684 states and 77404 transitions. Second operand 7 states. [2018-11-28 12:57:00,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:00,790 INFO L93 Difference]: Finished difference Result 36068 states and 116298 transitions. [2018-11-28 12:57:00,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:57:00,790 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 121 [2018-11-28 12:57:00,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:00,804 INFO L225 Difference]: With dead ends: 36068 [2018-11-28 12:57:00,804 INFO L226 Difference]: Without dead ends: 11692 [2018-11-28 12:57:00,804 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2018-11-28 12:57:00,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11692 states. [2018-11-28 12:57:00,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11692 to 11692. [2018-11-28 12:57:00,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11692 states. [2018-11-28 12:57:00,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11692 states to 11692 states and 39565 transitions. [2018-11-28 12:57:00,923 INFO L78 Accepts]: Start accepts. Automaton has 11692 states and 39565 transitions. Word has length 121 [2018-11-28 12:57:00,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:00,924 INFO L480 AbstractCegarLoop]: Abstraction has 11692 states and 39565 transitions. [2018-11-28 12:57:00,924 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:57:00,924 INFO L276 IsEmpty]: Start isEmpty. Operand 11692 states and 39565 transitions. [2018-11-28 12:57:00,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-11-28 12:57:00,934 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:00,934 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:00,934 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:00,934 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:00,934 INFO L82 PathProgramCache]: Analyzing trace with hash -608268126, now seen corresponding path program 3 times [2018-11-28 12:57:00,934 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:00,934 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:00,935 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:00,935 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 12:57:00,935 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:00,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 12:57:00,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 12:57:01,000 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 12:57:01,124 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-28 12:57:01,125 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 12:57:01 BasicIcfg [2018-11-28 12:57:01,125 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 12:57:01,125 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 12:57:01,126 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 12:57:01,126 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 12:57:01,126 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:52:14" (3/4) ... [2018-11-28 12:57:01,128 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-28 12:57:01,261 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_92c362cb-bf38-4679-9864-2b088a841d3e/bin-2019/uautomizer/witness.graphml [2018-11-28 12:57:01,261 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 12:57:01,262 INFO L168 Benchmark]: Toolchain (without parser) took 287488.03 ms. Allocated memory was 1.0 GB in the beginning and 9.2 GB in the end (delta: 8.2 GB). Free memory was 956.0 MB in the beginning and 6.4 GB in the end (delta: -5.5 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. [2018-11-28 12:57:01,264 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 985.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 12:57:01,265 INFO L168 Benchmark]: CACSL2BoogieTranslator took 411.63 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 88.6 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -108.3 MB). Peak memory consumption was 37.4 MB. Max. memory is 11.5 GB. [2018-11-28 12:57:01,265 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.90 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.5 MB). Peak memory consumption was 3.5 MB. Max. memory is 11.5 GB. [2018-11-28 12:57:01,265 INFO L168 Benchmark]: Boogie Preprocessor took 25.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.5 MB). Peak memory consumption was 3.5 MB. Max. memory is 11.5 GB. [2018-11-28 12:57:01,265 INFO L168 Benchmark]: RCFGBuilder took 669.59 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 994.9 MB in the end (delta: 62.3 MB). Peak memory consumption was 62.3 MB. Max. memory is 11.5 GB. [2018-11-28 12:57:01,266 INFO L168 Benchmark]: TraceAbstraction took 286204.37 ms. Allocated memory was 1.1 GB in the beginning and 9.2 GB in the end (delta: 8.1 GB). Free memory was 994.9 MB in the beginning and 6.5 GB in the end (delta: -5.5 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. [2018-11-28 12:57:01,266 INFO L168 Benchmark]: Witness Printer took 136.06 ms. Allocated memory is still 9.2 GB. Free memory was 6.5 GB in the beginning and 6.4 GB in the end (delta: 59.6 MB). Peak memory consumption was 59.6 MB. Max. memory is 11.5 GB. [2018-11-28 12:57:01,267 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 985.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 411.63 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 88.6 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -108.3 MB). Peak memory consumption was 37.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.90 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.5 MB). Peak memory consumption was 3.5 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.5 MB). Peak memory consumption was 3.5 MB. Max. memory is 11.5 GB. * RCFGBuilder took 669.59 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 994.9 MB in the end (delta: 62.3 MB). Peak memory consumption was 62.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 286204.37 ms. Allocated memory was 1.1 GB in the beginning and 9.2 GB in the end (delta: 8.1 GB). Free memory was 994.9 MB in the beginning and 6.5 GB in the end (delta: -5.5 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. * Witness Printer took 136.06 ms. Allocated memory is still 9.2 GB. Free memory was 6.5 GB in the beginning and 6.4 GB in the end (delta: 59.6 MB). Peak memory consumption was 59.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0] [L676] -1 int __unbuffered_p2_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0] [L677] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0] [L678] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L680] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L682] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L683] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L684] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L685] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L686] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L687] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L688] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L689] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L690] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L691] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L692] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L693] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L694] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L695] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L696] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L697] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L698] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L700] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L701] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L702] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L794] -1 pthread_t t768; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L795] FCALL, FORK -1 pthread_create(&t768, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L796] -1 pthread_t t769; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L797] FCALL, FORK -1 pthread_create(&t769, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L798] -1 pthread_t t770; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L799] FCALL, FORK -1 pthread_create(&t770, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L741] 0 y$w_buff1 = y$w_buff0 [L742] 0 y$w_buff0 = 2 [L743] 0 y$w_buff1_used = y$w_buff0_used [L744] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L746] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L747] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L748] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L749] 0 y$r_buff1_thd3 = y$r_buff0_thd3 [L750] 0 y$r_buff0_thd3 = (_Bool)1 [L753] 0 weak$$choice0 = __VERIFIER_nondet_pointer() [L754] 0 weak$$choice2 = __VERIFIER_nondet_pointer() [L755] 0 y$flush_delayed = weak$$choice2 [L756] 0 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L757] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L757] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L757] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L757] 0 y = !y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff1) [L758] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L758] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)) [L759] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L759] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)) [L760] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L760] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used)) [L761] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L761] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L762] EXPR 0 weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L762] 0 y$r_buff0_thd3 = weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3)) [L763] EXPR 0 weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L763] 0 y$r_buff1_thd3 = weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L764] 0 __unbuffered_p2_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L765] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L765] 0 y = y$flush_delayed ? y$mem_tmp : y [L766] 0 y$flush_delayed = (_Bool)0 [L769] 0 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L772] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L706] 1 z = 1 [L709] 1 x = 1 [L714] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L721] 2 x = 2 [L724] 2 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L727] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L727] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1, z=1] [L727] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1, z=1] [L727] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L728] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L728] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L729] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L729] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L730] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L730] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L731] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L731] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L734] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L772] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L773] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L773] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L774] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L774] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L775] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L775] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L776] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L776] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L779] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L805] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L805] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L805] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L805] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L806] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L806] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L807] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L807] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L808] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L809] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L809] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L812] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L813] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L814] -1 y$flush_delayed = weak$$choice2 [L815] -1 y$mem_tmp = y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L817] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L817] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L818] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L818] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L819] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L819] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L820] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L821] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L821] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L822] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L822] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L823] -1 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 2 && __unbuffered_p2_EBX == 0) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] -1 y = y$flush_delayed ? y$mem_tmp : y [L825] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 283 locations, 3 error locations. UNSAFE Result, 286.1s OverallTime, 29 OverallIterations, 1 TraceHistogramMax, 55.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 8722 SDtfs, 8831 SDslu, 18044 SDs, 0 SdLazy, 4882 SolverSat, 344 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 224 GetRequests, 61 SyntacticMatches, 27 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 1.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=549408occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 116.2s AutomataMinimizationTime, 28 MinimizatonAttempts, 819021 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.5s InterpolantComputationTime, 3041 NumberOfCodeBlocks, 3041 NumberOfCodeBlocksAsserted, 29 NumberOfCheckSat, 2892 ConstructedInterpolants, 0 QuantifiedInterpolants, 733912 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 28 InterpolantComputations, 28 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...