./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix054_rmo.oepc_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0cd3be1d Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix054_rmo.oepc_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 85b1258ded0eac0276acac04f0bf2be2f4435887 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-0cd3be1 [2018-11-28 12:28:02,096 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 12:28:02,097 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 12:28:02,106 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 12:28:02,106 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 12:28:02,107 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 12:28:02,108 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 12:28:02,109 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 12:28:02,110 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 12:28:02,111 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 12:28:02,112 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 12:28:02,112 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 12:28:02,113 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 12:28:02,113 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 12:28:02,114 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 12:28:02,115 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 12:28:02,115 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 12:28:02,117 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 12:28:02,119 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 12:28:02,120 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 12:28:02,121 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 12:28:02,122 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 12:28:02,124 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 12:28:02,124 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 12:28:02,124 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 12:28:02,125 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 12:28:02,126 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 12:28:02,126 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 12:28:02,127 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 12:28:02,128 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 12:28:02,128 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 12:28:02,129 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 12:28:02,129 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 12:28:02,129 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 12:28:02,130 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 12:28:02,131 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 12:28:02,131 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-28 12:28:02,142 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 12:28:02,142 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 12:28:02,143 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 12:28:02,143 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 12:28:02,143 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 12:28:02,144 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 12:28:02,144 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 12:28:02,144 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 12:28:02,144 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 12:28:02,144 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 12:28:02,144 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 12:28:02,144 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 12:28:02,145 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-28 12:28:02,145 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 12:28:02,145 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-28 12:28:02,145 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 12:28:02,145 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-28 12:28:02,145 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 12:28:02,145 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-28 12:28:02,146 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 12:28:02,146 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 12:28:02,146 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 12:28:02,146 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 12:28:02,146 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 12:28:02,146 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 12:28:02,146 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 12:28:02,146 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-28 12:28:02,146 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-28 12:28:02,147 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 12:28:02,147 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-28 12:28:02,147 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 85b1258ded0eac0276acac04f0bf2be2f4435887 [2018-11-28 12:28:02,175 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 12:28:02,185 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 12:28:02,188 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 12:28:02,189 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 12:28:02,189 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 12:28:02,189 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix054_rmo.oepc_false-unreach-call.i [2018-11-28 12:28:02,242 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer/data/6de96c99c/4198ea3c9b574622b45625d6ccada1d3/FLAGb60b3c391 [2018-11-28 12:28:02,668 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 12:28:02,668 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/sv-benchmarks/c/pthread-wmm/mix054_rmo.oepc_false-unreach-call.i [2018-11-28 12:28:02,679 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer/data/6de96c99c/4198ea3c9b574622b45625d6ccada1d3/FLAGb60b3c391 [2018-11-28 12:28:02,690 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer/data/6de96c99c/4198ea3c9b574622b45625d6ccada1d3 [2018-11-28 12:28:02,693 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 12:28:02,694 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-28 12:28:02,694 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 12:28:02,694 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 12:28:02,697 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 12:28:02,698 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:28:02" (1/1) ... [2018-11-28 12:28:02,700 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@22b7394e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:02, skipping insertion in model container [2018-11-28 12:28:02,700 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:28:02" (1/1) ... [2018-11-28 12:28:02,705 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 12:28:02,737 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 12:28:03,003 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 12:28:03,014 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 12:28:03,117 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 12:28:03,155 INFO L195 MainTranslator]: Completed translation [2018-11-28 12:28:03,155 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:03 WrapperNode [2018-11-28 12:28:03,155 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 12:28:03,156 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-28 12:28:03,156 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-28 12:28:03,156 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-28 12:28:03,162 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:03" (1/1) ... [2018-11-28 12:28:03,178 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:03" (1/1) ... [2018-11-28 12:28:03,199 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-28 12:28:03,199 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 12:28:03,199 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 12:28:03,199 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 12:28:03,207 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:03" (1/1) ... [2018-11-28 12:28:03,207 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:03" (1/1) ... [2018-11-28 12:28:03,212 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:03" (1/1) ... [2018-11-28 12:28:03,212 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:03" (1/1) ... [2018-11-28 12:28:03,222 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:03" (1/1) ... [2018-11-28 12:28:03,226 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:03" (1/1) ... [2018-11-28 12:28:03,229 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:03" (1/1) ... [2018-11-28 12:28:03,232 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 12:28:03,234 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 12:28:03,234 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 12:28:03,234 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 12:28:03,235 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:03" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 12:28:03,279 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 12:28:03,279 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-28 12:28:03,279 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-28 12:28:03,279 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 12:28:03,280 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-28 12:28:03,280 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-28 12:28:03,280 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-28 12:28:03,280 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-28 12:28:03,280 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-28 12:28:03,280 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 12:28:03,280 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 12:28:03,282 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-28 12:28:03,836 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 12:28:03,836 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-28 12:28:03,837 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:28:03 BoogieIcfgContainer [2018-11-28 12:28:03,837 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 12:28:03,838 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 12:28:03,838 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 12:28:03,841 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 12:28:03,841 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 12:28:02" (1/3) ... [2018-11-28 12:28:03,842 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@38a208fe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:28:03, skipping insertion in model container [2018-11-28 12:28:03,842 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:28:03" (2/3) ... [2018-11-28 12:28:03,842 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@38a208fe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:28:03, skipping insertion in model container [2018-11-28 12:28:03,842 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:28:03" (3/3) ... [2018-11-28 12:28:03,843 INFO L112 eAbstractionObserver]: Analyzing ICFG mix054_rmo.oepc_false-unreach-call.i [2018-11-28 12:28:03,878 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,878 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,878 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,878 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,878 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,879 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,879 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,879 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,879 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,882 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,882 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,882 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,882 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,882 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,882 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,883 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,884 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,884 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,884 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,884 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,884 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,884 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,884 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,885 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,885 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,885 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,885 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,885 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,885 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,885 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,885 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,886 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,886 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,886 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,887 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,887 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,887 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,887 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,887 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,887 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,887 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,887 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,888 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,888 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,888 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,888 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,888 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,889 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,889 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,889 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,889 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,889 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,889 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,890 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,890 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,890 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,890 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,890 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,890 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,891 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,891 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,891 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,891 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,891 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,891 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,892 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,892 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,892 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,892 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,892 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,892 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,893 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,893 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,893 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,893 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,893 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,894 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,894 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,894 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,894 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,894 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,894 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,895 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,896 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,896 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,896 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,896 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,896 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,896 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,897 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,897 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,897 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,897 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,897 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,897 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,898 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,898 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,898 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,898 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,898 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,898 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,899 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,899 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,899 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,899 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,899 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,899 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,900 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,900 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,900 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,900 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,900 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,901 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,901 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,901 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,901 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,901 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,901 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,901 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,902 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,902 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,902 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,902 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,902 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,902 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,903 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,903 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,903 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,903 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,903 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,903 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,904 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,904 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,904 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,904 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,904 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,904 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,904 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,905 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,905 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,905 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,905 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,905 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,905 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,906 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,906 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,906 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,906 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,906 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,906 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,906 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,907 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,907 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,907 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:28:03,913 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-28 12:28:03,914 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 12:28:03,921 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-28 12:28:03,935 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-28 12:28:03,953 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 12:28:03,954 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 12:28:03,954 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-28 12:28:03,954 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 12:28:03,954 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 12:28:03,954 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 12:28:03,954 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 12:28:03,954 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 12:28:03,954 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 12:28:03,966 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 141places, 179 transitions [2018-11-28 12:28:06,148 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 34805 states. [2018-11-28 12:28:06,149 INFO L276 IsEmpty]: Start isEmpty. Operand 34805 states. [2018-11-28 12:28:06,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-28 12:28:06,156 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:06,157 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:06,159 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:06,163 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:06,164 INFO L82 PathProgramCache]: Analyzing trace with hash 1272153477, now seen corresponding path program 1 times [2018-11-28 12:28:06,165 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:06,166 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:06,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:06,213 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:06,213 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:06,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:06,366 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:06,369 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:06,369 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:28:06,372 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:28:06,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:28:06,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:28:06,384 INFO L87 Difference]: Start difference. First operand 34805 states. Second operand 4 states. [2018-11-28 12:28:07,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:07,257 INFO L93 Difference]: Finished difference Result 60789 states and 234492 transitions. [2018-11-28 12:28:07,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:28:07,259 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-11-28 12:28:07,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:07,517 INFO L225 Difference]: With dead ends: 60789 [2018-11-28 12:28:07,517 INFO L226 Difference]: Without dead ends: 44269 [2018-11-28 12:28:07,519 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:28:07,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44269 states. [2018-11-28 12:28:08,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44269 to 27337. [2018-11-28 12:28:08,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27337 states. [2018-11-28 12:28:08,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27337 states to 27337 states and 105498 transitions. [2018-11-28 12:28:08,787 INFO L78 Accepts]: Start accepts. Automaton has 27337 states and 105498 transitions. Word has length 32 [2018-11-28 12:28:08,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:08,787 INFO L480 AbstractCegarLoop]: Abstraction has 27337 states and 105498 transitions. [2018-11-28 12:28:08,787 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:28:08,788 INFO L276 IsEmpty]: Start isEmpty. Operand 27337 states and 105498 transitions. [2018-11-28 12:28:08,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-28 12:28:08,795 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:08,795 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:08,796 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:08,796 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:08,796 INFO L82 PathProgramCache]: Analyzing trace with hash 1559910934, now seen corresponding path program 1 times [2018-11-28 12:28:08,796 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:08,796 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:08,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:08,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:08,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:08,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:08,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:08,874 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:08,874 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:28:08,875 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:28:08,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:28:08,876 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:28:08,876 INFO L87 Difference]: Start difference. First operand 27337 states and 105498 transitions. Second operand 4 states. [2018-11-28 12:28:08,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:08,967 INFO L93 Difference]: Finished difference Result 8527 states and 28343 transitions. [2018-11-28 12:28:08,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:28:08,968 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 44 [2018-11-28 12:28:08,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:08,984 INFO L225 Difference]: With dead ends: 8527 [2018-11-28 12:28:08,984 INFO L226 Difference]: Without dead ends: 7465 [2018-11-28 12:28:08,985 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:28:09,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7465 states. [2018-11-28 12:28:09,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7465 to 7465. [2018-11-28 12:28:09,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7465 states. [2018-11-28 12:28:09,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7465 states to 7465 states and 24635 transitions. [2018-11-28 12:28:09,099 INFO L78 Accepts]: Start accepts. Automaton has 7465 states and 24635 transitions. Word has length 44 [2018-11-28 12:28:09,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:09,100 INFO L480 AbstractCegarLoop]: Abstraction has 7465 states and 24635 transitions. [2018-11-28 12:28:09,100 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:28:09,100 INFO L276 IsEmpty]: Start isEmpty. Operand 7465 states and 24635 transitions. [2018-11-28 12:28:09,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-28 12:28:09,101 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:09,102 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:09,102 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:09,102 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:09,102 INFO L82 PathProgramCache]: Analyzing trace with hash -1459656693, now seen corresponding path program 1 times [2018-11-28 12:28:09,102 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:09,103 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:09,106 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:09,106 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:09,106 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:09,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:09,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:09,185 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:09,185 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:28:09,185 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:28:09,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:28:09,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:28:09,186 INFO L87 Difference]: Start difference. First operand 7465 states and 24635 transitions. Second operand 5 states. [2018-11-28 12:28:09,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:09,573 INFO L93 Difference]: Finished difference Result 13997 states and 45804 transitions. [2018-11-28 12:28:09,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:28:09,573 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2018-11-28 12:28:09,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:09,617 INFO L225 Difference]: With dead ends: 13997 [2018-11-28 12:28:09,618 INFO L226 Difference]: Without dead ends: 13929 [2018-11-28 12:28:09,618 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:28:09,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13929 states. [2018-11-28 12:28:09,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13929 to 9440. [2018-11-28 12:28:09,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9440 states. [2018-11-28 12:28:09,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9440 states to 9440 states and 30541 transitions. [2018-11-28 12:28:09,934 INFO L78 Accepts]: Start accepts. Automaton has 9440 states and 30541 transitions. Word has length 45 [2018-11-28 12:28:09,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:09,935 INFO L480 AbstractCegarLoop]: Abstraction has 9440 states and 30541 transitions. [2018-11-28 12:28:09,935 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:28:09,936 INFO L276 IsEmpty]: Start isEmpty. Operand 9440 states and 30541 transitions. [2018-11-28 12:28:09,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 12:28:09,937 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:09,937 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:09,937 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:09,938 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:09,938 INFO L82 PathProgramCache]: Analyzing trace with hash -1598559727, now seen corresponding path program 1 times [2018-11-28 12:28:09,938 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:09,938 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:09,941 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:09,941 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:09,941 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:09,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:09,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:09,986 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:09,986 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:28:09,986 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:28:09,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:28:09,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:28:09,987 INFO L87 Difference]: Start difference. First operand 9440 states and 30541 transitions. Second operand 3 states. [2018-11-28 12:28:10,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:10,074 INFO L93 Difference]: Finished difference Result 13278 states and 42640 transitions. [2018-11-28 12:28:10,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:28:10,075 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2018-11-28 12:28:10,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:10,098 INFO L225 Difference]: With dead ends: 13278 [2018-11-28 12:28:10,098 INFO L226 Difference]: Without dead ends: 13278 [2018-11-28 12:28:10,099 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:28:10,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13278 states. [2018-11-28 12:28:10,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13278 to 9844. [2018-11-28 12:28:10,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9844 states. [2018-11-28 12:28:10,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9844 states to 9844 states and 31507 transitions. [2018-11-28 12:28:10,244 INFO L78 Accepts]: Start accepts. Automaton has 9844 states and 31507 transitions. Word has length 47 [2018-11-28 12:28:10,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:10,244 INFO L480 AbstractCegarLoop]: Abstraction has 9844 states and 31507 transitions. [2018-11-28 12:28:10,244 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:28:10,245 INFO L276 IsEmpty]: Start isEmpty. Operand 9844 states and 31507 transitions. [2018-11-28 12:28:10,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-28 12:28:10,246 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:10,246 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:10,247 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:10,247 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:10,247 INFO L82 PathProgramCache]: Analyzing trace with hash -108379620, now seen corresponding path program 1 times [2018-11-28 12:28:10,247 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:10,247 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:10,249 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:10,249 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:10,249 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:10,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:10,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:10,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:10,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:28:10,356 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:28:10,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:28:10,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:28:10,357 INFO L87 Difference]: Start difference. First operand 9844 states and 31507 transitions. Second operand 7 states. [2018-11-28 12:28:10,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:10,846 INFO L93 Difference]: Finished difference Result 12284 states and 38672 transitions. [2018-11-28 12:28:10,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 12:28:10,847 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 51 [2018-11-28 12:28:10,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:10,870 INFO L225 Difference]: With dead ends: 12284 [2018-11-28 12:28:10,870 INFO L226 Difference]: Without dead ends: 12212 [2018-11-28 12:28:10,871 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2018-11-28 12:28:10,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12212 states. [2018-11-28 12:28:11,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12212 to 10848. [2018-11-28 12:28:11,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10848 states. [2018-11-28 12:28:11,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10848 states to 10848 states and 34562 transitions. [2018-11-28 12:28:11,040 INFO L78 Accepts]: Start accepts. Automaton has 10848 states and 34562 transitions. Word has length 51 [2018-11-28 12:28:11,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:11,040 INFO L480 AbstractCegarLoop]: Abstraction has 10848 states and 34562 transitions. [2018-11-28 12:28:11,040 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:28:11,040 INFO L276 IsEmpty]: Start isEmpty. Operand 10848 states and 34562 transitions. [2018-11-28 12:28:11,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-28 12:28:11,046 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:11,046 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:11,046 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:11,047 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:11,047 INFO L82 PathProgramCache]: Analyzing trace with hash -1204429704, now seen corresponding path program 1 times [2018-11-28 12:28:11,047 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:11,047 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:11,049 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:11,049 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:11,049 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:11,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:11,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:11,117 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:11,118 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:28:11,118 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:28:11,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:28:11,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:28:11,119 INFO L87 Difference]: Start difference. First operand 10848 states and 34562 transitions. Second operand 4 states. [2018-11-28 12:28:11,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:11,210 INFO L93 Difference]: Finished difference Result 12395 states and 39571 transitions. [2018-11-28 12:28:11,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:28:11,211 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2018-11-28 12:28:11,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:11,229 INFO L225 Difference]: With dead ends: 12395 [2018-11-28 12:28:11,230 INFO L226 Difference]: Without dead ends: 12395 [2018-11-28 12:28:11,230 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:28:11,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12395 states. [2018-11-28 12:28:11,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12395 to 11368. [2018-11-28 12:28:11,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11368 states. [2018-11-28 12:28:11,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11368 states to 11368 states and 36235 transitions. [2018-11-28 12:28:11,407 INFO L78 Accepts]: Start accepts. Automaton has 11368 states and 36235 transitions. Word has length 59 [2018-11-28 12:28:11,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:11,407 INFO L480 AbstractCegarLoop]: Abstraction has 11368 states and 36235 transitions. [2018-11-28 12:28:11,407 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:28:11,407 INFO L276 IsEmpty]: Start isEmpty. Operand 11368 states and 36235 transitions. [2018-11-28 12:28:11,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-28 12:28:11,412 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:11,412 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:11,412 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:11,412 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:11,412 INFO L82 PathProgramCache]: Analyzing trace with hash 538380631, now seen corresponding path program 1 times [2018-11-28 12:28:11,412 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:11,412 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:11,414 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:11,415 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:11,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:11,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:11,490 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:11,490 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:11,490 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:28:11,490 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:28:11,491 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:28:11,491 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:28:11,491 INFO L87 Difference]: Start difference. First operand 11368 states and 36235 transitions. Second operand 6 states. [2018-11-28 12:28:11,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:11,881 INFO L93 Difference]: Finished difference Result 20968 states and 66485 transitions. [2018-11-28 12:28:11,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 12:28:11,882 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2018-11-28 12:28:11,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:12,020 INFO L225 Difference]: With dead ends: 20968 [2018-11-28 12:28:12,020 INFO L226 Difference]: Without dead ends: 20897 [2018-11-28 12:28:12,021 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-11-28 12:28:12,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20897 states. [2018-11-28 12:28:12,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20897 to 13754. [2018-11-28 12:28:12,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13754 states. [2018-11-28 12:28:12,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13754 states to 13754 states and 43279 transitions. [2018-11-28 12:28:12,219 INFO L78 Accepts]: Start accepts. Automaton has 13754 states and 43279 transitions. Word has length 59 [2018-11-28 12:28:12,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:12,219 INFO L480 AbstractCegarLoop]: Abstraction has 13754 states and 43279 transitions. [2018-11-28 12:28:12,219 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:28:12,219 INFO L276 IsEmpty]: Start isEmpty. Operand 13754 states and 43279 transitions. [2018-11-28 12:28:12,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-11-28 12:28:12,224 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:12,224 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:12,225 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:12,225 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:12,225 INFO L82 PathProgramCache]: Analyzing trace with hash -1067585964, now seen corresponding path program 1 times [2018-11-28 12:28:12,225 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:12,225 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:12,227 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:12,227 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:12,227 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:12,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:12,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:12,278 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:12,279 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:28:12,279 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:28:12,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:28:12,279 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:28:12,279 INFO L87 Difference]: Start difference. First operand 13754 states and 43279 transitions. Second operand 4 states. [2018-11-28 12:28:12,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:12,597 INFO L93 Difference]: Finished difference Result 20200 states and 61902 transitions. [2018-11-28 12:28:12,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:28:12,597 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 63 [2018-11-28 12:28:12,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:12,623 INFO L225 Difference]: With dead ends: 20200 [2018-11-28 12:28:12,623 INFO L226 Difference]: Without dead ends: 20200 [2018-11-28 12:28:12,624 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:28:12,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20200 states. [2018-11-28 12:28:12,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20200 to 15792. [2018-11-28 12:28:12,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15792 states. [2018-11-28 12:28:12,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15792 states to 15792 states and 49060 transitions. [2018-11-28 12:28:12,837 INFO L78 Accepts]: Start accepts. Automaton has 15792 states and 49060 transitions. Word has length 63 [2018-11-28 12:28:12,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:12,837 INFO L480 AbstractCegarLoop]: Abstraction has 15792 states and 49060 transitions. [2018-11-28 12:28:12,837 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:28:12,837 INFO L276 IsEmpty]: Start isEmpty. Operand 15792 states and 49060 transitions. [2018-11-28 12:28:12,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-11-28 12:28:12,842 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:12,843 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:12,843 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:12,843 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:12,843 INFO L82 PathProgramCache]: Analyzing trace with hash 1407465811, now seen corresponding path program 1 times [2018-11-28 12:28:12,843 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:12,843 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:12,844 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:12,845 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:12,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:12,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:12,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:12,929 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:12,929 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:28:12,929 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:28:12,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:28:12,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:28:12,930 INFO L87 Difference]: Start difference. First operand 15792 states and 49060 transitions. Second operand 4 states. [2018-11-28 12:28:13,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:13,235 INFO L93 Difference]: Finished difference Result 19959 states and 61084 transitions. [2018-11-28 12:28:13,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:28:13,235 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 63 [2018-11-28 12:28:13,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:13,263 INFO L225 Difference]: With dead ends: 19959 [2018-11-28 12:28:13,263 INFO L226 Difference]: Without dead ends: 19959 [2018-11-28 12:28:13,263 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:28:13,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19959 states. [2018-11-28 12:28:13,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19959 to 16086. [2018-11-28 12:28:13,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16086 states. [2018-11-28 12:28:13,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16086 states to 16086 states and 49917 transitions. [2018-11-28 12:28:13,481 INFO L78 Accepts]: Start accepts. Automaton has 16086 states and 49917 transitions. Word has length 63 [2018-11-28 12:28:13,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:13,481 INFO L480 AbstractCegarLoop]: Abstraction has 16086 states and 49917 transitions. [2018-11-28 12:28:13,481 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:28:13,482 INFO L276 IsEmpty]: Start isEmpty. Operand 16086 states and 49917 transitions. [2018-11-28 12:28:13,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-11-28 12:28:13,489 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:13,489 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:13,489 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:13,489 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:13,490 INFO L82 PathProgramCache]: Analyzing trace with hash 1152729266, now seen corresponding path program 1 times [2018-11-28 12:28:13,490 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:13,490 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:13,491 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:13,491 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:13,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:13,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:13,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:13,544 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:13,544 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:28:13,545 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:28:13,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:28:13,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:28:13,545 INFO L87 Difference]: Start difference. First operand 16086 states and 49917 transitions. Second operand 3 states. [2018-11-28 12:28:13,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:13,816 INFO L93 Difference]: Finished difference Result 16558 states and 51205 transitions. [2018-11-28 12:28:13,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:28:13,816 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 63 [2018-11-28 12:28:13,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:13,838 INFO L225 Difference]: With dead ends: 16558 [2018-11-28 12:28:13,838 INFO L226 Difference]: Without dead ends: 16558 [2018-11-28 12:28:13,838 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:28:13,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16558 states. [2018-11-28 12:28:14,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16558 to 16322. [2018-11-28 12:28:14,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16322 states. [2018-11-28 12:28:14,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16322 states to 16322 states and 50541 transitions. [2018-11-28 12:28:14,033 INFO L78 Accepts]: Start accepts. Automaton has 16322 states and 50541 transitions. Word has length 63 [2018-11-28 12:28:14,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:14,033 INFO L480 AbstractCegarLoop]: Abstraction has 16322 states and 50541 transitions. [2018-11-28 12:28:14,033 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:28:14,033 INFO L276 IsEmpty]: Start isEmpty. Operand 16322 states and 50541 transitions. [2018-11-28 12:28:14,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-28 12:28:14,040 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:14,040 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:14,040 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:14,040 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:14,041 INFO L82 PathProgramCache]: Analyzing trace with hash -1952113636, now seen corresponding path program 1 times [2018-11-28 12:28:14,041 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:14,041 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:14,042 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:14,042 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:14,043 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:14,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:14,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:14,166 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:14,166 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:28:14,166 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:28:14,167 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:28:14,168 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:28:14,168 INFO L87 Difference]: Start difference. First operand 16322 states and 50541 transitions. Second operand 6 states. [2018-11-28 12:28:14,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:14,529 INFO L93 Difference]: Finished difference Result 17646 states and 53545 transitions. [2018-11-28 12:28:14,529 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 12:28:14,529 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2018-11-28 12:28:14,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:14,552 INFO L225 Difference]: With dead ends: 17646 [2018-11-28 12:28:14,552 INFO L226 Difference]: Without dead ends: 17646 [2018-11-28 12:28:14,553 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:28:14,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17646 states. [2018-11-28 12:28:14,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17646 to 16546. [2018-11-28 12:28:14,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16546 states. [2018-11-28 12:28:14,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16546 states to 16546 states and 50764 transitions. [2018-11-28 12:28:14,759 INFO L78 Accepts]: Start accepts. Automaton has 16546 states and 50764 transitions. Word has length 65 [2018-11-28 12:28:14,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:14,759 INFO L480 AbstractCegarLoop]: Abstraction has 16546 states and 50764 transitions. [2018-11-28 12:28:14,759 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:28:14,759 INFO L276 IsEmpty]: Start isEmpty. Operand 16546 states and 50764 transitions. [2018-11-28 12:28:14,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-28 12:28:14,765 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:14,765 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:14,766 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:14,766 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:14,766 INFO L82 PathProgramCache]: Analyzing trace with hash -707349155, now seen corresponding path program 1 times [2018-11-28 12:28:14,766 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:14,766 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:14,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:14,767 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:14,768 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:14,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:14,854 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:14,854 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:14,854 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:28:14,854 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:28:14,854 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:28:14,854 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:28:14,855 INFO L87 Difference]: Start difference. First operand 16546 states and 50764 transitions. Second operand 5 states. [2018-11-28 12:28:15,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:15,120 INFO L93 Difference]: Finished difference Result 21334 states and 64873 transitions. [2018-11-28 12:28:15,120 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:28:15,120 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2018-11-28 12:28:15,120 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:15,148 INFO L225 Difference]: With dead ends: 21334 [2018-11-28 12:28:15,148 INFO L226 Difference]: Without dead ends: 21334 [2018-11-28 12:28:15,148 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:28:15,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21334 states. [2018-11-28 12:28:15,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21334 to 19570. [2018-11-28 12:28:15,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19570 states. [2018-11-28 12:28:15,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19570 states to 19570 states and 59494 transitions. [2018-11-28 12:28:15,390 INFO L78 Accepts]: Start accepts. Automaton has 19570 states and 59494 transitions. Word has length 65 [2018-11-28 12:28:15,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:15,390 INFO L480 AbstractCegarLoop]: Abstraction has 19570 states and 59494 transitions. [2018-11-28 12:28:15,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:28:15,390 INFO L276 IsEmpty]: Start isEmpty. Operand 19570 states and 59494 transitions. [2018-11-28 12:28:15,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-28 12:28:15,398 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:15,398 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:15,398 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:15,398 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:15,398 INFO L82 PathProgramCache]: Analyzing trace with hash -1217883332, now seen corresponding path program 1 times [2018-11-28 12:28:15,398 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:15,398 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:15,400 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:15,400 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:15,400 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:15,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:15,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:15,487 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:15,487 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:28:15,487 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:28:15,487 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:28:15,488 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:28:15,488 INFO L87 Difference]: Start difference. First operand 19570 states and 59494 transitions. Second operand 5 states. [2018-11-28 12:28:15,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:15,891 INFO L93 Difference]: Finished difference Result 30156 states and 90237 transitions. [2018-11-28 12:28:15,891 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 12:28:15,891 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2018-11-28 12:28:15,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:15,932 INFO L225 Difference]: With dead ends: 30156 [2018-11-28 12:28:15,932 INFO L226 Difference]: Without dead ends: 30156 [2018-11-28 12:28:15,932 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:28:15,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30156 states. [2018-11-28 12:28:16,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30156 to 26760. [2018-11-28 12:28:16,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26760 states. [2018-11-28 12:28:16,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26760 states to 26760 states and 80370 transitions. [2018-11-28 12:28:16,544 INFO L78 Accepts]: Start accepts. Automaton has 26760 states and 80370 transitions. Word has length 65 [2018-11-28 12:28:16,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:16,544 INFO L480 AbstractCegarLoop]: Abstraction has 26760 states and 80370 transitions. [2018-11-28 12:28:16,544 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:28:16,545 INFO L276 IsEmpty]: Start isEmpty. Operand 26760 states and 80370 transitions. [2018-11-28 12:28:16,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-28 12:28:16,554 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:16,554 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:16,554 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:16,554 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:16,554 INFO L82 PathProgramCache]: Analyzing trace with hash 1269629501, now seen corresponding path program 1 times [2018-11-28 12:28:16,554 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:16,555 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:16,556 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:16,556 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:16,556 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:16,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:16,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:16,621 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:16,622 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:28:16,622 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:28:16,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:28:16,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:28:16,622 INFO L87 Difference]: Start difference. First operand 26760 states and 80370 transitions. Second operand 5 states. [2018-11-28 12:28:16,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:16,688 INFO L93 Difference]: Finished difference Result 8084 states and 19691 transitions. [2018-11-28 12:28:16,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 12:28:16,689 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2018-11-28 12:28:16,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:16,695 INFO L225 Difference]: With dead ends: 8084 [2018-11-28 12:28:16,695 INFO L226 Difference]: Without dead ends: 6316 [2018-11-28 12:28:16,695 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:28:16,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6316 states. [2018-11-28 12:28:16,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6316 to 4889. [2018-11-28 12:28:16,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4889 states. [2018-11-28 12:28:16,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4889 states to 4889 states and 11646 transitions. [2018-11-28 12:28:16,745 INFO L78 Accepts]: Start accepts. Automaton has 4889 states and 11646 transitions. Word has length 65 [2018-11-28 12:28:16,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:16,745 INFO L480 AbstractCegarLoop]: Abstraction has 4889 states and 11646 transitions. [2018-11-28 12:28:16,745 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:28:16,745 INFO L276 IsEmpty]: Start isEmpty. Operand 4889 states and 11646 transitions. [2018-11-28 12:28:16,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-28 12:28:16,748 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:16,748 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:16,748 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:16,749 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:16,749 INFO L82 PathProgramCache]: Analyzing trace with hash -2026999384, now seen corresponding path program 1 times [2018-11-28 12:28:16,749 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:16,749 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:16,750 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:16,750 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:16,750 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:16,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:16,788 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:16,788 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:16,788 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:28:16,788 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:28:16,788 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:28:16,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:28:16,789 INFO L87 Difference]: Start difference. First operand 4889 states and 11646 transitions. Second operand 3 states. [2018-11-28 12:28:16,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:16,819 INFO L93 Difference]: Finished difference Result 6692 states and 15894 transitions. [2018-11-28 12:28:16,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:28:16,819 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2018-11-28 12:28:16,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:16,824 INFO L225 Difference]: With dead ends: 6692 [2018-11-28 12:28:16,825 INFO L226 Difference]: Without dead ends: 6692 [2018-11-28 12:28:16,825 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:28:16,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6692 states. [2018-11-28 12:28:16,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6692 to 4832. [2018-11-28 12:28:16,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4832 states. [2018-11-28 12:28:16,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4832 states to 4832 states and 11279 transitions. [2018-11-28 12:28:16,875 INFO L78 Accepts]: Start accepts. Automaton has 4832 states and 11279 transitions. Word has length 65 [2018-11-28 12:28:16,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:16,875 INFO L480 AbstractCegarLoop]: Abstraction has 4832 states and 11279 transitions. [2018-11-28 12:28:16,875 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:28:16,875 INFO L276 IsEmpty]: Start isEmpty. Operand 4832 states and 11279 transitions. [2018-11-28 12:28:16,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-28 12:28:16,879 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:16,879 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:16,879 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:16,879 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:16,879 INFO L82 PathProgramCache]: Analyzing trace with hash -1343049765, now seen corresponding path program 1 times [2018-11-28 12:28:16,879 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:16,880 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:16,881 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:16,881 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:16,881 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:16,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:16,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:16,948 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:16,948 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:28:16,949 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:28:16,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:28:16,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:28:16,949 INFO L87 Difference]: Start difference. First operand 4832 states and 11279 transitions. Second operand 5 states. [2018-11-28 12:28:17,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:17,079 INFO L93 Difference]: Finished difference Result 5855 states and 13632 transitions. [2018-11-28 12:28:17,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 12:28:17,080 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 71 [2018-11-28 12:28:17,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:17,085 INFO L225 Difference]: With dead ends: 5855 [2018-11-28 12:28:17,085 INFO L226 Difference]: Without dead ends: 5855 [2018-11-28 12:28:17,086 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:28:17,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5855 states. [2018-11-28 12:28:17,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5855 to 5224. [2018-11-28 12:28:17,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5224 states. [2018-11-28 12:28:17,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5224 states to 5224 states and 12180 transitions. [2018-11-28 12:28:17,135 INFO L78 Accepts]: Start accepts. Automaton has 5224 states and 12180 transitions. Word has length 71 [2018-11-28 12:28:17,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:17,136 INFO L480 AbstractCegarLoop]: Abstraction has 5224 states and 12180 transitions. [2018-11-28 12:28:17,136 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:28:17,136 INFO L276 IsEmpty]: Start isEmpty. Operand 5224 states and 12180 transitions. [2018-11-28 12:28:17,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-28 12:28:17,141 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:17,141 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:17,141 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:17,141 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:17,141 INFO L82 PathProgramCache]: Analyzing trace with hash 399760570, now seen corresponding path program 1 times [2018-11-28 12:28:17,141 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:17,142 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:17,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:17,143 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:17,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:17,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:17,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:17,271 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:17,272 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-28 12:28:17,272 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 12:28:17,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 12:28:17,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:28:17,272 INFO L87 Difference]: Start difference. First operand 5224 states and 12180 transitions. Second operand 9 states. [2018-11-28 12:28:17,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:17,690 INFO L93 Difference]: Finished difference Result 7087 states and 16418 transitions. [2018-11-28 12:28:17,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-28 12:28:17,690 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 71 [2018-11-28 12:28:17,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:17,696 INFO L225 Difference]: With dead ends: 7087 [2018-11-28 12:28:17,696 INFO L226 Difference]: Without dead ends: 7032 [2018-11-28 12:28:17,696 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=74, Invalid=232, Unknown=0, NotChecked=0, Total=306 [2018-11-28 12:28:17,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7032 states. [2018-11-28 12:28:17,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7032 to 5292. [2018-11-28 12:28:17,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5292 states. [2018-11-28 12:28:17,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5292 states to 5292 states and 12246 transitions. [2018-11-28 12:28:17,748 INFO L78 Accepts]: Start accepts. Automaton has 5292 states and 12246 transitions. Word has length 71 [2018-11-28 12:28:17,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:17,748 INFO L480 AbstractCegarLoop]: Abstraction has 5292 states and 12246 transitions. [2018-11-28 12:28:17,748 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 12:28:17,749 INFO L276 IsEmpty]: Start isEmpty. Operand 5292 states and 12246 transitions. [2018-11-28 12:28:17,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-11-28 12:28:17,754 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:17,755 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:17,755 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:17,755 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:17,755 INFO L82 PathProgramCache]: Analyzing trace with hash -2052149765, now seen corresponding path program 1 times [2018-11-28 12:28:17,755 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:17,755 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:17,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:17,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:17,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:17,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:17,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:17,790 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:17,790 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:28:17,790 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:28:17,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:28:17,791 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:28:17,791 INFO L87 Difference]: Start difference. First operand 5292 states and 12246 transitions. Second operand 3 states. [2018-11-28 12:28:17,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:17,905 INFO L93 Difference]: Finished difference Result 7021 states and 15768 transitions. [2018-11-28 12:28:17,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:28:17,906 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 90 [2018-11-28 12:28:17,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:17,912 INFO L225 Difference]: With dead ends: 7021 [2018-11-28 12:28:17,912 INFO L226 Difference]: Without dead ends: 6693 [2018-11-28 12:28:17,912 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:28:17,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6693 states. [2018-11-28 12:28:17,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6693 to 6163. [2018-11-28 12:28:17,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6163 states. [2018-11-28 12:28:17,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6163 states to 6163 states and 14048 transitions. [2018-11-28 12:28:17,970 INFO L78 Accepts]: Start accepts. Automaton has 6163 states and 14048 transitions. Word has length 90 [2018-11-28 12:28:17,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:17,970 INFO L480 AbstractCegarLoop]: Abstraction has 6163 states and 14048 transitions. [2018-11-28 12:28:17,971 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:28:17,971 INFO L276 IsEmpty]: Start isEmpty. Operand 6163 states and 14048 transitions. [2018-11-28 12:28:17,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-11-28 12:28:17,976 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:17,976 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:17,976 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:17,977 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:17,977 INFO L82 PathProgramCache]: Analyzing trace with hash -1492033514, now seen corresponding path program 1 times [2018-11-28 12:28:17,977 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:17,977 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:17,978 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:17,978 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:17,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:17,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:18,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:18,059 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:18,059 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:28:18,059 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:28:18,060 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:28:18,060 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:28:18,060 INFO L87 Difference]: Start difference. First operand 6163 states and 14048 transitions. Second operand 4 states. [2018-11-28 12:28:18,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:18,128 INFO L93 Difference]: Finished difference Result 6551 states and 14955 transitions. [2018-11-28 12:28:18,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:28:18,128 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 90 [2018-11-28 12:28:18,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:18,133 INFO L225 Difference]: With dead ends: 6551 [2018-11-28 12:28:18,134 INFO L226 Difference]: Without dead ends: 6551 [2018-11-28 12:28:18,134 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:28:18,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6551 states. [2018-11-28 12:28:18,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6551 to 6087. [2018-11-28 12:28:18,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6087 states. [2018-11-28 12:28:18,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6087 states to 6087 states and 13961 transitions. [2018-11-28 12:28:18,188 INFO L78 Accepts]: Start accepts. Automaton has 6087 states and 13961 transitions. Word has length 90 [2018-11-28 12:28:18,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:18,189 INFO L480 AbstractCegarLoop]: Abstraction has 6087 states and 13961 transitions. [2018-11-28 12:28:18,189 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:28:18,189 INFO L276 IsEmpty]: Start isEmpty. Operand 6087 states and 13961 transitions. [2018-11-28 12:28:18,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-28 12:28:18,194 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:18,194 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:18,194 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:18,194 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:18,194 INFO L82 PathProgramCache]: Analyzing trace with hash -1808901631, now seen corresponding path program 1 times [2018-11-28 12:28:18,195 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:18,195 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:18,196 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:18,196 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:18,196 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:18,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:18,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:18,258 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:18,258 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:28:18,259 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:28:18,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:28:18,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:28:18,259 INFO L87 Difference]: Start difference. First operand 6087 states and 13961 transitions. Second operand 5 states. [2018-11-28 12:28:18,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:18,328 INFO L93 Difference]: Finished difference Result 7052 states and 16062 transitions. [2018-11-28 12:28:18,328 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:28:18,328 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 92 [2018-11-28 12:28:18,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:18,336 INFO L225 Difference]: With dead ends: 7052 [2018-11-28 12:28:18,336 INFO L226 Difference]: Without dead ends: 7052 [2018-11-28 12:28:18,336 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:28:18,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7052 states. [2018-11-28 12:28:18,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7052 to 5452. [2018-11-28 12:28:18,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5452 states. [2018-11-28 12:28:18,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5452 states to 5452 states and 12506 transitions. [2018-11-28 12:28:18,390 INFO L78 Accepts]: Start accepts. Automaton has 5452 states and 12506 transitions. Word has length 92 [2018-11-28 12:28:18,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:18,390 INFO L480 AbstractCegarLoop]: Abstraction has 5452 states and 12506 transitions. [2018-11-28 12:28:18,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:28:18,390 INFO L276 IsEmpty]: Start isEmpty. Operand 5452 states and 12506 transitions. [2018-11-28 12:28:18,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-28 12:28:18,395 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:18,395 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:18,395 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:18,395 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:18,395 INFO L82 PathProgramCache]: Analyzing trace with hash -2063638176, now seen corresponding path program 1 times [2018-11-28 12:28:18,395 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:18,395 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:18,396 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:18,397 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:18,397 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:18,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:18,456 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:18,456 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:18,456 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:28:18,456 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:28:18,457 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:28:18,457 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:28:18,457 INFO L87 Difference]: Start difference. First operand 5452 states and 12506 transitions. Second operand 5 states. [2018-11-28 12:28:18,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:18,750 INFO L93 Difference]: Finished difference Result 9104 states and 21056 transitions. [2018-11-28 12:28:18,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 12:28:18,750 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 92 [2018-11-28 12:28:18,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:18,757 INFO L225 Difference]: With dead ends: 9104 [2018-11-28 12:28:18,757 INFO L226 Difference]: Without dead ends: 9088 [2018-11-28 12:28:18,757 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:28:18,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9088 states. [2018-11-28 12:28:18,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9088 to 6276. [2018-11-28 12:28:18,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6276 states. [2018-11-28 12:28:18,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6276 states to 6276 states and 14440 transitions. [2018-11-28 12:28:18,827 INFO L78 Accepts]: Start accepts. Automaton has 6276 states and 14440 transitions. Word has length 92 [2018-11-28 12:28:18,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:18,827 INFO L480 AbstractCegarLoop]: Abstraction has 6276 states and 14440 transitions. [2018-11-28 12:28:18,827 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:28:18,827 INFO L276 IsEmpty]: Start isEmpty. Operand 6276 states and 14440 transitions. [2018-11-28 12:28:18,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-28 12:28:18,833 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:18,833 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:18,834 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:18,834 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:18,834 INFO L82 PathProgramCache]: Analyzing trace with hash -818873695, now seen corresponding path program 1 times [2018-11-28 12:28:18,834 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:18,834 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:18,835 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:18,836 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:18,836 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:18,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:18,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:18,938 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:18,938 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:28:18,938 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:28:18,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:28:18,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:28:18,939 INFO L87 Difference]: Start difference. First operand 6276 states and 14440 transitions. Second operand 6 states. [2018-11-28 12:28:19,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:19,169 INFO L93 Difference]: Finished difference Result 8414 states and 19086 transitions. [2018-11-28 12:28:19,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 12:28:19,169 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2018-11-28 12:28:19,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:19,176 INFO L225 Difference]: With dead ends: 8414 [2018-11-28 12:28:19,176 INFO L226 Difference]: Without dead ends: 8414 [2018-11-28 12:28:19,177 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-11-28 12:28:19,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8414 states. [2018-11-28 12:28:19,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8414 to 6415. [2018-11-28 12:28:19,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6415 states. [2018-11-28 12:28:19,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6415 states to 6415 states and 14631 transitions. [2018-11-28 12:28:19,245 INFO L78 Accepts]: Start accepts. Automaton has 6415 states and 14631 transitions. Word has length 92 [2018-11-28 12:28:19,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:19,245 INFO L480 AbstractCegarLoop]: Abstraction has 6415 states and 14631 transitions. [2018-11-28 12:28:19,245 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:28:19,245 INFO L276 IsEmpty]: Start isEmpty. Operand 6415 states and 14631 transitions. [2018-11-28 12:28:19,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-28 12:28:19,251 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:19,251 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:19,251 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:19,251 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:19,251 INFO L82 PathProgramCache]: Analyzing trace with hash -1620714257, now seen corresponding path program 1 times [2018-11-28 12:28:19,251 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:19,252 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:19,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:19,253 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:19,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:19,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:19,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:19,369 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:19,369 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 12:28:19,369 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 12:28:19,371 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 12:28:19,371 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:28:19,371 INFO L87 Difference]: Start difference. First operand 6415 states and 14631 transitions. Second operand 8 states. [2018-11-28 12:28:19,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:19,613 INFO L93 Difference]: Finished difference Result 10090 states and 22670 transitions. [2018-11-28 12:28:19,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 12:28:19,613 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 92 [2018-11-28 12:28:19,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:19,621 INFO L225 Difference]: With dead ends: 10090 [2018-11-28 12:28:19,621 INFO L226 Difference]: Without dead ends: 10090 [2018-11-28 12:28:19,621 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-11-28 12:28:19,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10090 states. [2018-11-28 12:28:19,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10090 to 7293. [2018-11-28 12:28:19,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7293 states. [2018-11-28 12:28:19,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7293 states to 7293 states and 16594 transitions. [2018-11-28 12:28:19,718 INFO L78 Accepts]: Start accepts. Automaton has 7293 states and 16594 transitions. Word has length 92 [2018-11-28 12:28:19,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:19,719 INFO L480 AbstractCegarLoop]: Abstraction has 7293 states and 16594 transitions. [2018-11-28 12:28:19,719 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 12:28:19,719 INFO L276 IsEmpty]: Start isEmpty. Operand 7293 states and 16594 transitions. [2018-11-28 12:28:19,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-28 12:28:19,724 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:19,724 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:19,725 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:19,725 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:19,725 INFO L82 PathProgramCache]: Analyzing trace with hash -557563760, now seen corresponding path program 1 times [2018-11-28 12:28:19,725 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:19,725 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:19,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:19,726 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:19,727 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:19,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:19,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:19,855 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:19,855 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-28 12:28:19,856 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 12:28:19,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 12:28:19,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:28:19,856 INFO L87 Difference]: Start difference. First operand 7293 states and 16594 transitions. Second operand 9 states. [2018-11-28 12:28:20,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:20,269 INFO L93 Difference]: Finished difference Result 10558 states and 23992 transitions. [2018-11-28 12:28:20,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-28 12:28:20,269 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 92 [2018-11-28 12:28:20,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:20,277 INFO L225 Difference]: With dead ends: 10558 [2018-11-28 12:28:20,277 INFO L226 Difference]: Without dead ends: 10526 [2018-11-28 12:28:20,278 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=245, Unknown=0, NotChecked=0, Total=306 [2018-11-28 12:28:20,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10526 states. [2018-11-28 12:28:20,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10526 to 9413. [2018-11-28 12:28:20,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9413 states. [2018-11-28 12:28:20,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9413 states to 9413 states and 21423 transitions. [2018-11-28 12:28:20,368 INFO L78 Accepts]: Start accepts. Automaton has 9413 states and 21423 transitions. Word has length 92 [2018-11-28 12:28:20,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:20,368 INFO L480 AbstractCegarLoop]: Abstraction has 9413 states and 21423 transitions. [2018-11-28 12:28:20,368 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 12:28:20,368 INFO L276 IsEmpty]: Start isEmpty. Operand 9413 states and 21423 transitions. [2018-11-28 12:28:20,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-28 12:28:20,377 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:20,377 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:20,378 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:20,378 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:20,378 INFO L82 PathProgramCache]: Analyzing trace with hash 1940452177, now seen corresponding path program 1 times [2018-11-28 12:28:20,378 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:20,378 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:20,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:20,380 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:20,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:20,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:20,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:20,501 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:20,501 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 12:28:20,501 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 12:28:20,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 12:28:20,502 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:28:20,502 INFO L87 Difference]: Start difference. First operand 9413 states and 21423 transitions. Second operand 8 states. [2018-11-28 12:28:20,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:20,828 INFO L93 Difference]: Finished difference Result 14313 states and 33272 transitions. [2018-11-28 12:28:20,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-28 12:28:20,829 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 92 [2018-11-28 12:28:20,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:20,842 INFO L225 Difference]: With dead ends: 14313 [2018-11-28 12:28:20,842 INFO L226 Difference]: Without dead ends: 14313 [2018-11-28 12:28:20,843 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-11-28 12:28:20,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14313 states. [2018-11-28 12:28:20,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14313 to 9971. [2018-11-28 12:28:20,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9971 states. [2018-11-28 12:28:20,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9971 states to 9971 states and 22916 transitions. [2018-11-28 12:28:20,960 INFO L78 Accepts]: Start accepts. Automaton has 9971 states and 22916 transitions. Word has length 92 [2018-11-28 12:28:20,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:20,960 INFO L480 AbstractCegarLoop]: Abstraction has 9971 states and 22916 transitions. [2018-11-28 12:28:20,960 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 12:28:20,960 INFO L276 IsEmpty]: Start isEmpty. Operand 9971 states and 22916 transitions. [2018-11-28 12:28:20,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-28 12:28:20,969 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:20,969 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:20,969 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:20,970 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:20,970 INFO L82 PathProgramCache]: Analyzing trace with hash -1467011438, now seen corresponding path program 1 times [2018-11-28 12:28:20,970 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:20,970 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:20,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:20,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:20,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:20,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:21,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:21,008 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:21,008 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:28:21,008 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:28:21,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:28:21,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:28:21,009 INFO L87 Difference]: Start difference. First operand 9971 states and 22916 transitions. Second operand 3 states. [2018-11-28 12:28:21,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:21,042 INFO L93 Difference]: Finished difference Result 9715 states and 22100 transitions. [2018-11-28 12:28:21,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:28:21,043 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 92 [2018-11-28 12:28:21,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:21,051 INFO L225 Difference]: With dead ends: 9715 [2018-11-28 12:28:21,051 INFO L226 Difference]: Without dead ends: 9683 [2018-11-28 12:28:21,052 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:28:21,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9683 states. [2018-11-28 12:28:21,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9683 to 7662. [2018-11-28 12:28:21,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7662 states. [2018-11-28 12:28:21,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7662 states to 7662 states and 17304 transitions. [2018-11-28 12:28:21,130 INFO L78 Accepts]: Start accepts. Automaton has 7662 states and 17304 transitions. Word has length 92 [2018-11-28 12:28:21,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:21,131 INFO L480 AbstractCegarLoop]: Abstraction has 7662 states and 17304 transitions. [2018-11-28 12:28:21,131 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:28:21,131 INFO L276 IsEmpty]: Start isEmpty. Operand 7662 states and 17304 transitions. [2018-11-28 12:28:21,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-11-28 12:28:21,137 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:21,137 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:21,138 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:21,138 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:21,138 INFO L82 PathProgramCache]: Analyzing trace with hash -1410010744, now seen corresponding path program 1 times [2018-11-28 12:28:21,138 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:21,138 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:21,139 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:21,139 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:21,139 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:21,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:21,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:21,188 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:21,188 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:28:21,188 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:28:21,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:28:21,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:28:21,189 INFO L87 Difference]: Start difference. First operand 7662 states and 17304 transitions. Second operand 4 states. [2018-11-28 12:28:21,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:21,354 INFO L93 Difference]: Finished difference Result 8647 states and 19331 transitions. [2018-11-28 12:28:21,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:28:21,355 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 94 [2018-11-28 12:28:21,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:21,362 INFO L225 Difference]: With dead ends: 8647 [2018-11-28 12:28:21,363 INFO L226 Difference]: Without dead ends: 8531 [2018-11-28 12:28:21,363 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:28:21,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8531 states. [2018-11-28 12:28:21,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8531 to 7965. [2018-11-28 12:28:21,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7965 states. [2018-11-28 12:28:21,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7965 states to 7965 states and 17865 transitions. [2018-11-28 12:28:21,438 INFO L78 Accepts]: Start accepts. Automaton has 7965 states and 17865 transitions. Word has length 94 [2018-11-28 12:28:21,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:21,438 INFO L480 AbstractCegarLoop]: Abstraction has 7965 states and 17865 transitions. [2018-11-28 12:28:21,438 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:28:21,439 INFO L276 IsEmpty]: Start isEmpty. Operand 7965 states and 17865 transitions. [2018-11-28 12:28:21,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-11-28 12:28:21,445 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:21,445 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:21,446 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:21,446 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:21,446 INFO L82 PathProgramCache]: Analyzing trace with hash 596396296, now seen corresponding path program 1 times [2018-11-28 12:28:21,446 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:21,446 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:21,447 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:21,447 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:21,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:21,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:21,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:21,561 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:21,561 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-28 12:28:21,562 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 12:28:21,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 12:28:21,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:28:21,562 INFO L87 Difference]: Start difference. First operand 7965 states and 17865 transitions. Second operand 9 states. [2018-11-28 12:28:22,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:22,011 INFO L93 Difference]: Finished difference Result 9894 states and 21848 transitions. [2018-11-28 12:28:22,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-28 12:28:22,012 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 94 [2018-11-28 12:28:22,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:22,020 INFO L225 Difference]: With dead ends: 9894 [2018-11-28 12:28:22,021 INFO L226 Difference]: Without dead ends: 9894 [2018-11-28 12:28:22,021 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 3 SyntacticMatches, 6 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=320, Unknown=0, NotChecked=0, Total=420 [2018-11-28 12:28:22,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9894 states. [2018-11-28 12:28:22,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9894 to 8424. [2018-11-28 12:28:22,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8424 states. [2018-11-28 12:28:22,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8424 states to 8424 states and 18820 transitions. [2018-11-28 12:28:22,104 INFO L78 Accepts]: Start accepts. Automaton has 8424 states and 18820 transitions. Word has length 94 [2018-11-28 12:28:22,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:22,104 INFO L480 AbstractCegarLoop]: Abstraction has 8424 states and 18820 transitions. [2018-11-28 12:28:22,104 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 12:28:22,104 INFO L276 IsEmpty]: Start isEmpty. Operand 8424 states and 18820 transitions. [2018-11-28 12:28:22,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-11-28 12:28:22,111 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:22,112 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:22,112 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:22,112 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:22,112 INFO L82 PathProgramCache]: Analyzing trace with hash 807747209, now seen corresponding path program 1 times [2018-11-28 12:28:22,112 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:22,112 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:22,113 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:22,114 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:22,114 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:22,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:22,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:22,223 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:22,223 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-28 12:28:22,224 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 12:28:22,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 12:28:22,224 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:28:22,224 INFO L87 Difference]: Start difference. First operand 8424 states and 18820 transitions. Second operand 9 states. [2018-11-28 12:28:22,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:22,570 INFO L93 Difference]: Finished difference Result 9959 states and 22111 transitions. [2018-11-28 12:28:22,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-28 12:28:22,571 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 94 [2018-11-28 12:28:22,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:22,578 INFO L225 Difference]: With dead ends: 9959 [2018-11-28 12:28:22,579 INFO L226 Difference]: Without dead ends: 9959 [2018-11-28 12:28:22,579 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=305, Unknown=0, NotChecked=0, Total=420 [2018-11-28 12:28:22,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9959 states. [2018-11-28 12:28:22,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9959 to 7035. [2018-11-28 12:28:22,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7035 states. [2018-11-28 12:28:22,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7035 states to 7035 states and 15687 transitions. [2018-11-28 12:28:22,658 INFO L78 Accepts]: Start accepts. Automaton has 7035 states and 15687 transitions. Word has length 94 [2018-11-28 12:28:22,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:22,658 INFO L480 AbstractCegarLoop]: Abstraction has 7035 states and 15687 transitions. [2018-11-28 12:28:22,658 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 12:28:22,658 INFO L276 IsEmpty]: Start isEmpty. Operand 7035 states and 15687 transitions. [2018-11-28 12:28:22,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-11-28 12:28:22,663 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:22,663 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:22,664 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:22,664 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:22,664 INFO L82 PathProgramCache]: Analyzing trace with hash 1695250890, now seen corresponding path program 1 times [2018-11-28 12:28:22,664 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:22,664 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:22,665 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:22,665 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:22,665 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:22,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:28:22,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:28:22,812 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:28:22,812 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-28 12:28:22,812 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 12:28:22,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 12:28:22,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-11-28 12:28:22,813 INFO L87 Difference]: Start difference. First operand 7035 states and 15687 transitions. Second operand 11 states. [2018-11-28 12:28:24,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:28:24,094 INFO L93 Difference]: Finished difference Result 14422 states and 32313 transitions. [2018-11-28 12:28:24,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-28 12:28:24,095 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 94 [2018-11-28 12:28:24,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:28:24,102 INFO L225 Difference]: With dead ends: 14422 [2018-11-28 12:28:24,102 INFO L226 Difference]: Without dead ends: 10004 [2018-11-28 12:28:24,103 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=86, Invalid=376, Unknown=0, NotChecked=0, Total=462 [2018-11-28 12:28:24,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10004 states. [2018-11-28 12:28:24,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10004 to 7081. [2018-11-28 12:28:24,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7081 states. [2018-11-28 12:28:24,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7081 states to 7081 states and 15706 transitions. [2018-11-28 12:28:24,194 INFO L78 Accepts]: Start accepts. Automaton has 7081 states and 15706 transitions. Word has length 94 [2018-11-28 12:28:24,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:28:24,194 INFO L480 AbstractCegarLoop]: Abstraction has 7081 states and 15706 transitions. [2018-11-28 12:28:24,194 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 12:28:24,194 INFO L276 IsEmpty]: Start isEmpty. Operand 7081 states and 15706 transitions. [2018-11-28 12:28:24,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-11-28 12:28:24,201 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:28:24,201 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:28:24,202 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:28:24,202 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:28:24,202 INFO L82 PathProgramCache]: Analyzing trace with hash -520452890, now seen corresponding path program 2 times [2018-11-28 12:28:24,202 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:28:24,202 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:28:24,203 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:24,204 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:28:24,204 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:28:24,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 12:28:24,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 12:28:24,275 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 12:28:24,379 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-28 12:28:24,381 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 12:28:24 BasicIcfg [2018-11-28 12:28:24,381 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 12:28:24,381 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 12:28:24,381 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 12:28:24,381 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 12:28:24,382 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:28:03" (3/4) ... [2018-11-28 12:28:24,384 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-28 12:28:24,509 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_67101469-ad11-4a68-b718-0bd32ee4e274/bin-2019/uautomizer/witness.graphml [2018-11-28 12:28:24,509 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 12:28:24,510 INFO L168 Benchmark]: Toolchain (without parser) took 21817.00 ms. Allocated memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: 1.6 GB). Free memory was 955.3 MB in the beginning and 796.9 MB in the end (delta: 158.4 MB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. [2018-11-28 12:28:24,511 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 982.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 12:28:24,512 INFO L168 Benchmark]: CACSL2BoogieTranslator took 460.96 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 171.4 MB). Free memory was 955.3 MB in the beginning and 1.1 GB in the end (delta: -194.0 MB). Peak memory consumption was 31.3 MB. Max. memory is 11.5 GB. [2018-11-28 12:28:24,512 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.21 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2018-11-28 12:28:24,512 INFO L168 Benchmark]: Boogie Preprocessor took 33.55 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 12:28:24,512 INFO L168 Benchmark]: RCFGBuilder took 602.92 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.6 MB). Peak memory consumption was 45.6 MB. Max. memory is 11.5 GB. [2018-11-28 12:28:24,513 INFO L168 Benchmark]: TraceAbstraction took 20543.06 ms. Allocated memory was 1.2 GB in the beginning and 2.7 GB in the end (delta: 1.5 GB). Free memory was 1.1 GB in the beginning and 830.0 MB in the end (delta: 267.1 MB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. [2018-11-28 12:28:24,513 INFO L168 Benchmark]: Witness Printer took 128.17 ms. Allocated memory is still 2.7 GB. Free memory was 830.0 MB in the beginning and 796.9 MB in the end (delta: 33.1 MB). Peak memory consumption was 33.1 MB. Max. memory is 11.5 GB. [2018-11-28 12:28:24,515 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 982.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 460.96 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 171.4 MB). Free memory was 955.3 MB in the beginning and 1.1 GB in the end (delta: -194.0 MB). Peak memory consumption was 31.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 43.21 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 33.55 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 602.92 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.6 MB). Peak memory consumption was 45.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 20543.06 ms. Allocated memory was 1.2 GB in the beginning and 2.7 GB in the end (delta: 1.5 GB). Free memory was 1.1 GB in the beginning and 830.0 MB in the end (delta: 267.1 MB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. * Witness Printer took 128.17 ms. Allocated memory is still 2.7 GB. Free memory was 830.0 MB in the beginning and 796.9 MB in the end (delta: 33.1 MB). Peak memory consumption was 33.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L674] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L675] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L677] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L679] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L680] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L681] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L682] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L683] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L684] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L685] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L686] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L687] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L688] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L689] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L690] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L691] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L692] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L693] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L694] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L695] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L768] -1 pthread_t t1451; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L769] FCALL, FORK -1 pthread_create(&t1451, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L699] 0 y$w_buff1 = y$w_buff0 [L700] 0 y$w_buff0 = 1 [L701] 0 y$w_buff1_used = y$w_buff0_used [L702] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L704] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L705] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L706] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L707] 0 y$r_buff0_thd1 = (_Bool)1 [L710] 0 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L713] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L770] -1 pthread_t t1452; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L771] FCALL, FORK -1 pthread_create(&t1452, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 x = 2 [L730] 1 weak$$choice0 = __VERIFIER_nondet_pointer() [L731] 1 weak$$choice2 = __VERIFIER_nondet_pointer() [L732] 1 y$flush_delayed = weak$$choice2 [L733] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L713] 0 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L714] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] 1 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L735] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L735] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L736] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L737] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used))=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L737] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L738] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L714] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L715] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L715] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L716] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 0 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L717] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 0 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L720] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L738] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L739] EXPR 1 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L739] 1 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L740] EXPR 1 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L741] 1 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L742] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L742] 1 y = y$flush_delayed ? y$mem_tmp : y [L743] 1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L746] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L746] EXPR 1 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L746] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L746] 1 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L747] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L747] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L748] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L748] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L749] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L749] 1 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L750] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L750] 1 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L753] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L773] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L778] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L778] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L779] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L780] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L780] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L781] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L784] -1 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 221 locations, 3 error locations. UNSAFE Result, 20.4s OverallTime, 31 OverallIterations, 1 TraceHistogramMax, 9.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 7727 SDtfs, 8131 SDslu, 18486 SDs, 0 SdLazy, 7676 SolverSat, 407 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 331 GetRequests, 82 SyntacticMatches, 32 SemanticMatches, 217 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 317 ImplicationChecksByTransitivity, 2.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=34805occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 5.2s AutomataMinimizationTime, 30 MinimizatonAttempts, 80385 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 2287 NumberOfCodeBlocks, 2287 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 2163 ConstructedInterpolants, 0 QuantifiedInterpolants, 443333 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 30 InterpolantComputations, 30 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...