./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/pc_sfifo_2_false-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0cd3be1d Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/pc_sfifo_2_false-unreach-call_false-termination.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash df684da5e5a56662a7be6091ec5bb0a21e1453c5 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-0cd3be1 [2018-11-28 10:34:50,693 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 10:34:50,694 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 10:34:50,701 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 10:34:50,701 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 10:34:50,702 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 10:34:50,703 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 10:34:50,704 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 10:34:50,705 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 10:34:50,706 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 10:34:50,706 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 10:34:50,707 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 10:34:50,707 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 10:34:50,708 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 10:34:50,709 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 10:34:50,709 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 10:34:50,710 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 10:34:50,711 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 10:34:50,712 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 10:34:50,713 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 10:34:50,714 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 10:34:50,715 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 10:34:50,717 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 10:34:50,717 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 10:34:50,717 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 10:34:50,718 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 10:34:50,718 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 10:34:50,719 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 10:34:50,719 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 10:34:50,720 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 10:34:50,720 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 10:34:50,721 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 10:34:50,721 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 10:34:50,721 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 10:34:50,722 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 10:34:50,722 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 10:34:50,722 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-28 10:34:50,731 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 10:34:50,731 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 10:34:50,732 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 10:34:50,732 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 10:34:50,732 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 10:34:50,732 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 10:34:50,733 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 10:34:50,733 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 10:34:50,733 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 10:34:50,733 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 10:34:50,733 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 10:34:50,733 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 10:34:50,733 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-28 10:34:50,734 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 10:34:50,734 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-28 10:34:50,734 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 10:34:50,734 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-28 10:34:50,734 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 10:34:50,734 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-28 10:34:50,734 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 10:34:50,734 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 10:34:50,735 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 10:34:50,735 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 10:34:50,735 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 10:34:50,735 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 10:34:50,735 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 10:34:50,735 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-28 10:34:50,735 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-28 10:34:50,735 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 10:34:50,736 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-28 10:34:50,736 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> df684da5e5a56662a7be6091ec5bb0a21e1453c5 [2018-11-28 10:34:50,758 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 10:34:50,767 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 10:34:50,769 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 10:34:50,770 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 10:34:50,770 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 10:34:50,771 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer/../../sv-benchmarks/c/systemc/pc_sfifo_2_false-unreach-call_false-termination.cil.c [2018-11-28 10:34:50,808 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer/data/0ddfa4c9c/a730d64396b1453d9e355893007fa0d4/FLAG0b8d8e99e [2018-11-28 10:34:51,176 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 10:34:51,177 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/sv-benchmarks/c/systemc/pc_sfifo_2_false-unreach-call_false-termination.cil.c [2018-11-28 10:34:51,184 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer/data/0ddfa4c9c/a730d64396b1453d9e355893007fa0d4/FLAG0b8d8e99e [2018-11-28 10:34:51,195 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer/data/0ddfa4c9c/a730d64396b1453d9e355893007fa0d4 [2018-11-28 10:34:51,198 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 10:34:51,199 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-28 10:34:51,199 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 10:34:51,199 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 10:34:51,202 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 10:34:51,202 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 10:34:51" (1/1) ... [2018-11-28 10:34:51,204 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@75dfde47 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:34:51, skipping insertion in model container [2018-11-28 10:34:51,204 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 10:34:51" (1/1) ... [2018-11-28 10:34:51,209 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 10:34:51,228 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 10:34:51,364 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 10:34:51,368 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 10:34:51,398 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 10:34:51,409 INFO L195 MainTranslator]: Completed translation [2018-11-28 10:34:51,410 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:34:51 WrapperNode [2018-11-28 10:34:51,410 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 10:34:51,411 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-28 10:34:51,411 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-28 10:34:51,411 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-28 10:34:51,418 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:34:51" (1/1) ... [2018-11-28 10:34:51,422 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:34:51" (1/1) ... [2018-11-28 10:34:51,427 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-28 10:34:51,427 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 10:34:51,427 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 10:34:51,427 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 10:34:51,469 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:34:51" (1/1) ... [2018-11-28 10:34:51,469 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:34:51" (1/1) ... [2018-11-28 10:34:51,471 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:34:51" (1/1) ... [2018-11-28 10:34:51,471 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:34:51" (1/1) ... [2018-11-28 10:34:51,477 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:34:51" (1/1) ... [2018-11-28 10:34:51,483 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:34:51" (1/1) ... [2018-11-28 10:34:51,485 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:34:51" (1/1) ... [2018-11-28 10:34:51,487 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 10:34:51,487 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 10:34:51,488 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 10:34:51,488 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 10:34:51,488 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:34:51" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 10:34:51,523 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2018-11-28 10:34:51,523 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2018-11-28 10:34:51,523 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2018-11-28 10:34:51,523 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2018-11-28 10:34:51,523 INFO L130 BoogieDeclarations]: Found specification of procedure update_fifo_q [2018-11-28 10:34:51,523 INFO L138 BoogieDeclarations]: Found implementation of procedure update_fifo_q [2018-11-28 10:34:51,523 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2018-11-28 10:34:51,523 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2018-11-28 10:34:51,523 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2018-11-28 10:34:51,523 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2018-11-28 10:34:51,523 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-28 10:34:51,524 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-28 10:34:51,524 INFO L130 BoogieDeclarations]: Found specification of procedure do_write_p [2018-11-28 10:34:51,524 INFO L138 BoogieDeclarations]: Found implementation of procedure do_write_p [2018-11-28 10:34:51,524 INFO L130 BoogieDeclarations]: Found specification of procedure error [2018-11-28 10:34:51,524 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2018-11-28 10:34:51,524 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-28 10:34:51,524 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-28 10:34:51,524 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2018-11-28 10:34:51,524 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2018-11-28 10:34:51,525 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2018-11-28 10:34:51,525 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2018-11-28 10:34:51,525 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_read_c_triggered [2018-11-28 10:34:51,525 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_read_c_triggered [2018-11-28 10:34:51,525 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2018-11-28 10:34:51,525 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2018-11-28 10:34:51,525 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2018-11-28 10:34:51,525 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2018-11-28 10:34:51,525 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2018-11-28 10:34:51,525 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2018-11-28 10:34:51,525 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 10:34:51,525 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 10:34:51,525 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_write_p_triggered [2018-11-28 10:34:51,526 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_write_p_triggered [2018-11-28 10:34:51,526 INFO L130 BoogieDeclarations]: Found specification of procedure do_read_c [2018-11-28 10:34:51,526 INFO L138 BoogieDeclarations]: Found implementation of procedure do_read_c [2018-11-28 10:34:51,526 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2018-11-28 10:34:51,526 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2018-11-28 10:34:51,806 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 10:34:51,807 INFO L280 CfgBuilder]: Removed 4 assue(true) statements. [2018-11-28 10:34:51,807 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 10:34:51 BoogieIcfgContainer [2018-11-28 10:34:51,807 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 10:34:51,808 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 10:34:51,808 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 10:34:51,810 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 10:34:51,810 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 10:34:51" (1/3) ... [2018-11-28 10:34:51,810 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7db8020e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 10:34:51, skipping insertion in model container [2018-11-28 10:34:51,811 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 10:34:51" (2/3) ... [2018-11-28 10:34:51,811 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7db8020e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 10:34:51, skipping insertion in model container [2018-11-28 10:34:51,811 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 10:34:51" (3/3) ... [2018-11-28 10:34:51,812 INFO L112 eAbstractionObserver]: Analyzing ICFG pc_sfifo_2_false-unreach-call_false-termination.cil.c [2018-11-28 10:34:51,818 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 10:34:51,823 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-28 10:34:51,837 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-28 10:34:51,863 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 10:34:51,864 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 10:34:51,864 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-28 10:34:51,864 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 10:34:51,864 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 10:34:51,864 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 10:34:51,864 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 10:34:51,865 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 10:34:51,865 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 10:34:51,881 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states. [2018-11-28 10:34:51,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 10:34:51,886 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:51,887 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:51,888 INFO L423 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:51,892 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:51,892 INFO L82 PathProgramCache]: Analyzing trace with hash -1379244889, now seen corresponding path program 1 times [2018-11-28 10:34:51,893 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:51,893 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:51,925 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:51,925 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:51,925 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:51,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:52,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:52,088 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:52,089 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 10:34:52,091 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 10:34:52,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 10:34:52,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 10:34:52,101 INFO L87 Difference]: Start difference. First operand 131 states. Second operand 5 states. [2018-11-28 10:34:52,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:52,573 INFO L93 Difference]: Finished difference Result 382 states and 551 transitions. [2018-11-28 10:34:52,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 10:34:52,574 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2018-11-28 10:34:52,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:52,586 INFO L225 Difference]: With dead ends: 382 [2018-11-28 10:34:52,586 INFO L226 Difference]: Without dead ends: 254 [2018-11-28 10:34:52,589 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 10:34:52,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-11-28 10:34:52,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 234. [2018-11-28 10:34:52,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-11-28 10:34:52,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 306 transitions. [2018-11-28 10:34:52,642 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 306 transitions. Word has length 70 [2018-11-28 10:34:52,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:52,643 INFO L480 AbstractCegarLoop]: Abstraction has 234 states and 306 transitions. [2018-11-28 10:34:52,643 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 10:34:52,643 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 306 transitions. [2018-11-28 10:34:52,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 10:34:52,645 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:52,645 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:52,645 INFO L423 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:52,645 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:52,645 INFO L82 PathProgramCache]: Analyzing trace with hash 982618983, now seen corresponding path program 1 times [2018-11-28 10:34:52,645 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:52,645 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:52,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:52,646 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:52,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:52,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:52,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:52,737 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:52,738 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 10:34:52,739 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 10:34:52,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 10:34:52,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 10:34:52,739 INFO L87 Difference]: Start difference. First operand 234 states and 306 transitions. Second operand 6 states. [2018-11-28 10:34:53,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:53,278 INFO L93 Difference]: Finished difference Result 631 states and 846 transitions. [2018-11-28 10:34:53,278 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 10:34:53,278 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2018-11-28 10:34:53,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:53,283 INFO L225 Difference]: With dead ends: 631 [2018-11-28 10:34:53,283 INFO L226 Difference]: Without dead ends: 424 [2018-11-28 10:34:53,285 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2018-11-28 10:34:53,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 424 states. [2018-11-28 10:34:53,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 424 to 360. [2018-11-28 10:34:53,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 360 states. [2018-11-28 10:34:53,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 476 transitions. [2018-11-28 10:34:53,325 INFO L78 Accepts]: Start accepts. Automaton has 360 states and 476 transitions. Word has length 70 [2018-11-28 10:34:53,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:53,326 INFO L480 AbstractCegarLoop]: Abstraction has 360 states and 476 transitions. [2018-11-28 10:34:53,326 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 10:34:53,326 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 476 transitions. [2018-11-28 10:34:53,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 10:34:53,328 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:53,328 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:53,331 INFO L423 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:53,331 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:53,331 INFO L82 PathProgramCache]: Analyzing trace with hash 629530601, now seen corresponding path program 1 times [2018-11-28 10:34:53,331 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:53,331 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:53,332 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:53,333 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:53,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:53,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:53,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:53,399 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:53,399 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 10:34:53,399 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 10:34:53,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 10:34:53,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 10:34:53,400 INFO L87 Difference]: Start difference. First operand 360 states and 476 transitions. Second operand 6 states. [2018-11-28 10:34:53,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:53,444 INFO L93 Difference]: Finished difference Result 687 states and 910 transitions. [2018-11-28 10:34:53,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 10:34:53,445 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2018-11-28 10:34:53,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:53,448 INFO L225 Difference]: With dead ends: 687 [2018-11-28 10:34:53,448 INFO L226 Difference]: Without dead ends: 370 [2018-11-28 10:34:53,450 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-28 10:34:53,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states. [2018-11-28 10:34:53,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 365. [2018-11-28 10:34:53,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 365 states. [2018-11-28 10:34:53,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 365 states and 479 transitions. [2018-11-28 10:34:53,473 INFO L78 Accepts]: Start accepts. Automaton has 365 states and 479 transitions. Word has length 70 [2018-11-28 10:34:53,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:53,473 INFO L480 AbstractCegarLoop]: Abstraction has 365 states and 479 transitions. [2018-11-28 10:34:53,473 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 10:34:53,473 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 479 transitions. [2018-11-28 10:34:53,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 10:34:53,476 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:53,476 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:53,476 INFO L423 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:53,476 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:53,476 INFO L82 PathProgramCache]: Analyzing trace with hash -1614452697, now seen corresponding path program 1 times [2018-11-28 10:34:53,476 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:53,476 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:53,477 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:53,477 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:53,477 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:53,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:53,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:53,549 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:53,549 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 10:34:53,549 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 10:34:53,550 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 10:34:53,550 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:34:53,550 INFO L87 Difference]: Start difference. First operand 365 states and 479 transitions. Second operand 4 states. [2018-11-28 10:34:53,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:53,680 INFO L93 Difference]: Finished difference Result 994 states and 1322 transitions. [2018-11-28 10:34:53,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 10:34:53,680 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2018-11-28 10:34:53,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:53,684 INFO L225 Difference]: With dead ends: 994 [2018-11-28 10:34:53,684 INFO L226 Difference]: Without dead ends: 672 [2018-11-28 10:34:53,686 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 10:34:53,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 672 states. [2018-11-28 10:34:53,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 672 to 652. [2018-11-28 10:34:53,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 652 states. [2018-11-28 10:34:53,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 652 states to 652 states and 835 transitions. [2018-11-28 10:34:53,720 INFO L78 Accepts]: Start accepts. Automaton has 652 states and 835 transitions. Word has length 70 [2018-11-28 10:34:53,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:53,721 INFO L480 AbstractCegarLoop]: Abstraction has 652 states and 835 transitions. [2018-11-28 10:34:53,721 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 10:34:53,721 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 835 transitions. [2018-11-28 10:34:53,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 10:34:53,722 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:53,722 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:53,722 INFO L423 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:53,723 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:53,723 INFO L82 PathProgramCache]: Analyzing trace with hash 909043624, now seen corresponding path program 1 times [2018-11-28 10:34:53,723 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:53,723 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:53,724 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:53,724 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:53,724 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:53,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:53,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:53,770 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:53,770 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 10:34:53,771 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 10:34:53,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 10:34:53,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 10:34:53,771 INFO L87 Difference]: Start difference. First operand 652 states and 835 transitions. Second operand 6 states. [2018-11-28 10:34:53,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:53,820 INFO L93 Difference]: Finished difference Result 1282 states and 1641 transitions. [2018-11-28 10:34:53,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 10:34:53,821 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2018-11-28 10:34:53,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:53,823 INFO L225 Difference]: With dead ends: 1282 [2018-11-28 10:34:53,823 INFO L226 Difference]: Without dead ends: 673 [2018-11-28 10:34:53,824 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-28 10:34:53,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 673 states. [2018-11-28 10:34:53,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 673 to 667. [2018-11-28 10:34:53,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 667 states. [2018-11-28 10:34:53,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 667 states to 667 states and 847 transitions. [2018-11-28 10:34:53,848 INFO L78 Accepts]: Start accepts. Automaton has 667 states and 847 transitions. Word has length 70 [2018-11-28 10:34:53,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:53,848 INFO L480 AbstractCegarLoop]: Abstraction has 667 states and 847 transitions. [2018-11-28 10:34:53,848 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 10:34:53,848 INFO L276 IsEmpty]: Start isEmpty. Operand 667 states and 847 transitions. [2018-11-28 10:34:53,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 10:34:53,849 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:53,849 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:53,850 INFO L423 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:53,850 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:53,850 INFO L82 PathProgramCache]: Analyzing trace with hash 1049592234, now seen corresponding path program 1 times [2018-11-28 10:34:53,850 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:53,850 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:53,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:53,851 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:53,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:53,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 10:34:53,915 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 10:34:53,915 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 10:34:53,915 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 10:34:53,915 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 10:34:53,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 10:34:53,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 10:34:53,916 INFO L87 Difference]: Start difference. First operand 667 states and 847 transitions. Second operand 6 states. [2018-11-28 10:34:54,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 10:34:54,365 INFO L93 Difference]: Finished difference Result 1362 states and 1717 transitions. [2018-11-28 10:34:54,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 10:34:54,366 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2018-11-28 10:34:54,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 10:34:54,369 INFO L225 Difference]: With dead ends: 1362 [2018-11-28 10:34:54,370 INFO L226 Difference]: Without dead ends: 833 [2018-11-28 10:34:54,371 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-28 10:34:54,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 833 states. [2018-11-28 10:34:54,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 833 to 683. [2018-11-28 10:34:54,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 683 states. [2018-11-28 10:34:54,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 683 states to 683 states and 856 transitions. [2018-11-28 10:34:54,399 INFO L78 Accepts]: Start accepts. Automaton has 683 states and 856 transitions. Word has length 70 [2018-11-28 10:34:54,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 10:34:54,399 INFO L480 AbstractCegarLoop]: Abstraction has 683 states and 856 transitions. [2018-11-28 10:34:54,399 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 10:34:54,399 INFO L276 IsEmpty]: Start isEmpty. Operand 683 states and 856 transitions. [2018-11-28 10:34:54,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 10:34:54,400 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 10:34:54,400 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 10:34:54,401 INFO L423 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 10:34:54,401 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 10:34:54,401 INFO L82 PathProgramCache]: Analyzing trace with hash 231943784, now seen corresponding path program 1 times [2018-11-28 10:34:54,401 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 10:34:54,401 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 10:34:54,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:54,402 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 10:34:54,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 10:34:54,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 10:34:54,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 10:34:54,450 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 10:34:54,511 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 10:34:54 BoogieIcfgContainer [2018-11-28 10:34:54,511 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 10:34:54,511 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 10:34:54,511 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 10:34:54,511 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 10:34:54,512 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 10:34:51" (3/4) ... [2018-11-28 10:34:54,513 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-28 10:34:54,580 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_03f4f11f-abe2-4dbe-be17-f825d0e246d4/bin-2019/uautomizer/witness.graphml [2018-11-28 10:34:54,580 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 10:34:54,581 INFO L168 Benchmark]: Toolchain (without parser) took 3383.17 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 206.0 MB). Free memory was 962.4 MB in the beginning and 861.9 MB in the end (delta: 100.5 MB). Peak memory consumption was 306.6 MB. Max. memory is 11.5 GB. [2018-11-28 10:34:54,582 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 10:34:54,582 INFO L168 Benchmark]: CACSL2BoogieTranslator took 211.20 ms. Allocated memory is still 1.0 GB. Free memory was 962.4 MB in the beginning and 946.3 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-11-28 10:34:54,582 INFO L168 Benchmark]: Boogie Procedure Inliner took 16.02 ms. Allocated memory is still 1.0 GB. Free memory is still 946.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 10:34:54,583 INFO L168 Benchmark]: Boogie Preprocessor took 60.45 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 139.5 MB). Free memory was 946.3 MB in the beginning and 1.1 GB in the end (delta: -185.5 MB). Peak memory consumption was 12.9 MB. Max. memory is 11.5 GB. [2018-11-28 10:34:54,583 INFO L168 Benchmark]: RCFGBuilder took 319.76 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 31.8 MB). Peak memory consumption was 31.8 MB. Max. memory is 11.5 GB. [2018-11-28 10:34:54,583 INFO L168 Benchmark]: TraceAbstraction took 2703.03 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 66.6 MB). Free memory was 1.1 GB in the beginning and 869.5 MB in the end (delta: 230.6 MB). Peak memory consumption was 297.2 MB. Max. memory is 11.5 GB. [2018-11-28 10:34:54,583 INFO L168 Benchmark]: Witness Printer took 69.40 ms. Allocated memory is still 1.2 GB. Free memory was 869.5 MB in the beginning and 861.9 MB in the end (delta: 7.6 MB). Peak memory consumption was 7.6 MB. Max. memory is 11.5 GB. [2018-11-28 10:34:54,584 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 211.20 ms. Allocated memory is still 1.0 GB. Free memory was 962.4 MB in the beginning and 946.3 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 16.02 ms. Allocated memory is still 1.0 GB. Free memory is still 946.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 60.45 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 139.5 MB). Free memory was 946.3 MB in the beginning and 1.1 GB in the end (delta: -185.5 MB). Peak memory consumption was 12.9 MB. Max. memory is 11.5 GB. * RCFGBuilder took 319.76 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 31.8 MB). Peak memory consumption was 31.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 2703.03 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 66.6 MB). Free memory was 1.1 GB in the beginning and 869.5 MB in the end (delta: 230.6 MB). Peak memory consumption was 297.2 MB. Max. memory is 11.5 GB. * Witness Printer took 69.40 ms. Allocated memory is still 1.2 GB. Free memory was 869.5 MB in the beginning and 861.9 MB in the end (delta: 7.6 MB). Peak memory consumption was 7.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 10]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int q_buf_0 ; [L16] int q_free ; [L17] int q_read_ev ; [L18] int q_write_ev ; [L19] int q_req_up ; [L20] int q_ev ; [L41] int p_num_write ; [L42] int p_last_write ; [L43] int p_dw_st ; [L44] int p_dw_pc ; [L45] int p_dw_i ; [L46] int c_num_read ; [L47] int c_last_read ; [L48] int c_dr_st ; [L49] int c_dr_pc ; [L50] int c_dr_i ; [L154] static int a_t ; VAL [\old(a_t)=11, \old(c_dr_i)=3, \old(c_dr_pc)=13, \old(c_dr_st)=17, \old(c_last_read)=5, \old(c_num_read)=6, \old(p_dw_i)=4, \old(p_dw_pc)=15, \old(p_dw_st)=9, \old(p_last_write)=19, \old(p_num_write)=7, \old(q_buf_0)=10, \old(q_ev)=16, \old(q_free)=18, \old(q_read_ev)=14, \old(q_req_up)=12, \old(q_write_ev)=8, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L456] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L460] CALL init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L442] q_free = 1 [L443] q_write_ev = 2 [L444] q_read_ev = q_write_ev [L445] p_num_write = 0 [L446] p_dw_pc = 0 [L447] p_dw_i = 1 [L448] c_num_read = 0 [L449] c_dr_pc = 0 [L450] c_dr_i = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L460] RET init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L461] CALL start_simulation() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L396] int kernel_st ; [L397] int tmp ; [L401] kernel_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] CALL update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L212] COND FALSE !((int )q_req_up == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] RET update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] CALL init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L227] COND TRUE (int )p_dw_i == 1 [L228] p_dw_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L232] COND TRUE (int )c_dr_i == 1 [L233] c_dr_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] RET init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] CALL fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L265] COND FALSE !((int )q_read_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L270] COND FALSE !((int )q_write_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] RET fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L405] CALL activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L298] int tmp ; [L299] int tmp___0 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] CALL, EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L52] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L55] COND FALSE !((int )p_dw_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L65] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L67] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] RET, EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_write_p_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] tmp = is_do_write_p_triggered() [L305] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] CALL, EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L71] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L74] COND FALSE !((int )c_dr_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L84] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L86] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L311] RET, EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_read_c_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] tmp___0 = is_do_read_c_triggered() [L313] COND FALSE !(\read(tmp___0)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___0=0] [L405] RET activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] CALL reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L283] COND FALSE !((int )q_read_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L288] COND FALSE !((int )q_write_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] RET reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L409] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L412] kernel_st = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L413] CALL eval() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L323] int tmp ; [L324] int tmp___0 ; [L325] int tmp___1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L329] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] CALL, EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L242] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L245] COND TRUE (int )p_dw_st == 0 [L246] __retres1 = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L258] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=1, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] RET, EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, exists_runnable_thread()=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] tmp___1 = exists_runnable_thread() [L334] COND TRUE \read(tmp___1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp___1=1] [L339] COND TRUE (int )p_dw_st == 0 [L341] tmp = __VERIFIER_nondet_int() [L343] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___1=1] [L349] CALL error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L10] __VERIFIER_error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 19 procedures, 131 locations, 1 error locations. UNSAFE Result, 2.6s OverallTime, 7 OverallIterations, 1 TraceHistogramMax, 1.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1187 SDtfs, 1360 SDslu, 1917 SDs, 0 SdLazy, 1730 SolverSat, 407 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 63 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=683occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 6 MinimizatonAttempts, 265 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.3s InterpolantComputationTime, 490 NumberOfCodeBlocks, 490 NumberOfCodeBlocksAsserted, 7 NumberOfCheckSat, 414 ConstructedInterpolants, 0 QuantifiedInterpolants, 43608 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 6 InterpolantComputations, 6 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...