./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/podwr000_pso.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0cd3be1d Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/podwr000_pso.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c789dc64a500d158f8c4f6d503d67910c567fa0f ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-0cd3be1 [2018-11-28 12:16:03,701 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 12:16:03,703 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 12:16:03,709 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 12:16:03,709 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 12:16:03,709 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 12:16:03,710 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 12:16:03,712 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 12:16:03,713 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 12:16:03,713 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 12:16:03,714 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 12:16:03,714 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 12:16:03,715 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 12:16:03,716 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 12:16:03,716 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 12:16:03,717 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 12:16:03,718 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 12:16:03,719 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 12:16:03,720 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 12:16:03,722 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 12:16:03,722 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 12:16:03,723 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 12:16:03,725 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 12:16:03,725 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 12:16:03,725 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 12:16:03,726 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 12:16:03,727 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 12:16:03,727 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 12:16:03,728 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 12:16:03,728 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 12:16:03,729 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 12:16:03,729 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 12:16:03,729 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 12:16:03,729 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 12:16:03,730 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 12:16:03,731 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 12:16:03,731 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-28 12:16:03,741 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 12:16:03,741 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 12:16:03,742 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 12:16:03,742 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 12:16:03,742 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 12:16:03,743 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 12:16:03,743 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 12:16:03,743 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 12:16:03,743 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 12:16:03,743 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 12:16:03,743 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 12:16:03,744 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 12:16:03,744 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-28 12:16:03,744 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 12:16:03,744 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-28 12:16:03,744 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 12:16:03,744 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-28 12:16:03,744 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 12:16:03,745 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-28 12:16:03,745 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 12:16:03,745 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 12:16:03,745 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 12:16:03,745 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 12:16:03,745 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 12:16:03,749 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 12:16:03,750 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 12:16:03,750 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-28 12:16:03,750 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-28 12:16:03,750 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 12:16:03,750 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-28 12:16:03,750 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c789dc64a500d158f8c4f6d503d67910c567fa0f [2018-11-28 12:16:03,773 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 12:16:03,782 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 12:16:03,785 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 12:16:03,786 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 12:16:03,786 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 12:16:03,787 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/podwr000_pso.opt_false-unreach-call.i [2018-11-28 12:16:03,828 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer/data/fd73ae5b9/0efe453cb00444399530e0d39a92f1c6/FLAG835253ee3 [2018-11-28 12:16:04,264 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 12:16:04,265 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/sv-benchmarks/c/pthread-wmm/podwr000_pso.opt_false-unreach-call.i [2018-11-28 12:16:04,272 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer/data/fd73ae5b9/0efe453cb00444399530e0d39a92f1c6/FLAG835253ee3 [2018-11-28 12:16:04,281 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer/data/fd73ae5b9/0efe453cb00444399530e0d39a92f1c6 [2018-11-28 12:16:04,282 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 12:16:04,283 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-28 12:16:04,284 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 12:16:04,284 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 12:16:04,286 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 12:16:04,287 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:16:04" (1/1) ... [2018-11-28 12:16:04,288 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7b6c5ef8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:16:04, skipping insertion in model container [2018-11-28 12:16:04,289 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:16:04" (1/1) ... [2018-11-28 12:16:04,293 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 12:16:04,322 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 12:16:04,581 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 12:16:04,595 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 12:16:04,696 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 12:16:04,731 INFO L195 MainTranslator]: Completed translation [2018-11-28 12:16:04,731 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:16:04 WrapperNode [2018-11-28 12:16:04,731 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 12:16:04,732 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-28 12:16:04,732 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-28 12:16:04,732 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-28 12:16:04,738 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:16:04" (1/1) ... [2018-11-28 12:16:04,755 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:16:04" (1/1) ... [2018-11-28 12:16:04,779 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-28 12:16:04,780 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 12:16:04,780 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 12:16:04,780 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 12:16:04,788 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:16:04" (1/1) ... [2018-11-28 12:16:04,788 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:16:04" (1/1) ... [2018-11-28 12:16:04,792 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:16:04" (1/1) ... [2018-11-28 12:16:04,792 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:16:04" (1/1) ... [2018-11-28 12:16:04,801 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:16:04" (1/1) ... [2018-11-28 12:16:04,805 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:16:04" (1/1) ... [2018-11-28 12:16:04,808 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:16:04" (1/1) ... [2018-11-28 12:16:04,811 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 12:16:04,811 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 12:16:04,811 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 12:16:04,812 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 12:16:04,812 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:16:04" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 12:16:04,860 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 12:16:04,861 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-28 12:16:04,861 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-28 12:16:04,861 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 12:16:04,861 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-28 12:16:04,861 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-28 12:16:04,861 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-28 12:16:04,861 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-28 12:16:04,861 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-28 12:16:04,862 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 12:16:04,862 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 12:16:04,863 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-28 12:16:05,357 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 12:16:05,357 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-28 12:16:05,358 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:16:05 BoogieIcfgContainer [2018-11-28 12:16:05,358 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 12:16:05,359 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 12:16:05,359 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 12:16:05,362 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 12:16:05,362 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 12:16:04" (1/3) ... [2018-11-28 12:16:05,362 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@65cb933b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:16:05, skipping insertion in model container [2018-11-28 12:16:05,363 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:16:04" (2/3) ... [2018-11-28 12:16:05,363 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@65cb933b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:16:05, skipping insertion in model container [2018-11-28 12:16:05,363 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:16:05" (3/3) ... [2018-11-28 12:16:05,364 INFO L112 eAbstractionObserver]: Analyzing ICFG podwr000_pso.opt_false-unreach-call.i [2018-11-28 12:16:05,397 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,397 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,397 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,397 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,398 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,398 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,398 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,398 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,399 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,399 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,399 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,399 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,399 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,399 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,400 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,400 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,400 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,400 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,400 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,400 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,401 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,401 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,401 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,401 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,401 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,401 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,402 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,402 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,402 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,402 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,402 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,402 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,402 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,403 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,403 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,403 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,403 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,403 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,404 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,404 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,404 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,404 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,404 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,404 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,405 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,405 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,405 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,405 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,405 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,405 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,405 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,406 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,406 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,406 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,406 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,406 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,407 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,407 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,407 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,407 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,407 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,407 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,407 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,408 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,408 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,408 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,408 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,408 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,409 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,409 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,409 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,409 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,409 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,409 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,410 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,410 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,410 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,410 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,410 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,410 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,411 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,411 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,411 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,411 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,411 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,411 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,412 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,412 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,412 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,412 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,412 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,412 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,412 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,413 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,413 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,413 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,413 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,413 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,413 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,413 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,414 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,414 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,414 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,414 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,414 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,415 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,415 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,415 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,415 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,415 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,415 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,415 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,416 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,416 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,416 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,416 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,416 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,416 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,417 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,417 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,417 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,417 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,417 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,417 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,417 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,417 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,417 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,418 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,418 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,418 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,418 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,418 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,418 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,418 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,419 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,419 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,419 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,419 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,419 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,419 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,420 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,420 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,420 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,420 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,420 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,420 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,421 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,421 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,421 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,421 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,421 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,421 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,422 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,422 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,422 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,422 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,422 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,422 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,422 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,423 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,423 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,423 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,423 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,423 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:16:05,432 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-28 12:16:05,432 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 12:16:05,441 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-28 12:16:05,458 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-28 12:16:05,485 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 12:16:05,486 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 12:16:05,486 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-28 12:16:05,486 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 12:16:05,486 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 12:16:05,486 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 12:16:05,486 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 12:16:05,486 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 12:16:05,486 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 12:16:05,499 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 142places, 180 transitions [2018-11-28 12:16:08,026 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 34806 states. [2018-11-28 12:16:08,028 INFO L276 IsEmpty]: Start isEmpty. Operand 34806 states. [2018-11-28 12:16:08,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-28 12:16:08,034 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:08,035 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:08,037 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:08,042 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:08,043 INFO L82 PathProgramCache]: Analyzing trace with hash -454041356, now seen corresponding path program 1 times [2018-11-28 12:16:08,045 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:08,046 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:08,093 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:08,093 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:08,093 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:08,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:08,240 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:08,243 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:08,243 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:16:08,247 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:16:08,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:16:08,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:16:08,266 INFO L87 Difference]: Start difference. First operand 34806 states. Second operand 4 states. [2018-11-28 12:16:09,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:09,161 INFO L93 Difference]: Finished difference Result 60790 states and 234493 transitions. [2018-11-28 12:16:09,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:16:09,162 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2018-11-28 12:16:09,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:09,366 INFO L225 Difference]: With dead ends: 60790 [2018-11-28 12:16:09,366 INFO L226 Difference]: Without dead ends: 44270 [2018-11-28 12:16:09,367 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:16:09,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44270 states. [2018-11-28 12:16:10,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44270 to 27338. [2018-11-28 12:16:10,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27338 states. [2018-11-28 12:16:10,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27338 states to 27338 states and 105499 transitions. [2018-11-28 12:16:10,523 INFO L78 Accepts]: Start accepts. Automaton has 27338 states and 105499 transitions. Word has length 33 [2018-11-28 12:16:10,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:10,523 INFO L480 AbstractCegarLoop]: Abstraction has 27338 states and 105499 transitions. [2018-11-28 12:16:10,524 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:16:10,524 INFO L276 IsEmpty]: Start isEmpty. Operand 27338 states and 105499 transitions. [2018-11-28 12:16:10,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-28 12:16:10,530 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:10,530 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:10,531 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:10,531 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:10,531 INFO L82 PathProgramCache]: Analyzing trace with hash 1863363909, now seen corresponding path program 1 times [2018-11-28 12:16:10,531 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:10,531 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:10,535 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:10,535 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:10,535 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:10,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:10,613 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:10,614 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:10,614 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:16:10,615 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:16:10,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:16:10,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:16:10,616 INFO L87 Difference]: Start difference. First operand 27338 states and 105499 transitions. Second operand 4 states. [2018-11-28 12:16:10,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:10,760 INFO L93 Difference]: Finished difference Result 8528 states and 28344 transitions. [2018-11-28 12:16:10,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:16:10,761 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 45 [2018-11-28 12:16:10,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:10,790 INFO L225 Difference]: With dead ends: 8528 [2018-11-28 12:16:10,790 INFO L226 Difference]: Without dead ends: 7466 [2018-11-28 12:16:10,791 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:16:10,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7466 states. [2018-11-28 12:16:10,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7466 to 7466. [2018-11-28 12:16:10,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7466 states. [2018-11-28 12:16:10,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7466 states to 7466 states and 24636 transitions. [2018-11-28 12:16:10,921 INFO L78 Accepts]: Start accepts. Automaton has 7466 states and 24636 transitions. Word has length 45 [2018-11-28 12:16:10,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:10,921 INFO L480 AbstractCegarLoop]: Abstraction has 7466 states and 24636 transitions. [2018-11-28 12:16:10,921 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:16:10,921 INFO L276 IsEmpty]: Start isEmpty. Operand 7466 states and 24636 transitions. [2018-11-28 12:16:10,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-28 12:16:10,923 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:10,923 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:10,923 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:10,923 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:10,923 INFO L82 PathProgramCache]: Analyzing trace with hash 591681941, now seen corresponding path program 1 times [2018-11-28 12:16:10,923 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:10,924 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:10,927 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:10,927 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:10,927 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:10,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:11,002 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:11,002 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:11,002 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:16:11,002 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:16:11,003 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:16:11,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:16:11,003 INFO L87 Difference]: Start difference. First operand 7466 states and 24636 transitions. Second operand 5 states. [2018-11-28 12:16:11,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:11,411 INFO L93 Difference]: Finished difference Result 13998 states and 45805 transitions. [2018-11-28 12:16:11,411 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:16:11,411 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2018-11-28 12:16:11,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:11,441 INFO L225 Difference]: With dead ends: 13998 [2018-11-28 12:16:11,441 INFO L226 Difference]: Without dead ends: 13930 [2018-11-28 12:16:11,441 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:16:11,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13930 states. [2018-11-28 12:16:11,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13930 to 9441. [2018-11-28 12:16:11,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9441 states. [2018-11-28 12:16:11,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9441 states to 9441 states and 30542 transitions. [2018-11-28 12:16:11,716 INFO L78 Accepts]: Start accepts. Automaton has 9441 states and 30542 transitions. Word has length 46 [2018-11-28 12:16:11,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:11,717 INFO L480 AbstractCegarLoop]: Abstraction has 9441 states and 30542 transitions. [2018-11-28 12:16:11,717 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:16:11,718 INFO L276 IsEmpty]: Start isEmpty. Operand 9441 states and 30542 transitions. [2018-11-28 12:16:11,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-28 12:16:11,719 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:11,719 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:11,719 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:11,719 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:11,719 INFO L82 PathProgramCache]: Analyzing trace with hash -1652121253, now seen corresponding path program 1 times [2018-11-28 12:16:11,720 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:11,720 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:11,722 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:11,722 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:11,722 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:11,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:11,767 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:11,767 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:11,767 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:16:11,767 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:16:11,768 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:16:11,768 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:16:11,768 INFO L87 Difference]: Start difference. First operand 9441 states and 30542 transitions. Second operand 3 states. [2018-11-28 12:16:11,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:11,854 INFO L93 Difference]: Finished difference Result 13279 states and 42641 transitions. [2018-11-28 12:16:11,854 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:16:11,854 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2018-11-28 12:16:11,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:11,877 INFO L225 Difference]: With dead ends: 13279 [2018-11-28 12:16:11,878 INFO L226 Difference]: Without dead ends: 13279 [2018-11-28 12:16:11,878 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:16:11,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13279 states. [2018-11-28 12:16:12,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13279 to 9845. [2018-11-28 12:16:12,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9845 states. [2018-11-28 12:16:12,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9845 states to 9845 states and 31508 transitions. [2018-11-28 12:16:12,065 INFO L78 Accepts]: Start accepts. Automaton has 9845 states and 31508 transitions. Word has length 48 [2018-11-28 12:16:12,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:12,065 INFO L480 AbstractCegarLoop]: Abstraction has 9845 states and 31508 transitions. [2018-11-28 12:16:12,065 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:16:12,066 INFO L276 IsEmpty]: Start isEmpty. Operand 9845 states and 31508 transitions. [2018-11-28 12:16:12,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-28 12:16:12,067 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:12,067 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:12,067 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:12,067 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:12,067 INFO L82 PathProgramCache]: Analyzing trace with hash -164023066, now seen corresponding path program 1 times [2018-11-28 12:16:12,067 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:12,067 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:12,069 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:12,069 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:12,070 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:12,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:12,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:12,153 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:12,153 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:16:12,153 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:16:12,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:16:12,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:16:12,155 INFO L87 Difference]: Start difference. First operand 9845 states and 31508 transitions. Second operand 7 states. [2018-11-28 12:16:12,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:12,595 INFO L93 Difference]: Finished difference Result 12285 states and 38673 transitions. [2018-11-28 12:16:12,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 12:16:12,595 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2018-11-28 12:16:12,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:12,609 INFO L225 Difference]: With dead ends: 12285 [2018-11-28 12:16:12,609 INFO L226 Difference]: Without dead ends: 12213 [2018-11-28 12:16:12,610 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2018-11-28 12:16:12,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12213 states. [2018-11-28 12:16:12,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12213 to 10849. [2018-11-28 12:16:12,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10849 states. [2018-11-28 12:16:12,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10849 states to 10849 states and 34563 transitions. [2018-11-28 12:16:12,770 INFO L78 Accepts]: Start accepts. Automaton has 10849 states and 34563 transitions. Word has length 52 [2018-11-28 12:16:12,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:12,770 INFO L480 AbstractCegarLoop]: Abstraction has 10849 states and 34563 transitions. [2018-11-28 12:16:12,770 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:16:12,770 INFO L276 IsEmpty]: Start isEmpty. Operand 10849 states and 34563 transitions. [2018-11-28 12:16:12,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-28 12:16:12,773 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:12,773 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:12,774 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:12,774 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:12,774 INFO L82 PathProgramCache]: Analyzing trace with hash 317195842, now seen corresponding path program 1 times [2018-11-28 12:16:12,774 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:12,774 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:12,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:12,776 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:12,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:12,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:12,842 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:12,842 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:12,842 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:16:12,843 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:16:12,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:16:12,843 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:16:12,843 INFO L87 Difference]: Start difference. First operand 10849 states and 34563 transitions. Second operand 4 states. [2018-11-28 12:16:12,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:12,970 INFO L93 Difference]: Finished difference Result 12396 states and 39572 transitions. [2018-11-28 12:16:12,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:16:12,971 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 60 [2018-11-28 12:16:12,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:12,987 INFO L225 Difference]: With dead ends: 12396 [2018-11-28 12:16:12,987 INFO L226 Difference]: Without dead ends: 12396 [2018-11-28 12:16:12,987 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:16:13,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12396 states. [2018-11-28 12:16:13,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12396 to 11369. [2018-11-28 12:16:13,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11369 states. [2018-11-28 12:16:13,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11369 states to 11369 states and 36236 transitions. [2018-11-28 12:16:13,152 INFO L78 Accepts]: Start accepts. Automaton has 11369 states and 36236 transitions. Word has length 60 [2018-11-28 12:16:13,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:13,153 INFO L480 AbstractCegarLoop]: Abstraction has 11369 states and 36236 transitions. [2018-11-28 12:16:13,153 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:16:13,153 INFO L276 IsEmpty]: Start isEmpty. Operand 11369 states and 36236 transitions. [2018-11-28 12:16:13,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-28 12:16:13,157 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:13,157 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:13,157 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:13,157 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:13,157 INFO L82 PathProgramCache]: Analyzing trace with hash 2060006177, now seen corresponding path program 1 times [2018-11-28 12:16:13,157 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:13,158 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:13,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:13,159 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:13,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:13,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:13,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:13,233 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:13,233 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:16:13,234 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:16:13,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:16:13,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:16:13,234 INFO L87 Difference]: Start difference. First operand 11369 states and 36236 transitions. Second operand 6 states. [2018-11-28 12:16:13,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:13,656 INFO L93 Difference]: Finished difference Result 20969 states and 66486 transitions. [2018-11-28 12:16:13,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 12:16:13,657 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2018-11-28 12:16:13,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:13,680 INFO L225 Difference]: With dead ends: 20969 [2018-11-28 12:16:13,680 INFO L226 Difference]: Without dead ends: 20898 [2018-11-28 12:16:13,680 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-11-28 12:16:13,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20898 states. [2018-11-28 12:16:13,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20898 to 13755. [2018-11-28 12:16:13,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13755 states. [2018-11-28 12:16:13,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13755 states to 13755 states and 43280 transitions. [2018-11-28 12:16:13,860 INFO L78 Accepts]: Start accepts. Automaton has 13755 states and 43280 transitions. Word has length 60 [2018-11-28 12:16:13,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:13,861 INFO L480 AbstractCegarLoop]: Abstraction has 13755 states and 43280 transitions. [2018-11-28 12:16:13,861 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:16:13,861 INFO L276 IsEmpty]: Start isEmpty. Operand 13755 states and 43280 transitions. [2018-11-28 12:16:13,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-28 12:16:13,865 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:13,865 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:13,865 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:13,865 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:13,865 INFO L82 PathProgramCache]: Analyzing trace with hash 553940321, now seen corresponding path program 1 times [2018-11-28 12:16:13,865 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:13,865 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:13,867 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:13,867 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:13,867 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:13,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:13,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:13,940 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:13,940 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:16:13,940 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:16:13,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:16:13,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:16:13,941 INFO L87 Difference]: Start difference. First operand 13755 states and 43280 transitions. Second operand 4 states. [2018-11-28 12:16:14,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:14,158 INFO L93 Difference]: Finished difference Result 17635 states and 54585 transitions. [2018-11-28 12:16:14,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:16:14,159 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 64 [2018-11-28 12:16:14,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:14,179 INFO L225 Difference]: With dead ends: 17635 [2018-11-28 12:16:14,179 INFO L226 Difference]: Without dead ends: 17635 [2018-11-28 12:16:14,179 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:16:14,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17635 states. [2018-11-28 12:16:14,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17635 to 15793. [2018-11-28 12:16:14,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15793 states. [2018-11-28 12:16:14,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15793 states to 15793 states and 49131 transitions. [2018-11-28 12:16:14,353 INFO L78 Accepts]: Start accepts. Automaton has 15793 states and 49131 transitions. Word has length 64 [2018-11-28 12:16:14,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:14,354 INFO L480 AbstractCegarLoop]: Abstraction has 15793 states and 49131 transitions. [2018-11-28 12:16:14,354 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:16:14,354 INFO L276 IsEmpty]: Start isEmpty. Operand 15793 states and 49131 transitions. [2018-11-28 12:16:14,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-28 12:16:14,359 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:14,359 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:14,359 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:14,359 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:14,359 INFO L82 PathProgramCache]: Analyzing trace with hash -1523269022, now seen corresponding path program 1 times [2018-11-28 12:16:14,359 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:14,359 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:14,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:14,360 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:14,361 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:14,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:14,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:14,389 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:14,389 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:16:14,389 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:16:14,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:16:14,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:16:14,391 INFO L87 Difference]: Start difference. First operand 15793 states and 49131 transitions. Second operand 3 states. [2018-11-28 12:16:14,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:14,596 INFO L93 Difference]: Finished difference Result 16385 states and 50738 transitions. [2018-11-28 12:16:14,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:16:14,597 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2018-11-28 12:16:14,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:14,615 INFO L225 Difference]: With dead ends: 16385 [2018-11-28 12:16:14,615 INFO L226 Difference]: Without dead ends: 16385 [2018-11-28 12:16:14,615 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:16:14,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16385 states. [2018-11-28 12:16:14,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16385 to 16109. [2018-11-28 12:16:14,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16109 states. [2018-11-28 12:16:14,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16109 states to 16109 states and 49981 transitions. [2018-11-28 12:16:14,783 INFO L78 Accepts]: Start accepts. Automaton has 16109 states and 49981 transitions. Word has length 64 [2018-11-28 12:16:14,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:14,783 INFO L480 AbstractCegarLoop]: Abstraction has 16109 states and 49981 transitions. [2018-11-28 12:16:14,783 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:16:14,783 INFO L276 IsEmpty]: Start isEmpty. Operand 16109 states and 49981 transitions. [2018-11-28 12:16:14,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 12:16:14,788 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:14,789 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:14,789 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:14,789 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:14,789 INFO L82 PathProgramCache]: Analyzing trace with hash 493974152, now seen corresponding path program 1 times [2018-11-28 12:16:14,789 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:14,789 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:14,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:14,791 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:14,791 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:14,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:14,865 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:14,865 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:14,866 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:16:14,866 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:16:14,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:16:14,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:16:14,867 INFO L87 Difference]: Start difference. First operand 16109 states and 49981 transitions. Second operand 6 states. [2018-11-28 12:16:15,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:15,647 INFO L93 Difference]: Finished difference Result 19821 states and 60437 transitions. [2018-11-28 12:16:15,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:16:15,647 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2018-11-28 12:16:15,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:15,670 INFO L225 Difference]: With dead ends: 19821 [2018-11-28 12:16:15,670 INFO L226 Difference]: Without dead ends: 19821 [2018-11-28 12:16:15,671 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:16:15,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19821 states. [2018-11-28 12:16:15,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19821 to 18617. [2018-11-28 12:16:15,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18617 states. [2018-11-28 12:16:15,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18617 states to 18617 states and 57217 transitions. [2018-11-28 12:16:15,876 INFO L78 Accepts]: Start accepts. Automaton has 18617 states and 57217 transitions. Word has length 66 [2018-11-28 12:16:15,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:15,876 INFO L480 AbstractCegarLoop]: Abstraction has 18617 states and 57217 transitions. [2018-11-28 12:16:15,876 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:16:15,876 INFO L276 IsEmpty]: Start isEmpty. Operand 18617 states and 57217 transitions. [2018-11-28 12:16:15,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 12:16:15,884 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:15,884 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:15,884 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:15,884 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:15,884 INFO L82 PathProgramCache]: Analyzing trace with hash -1583235191, now seen corresponding path program 1 times [2018-11-28 12:16:15,884 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:15,885 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:15,886 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:15,886 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:15,886 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:15,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:16,006 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:16,007 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:16,007 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:16:16,007 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:16:16,007 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:16:16,007 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:16:16,007 INFO L87 Difference]: Start difference. First operand 18617 states and 57217 transitions. Second operand 6 states. [2018-11-28 12:16:16,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:16,322 INFO L93 Difference]: Finished difference Result 21449 states and 63626 transitions. [2018-11-28 12:16:16,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 12:16:16,322 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2018-11-28 12:16:16,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:16,349 INFO L225 Difference]: With dead ends: 21449 [2018-11-28 12:16:16,349 INFO L226 Difference]: Without dead ends: 21449 [2018-11-28 12:16:16,350 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:16:16,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21449 states. [2018-11-28 12:16:16,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21449 to 19133. [2018-11-28 12:16:16,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19133 states. [2018-11-28 12:16:16,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19133 states to 19133 states and 57764 transitions. [2018-11-28 12:16:16,547 INFO L78 Accepts]: Start accepts. Automaton has 19133 states and 57764 transitions. Word has length 66 [2018-11-28 12:16:16,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:16,547 INFO L480 AbstractCegarLoop]: Abstraction has 19133 states and 57764 transitions. [2018-11-28 12:16:16,547 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:16:16,547 INFO L276 IsEmpty]: Start isEmpty. Operand 19133 states and 57764 transitions. [2018-11-28 12:16:16,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 12:16:16,553 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:16,553 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:16,553 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:16,553 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:16,554 INFO L82 PathProgramCache]: Analyzing trace with hash -1371884278, now seen corresponding path program 1 times [2018-11-28 12:16:16,554 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:16,554 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:16,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:16,555 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:16,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:16,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:16,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:16,616 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:16,616 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:16:16,616 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:16:16,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:16:16,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:16:16,616 INFO L87 Difference]: Start difference. First operand 19133 states and 57764 transitions. Second operand 5 states. [2018-11-28 12:16:16,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:16,830 INFO L93 Difference]: Finished difference Result 25024 states and 75018 transitions. [2018-11-28 12:16:16,831 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:16:16,831 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2018-11-28 12:16:16,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:16,856 INFO L225 Difference]: With dead ends: 25024 [2018-11-28 12:16:16,856 INFO L226 Difference]: Without dead ends: 25024 [2018-11-28 12:16:16,857 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:16:16,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25024 states. [2018-11-28 12:16:17,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25024 to 22709. [2018-11-28 12:16:17,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22709 states. [2018-11-28 12:16:17,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22709 states to 22709 states and 68032 transitions. [2018-11-28 12:16:17,107 INFO L78 Accepts]: Start accepts. Automaton has 22709 states and 68032 transitions. Word has length 66 [2018-11-28 12:16:17,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:17,107 INFO L480 AbstractCegarLoop]: Abstraction has 22709 states and 68032 transitions. [2018-11-28 12:16:17,107 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:16:17,107 INFO L276 IsEmpty]: Start isEmpty. Operand 22709 states and 68032 transitions. [2018-11-28 12:16:17,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 12:16:17,114 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:17,114 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:17,114 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:17,114 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:17,114 INFO L82 PathProgramCache]: Analyzing trace with hash -1882418455, now seen corresponding path program 1 times [2018-11-28 12:16:17,114 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:17,114 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:17,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:17,115 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:17,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:17,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:17,222 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:17,222 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:17,222 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:16:17,222 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:16:17,222 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:16:17,222 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:16:17,223 INFO L87 Difference]: Start difference. First operand 22709 states and 68032 transitions. Second operand 6 states. [2018-11-28 12:16:17,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:17,775 INFO L93 Difference]: Finished difference Result 30713 states and 93495 transitions. [2018-11-28 12:16:17,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 12:16:17,776 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2018-11-28 12:16:17,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:17,814 INFO L225 Difference]: With dead ends: 30713 [2018-11-28 12:16:17,814 INFO L226 Difference]: Without dead ends: 30609 [2018-11-28 12:16:17,814 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:16:17,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30609 states. [2018-11-28 12:16:18,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30609 to 27953. [2018-11-28 12:16:18,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27953 states. [2018-11-28 12:16:18,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27953 states to 27953 states and 84685 transitions. [2018-11-28 12:16:18,217 INFO L78 Accepts]: Start accepts. Automaton has 27953 states and 84685 transitions. Word has length 66 [2018-11-28 12:16:18,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:18,217 INFO L480 AbstractCegarLoop]: Abstraction has 27953 states and 84685 transitions. [2018-11-28 12:16:18,217 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:16:18,217 INFO L276 IsEmpty]: Start isEmpty. Operand 27953 states and 84685 transitions. [2018-11-28 12:16:18,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 12:16:18,225 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:18,226 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:18,226 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:18,226 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:18,226 INFO L82 PathProgramCache]: Analyzing trace with hash -74963992, now seen corresponding path program 1 times [2018-11-28 12:16:18,226 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:18,226 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:18,227 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:18,227 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:18,227 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:18,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:18,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:18,288 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:18,288 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:16:18,288 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:16:18,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:16:18,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:16:18,289 INFO L87 Difference]: Start difference. First operand 27953 states and 84685 transitions. Second operand 5 states. [2018-11-28 12:16:18,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:18,609 INFO L93 Difference]: Finished difference Result 40003 states and 119732 transitions. [2018-11-28 12:16:18,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 12:16:18,610 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2018-11-28 12:16:18,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:18,653 INFO L225 Difference]: With dead ends: 40003 [2018-11-28 12:16:18,653 INFO L226 Difference]: Without dead ends: 39851 [2018-11-28 12:16:18,654 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:16:18,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39851 states. [2018-11-28 12:16:18,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39851 to 35599. [2018-11-28 12:16:18,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35599 states. [2018-11-28 12:16:19,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35599 states to 35599 states and 107263 transitions. [2018-11-28 12:16:19,033 INFO L78 Accepts]: Start accepts. Automaton has 35599 states and 107263 transitions. Word has length 66 [2018-11-28 12:16:19,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:19,033 INFO L480 AbstractCegarLoop]: Abstraction has 35599 states and 107263 transitions. [2018-11-28 12:16:19,033 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:16:19,033 INFO L276 IsEmpty]: Start isEmpty. Operand 35599 states and 107263 transitions. [2018-11-28 12:16:19,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 12:16:19,041 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:19,041 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:19,041 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:19,042 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:19,042 INFO L82 PathProgramCache]: Analyzing trace with hash 615597482, now seen corresponding path program 1 times [2018-11-28 12:16:19,042 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:19,042 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:19,043 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:19,043 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:19,043 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:19,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:19,102 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:19,102 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:19,102 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:16:19,102 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:16:19,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:16:19,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:16:19,103 INFO L87 Difference]: Start difference. First operand 35599 states and 107263 transitions. Second operand 5 states. [2018-11-28 12:16:19,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:19,149 INFO L93 Difference]: Finished difference Result 9283 states and 22466 transitions. [2018-11-28 12:16:19,149 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 12:16:19,150 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2018-11-28 12:16:19,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:19,155 INFO L225 Difference]: With dead ends: 9283 [2018-11-28 12:16:19,155 INFO L226 Difference]: Without dead ends: 7431 [2018-11-28 12:16:19,155 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:16:19,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7431 states. [2018-11-28 12:16:19,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7431 to 6328. [2018-11-28 12:16:19,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6328 states. [2018-11-28 12:16:19,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6328 states to 6328 states and 14937 transitions. [2018-11-28 12:16:19,207 INFO L78 Accepts]: Start accepts. Automaton has 6328 states and 14937 transitions. Word has length 66 [2018-11-28 12:16:19,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:19,207 INFO L480 AbstractCegarLoop]: Abstraction has 6328 states and 14937 transitions. [2018-11-28 12:16:19,207 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:16:19,207 INFO L276 IsEmpty]: Start isEmpty. Operand 6328 states and 14937 transitions. [2018-11-28 12:16:19,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-28 12:16:19,211 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:19,211 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:19,212 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:19,212 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:19,212 INFO L82 PathProgramCache]: Analyzing trace with hash 890203314, now seen corresponding path program 1 times [2018-11-28 12:16:19,212 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:19,212 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:19,214 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:19,214 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:19,214 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:19,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:19,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:19,244 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:19,244 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:16:19,244 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:16:19,245 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:16:19,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:16:19,245 INFO L87 Difference]: Start difference. First operand 6328 states and 14937 transitions. Second operand 3 states. [2018-11-28 12:16:19,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:19,281 INFO L93 Difference]: Finished difference Result 8755 states and 20596 transitions. [2018-11-28 12:16:19,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:16:19,282 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2018-11-28 12:16:19,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:19,291 INFO L225 Difference]: With dead ends: 8755 [2018-11-28 12:16:19,291 INFO L226 Difference]: Without dead ends: 8755 [2018-11-28 12:16:19,291 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:16:19,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8755 states. [2018-11-28 12:16:19,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8755 to 6267. [2018-11-28 12:16:19,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6267 states. [2018-11-28 12:16:19,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6267 states to 6267 states and 14477 transitions. [2018-11-28 12:16:19,370 INFO L78 Accepts]: Start accepts. Automaton has 6267 states and 14477 transitions. Word has length 66 [2018-11-28 12:16:19,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:19,370 INFO L480 AbstractCegarLoop]: Abstraction has 6267 states and 14477 transitions. [2018-11-28 12:16:19,370 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:16:19,370 INFO L276 IsEmpty]: Start isEmpty. Operand 6267 states and 14477 transitions. [2018-11-28 12:16:19,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-28 12:16:19,379 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:19,379 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:19,379 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:19,379 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:19,380 INFO L82 PathProgramCache]: Analyzing trace with hash 1181781029, now seen corresponding path program 1 times [2018-11-28 12:16:19,380 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:19,381 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:19,383 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:19,383 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:19,383 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:19,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:19,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:19,430 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:19,430 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:16:19,430 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:16:19,430 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:16:19,430 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:16:19,430 INFO L87 Difference]: Start difference. First operand 6267 states and 14477 transitions. Second operand 5 states. [2018-11-28 12:16:19,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:19,596 INFO L93 Difference]: Finished difference Result 7437 states and 17118 transitions. [2018-11-28 12:16:19,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 12:16:19,597 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-11-28 12:16:19,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:19,605 INFO L225 Difference]: With dead ends: 7437 [2018-11-28 12:16:19,605 INFO L226 Difference]: Without dead ends: 7437 [2018-11-28 12:16:19,606 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:16:19,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7437 states. [2018-11-28 12:16:19,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7437 to 6711. [2018-11-28 12:16:19,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6711 states. [2018-11-28 12:16:19,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6711 states to 6711 states and 15481 transitions. [2018-11-28 12:16:19,666 INFO L78 Accepts]: Start accepts. Automaton has 6711 states and 15481 transitions. Word has length 72 [2018-11-28 12:16:19,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:19,666 INFO L480 AbstractCegarLoop]: Abstraction has 6711 states and 15481 transitions. [2018-11-28 12:16:19,666 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:16:19,666 INFO L276 IsEmpty]: Start isEmpty. Operand 6711 states and 15481 transitions. [2018-11-28 12:16:19,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-28 12:16:19,670 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:19,670 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:19,670 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:19,670 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:19,671 INFO L82 PathProgramCache]: Analyzing trace with hash -1370375932, now seen corresponding path program 1 times [2018-11-28 12:16:19,671 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:19,671 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:19,672 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:19,672 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:19,672 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:19,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:19,782 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:19,782 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:19,782 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-28 12:16:19,782 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 12:16:19,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 12:16:19,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:16:19,783 INFO L87 Difference]: Start difference. First operand 6711 states and 15481 transitions. Second operand 9 states. [2018-11-28 12:16:20,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:20,148 INFO L93 Difference]: Finished difference Result 8913 states and 20402 transitions. [2018-11-28 12:16:20,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-28 12:16:20,148 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 72 [2018-11-28 12:16:20,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:20,153 INFO L225 Difference]: With dead ends: 8913 [2018-11-28 12:16:20,154 INFO L226 Difference]: Without dead ends: 8794 [2018-11-28 12:16:20,154 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=74, Invalid=232, Unknown=0, NotChecked=0, Total=306 [2018-11-28 12:16:20,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8794 states. [2018-11-28 12:16:20,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8794 to 6808. [2018-11-28 12:16:20,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6808 states. [2018-11-28 12:16:20,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6808 states to 6808 states and 15574 transitions. [2018-11-28 12:16:20,204 INFO L78 Accepts]: Start accepts. Automaton has 6808 states and 15574 transitions. Word has length 72 [2018-11-28 12:16:20,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:20,205 INFO L480 AbstractCegarLoop]: Abstraction has 6808 states and 15574 transitions. [2018-11-28 12:16:20,205 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 12:16:20,205 INFO L276 IsEmpty]: Start isEmpty. Operand 6808 states and 15574 transitions. [2018-11-28 12:16:20,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-28 12:16:20,209 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:20,209 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:20,209 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:20,209 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:20,209 INFO L82 PathProgramCache]: Analyzing trace with hash -1134224255, now seen corresponding path program 1 times [2018-11-28 12:16:20,209 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:20,209 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:20,210 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:20,211 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:20,211 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:20,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:20,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:20,275 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:20,275 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:16:20,275 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:16:20,275 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:16:20,275 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:16:20,276 INFO L87 Difference]: Start difference. First operand 6808 states and 15574 transitions. Second operand 4 states. [2018-11-28 12:16:20,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:20,427 INFO L93 Difference]: Finished difference Result 10575 states and 24061 transitions. [2018-11-28 12:16:20,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:16:20,427 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 91 [2018-11-28 12:16:20,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:20,434 INFO L225 Difference]: With dead ends: 10575 [2018-11-28 12:16:20,434 INFO L226 Difference]: Without dead ends: 10575 [2018-11-28 12:16:20,434 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:16:20,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10575 states. [2018-11-28 12:16:20,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10575 to 7928. [2018-11-28 12:16:20,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7928 states. [2018-11-28 12:16:20,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7928 states to 7928 states and 17908 transitions. [2018-11-28 12:16:20,497 INFO L78 Accepts]: Start accepts. Automaton has 7928 states and 17908 transitions. Word has length 91 [2018-11-28 12:16:20,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:20,497 INFO L480 AbstractCegarLoop]: Abstraction has 7928 states and 17908 transitions. [2018-11-28 12:16:20,497 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:16:20,498 INFO L276 IsEmpty]: Start isEmpty. Operand 7928 states and 17908 transitions. [2018-11-28 12:16:20,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-28 12:16:20,502 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:20,503 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:20,503 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:20,503 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:20,503 INFO L82 PathProgramCache]: Analyzing trace with hash 2025505005, now seen corresponding path program 1 times [2018-11-28 12:16:20,503 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:20,503 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:20,504 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:20,504 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:20,504 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:20,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:20,571 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:20,571 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:20,571 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:16:20,572 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:16:20,572 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:16:20,572 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:16:20,572 INFO L87 Difference]: Start difference. First operand 7928 states and 17908 transitions. Second operand 4 states. [2018-11-28 12:16:20,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:20,635 INFO L93 Difference]: Finished difference Result 8493 states and 19201 transitions. [2018-11-28 12:16:20,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:16:20,635 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 91 [2018-11-28 12:16:20,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:20,641 INFO L225 Difference]: With dead ends: 8493 [2018-11-28 12:16:20,641 INFO L226 Difference]: Without dead ends: 8493 [2018-11-28 12:16:20,641 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:16:20,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8493 states. [2018-11-28 12:16:20,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8493 to 7834. [2018-11-28 12:16:20,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7834 states. [2018-11-28 12:16:20,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7834 states to 7834 states and 17803 transitions. [2018-11-28 12:16:20,697 INFO L78 Accepts]: Start accepts. Automaton has 7834 states and 17803 transitions. Word has length 91 [2018-11-28 12:16:20,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:20,697 INFO L480 AbstractCegarLoop]: Abstraction has 7834 states and 17803 transitions. [2018-11-28 12:16:20,697 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:16:20,697 INFO L276 IsEmpty]: Start isEmpty. Operand 7834 states and 17803 transitions. [2018-11-28 12:16:20,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 12:16:20,702 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:20,703 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:20,703 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:20,703 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:20,703 INFO L82 PathProgramCache]: Analyzing trace with hash 258796039, now seen corresponding path program 1 times [2018-11-28 12:16:20,703 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:20,703 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:20,704 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:20,704 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:20,704 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:20,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:20,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:20,824 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:20,824 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:16:20,824 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:16:20,825 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:16:20,825 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:16:20,825 INFO L87 Difference]: Start difference. First operand 7834 states and 17803 transitions. Second operand 7 states. [2018-11-28 12:16:21,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:21,549 INFO L93 Difference]: Finished difference Result 9672 states and 21911 transitions. [2018-11-28 12:16:21,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:16:21,550 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 93 [2018-11-28 12:16:21,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:21,557 INFO L225 Difference]: With dead ends: 9672 [2018-11-28 12:16:21,557 INFO L226 Difference]: Without dead ends: 9672 [2018-11-28 12:16:21,557 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:16:21,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9672 states. [2018-11-28 12:16:21,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9672 to 7946. [2018-11-28 12:16:21,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7946 states. [2018-11-28 12:16:21,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7946 states to 7946 states and 18123 transitions. [2018-11-28 12:16:21,626 INFO L78 Accepts]: Start accepts. Automaton has 7946 states and 18123 transitions. Word has length 93 [2018-11-28 12:16:21,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:21,626 INFO L480 AbstractCegarLoop]: Abstraction has 7946 states and 18123 transitions. [2018-11-28 12:16:21,626 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:16:21,626 INFO L276 IsEmpty]: Start isEmpty. Operand 7946 states and 18123 transitions. [2018-11-28 12:16:21,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 12:16:21,631 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:21,631 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:21,631 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:21,632 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:21,632 INFO L82 PathProgramCache]: Analyzing trace with hash -575446356, now seen corresponding path program 1 times [2018-11-28 12:16:21,632 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:21,632 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:21,633 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:21,633 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:21,633 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:21,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:21,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:21,703 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:21,703 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:16:21,703 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:16:21,703 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:16:21,703 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:16:21,704 INFO L87 Difference]: Start difference. First operand 7946 states and 18123 transitions. Second operand 5 states. [2018-11-28 12:16:21,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:21,767 INFO L93 Difference]: Finished difference Result 8853 states and 20081 transitions. [2018-11-28 12:16:21,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:16:21,767 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2018-11-28 12:16:21,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:21,773 INFO L225 Difference]: With dead ends: 8853 [2018-11-28 12:16:21,773 INFO L226 Difference]: Without dead ends: 8853 [2018-11-28 12:16:21,773 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:16:21,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8853 states. [2018-11-28 12:16:21,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8853 to 6842. [2018-11-28 12:16:21,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6842 states. [2018-11-28 12:16:21,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6842 states to 6842 states and 15642 transitions. [2018-11-28 12:16:21,824 INFO L78 Accepts]: Start accepts. Automaton has 6842 states and 15642 transitions. Word has length 93 [2018-11-28 12:16:21,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:21,824 INFO L480 AbstractCegarLoop]: Abstraction has 6842 states and 15642 transitions. [2018-11-28 12:16:21,825 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:16:21,825 INFO L276 IsEmpty]: Start isEmpty. Operand 6842 states and 15642 transitions. [2018-11-28 12:16:21,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 12:16:21,831 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:21,832 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:21,832 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:21,832 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:21,832 INFO L82 PathProgramCache]: Analyzing trace with hash -830182901, now seen corresponding path program 1 times [2018-11-28 12:16:21,832 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:21,832 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:21,833 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:21,833 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:21,833 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:21,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:21,909 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:21,910 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:21,910 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:16:21,910 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:16:21,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:16:21,910 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:16:21,910 INFO L87 Difference]: Start difference. First operand 6842 states and 15642 transitions. Second operand 5 states. [2018-11-28 12:16:22,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:22,176 INFO L93 Difference]: Finished difference Result 11344 states and 26131 transitions. [2018-11-28 12:16:22,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 12:16:22,177 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2018-11-28 12:16:22,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:22,187 INFO L225 Difference]: With dead ends: 11344 [2018-11-28 12:16:22,187 INFO L226 Difference]: Without dead ends: 11266 [2018-11-28 12:16:22,187 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:16:22,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11266 states. [2018-11-28 12:16:22,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11266 to 7983. [2018-11-28 12:16:22,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7983 states. [2018-11-28 12:16:22,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7983 states to 7983 states and 18289 transitions. [2018-11-28 12:16:22,287 INFO L78 Accepts]: Start accepts. Automaton has 7983 states and 18289 transitions. Word has length 93 [2018-11-28 12:16:22,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:22,287 INFO L480 AbstractCegarLoop]: Abstraction has 7983 states and 18289 transitions. [2018-11-28 12:16:22,287 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:16:22,287 INFO L276 IsEmpty]: Start isEmpty. Operand 7983 states and 18289 transitions. [2018-11-28 12:16:22,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 12:16:22,295 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:22,295 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:22,295 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:22,295 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:22,295 INFO L82 PathProgramCache]: Analyzing trace with hash 414581580, now seen corresponding path program 1 times [2018-11-28 12:16:22,296 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:22,296 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:22,297 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:22,297 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:22,297 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:22,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:22,362 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:22,362 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:22,362 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:16:22,362 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:16:22,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:16:22,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:16:22,363 INFO L87 Difference]: Start difference. First operand 7983 states and 18289 transitions. Second operand 6 states. [2018-11-28 12:16:22,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:22,631 INFO L93 Difference]: Finished difference Result 10118 states and 23011 transitions. [2018-11-28 12:16:22,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 12:16:22,632 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2018-11-28 12:16:22,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:22,638 INFO L225 Difference]: With dead ends: 10118 [2018-11-28 12:16:22,638 INFO L226 Difference]: Without dead ends: 10039 [2018-11-28 12:16:22,638 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-11-28 12:16:22,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10039 states. [2018-11-28 12:16:22,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10039 to 7582. [2018-11-28 12:16:22,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7582 states. [2018-11-28 12:16:22,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7582 states to 7582 states and 17399 transitions. [2018-11-28 12:16:22,699 INFO L78 Accepts]: Start accepts. Automaton has 7582 states and 17399 transitions. Word has length 93 [2018-11-28 12:16:22,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:22,700 INFO L480 AbstractCegarLoop]: Abstraction has 7582 states and 17399 transitions. [2018-11-28 12:16:22,700 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:16:22,700 INFO L276 IsEmpty]: Start isEmpty. Operand 7582 states and 17399 transitions. [2018-11-28 12:16:22,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 12:16:22,704 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:22,705 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:22,705 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:22,705 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:22,705 INFO L82 PathProgramCache]: Analyzing trace with hash -823395341, now seen corresponding path program 1 times [2018-11-28 12:16:22,705 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:22,705 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:22,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:22,706 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:22,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:22,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:22,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:22,795 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:22,795 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-28 12:16:22,796 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 12:16:22,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 12:16:22,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:16:22,796 INFO L87 Difference]: Start difference. First operand 7582 states and 17399 transitions. Second operand 9 states. [2018-11-28 12:16:23,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:23,155 INFO L93 Difference]: Finished difference Result 10662 states and 24405 transitions. [2018-11-28 12:16:23,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-28 12:16:23,156 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 93 [2018-11-28 12:16:23,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:23,163 INFO L225 Difference]: With dead ends: 10662 [2018-11-28 12:16:23,163 INFO L226 Difference]: Without dead ends: 10630 [2018-11-28 12:16:23,163 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=245, Unknown=0, NotChecked=0, Total=306 [2018-11-28 12:16:23,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10630 states. [2018-11-28 12:16:23,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10630 to 9163. [2018-11-28 12:16:23,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9163 states. [2018-11-28 12:16:23,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9163 states to 9163 states and 20929 transitions. [2018-11-28 12:16:23,241 INFO L78 Accepts]: Start accepts. Automaton has 9163 states and 20929 transitions. Word has length 93 [2018-11-28 12:16:23,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:23,241 INFO L480 AbstractCegarLoop]: Abstraction has 9163 states and 20929 transitions. [2018-11-28 12:16:23,241 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 12:16:23,241 INFO L276 IsEmpty]: Start isEmpty. Operand 9163 states and 20929 transitions. [2018-11-28 12:16:23,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 12:16:23,248 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:23,248 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:23,248 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:23,248 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:23,248 INFO L82 PathProgramCache]: Analyzing trace with hash 1674620596, now seen corresponding path program 1 times [2018-11-28 12:16:23,248 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:23,248 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:23,249 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:23,249 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:23,249 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:23,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:23,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:23,342 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:23,342 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 12:16:23,342 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 12:16:23,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 12:16:23,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:16:23,343 INFO L87 Difference]: Start difference. First operand 9163 states and 20929 transitions. Second operand 8 states. [2018-11-28 12:16:23,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:23,818 INFO L93 Difference]: Finished difference Result 14219 states and 32893 transitions. [2018-11-28 12:16:23,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-28 12:16:23,819 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 93 [2018-11-28 12:16:23,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:23,830 INFO L225 Difference]: With dead ends: 14219 [2018-11-28 12:16:23,830 INFO L226 Difference]: Without dead ends: 14219 [2018-11-28 12:16:23,830 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-11-28 12:16:23,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14219 states. [2018-11-28 12:16:23,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14219 to 9753. [2018-11-28 12:16:23,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9753 states. [2018-11-28 12:16:23,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9753 states to 9753 states and 22460 transitions. [2018-11-28 12:16:23,949 INFO L78 Accepts]: Start accepts. Automaton has 9753 states and 22460 transitions. Word has length 93 [2018-11-28 12:16:23,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:23,949 INFO L480 AbstractCegarLoop]: Abstraction has 9753 states and 22460 transitions. [2018-11-28 12:16:23,949 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 12:16:23,949 INFO L276 IsEmpty]: Start isEmpty. Operand 9753 states and 22460 transitions. [2018-11-28 12:16:23,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 12:16:23,958 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:23,958 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:23,958 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:23,959 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:23,959 INFO L82 PathProgramCache]: Analyzing trace with hash -1732843019, now seen corresponding path program 1 times [2018-11-28 12:16:23,959 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:23,959 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:23,960 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:23,960 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:23,960 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:23,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:24,079 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:24,079 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:24,079 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-28 12:16:24,080 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 12:16:24,080 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 12:16:24,080 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-11-28 12:16:24,080 INFO L87 Difference]: Start difference. First operand 9753 states and 22460 transitions. Second operand 10 states. [2018-11-28 12:16:24,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:24,531 INFO L93 Difference]: Finished difference Result 13625 states and 31492 transitions. [2018-11-28 12:16:24,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-28 12:16:24,531 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 93 [2018-11-28 12:16:24,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:24,541 INFO L225 Difference]: With dead ends: 13625 [2018-11-28 12:16:24,541 INFO L226 Difference]: Without dead ends: 13625 [2018-11-28 12:16:24,542 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2018-11-28 12:16:24,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13625 states. [2018-11-28 12:16:24,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13625 to 10970. [2018-11-28 12:16:24,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10970 states. [2018-11-28 12:16:24,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10970 states to 10970 states and 25091 transitions. [2018-11-28 12:16:24,642 INFO L78 Accepts]: Start accepts. Automaton has 10970 states and 25091 transitions. Word has length 93 [2018-11-28 12:16:24,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:24,642 INFO L480 AbstractCegarLoop]: Abstraction has 10970 states and 25091 transitions. [2018-11-28 12:16:24,643 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 12:16:24,643 INFO L276 IsEmpty]: Start isEmpty. Operand 10970 states and 25091 transitions. [2018-11-28 12:16:24,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 12:16:24,655 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:24,655 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:24,655 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:24,656 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:24,656 INFO L82 PathProgramCache]: Analyzing trace with hash 830148725, now seen corresponding path program 1 times [2018-11-28 12:16:24,656 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:24,656 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:24,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:24,657 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:24,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:24,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:24,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:24,768 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:24,768 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:16:24,768 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:16:24,768 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:16:24,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:16:24,769 INFO L87 Difference]: Start difference. First operand 10970 states and 25091 transitions. Second operand 6 states. [2018-11-28 12:16:24,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:24,863 INFO L93 Difference]: Finished difference Result 10490 states and 23635 transitions. [2018-11-28 12:16:24,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:16:24,863 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2018-11-28 12:16:24,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:24,871 INFO L225 Difference]: With dead ends: 10490 [2018-11-28 12:16:24,871 INFO L226 Difference]: Without dead ends: 10490 [2018-11-28 12:16:24,871 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:16:24,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10490 states. [2018-11-28 12:16:24,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10490 to 7136. [2018-11-28 12:16:24,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7136 states. [2018-11-28 12:16:24,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7136 states to 7136 states and 16093 transitions. [2018-11-28 12:16:24,944 INFO L78 Accepts]: Start accepts. Automaton has 7136 states and 16093 transitions. Word has length 93 [2018-11-28 12:16:24,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:24,944 INFO L480 AbstractCegarLoop]: Abstraction has 7136 states and 16093 transitions. [2018-11-28 12:16:24,944 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:16:24,944 INFO L276 IsEmpty]: Start isEmpty. Operand 7136 states and 16093 transitions. [2018-11-28 12:16:24,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-28 12:16:24,949 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:24,949 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:24,950 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:24,950 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:24,950 INFO L82 PathProgramCache]: Analyzing trace with hash 668278419, now seen corresponding path program 1 times [2018-11-28 12:16:24,950 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:24,950 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:24,951 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:24,951 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:24,951 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:24,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:25,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:25,099 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:25,099 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-28 12:16:25,099 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 12:16:25,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 12:16:25,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:16:25,100 INFO L87 Difference]: Start difference. First operand 7136 states and 16093 transitions. Second operand 9 states. [2018-11-28 12:16:25,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:25,397 INFO L93 Difference]: Finished difference Result 8480 states and 18944 transitions. [2018-11-28 12:16:25,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-28 12:16:25,397 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 95 [2018-11-28 12:16:25,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:25,403 INFO L225 Difference]: With dead ends: 8480 [2018-11-28 12:16:25,403 INFO L226 Difference]: Without dead ends: 8480 [2018-11-28 12:16:25,404 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=305, Unknown=0, NotChecked=0, Total=420 [2018-11-28 12:16:25,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8480 states. [2018-11-28 12:16:25,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8480 to 8214. [2018-11-28 12:16:25,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8214 states. [2018-11-28 12:16:25,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8214 states to 8214 states and 18420 transitions. [2018-11-28 12:16:25,468 INFO L78 Accepts]: Start accepts. Automaton has 8214 states and 18420 transitions. Word has length 95 [2018-11-28 12:16:25,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:25,468 INFO L480 AbstractCegarLoop]: Abstraction has 8214 states and 18420 transitions. [2018-11-28 12:16:25,468 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 12:16:25,468 INFO L276 IsEmpty]: Start isEmpty. Operand 8214 states and 18420 transitions. [2018-11-28 12:16:25,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-28 12:16:25,473 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:25,473 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:25,474 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:25,474 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:25,474 INFO L82 PathProgramCache]: Analyzing trace with hash 1555782100, now seen corresponding path program 1 times [2018-11-28 12:16:25,474 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:25,474 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:25,475 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:25,475 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:25,475 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:25,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:25,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:25,593 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:25,593 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-28 12:16:25,593 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 12:16:25,593 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 12:16:25,593 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-11-28 12:16:25,593 INFO L87 Difference]: Start difference. First operand 8214 states and 18420 transitions. Second operand 11 states. [2018-11-28 12:16:26,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:26,362 INFO L93 Difference]: Finished difference Result 15152 states and 34122 transitions. [2018-11-28 12:16:26,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-28 12:16:26,363 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 95 [2018-11-28 12:16:26,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:26,370 INFO L225 Difference]: With dead ends: 15152 [2018-11-28 12:16:26,370 INFO L226 Difference]: Without dead ends: 10596 [2018-11-28 12:16:26,371 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=86, Invalid=376, Unknown=0, NotChecked=0, Total=462 [2018-11-28 12:16:26,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10596 states. [2018-11-28 12:16:26,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10596 to 7968. [2018-11-28 12:16:26,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7968 states. [2018-11-28 12:16:26,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7968 states to 7968 states and 17844 transitions. [2018-11-28 12:16:26,436 INFO L78 Accepts]: Start accepts. Automaton has 7968 states and 17844 transitions. Word has length 95 [2018-11-28 12:16:26,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:26,436 INFO L480 AbstractCegarLoop]: Abstraction has 7968 states and 17844 transitions. [2018-11-28 12:16:26,437 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 12:16:26,437 INFO L276 IsEmpty]: Start isEmpty. Operand 7968 states and 17844 transitions. [2018-11-28 12:16:26,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-28 12:16:26,442 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:26,442 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:26,442 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:26,442 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:26,443 INFO L82 PathProgramCache]: Analyzing trace with hash 2034339057, now seen corresponding path program 1 times [2018-11-28 12:16:26,443 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:26,443 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:26,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:26,444 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:26,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:26,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:26,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:26,590 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:26,590 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:16:26,591 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:16:26,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:16:26,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:16:26,591 INFO L87 Difference]: Start difference. First operand 7968 states and 17844 transitions. Second operand 6 states. [2018-11-28 12:16:26,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:26,800 INFO L93 Difference]: Finished difference Result 8947 states and 19761 transitions. [2018-11-28 12:16:26,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:16:26,800 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-28 12:16:26,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:26,806 INFO L225 Difference]: With dead ends: 8947 [2018-11-28 12:16:26,806 INFO L226 Difference]: Without dead ends: 8890 [2018-11-28 12:16:26,807 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:16:26,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8890 states. [2018-11-28 12:16:26,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8890 to 7966. [2018-11-28 12:16:26,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7966 states. [2018-11-28 12:16:26,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7966 states to 7966 states and 17669 transitions. [2018-11-28 12:16:26,875 INFO L78 Accepts]: Start accepts. Automaton has 7966 states and 17669 transitions. Word has length 95 [2018-11-28 12:16:26,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:26,875 INFO L480 AbstractCegarLoop]: Abstraction has 7966 states and 17669 transitions. [2018-11-28 12:16:26,876 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:16:26,876 INFO L276 IsEmpty]: Start isEmpty. Operand 7966 states and 17669 transitions. [2018-11-28 12:16:26,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-28 12:16:26,881 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:26,881 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:26,882 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:26,882 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:26,882 INFO L82 PathProgramCache]: Analyzing trace with hash 1697868305, now seen corresponding path program 2 times [2018-11-28 12:16:26,882 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:26,882 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:26,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:26,883 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:16:26,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:26,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:16:26,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:16:26,941 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:16:26,941 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:16:26,942 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:16:26,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:16:26,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:16:26,942 INFO L87 Difference]: Start difference. First operand 7966 states and 17669 transitions. Second operand 6 states. [2018-11-28 12:16:27,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:16:27,061 INFO L93 Difference]: Finished difference Result 8186 states and 18114 transitions. [2018-11-28 12:16:27,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 12:16:27,061 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-28 12:16:27,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:16:27,067 INFO L225 Difference]: With dead ends: 8186 [2018-11-28 12:16:27,067 INFO L226 Difference]: Without dead ends: 8186 [2018-11-28 12:16:27,067 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:16:27,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8186 states. [2018-11-28 12:16:27,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8186 to 7872. [2018-11-28 12:16:27,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7872 states. [2018-11-28 12:16:27,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7872 states to 7872 states and 17459 transitions. [2018-11-28 12:16:27,125 INFO L78 Accepts]: Start accepts. Automaton has 7872 states and 17459 transitions. Word has length 95 [2018-11-28 12:16:27,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:16:27,125 INFO L480 AbstractCegarLoop]: Abstraction has 7872 states and 17459 transitions. [2018-11-28 12:16:27,125 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:16:27,125 INFO L276 IsEmpty]: Start isEmpty. Operand 7872 states and 17459 transitions. [2018-11-28 12:16:27,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-28 12:16:27,131 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:16:27,131 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:16:27,131 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:16:27,131 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:16:27,131 INFO L82 PathProgramCache]: Analyzing trace with hash -1930862478, now seen corresponding path program 2 times [2018-11-28 12:16:27,132 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:16:27,132 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:16:27,132 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:27,133 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 12:16:27,133 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:16:27,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 12:16:27,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 12:16:27,181 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 12:16:27,279 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-28 12:16:27,281 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 12:16:27 BasicIcfg [2018-11-28 12:16:27,281 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 12:16:27,281 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 12:16:27,281 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 12:16:27,281 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 12:16:27,282 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:16:05" (3/4) ... [2018-11-28 12:16:27,284 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-28 12:16:27,391 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_79e9a364-b202-4a55-b26f-07e8db2a1324/bin-2019/uautomizer/witness.graphml [2018-11-28 12:16:27,391 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 12:16:27,392 INFO L168 Benchmark]: Toolchain (without parser) took 23108.75 ms. Allocated memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: 1.6 GB). Free memory was 949.6 MB in the beginning and 1.1 GB in the end (delta: -144.7 MB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2018-11-28 12:16:27,393 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 12:16:27,393 INFO L168 Benchmark]: CACSL2BoogieTranslator took 447.91 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.7 MB). Free memory was 949.6 MB in the beginning and 1.1 GB in the end (delta: -172.1 MB). Peak memory consumption was 34.0 MB. Max. memory is 11.5 GB. [2018-11-28 12:16:27,393 INFO L168 Benchmark]: Boogie Procedure Inliner took 47.38 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-11-28 12:16:27,393 INFO L168 Benchmark]: Boogie Preprocessor took 31.45 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-11-28 12:16:27,393 INFO L168 Benchmark]: RCFGBuilder took 546.64 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 54.9 MB). Peak memory consumption was 54.9 MB. Max. memory is 11.5 GB. [2018-11-28 12:16:27,394 INFO L168 Benchmark]: TraceAbstraction took 21922.19 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: -66.1 MB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. [2018-11-28 12:16:27,394 INFO L168 Benchmark]: Witness Printer took 109.66 ms. Allocated memory is still 2.6 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 31.8 MB). Peak memory consumption was 31.8 MB. Max. memory is 11.5 GB. [2018-11-28 12:16:27,396 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 447.91 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.7 MB). Free memory was 949.6 MB in the beginning and 1.1 GB in the end (delta: -172.1 MB). Peak memory consumption was 34.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 47.38 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 31.45 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 546.64 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 54.9 MB). Peak memory consumption was 54.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 21922.19 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: -66.1 MB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. * Witness Printer took 109.66 ms. Allocated memory is still 2.6 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 31.8 MB). Peak memory consumption was 31.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L675] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L676] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L677] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L679] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L681] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L682] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L683] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L684] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L685] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L686] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L687] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L688] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L689] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L690] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L691] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L692] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L693] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L694] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L695] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L696] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L697] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L770] -1 pthread_t t1553; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L771] FCALL, FORK -1 pthread_create(&t1553, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L701] 0 y$w_buff1 = y$w_buff0 [L702] 0 y$w_buff0 = 1 [L703] 0 y$w_buff1_used = y$w_buff0_used [L704] 0 y$w_buff0_used = (_Bool)1 [L772] -1 pthread_t t1554; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L773] FCALL, FORK -1 pthread_create(&t1554, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L706] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L707] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L708] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L709] 0 y$r_buff0_thd1 = (_Bool)1 [L712] 0 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L715] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L729] 1 x = 1 [L732] 1 weak$$choice0 = __VERIFIER_nondet_pointer() [L733] 1 weak$$choice2 = __VERIFIER_nondet_pointer() [L734] 1 y$flush_delayed = weak$$choice2 [L735] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L737] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L737] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L738] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L738] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L739] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L739] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L740] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L741] EXPR 1 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L741] 1 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L742] EXPR 1 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L742] 1 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L743] 1 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L744] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L715] 0 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L744] 1 y = y$flush_delayed ? y$mem_tmp : y [L745] 1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L716] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L716] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L717] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L718] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 0 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L719] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L719] 0 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L722] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L748] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L748] EXPR 1 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L748] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L748] 1 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L749] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L749] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L750] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L750] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L751] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L751] 1 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L752] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L752] 1 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L755] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L775] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L780] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L780] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L781] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L782] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L782] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L783] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L783] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L786] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 222 locations, 3 error locations. UNSAFE Result, 21.8s OverallTime, 33 OverallIterations, 1 TraceHistogramMax, 10.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 8572 SDtfs, 9934 SDslu, 21018 SDs, 0 SdLazy, 9879 SolverSat, 478 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 355 GetRequests, 88 SyntacticMatches, 32 SemanticMatches, 235 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 324 ImplicationChecksByTransitivity, 2.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=35599occurred in iteration=14, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 5.2s AutomataMinimizationTime, 32 MinimizatonAttempts, 84410 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.2s InterpolantComputationTime, 2479 NumberOfCodeBlocks, 2479 NumberOfCodeBlocksAsserted, 33 NumberOfCheckSat, 2352 ConstructedInterpolants, 0 QuantifiedInterpolants, 529643 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 32 InterpolantComputations, 32 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...