./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi010_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0cd3be1d Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi010_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash df6b0475df83f06f064c78d3a4d54c725d19829e ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-0cd3be1 [2018-11-28 12:30:26,298 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 12:30:26,299 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 12:30:26,307 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 12:30:26,307 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 12:30:26,307 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 12:30:26,308 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 12:30:26,309 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 12:30:26,311 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 12:30:26,311 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 12:30:26,312 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 12:30:26,312 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 12:30:26,312 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 12:30:26,313 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 12:30:26,314 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 12:30:26,314 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 12:30:26,314 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 12:30:26,316 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 12:30:26,317 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 12:30:26,318 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 12:30:26,319 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 12:30:26,320 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 12:30:26,321 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 12:30:26,321 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 12:30:26,322 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 12:30:26,322 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 12:30:26,323 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 12:30:26,323 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 12:30:26,324 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 12:30:26,324 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 12:30:26,324 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 12:30:26,325 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 12:30:26,325 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 12:30:26,325 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 12:30:26,325 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 12:30:26,326 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 12:30:26,326 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-28 12:30:26,333 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 12:30:26,333 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 12:30:26,333 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 12:30:26,333 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 12:30:26,334 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 12:30:26,334 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 12:30:26,334 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 12:30:26,334 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 12:30:26,334 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 12:30:26,334 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 12:30:26,335 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 12:30:26,335 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 12:30:26,335 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-28 12:30:26,335 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 12:30:26,335 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-28 12:30:26,335 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 12:30:26,335 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-28 12:30:26,336 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 12:30:26,336 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-28 12:30:26,336 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 12:30:26,336 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 12:30:26,336 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 12:30:26,336 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 12:30:26,337 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 12:30:26,337 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 12:30:26,337 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 12:30:26,337 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-28 12:30:26,337 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-28 12:30:26,337 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 12:30:26,337 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-28 12:30:26,338 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> df6b0475df83f06f064c78d3a4d54c725d19829e [2018-11-28 12:30:26,362 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 12:30:26,371 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 12:30:26,374 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 12:30:26,375 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 12:30:26,375 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 12:30:26,376 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi010_power.opt_false-unreach-call.i [2018-11-28 12:30:26,416 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer/data/48b7a0651/ce24e2c8105247d78c2bfa6d62e98a69/FLAGf96b2be6a [2018-11-28 12:30:26,862 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 12:30:26,862 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/sv-benchmarks/c/pthread-wmm/rfi010_power.opt_false-unreach-call.i [2018-11-28 12:30:26,869 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer/data/48b7a0651/ce24e2c8105247d78c2bfa6d62e98a69/FLAGf96b2be6a [2018-11-28 12:30:26,879 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer/data/48b7a0651/ce24e2c8105247d78c2bfa6d62e98a69 [2018-11-28 12:30:26,881 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 12:30:26,882 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-28 12:30:26,882 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 12:30:26,882 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 12:30:26,885 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 12:30:26,886 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:30:26" (1/1) ... [2018-11-28 12:30:26,888 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3592b053 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:30:26, skipping insertion in model container [2018-11-28 12:30:26,888 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:30:26" (1/1) ... [2018-11-28 12:30:26,893 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 12:30:26,925 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 12:30:27,157 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 12:30:27,168 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 12:30:27,275 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 12:30:27,325 INFO L195 MainTranslator]: Completed translation [2018-11-28 12:30:27,325 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:30:27 WrapperNode [2018-11-28 12:30:27,325 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 12:30:27,326 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-28 12:30:27,326 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-28 12:30:27,326 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-28 12:30:27,334 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:30:27" (1/1) ... [2018-11-28 12:30:27,346 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:30:27" (1/1) ... [2018-11-28 12:30:27,364 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-28 12:30:27,364 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 12:30:27,364 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 12:30:27,364 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 12:30:27,370 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:30:27" (1/1) ... [2018-11-28 12:30:27,370 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:30:27" (1/1) ... [2018-11-28 12:30:27,374 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:30:27" (1/1) ... [2018-11-28 12:30:27,374 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:30:27" (1/1) ... [2018-11-28 12:30:27,382 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:30:27" (1/1) ... [2018-11-28 12:30:27,386 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:30:27" (1/1) ... [2018-11-28 12:30:27,389 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:30:27" (1/1) ... [2018-11-28 12:30:27,392 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 12:30:27,392 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 12:30:27,393 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 12:30:27,393 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 12:30:27,394 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:30:27" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 12:30:27,442 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 12:30:27,442 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-28 12:30:27,442 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-28 12:30:27,442 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 12:30:27,442 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-28 12:30:27,442 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-28 12:30:27,443 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-28 12:30:27,443 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-28 12:30:27,443 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-28 12:30:27,443 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 12:30:27,443 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 12:30:27,444 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-28 12:30:28,023 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 12:30:28,023 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-28 12:30:28,023 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:30:28 BoogieIcfgContainer [2018-11-28 12:30:28,023 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 12:30:28,024 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 12:30:28,024 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 12:30:28,027 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 12:30:28,027 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 12:30:26" (1/3) ... [2018-11-28 12:30:28,027 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5699532c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:30:28, skipping insertion in model container [2018-11-28 12:30:28,028 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:30:27" (2/3) ... [2018-11-28 12:30:28,028 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5699532c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:30:28, skipping insertion in model container [2018-11-28 12:30:28,028 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:30:28" (3/3) ... [2018-11-28 12:30:28,029 INFO L112 eAbstractionObserver]: Analyzing ICFG rfi010_power.opt_false-unreach-call.i [2018-11-28 12:30:28,063 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,063 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,063 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,063 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,063 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,063 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,063 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,064 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,064 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,064 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,064 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,064 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,064 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,065 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,065 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,065 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,065 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,065 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,065 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,065 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,066 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,066 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,066 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,066 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,066 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,066 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,066 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,067 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,067 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,067 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,067 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,067 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,067 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,068 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,068 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,068 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,068 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,068 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,068 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,069 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,069 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,069 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,069 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,069 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,069 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,070 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,070 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,070 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,070 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,070 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,070 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,071 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,071 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,071 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,071 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,071 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,071 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,072 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,072 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,072 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,072 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,072 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,073 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,073 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,073 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,073 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,073 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,073 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,074 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,074 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,074 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,074 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,074 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,074 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,075 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,075 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,075 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,075 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,075 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,075 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,076 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,076 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,076 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,076 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,076 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,076 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,077 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,077 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,077 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,077 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,077 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,077 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,077 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,077 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,078 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,078 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,078 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,078 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,079 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,079 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,079 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,079 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,079 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,079 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,079 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,080 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,080 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,080 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,080 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,080 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,080 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,081 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,081 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,081 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,082 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,082 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,083 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,083 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,083 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,083 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,083 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,083 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,083 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,084 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,084 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,084 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,084 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,084 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,084 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,084 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,085 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,085 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,085 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,085 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,085 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,085 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,085 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,085 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,086 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,086 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,087 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,087 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,087 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,087 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,087 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,087 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,088 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,088 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,088 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,088 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,088 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,088 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,088 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,089 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,089 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,089 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,089 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,089 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,089 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,089 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,089 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,090 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,090 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,090 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,090 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,090 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,090 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,090 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,090 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,091 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,091 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,091 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,091 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,091 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,091 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,091 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,091 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,092 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,092 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,092 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,092 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,092 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,092 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,092 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,092 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,093 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,093 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,093 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,093 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,093 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,093 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,093 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,094 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,094 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,094 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,094 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,094 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,094 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,095 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,095 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,095 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,095 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,095 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,095 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,096 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,096 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,096 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,096 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,096 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,096 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,096 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,097 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,097 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,097 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,097 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,097 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,097 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,097 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,097 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet56.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,097 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet56.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,098 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,098 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,098 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet56.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,098 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet56.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:30:28,114 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-28 12:30:28,114 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 12:30:28,121 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-28 12:30:28,132 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-28 12:30:28,148 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 12:30:28,149 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 12:30:28,149 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-28 12:30:28,149 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 12:30:28,149 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 12:30:28,149 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 12:30:28,149 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 12:30:28,149 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 12:30:28,149 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 12:30:28,159 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 173places, 226 transitions [2018-11-28 12:30:35,334 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 83127 states. [2018-11-28 12:30:35,335 INFO L276 IsEmpty]: Start isEmpty. Operand 83127 states. [2018-11-28 12:30:35,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-28 12:30:35,341 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:30:35,341 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:30:35,343 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:30:35,347 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:30:35,348 INFO L82 PathProgramCache]: Analyzing trace with hash -1645016021, now seen corresponding path program 1 times [2018-11-28 12:30:35,349 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:30:35,349 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:30:35,389 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:30:35,389 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:30:35,389 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:30:35,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:30:35,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:30:35,520 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:30:35,520 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:30:35,522 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:30:35,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:30:35,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:30:35,533 INFO L87 Difference]: Start difference. First operand 83127 states. Second operand 4 states. [2018-11-28 12:30:36,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:30:36,565 INFO L93 Difference]: Finished difference Result 150583 states and 603160 transitions. [2018-11-28 12:30:36,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:30:36,566 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2018-11-28 12:30:36,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:30:37,241 INFO L225 Difference]: With dead ends: 150583 [2018-11-28 12:30:37,241 INFO L226 Difference]: Without dead ends: 105839 [2018-11-28 12:30:37,242 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:30:38,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105839 states. [2018-11-28 12:30:39,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105839 to 61235. [2018-11-28 12:30:39,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61235 states. [2018-11-28 12:30:39,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61235 states to 61235 states and 248290 transitions. [2018-11-28 12:30:39,589 INFO L78 Accepts]: Start accepts. Automaton has 61235 states and 248290 transitions. Word has length 38 [2018-11-28 12:30:39,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:30:39,590 INFO L480 AbstractCegarLoop]: Abstraction has 61235 states and 248290 transitions. [2018-11-28 12:30:39,590 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:30:39,590 INFO L276 IsEmpty]: Start isEmpty. Operand 61235 states and 248290 transitions. [2018-11-28 12:30:39,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-28 12:30:39,597 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:30:39,600 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:30:39,600 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:30:39,600 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:30:39,600 INFO L82 PathProgramCache]: Analyzing trace with hash 1043746306, now seen corresponding path program 1 times [2018-11-28 12:30:39,601 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:30:39,601 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:30:39,603 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:30:39,604 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:30:39,604 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:30:39,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:30:39,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:30:39,664 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:30:39,664 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:30:39,666 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:30:39,666 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:30:39,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:30:39,666 INFO L87 Difference]: Start difference. First operand 61235 states and 248290 transitions. Second operand 5 states. [2018-11-28 12:30:41,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:30:41,191 INFO L93 Difference]: Finished difference Result 146039 states and 554300 transitions. [2018-11-28 12:30:41,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 12:30:41,191 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2018-11-28 12:30:41,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:30:41,531 INFO L225 Difference]: With dead ends: 146039 [2018-11-28 12:30:41,531 INFO L226 Difference]: Without dead ends: 145471 [2018-11-28 12:30:41,531 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:30:42,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145471 states. [2018-11-28 12:30:44,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145471 to 96613. [2018-11-28 12:30:44,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96613 states. [2018-11-28 12:30:44,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96613 states to 96613 states and 368455 transitions. [2018-11-28 12:30:44,470 INFO L78 Accepts]: Start accepts. Automaton has 96613 states and 368455 transitions. Word has length 46 [2018-11-28 12:30:44,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:30:44,471 INFO L480 AbstractCegarLoop]: Abstraction has 96613 states and 368455 transitions. [2018-11-28 12:30:44,471 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:30:44,471 INFO L276 IsEmpty]: Start isEmpty. Operand 96613 states and 368455 transitions. [2018-11-28 12:30:44,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 12:30:44,475 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:30:44,475 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:30:44,475 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:30:44,475 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:30:44,475 INFO L82 PathProgramCache]: Analyzing trace with hash 136646938, now seen corresponding path program 1 times [2018-11-28 12:30:44,475 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:30:44,475 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:30:44,478 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:30:44,478 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:30:44,478 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:30:44,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:30:44,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:30:44,557 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:30:44,557 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:30:44,557 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:30:44,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:30:44,558 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:30:44,558 INFO L87 Difference]: Start difference. First operand 96613 states and 368455 transitions. Second operand 5 states. [2018-11-28 12:30:46,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:30:46,014 INFO L93 Difference]: Finished difference Result 199269 states and 748089 transitions. [2018-11-28 12:30:46,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 12:30:46,015 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-11-28 12:30:46,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:30:46,499 INFO L225 Difference]: With dead ends: 199269 [2018-11-28 12:30:46,499 INFO L226 Difference]: Without dead ends: 198805 [2018-11-28 12:30:46,499 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:30:47,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198805 states. [2018-11-28 12:30:52,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198805 to 108296. [2018-11-28 12:30:52,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108296 states. [2018-11-28 12:30:52,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108296 states to 108296 states and 408659 transitions. [2018-11-28 12:30:52,946 INFO L78 Accepts]: Start accepts. Automaton has 108296 states and 408659 transitions. Word has length 47 [2018-11-28 12:30:52,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:30:52,946 INFO L480 AbstractCegarLoop]: Abstraction has 108296 states and 408659 transitions. [2018-11-28 12:30:52,946 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:30:52,947 INFO L276 IsEmpty]: Start isEmpty. Operand 108296 states and 408659 transitions. [2018-11-28 12:30:52,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-28 12:30:52,954 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:30:52,955 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:30:52,955 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:30:52,955 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:30:52,955 INFO L82 PathProgramCache]: Analyzing trace with hash -943699264, now seen corresponding path program 1 times [2018-11-28 12:30:52,955 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:30:52,955 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:30:52,957 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:30:52,957 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:30:52,957 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:30:52,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:30:53,003 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:30:53,004 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:30:53,004 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:30:53,004 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:30:53,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:30:53,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:30:53,005 INFO L87 Difference]: Start difference. First operand 108296 states and 408659 transitions. Second operand 3 states. [2018-11-28 12:30:54,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:30:54,277 INFO L93 Difference]: Finished difference Result 179115 states and 655174 transitions. [2018-11-28 12:30:54,278 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:30:54,278 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2018-11-28 12:30:54,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:30:54,676 INFO L225 Difference]: With dead ends: 179115 [2018-11-28 12:30:54,676 INFO L226 Difference]: Without dead ends: 179115 [2018-11-28 12:30:54,677 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:30:56,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179115 states. [2018-11-28 12:30:58,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179115 to 163646. [2018-11-28 12:30:58,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163646 states. [2018-11-28 12:30:59,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163646 states to 163646 states and 603625 transitions. [2018-11-28 12:30:59,281 INFO L78 Accepts]: Start accepts. Automaton has 163646 states and 603625 transitions. Word has length 49 [2018-11-28 12:30:59,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:30:59,282 INFO L480 AbstractCegarLoop]: Abstraction has 163646 states and 603625 transitions. [2018-11-28 12:30:59,282 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:30:59,282 INFO L276 IsEmpty]: Start isEmpty. Operand 163646 states and 603625 transitions. [2018-11-28 12:30:59,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-28 12:30:59,300 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:30:59,300 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:30:59,301 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:30:59,301 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:30:59,301 INFO L82 PathProgramCache]: Analyzing trace with hash -721809298, now seen corresponding path program 1 times [2018-11-28 12:30:59,301 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:30:59,301 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:30:59,303 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:30:59,303 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:30:59,303 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:30:59,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:30:59,401 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:30:59,401 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:30:59,401 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:30:59,401 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:30:59,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:30:59,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:30:59,402 INFO L87 Difference]: Start difference. First operand 163646 states and 603625 transitions. Second operand 6 states. [2018-11-28 12:31:00,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:00,718 INFO L93 Difference]: Finished difference Result 214598 states and 788311 transitions. [2018-11-28 12:31:00,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 12:31:00,718 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2018-11-28 12:31:00,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:01,217 INFO L225 Difference]: With dead ends: 214598 [2018-11-28 12:31:01,217 INFO L226 Difference]: Without dead ends: 214598 [2018-11-28 12:31:01,217 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:31:03,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214598 states. [2018-11-28 12:31:08,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214598 to 200128. [2018-11-28 12:31:08,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200128 states. [2018-11-28 12:31:09,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200128 states to 200128 states and 735197 transitions. [2018-11-28 12:31:09,361 INFO L78 Accepts]: Start accepts. Automaton has 200128 states and 735197 transitions. Word has length 53 [2018-11-28 12:31:09,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:09,361 INFO L480 AbstractCegarLoop]: Abstraction has 200128 states and 735197 transitions. [2018-11-28 12:31:09,361 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:31:09,361 INFO L276 IsEmpty]: Start isEmpty. Operand 200128 states and 735197 transitions. [2018-11-28 12:31:09,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-28 12:31:09,379 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:09,380 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:09,380 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:09,380 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:09,380 INFO L82 PathProgramCache]: Analyzing trace with hash 1776206639, now seen corresponding path program 1 times [2018-11-28 12:31:09,380 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:09,380 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:09,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:09,382 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:09,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:09,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:09,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:09,469 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:09,470 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:31:09,470 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:31:09,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:31:09,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:31:09,470 INFO L87 Difference]: Start difference. First operand 200128 states and 735197 transitions. Second operand 7 states. [2018-11-28 12:31:11,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:11,658 INFO L93 Difference]: Finished difference Result 283834 states and 1009167 transitions. [2018-11-28 12:31:11,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 12:31:11,658 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 53 [2018-11-28 12:31:11,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:12,261 INFO L225 Difference]: With dead ends: 283834 [2018-11-28 12:31:12,261 INFO L226 Difference]: Without dead ends: 283834 [2018-11-28 12:31:12,261 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-28 12:31:14,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283834 states. [2018-11-28 12:31:17,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283834 to 228356. [2018-11-28 12:31:17,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228356 states. [2018-11-28 12:31:18,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228356 states to 228356 states and 826700 transitions. [2018-11-28 12:31:18,373 INFO L78 Accepts]: Start accepts. Automaton has 228356 states and 826700 transitions. Word has length 53 [2018-11-28 12:31:18,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:18,373 INFO L480 AbstractCegarLoop]: Abstraction has 228356 states and 826700 transitions. [2018-11-28 12:31:18,373 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:31:18,373 INFO L276 IsEmpty]: Start isEmpty. Operand 228356 states and 826700 transitions. [2018-11-28 12:31:18,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-28 12:31:18,392 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:18,392 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:18,392 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:18,392 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:18,392 INFO L82 PathProgramCache]: Analyzing trace with hash -1631256976, now seen corresponding path program 1 times [2018-11-28 12:31:18,392 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:18,393 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:18,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:18,394 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:18,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:18,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:18,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:18,435 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:18,435 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:31:18,435 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:31:18,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:31:18,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:31:18,436 INFO L87 Difference]: Start difference. First operand 228356 states and 826700 transitions. Second operand 4 states. [2018-11-28 12:31:18,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:18,570 INFO L93 Difference]: Finished difference Result 38827 states and 123113 transitions. [2018-11-28 12:31:18,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:31:18,570 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2018-11-28 12:31:18,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:18,618 INFO L225 Difference]: With dead ends: 38827 [2018-11-28 12:31:18,618 INFO L226 Difference]: Without dead ends: 32376 [2018-11-28 12:31:18,618 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:31:18,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32376 states. [2018-11-28 12:31:21,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32376 to 32135. [2018-11-28 12:31:21,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32135 states. [2018-11-28 12:31:21,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32135 states to 32135 states and 100387 transitions. [2018-11-28 12:31:21,953 INFO L78 Accepts]: Start accepts. Automaton has 32135 states and 100387 transitions. Word has length 53 [2018-11-28 12:31:21,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:21,953 INFO L480 AbstractCegarLoop]: Abstraction has 32135 states and 100387 transitions. [2018-11-28 12:31:21,953 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:31:21,953 INFO L276 IsEmpty]: Start isEmpty. Operand 32135 states and 100387 transitions. [2018-11-28 12:31:21,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-28 12:31:21,955 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:21,955 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:21,955 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:21,955 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:21,955 INFO L82 PathProgramCache]: Analyzing trace with hash -1658594805, now seen corresponding path program 1 times [2018-11-28 12:31:21,955 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:21,956 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:21,957 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:21,957 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:21,957 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:21,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:22,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:22,011 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:22,011 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:31:22,011 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:31:22,011 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:31:22,011 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:31:22,011 INFO L87 Difference]: Start difference. First operand 32135 states and 100387 transitions. Second operand 6 states. [2018-11-28 12:31:22,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:22,583 INFO L93 Difference]: Finished difference Result 42537 states and 131570 transitions. [2018-11-28 12:31:22,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 12:31:22,584 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2018-11-28 12:31:22,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:22,640 INFO L225 Difference]: With dead ends: 42537 [2018-11-28 12:31:22,640 INFO L226 Difference]: Without dead ends: 42440 [2018-11-28 12:31:22,640 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-11-28 12:31:22,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42440 states. [2018-11-28 12:31:22,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42440 to 31836. [2018-11-28 12:31:22,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31836 states. [2018-11-28 12:31:23,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31836 states to 31836 states and 99515 transitions. [2018-11-28 12:31:23,049 INFO L78 Accepts]: Start accepts. Automaton has 31836 states and 99515 transitions. Word has length 53 [2018-11-28 12:31:23,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:23,050 INFO L480 AbstractCegarLoop]: Abstraction has 31836 states and 99515 transitions. [2018-11-28 12:31:23,050 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:31:23,050 INFO L276 IsEmpty]: Start isEmpty. Operand 31836 states and 99515 transitions. [2018-11-28 12:31:23,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-11-28 12:31:23,054 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:23,054 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:23,055 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:23,055 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:23,055 INFO L82 PathProgramCache]: Analyzing trace with hash 228917533, now seen corresponding path program 1 times [2018-11-28 12:31:23,055 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:23,055 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:23,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:23,056 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:23,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:23,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:23,102 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:23,102 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:23,102 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:31:23,103 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:31:23,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:31:23,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:31:23,103 INFO L87 Difference]: Start difference. First operand 31836 states and 99515 transitions. Second operand 4 states. [2018-11-28 12:31:23,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:23,320 INFO L93 Difference]: Finished difference Result 41208 states and 129949 transitions. [2018-11-28 12:31:23,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:31:23,320 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 63 [2018-11-28 12:31:23,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:23,376 INFO L225 Difference]: With dead ends: 41208 [2018-11-28 12:31:23,376 INFO L226 Difference]: Without dead ends: 41208 [2018-11-28 12:31:23,376 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:31:23,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41208 states. [2018-11-28 12:31:23,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41208 to 35932. [2018-11-28 12:31:23,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35932 states. [2018-11-28 12:31:23,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35932 states to 35932 states and 112644 transitions. [2018-11-28 12:31:23,816 INFO L78 Accepts]: Start accepts. Automaton has 35932 states and 112644 transitions. Word has length 63 [2018-11-28 12:31:23,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:23,816 INFO L480 AbstractCegarLoop]: Abstraction has 35932 states and 112644 transitions. [2018-11-28 12:31:23,816 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:31:23,816 INFO L276 IsEmpty]: Start isEmpty. Operand 35932 states and 112644 transitions. [2018-11-28 12:31:23,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-11-28 12:31:23,822 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:23,822 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:23,822 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:23,822 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:23,822 INFO L82 PathProgramCache]: Analyzing trace with hash 1971727868, now seen corresponding path program 1 times [2018-11-28 12:31:23,822 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:23,822 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:23,824 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:23,824 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:23,824 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:23,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:23,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:23,891 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:23,891 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:31:23,891 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:31:23,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:31:23,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:31:23,892 INFO L87 Difference]: Start difference. First operand 35932 states and 112644 transitions. Second operand 6 states. [2018-11-28 12:31:24,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:24,480 INFO L93 Difference]: Finished difference Result 72509 states and 225560 transitions. [2018-11-28 12:31:24,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-28 12:31:24,481 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 63 [2018-11-28 12:31:24,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:24,589 INFO L225 Difference]: With dead ends: 72509 [2018-11-28 12:31:24,589 INFO L226 Difference]: Without dead ends: 72445 [2018-11-28 12:31:24,590 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2018-11-28 12:31:24,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72445 states. [2018-11-28 12:31:25,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72445 to 40892. [2018-11-28 12:31:25,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40892 states. [2018-11-28 12:31:25,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40892 states to 40892 states and 126622 transitions. [2018-11-28 12:31:25,230 INFO L78 Accepts]: Start accepts. Automaton has 40892 states and 126622 transitions. Word has length 63 [2018-11-28 12:31:25,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:25,231 INFO L480 AbstractCegarLoop]: Abstraction has 40892 states and 126622 transitions. [2018-11-28 12:31:25,231 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:31:25,231 INFO L276 IsEmpty]: Start isEmpty. Operand 40892 states and 126622 transitions. [2018-11-28 12:31:25,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-11-28 12:31:25,241 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:25,241 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:25,242 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:25,242 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:25,242 INFO L82 PathProgramCache]: Analyzing trace with hash -203492115, now seen corresponding path program 1 times [2018-11-28 12:31:25,242 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:25,242 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:25,243 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:25,244 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:25,244 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:25,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:25,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:25,271 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:25,271 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:31:25,271 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:31:25,271 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:31:25,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:31:25,272 INFO L87 Difference]: Start difference. First operand 40892 states and 126622 transitions. Second operand 3 states. [2018-11-28 12:31:25,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:25,559 INFO L93 Difference]: Finished difference Result 46897 states and 143099 transitions. [2018-11-28 12:31:25,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:31:25,559 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2018-11-28 12:31:25,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:25,618 INFO L225 Difference]: With dead ends: 46897 [2018-11-28 12:31:25,618 INFO L226 Difference]: Without dead ends: 46897 [2018-11-28 12:31:25,619 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:31:25,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46897 states. [2018-11-28 12:31:26,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46897 to 40580. [2018-11-28 12:31:26,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40580 states. [2018-11-28 12:31:26,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40580 states to 40580 states and 123024 transitions. [2018-11-28 12:31:26,080 INFO L78 Accepts]: Start accepts. Automaton has 40580 states and 123024 transitions. Word has length 69 [2018-11-28 12:31:26,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:26,080 INFO L480 AbstractCegarLoop]: Abstraction has 40580 states and 123024 transitions. [2018-11-28 12:31:26,080 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:31:26,080 INFO L276 IsEmpty]: Start isEmpty. Operand 40580 states and 123024 transitions. [2018-11-28 12:31:26,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 12:31:26,090 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:26,090 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:26,090 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:26,090 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:26,091 INFO L82 PathProgramCache]: Analyzing trace with hash 756655101, now seen corresponding path program 1 times [2018-11-28 12:31:26,091 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:26,091 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:26,092 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:26,092 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:26,092 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:26,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:26,176 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:26,176 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:26,177 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:31:26,177 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:31:26,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:31:26,177 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:31:26,177 INFO L87 Difference]: Start difference. First operand 40580 states and 123024 transitions. Second operand 7 states. [2018-11-28 12:31:26,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:26,903 INFO L93 Difference]: Finished difference Result 56545 states and 170864 transitions. [2018-11-28 12:31:26,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 12:31:26,904 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 70 [2018-11-28 12:31:26,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:26,982 INFO L225 Difference]: With dead ends: 56545 [2018-11-28 12:31:26,982 INFO L226 Difference]: Without dead ends: 56241 [2018-11-28 12:31:26,982 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2018-11-28 12:31:27,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56241 states. [2018-11-28 12:31:27,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56241 to 47672. [2018-11-28 12:31:27,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47672 states. [2018-11-28 12:31:27,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47672 states to 47672 states and 144131 transitions. [2018-11-28 12:31:27,560 INFO L78 Accepts]: Start accepts. Automaton has 47672 states and 144131 transitions. Word has length 70 [2018-11-28 12:31:27,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:27,561 INFO L480 AbstractCegarLoop]: Abstraction has 47672 states and 144131 transitions. [2018-11-28 12:31:27,561 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:31:27,561 INFO L276 IsEmpty]: Start isEmpty. Operand 47672 states and 144131 transitions. [2018-11-28 12:31:27,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 12:31:27,579 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:27,579 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:27,579 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:27,579 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:27,579 INFO L82 PathProgramCache]: Analyzing trace with hash -1040296258, now seen corresponding path program 1 times [2018-11-28 12:31:27,579 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:27,579 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:27,581 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:27,581 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:27,581 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:27,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:27,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:27,663 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:27,663 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 12:31:27,663 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 12:31:27,663 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 12:31:27,663 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:31:27,663 INFO L87 Difference]: Start difference. First operand 47672 states and 144131 transitions. Second operand 8 states. [2018-11-28 12:31:28,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:28,764 INFO L93 Difference]: Finished difference Result 57838 states and 172357 transitions. [2018-11-28 12:31:28,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 12:31:28,765 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 70 [2018-11-28 12:31:28,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:28,844 INFO L225 Difference]: With dead ends: 57838 [2018-11-28 12:31:28,844 INFO L226 Difference]: Without dead ends: 57838 [2018-11-28 12:31:28,845 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2018-11-28 12:31:28,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57838 states. [2018-11-28 12:31:29,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57838 to 50532. [2018-11-28 12:31:29,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50532 states. [2018-11-28 12:31:29,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50532 states to 50532 states and 152080 transitions. [2018-11-28 12:31:29,660 INFO L78 Accepts]: Start accepts. Automaton has 50532 states and 152080 transitions. Word has length 70 [2018-11-28 12:31:29,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:29,660 INFO L480 AbstractCegarLoop]: Abstraction has 50532 states and 152080 transitions. [2018-11-28 12:31:29,660 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 12:31:29,660 INFO L276 IsEmpty]: Start isEmpty. Operand 50532 states and 152080 transitions. [2018-11-28 12:31:29,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 12:31:29,673 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:29,674 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:29,674 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:29,674 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:29,674 INFO L82 PathProgramCache]: Analyzing trace with hash -152792577, now seen corresponding path program 1 times [2018-11-28 12:31:29,674 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:29,674 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:29,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:29,676 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:29,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:29,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:29,731 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:29,731 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:29,731 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:31:29,731 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:31:29,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:31:29,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:31:29,732 INFO L87 Difference]: Start difference. First operand 50532 states and 152080 transitions. Second operand 5 states. [2018-11-28 12:31:29,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:29,783 INFO L93 Difference]: Finished difference Result 13236 states and 33132 transitions. [2018-11-28 12:31:29,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 12:31:29,783 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2018-11-28 12:31:29,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:29,793 INFO L225 Difference]: With dead ends: 13236 [2018-11-28 12:31:29,793 INFO L226 Difference]: Without dead ends: 11116 [2018-11-28 12:31:29,793 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:31:29,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11116 states. [2018-11-28 12:31:29,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11116 to 8545. [2018-11-28 12:31:29,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8545 states. [2018-11-28 12:31:29,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8545 states to 8545 states and 21304 transitions. [2018-11-28 12:31:29,884 INFO L78 Accepts]: Start accepts. Automaton has 8545 states and 21304 transitions. Word has length 70 [2018-11-28 12:31:29,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:29,884 INFO L480 AbstractCegarLoop]: Abstraction has 8545 states and 21304 transitions. [2018-11-28 12:31:29,884 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:31:29,884 INFO L276 IsEmpty]: Start isEmpty. Operand 8545 states and 21304 transitions. [2018-11-28 12:31:29,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-28 12:31:29,892 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:29,892 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:29,892 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:29,892 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:29,892 INFO L82 PathProgramCache]: Analyzing trace with hash -1361713172, now seen corresponding path program 1 times [2018-11-28 12:31:29,893 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:29,893 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:29,894 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:29,894 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:29,894 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:29,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:29,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:29,959 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:29,959 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:31:29,960 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:31:29,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:31:29,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:31:29,960 INFO L87 Difference]: Start difference. First operand 8545 states and 21304 transitions. Second operand 4 states. [2018-11-28 12:31:30,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:30,097 INFO L93 Difference]: Finished difference Result 9960 states and 24428 transitions. [2018-11-28 12:31:30,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 12:31:30,098 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 98 [2018-11-28 12:31:30,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:30,108 INFO L225 Difference]: With dead ends: 9960 [2018-11-28 12:31:30,108 INFO L226 Difference]: Without dead ends: 9960 [2018-11-28 12:31:30,108 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:31:30,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9960 states. [2018-11-28 12:31:30,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9960 to 9441. [2018-11-28 12:31:30,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9441 states. [2018-11-28 12:31:30,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9441 states to 9441 states and 23271 transitions. [2018-11-28 12:31:30,203 INFO L78 Accepts]: Start accepts. Automaton has 9441 states and 23271 transitions. Word has length 98 [2018-11-28 12:31:30,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:30,203 INFO L480 AbstractCegarLoop]: Abstraction has 9441 states and 23271 transitions. [2018-11-28 12:31:30,203 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:31:30,203 INFO L276 IsEmpty]: Start isEmpty. Operand 9441 states and 23271 transitions. [2018-11-28 12:31:30,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-28 12:31:30,213 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:30,213 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:30,213 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:30,213 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:30,213 INFO L82 PathProgramCache]: Analyzing trace with hash 856044781, now seen corresponding path program 1 times [2018-11-28 12:31:30,213 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:30,213 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:30,214 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:30,215 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:30,215 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:30,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:30,254 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:30,254 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:30,255 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:31:30,255 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:31:30,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:31:30,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:31:30,255 INFO L87 Difference]: Start difference. First operand 9441 states and 23271 transitions. Second operand 3 states. [2018-11-28 12:31:30,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:30,442 INFO L93 Difference]: Finished difference Result 12725 states and 30850 transitions. [2018-11-28 12:31:30,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:31:30,443 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2018-11-28 12:31:30,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:30,456 INFO L225 Difference]: With dead ends: 12725 [2018-11-28 12:31:30,456 INFO L226 Difference]: Without dead ends: 12725 [2018-11-28 12:31:30,457 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:31:30,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12725 states. [2018-11-28 12:31:30,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12725 to 11524. [2018-11-28 12:31:30,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11524 states. [2018-11-28 12:31:30,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11524 states to 11524 states and 28181 transitions. [2018-11-28 12:31:30,575 INFO L78 Accepts]: Start accepts. Automaton has 11524 states and 28181 transitions. Word has length 98 [2018-11-28 12:31:30,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:30,575 INFO L480 AbstractCegarLoop]: Abstraction has 11524 states and 28181 transitions. [2018-11-28 12:31:30,575 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:31:30,576 INFO L276 IsEmpty]: Start isEmpty. Operand 11524 states and 28181 transitions. [2018-11-28 12:31:30,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-28 12:31:30,585 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:30,585 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:30,585 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:30,586 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:30,586 INFO L82 PathProgramCache]: Analyzing trace with hash -1908326467, now seen corresponding path program 2 times [2018-11-28 12:31:30,586 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:30,586 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:30,587 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:30,587 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:30,587 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:30,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:30,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:30,650 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:30,650 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:31:30,650 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:31:30,650 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:31:30,650 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:31:30,651 INFO L87 Difference]: Start difference. First operand 11524 states and 28181 transitions. Second operand 6 states. [2018-11-28 12:31:30,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:30,933 INFO L93 Difference]: Finished difference Result 14264 states and 34204 transitions. [2018-11-28 12:31:30,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 12:31:30,933 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 98 [2018-11-28 12:31:30,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:30,944 INFO L225 Difference]: With dead ends: 14264 [2018-11-28 12:31:30,944 INFO L226 Difference]: Without dead ends: 14264 [2018-11-28 12:31:30,944 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:31:30,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14264 states. [2018-11-28 12:31:31,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14264 to 11317. [2018-11-28 12:31:31,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11317 states. [2018-11-28 12:31:31,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11317 states to 11317 states and 27219 transitions. [2018-11-28 12:31:31,053 INFO L78 Accepts]: Start accepts. Automaton has 11317 states and 27219 transitions. Word has length 98 [2018-11-28 12:31:31,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:31,053 INFO L480 AbstractCegarLoop]: Abstraction has 11317 states and 27219 transitions. [2018-11-28 12:31:31,054 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:31:31,054 INFO L276 IsEmpty]: Start isEmpty. Operand 11317 states and 27219 transitions. [2018-11-28 12:31:31,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-28 12:31:31,062 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:31,062 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:31,062 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:31,063 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:31,063 INFO L82 PathProgramCache]: Analyzing trace with hash 1659083001, now seen corresponding path program 1 times [2018-11-28 12:31:31,063 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:31,063 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:31,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:31,064 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 12:31:31,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:31,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:31,176 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:31,177 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:31,177 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:31:31,177 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:31:31,178 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:31:31,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:31:31,178 INFO L87 Difference]: Start difference. First operand 11317 states and 27219 transitions. Second operand 6 states. [2018-11-28 12:31:31,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:31,425 INFO L93 Difference]: Finished difference Result 13695 states and 32744 transitions. [2018-11-28 12:31:31,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:31:31,426 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-11-28 12:31:31,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:31,436 INFO L225 Difference]: With dead ends: 13695 [2018-11-28 12:31:31,436 INFO L226 Difference]: Without dead ends: 13663 [2018-11-28 12:31:31,436 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:31:31,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13663 states. [2018-11-28 12:31:31,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13663 to 12238. [2018-11-28 12:31:31,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12238 states. [2018-11-28 12:31:31,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12238 states to 12238 states and 29366 transitions. [2018-11-28 12:31:31,547 INFO L78 Accepts]: Start accepts. Automaton has 12238 states and 29366 transitions. Word has length 100 [2018-11-28 12:31:31,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:31,548 INFO L480 AbstractCegarLoop]: Abstraction has 12238 states and 29366 transitions. [2018-11-28 12:31:31,548 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:31:31,548 INFO L276 IsEmpty]: Start isEmpty. Operand 12238 states and 29366 transitions. [2018-11-28 12:31:31,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-28 12:31:31,557 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:31,557 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:31,557 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:31,557 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:31,557 INFO L82 PathProgramCache]: Analyzing trace with hash -137868358, now seen corresponding path program 1 times [2018-11-28 12:31:31,557 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:31,557 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:31,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:31,558 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:31,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:31,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:31,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:31,632 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:31,632 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:31:31,632 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:31:31,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:31:31,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:31:31,633 INFO L87 Difference]: Start difference. First operand 12238 states and 29366 transitions. Second operand 7 states. [2018-11-28 12:31:32,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:32,003 INFO L93 Difference]: Finished difference Result 18053 states and 43645 transitions. [2018-11-28 12:31:32,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 12:31:32,003 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 100 [2018-11-28 12:31:32,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:32,017 INFO L225 Difference]: With dead ends: 18053 [2018-11-28 12:31:32,017 INFO L226 Difference]: Without dead ends: 18053 [2018-11-28 12:31:32,017 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=91, Unknown=0, NotChecked=0, Total=132 [2018-11-28 12:31:32,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18053 states. [2018-11-28 12:31:32,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18053 to 12767. [2018-11-28 12:31:32,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12767 states. [2018-11-28 12:31:32,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12767 states to 12767 states and 30777 transitions. [2018-11-28 12:31:32,152 INFO L78 Accepts]: Start accepts. Automaton has 12767 states and 30777 transitions. Word has length 100 [2018-11-28 12:31:32,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:32,153 INFO L480 AbstractCegarLoop]: Abstraction has 12767 states and 30777 transitions. [2018-11-28 12:31:32,153 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:31:32,153 INFO L276 IsEmpty]: Start isEmpty. Operand 12767 states and 30777 transitions. [2018-11-28 12:31:32,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-28 12:31:32,163 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:32,163 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:32,163 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:32,163 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:32,163 INFO L82 PathProgramCache]: Analyzing trace with hash 749635323, now seen corresponding path program 1 times [2018-11-28 12:31:32,163 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:32,163 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:32,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:32,164 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:32,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:32,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:32,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:32,252 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:32,252 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:31:32,252 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:31:32,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:31:32,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:31:32,253 INFO L87 Difference]: Start difference. First operand 12767 states and 30777 transitions. Second operand 6 states. [2018-11-28 12:31:32,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:32,483 INFO L93 Difference]: Finished difference Result 15015 states and 35894 transitions. [2018-11-28 12:31:32,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 12:31:32,483 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-11-28 12:31:32,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:32,495 INFO L225 Difference]: With dead ends: 15015 [2018-11-28 12:31:32,495 INFO L226 Difference]: Without dead ends: 15015 [2018-11-28 12:31:32,495 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:31:32,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15015 states. [2018-11-28 12:31:32,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15015 to 13041. [2018-11-28 12:31:32,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13041 states. [2018-11-28 12:31:32,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13041 states to 13041 states and 31436 transitions. [2018-11-28 12:31:32,617 INFO L78 Accepts]: Start accepts. Automaton has 13041 states and 31436 transitions. Word has length 100 [2018-11-28 12:31:32,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:32,617 INFO L480 AbstractCegarLoop]: Abstraction has 13041 states and 31436 transitions. [2018-11-28 12:31:32,617 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:31:32,617 INFO L276 IsEmpty]: Start isEmpty. Operand 13041 states and 31436 transitions. [2018-11-28 12:31:32,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-28 12:31:32,626 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:32,626 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:32,626 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:32,626 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:32,627 INFO L82 PathProgramCache]: Analyzing trace with hash 2119042649, now seen corresponding path program 1 times [2018-11-28 12:31:32,627 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:32,627 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:32,628 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:32,628 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:32,628 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:32,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:32,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:32,713 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:32,713 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:31:32,713 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:31:32,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:31:32,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:31:32,714 INFO L87 Difference]: Start difference. First operand 13041 states and 31436 transitions. Second operand 6 states. [2018-11-28 12:31:32,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:32,817 INFO L93 Difference]: Finished difference Result 12769 states and 30484 transitions. [2018-11-28 12:31:32,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:31:32,818 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-11-28 12:31:32,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:32,827 INFO L225 Difference]: With dead ends: 12769 [2018-11-28 12:31:32,827 INFO L226 Difference]: Without dead ends: 12769 [2018-11-28 12:31:32,828 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:31:32,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12769 states. [2018-11-28 12:31:32,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12769 to 10327. [2018-11-28 12:31:32,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10327 states. [2018-11-28 12:31:32,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10327 states to 10327 states and 24777 transitions. [2018-11-28 12:31:32,927 INFO L78 Accepts]: Start accepts. Automaton has 10327 states and 24777 transitions. Word has length 100 [2018-11-28 12:31:32,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:32,927 INFO L480 AbstractCegarLoop]: Abstraction has 10327 states and 24777 transitions. [2018-11-28 12:31:32,927 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:31:32,927 INFO L276 IsEmpty]: Start isEmpty. Operand 10327 states and 24777 transitions. [2018-11-28 12:31:32,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-28 12:31:32,935 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:32,935 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:32,936 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:32,936 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:32,936 INFO L82 PathProgramCache]: Analyzing trace with hash -22235627, now seen corresponding path program 1 times [2018-11-28 12:31:32,936 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:32,936 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:32,937 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:32,937 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:32,937 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:32,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:32,998 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:32,998 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:32,998 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:31:32,998 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:31:32,999 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:31:32,999 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:31:32,999 INFO L87 Difference]: Start difference. First operand 10327 states and 24777 transitions. Second operand 5 states. [2018-11-28 12:31:33,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:33,202 INFO L93 Difference]: Finished difference Result 12330 states and 29018 transitions. [2018-11-28 12:31:33,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 12:31:33,202 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 100 [2018-11-28 12:31:33,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:33,215 INFO L225 Difference]: With dead ends: 12330 [2018-11-28 12:31:33,215 INFO L226 Difference]: Without dead ends: 12330 [2018-11-28 12:31:33,215 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:31:33,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12330 states. [2018-11-28 12:31:33,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12330 to 10500. [2018-11-28 12:31:33,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10500 states. [2018-11-28 12:31:33,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10500 states to 10500 states and 25146 transitions. [2018-11-28 12:31:33,313 INFO L78 Accepts]: Start accepts. Automaton has 10500 states and 25146 transitions. Word has length 100 [2018-11-28 12:31:33,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:33,314 INFO L480 AbstractCegarLoop]: Abstraction has 10500 states and 25146 transitions. [2018-11-28 12:31:33,314 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:31:33,314 INFO L276 IsEmpty]: Start isEmpty. Operand 10500 states and 25146 transitions. [2018-11-28 12:31:33,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-28 12:31:33,321 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:33,321 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:33,321 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:33,321 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:33,321 INFO L82 PathProgramCache]: Analyzing trace with hash -909176834, now seen corresponding path program 1 times [2018-11-28 12:31:33,321 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:33,321 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:33,322 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:33,323 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:33,323 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:33,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:33,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:33,399 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:33,399 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 12:31:33,400 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 12:31:33,400 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 12:31:33,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:31:33,400 INFO L87 Difference]: Start difference. First operand 10500 states and 25146 transitions. Second operand 8 states. [2018-11-28 12:31:34,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:34,234 INFO L93 Difference]: Finished difference Result 18823 states and 44161 transitions. [2018-11-28 12:31:34,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-28 12:31:34,235 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 102 [2018-11-28 12:31:34,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:34,254 INFO L225 Difference]: With dead ends: 18823 [2018-11-28 12:31:34,254 INFO L226 Difference]: Without dead ends: 18728 [2018-11-28 12:31:34,255 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=261, Unknown=0, NotChecked=0, Total=342 [2018-11-28 12:31:34,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18728 states. [2018-11-28 12:31:34,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18728 to 13537. [2018-11-28 12:31:34,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13537 states. [2018-11-28 12:31:34,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13537 states to 13537 states and 32323 transitions. [2018-11-28 12:31:34,423 INFO L78 Accepts]: Start accepts. Automaton has 13537 states and 32323 transitions. Word has length 102 [2018-11-28 12:31:34,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:34,423 INFO L480 AbstractCegarLoop]: Abstraction has 13537 states and 32323 transitions. [2018-11-28 12:31:34,423 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 12:31:34,423 INFO L276 IsEmpty]: Start isEmpty. Operand 13537 states and 32323 transitions. [2018-11-28 12:31:34,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-28 12:31:34,434 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:34,434 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:34,434 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:34,434 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:34,434 INFO L82 PathProgramCache]: Analyzing trace with hash 1308581119, now seen corresponding path program 1 times [2018-11-28 12:31:34,434 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:34,434 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:34,435 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:34,435 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:34,435 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:34,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:34,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:34,527 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:34,528 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:31:34,528 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:31:34,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:31:34,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:31:34,528 INFO L87 Difference]: Start difference. First operand 13537 states and 32323 transitions. Second operand 7 states. [2018-11-28 12:31:34,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:34,891 INFO L93 Difference]: Finished difference Result 18636 states and 43263 transitions. [2018-11-28 12:31:34,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 12:31:34,892 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-28 12:31:34,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:34,905 INFO L225 Difference]: With dead ends: 18636 [2018-11-28 12:31:34,905 INFO L226 Difference]: Without dead ends: 18636 [2018-11-28 12:31:34,906 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-11-28 12:31:34,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18636 states. [2018-11-28 12:31:35,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18636 to 15989. [2018-11-28 12:31:35,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15989 states. [2018-11-28 12:31:35,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15989 states to 15989 states and 37604 transitions. [2018-11-28 12:31:35,064 INFO L78 Accepts]: Start accepts. Automaton has 15989 states and 37604 transitions. Word has length 102 [2018-11-28 12:31:35,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:35,065 INFO L480 AbstractCegarLoop]: Abstraction has 15989 states and 37604 transitions. [2018-11-28 12:31:35,065 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:31:35,065 INFO L276 IsEmpty]: Start isEmpty. Operand 15989 states and 37604 transitions. [2018-11-28 12:31:35,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-28 12:31:35,076 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:35,077 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:35,077 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:35,077 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:35,077 INFO L82 PathProgramCache]: Analyzing trace with hash 1519932032, now seen corresponding path program 1 times [2018-11-28 12:31:35,077 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:35,077 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:35,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:35,078 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:35,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:35,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:35,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:35,220 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:35,220 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:31:35,220 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:31:35,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:31:35,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:31:35,220 INFO L87 Difference]: Start difference. First operand 15989 states and 37604 transitions. Second operand 7 states. [2018-11-28 12:31:35,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:35,452 INFO L93 Difference]: Finished difference Result 16663 states and 39077 transitions. [2018-11-28 12:31:35,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 12:31:35,452 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-28 12:31:35,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:35,466 INFO L225 Difference]: With dead ends: 16663 [2018-11-28 12:31:35,466 INFO L226 Difference]: Without dead ends: 16663 [2018-11-28 12:31:35,466 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=72, Unknown=0, NotChecked=0, Total=110 [2018-11-28 12:31:35,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16663 states. [2018-11-28 12:31:35,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16663 to 16516. [2018-11-28 12:31:35,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16516 states. [2018-11-28 12:31:35,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16516 states to 16516 states and 38784 transitions. [2018-11-28 12:31:35,613 INFO L78 Accepts]: Start accepts. Automaton has 16516 states and 38784 transitions. Word has length 102 [2018-11-28 12:31:35,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:35,613 INFO L480 AbstractCegarLoop]: Abstraction has 16516 states and 38784 transitions. [2018-11-28 12:31:35,613 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:31:35,614 INFO L276 IsEmpty]: Start isEmpty. Operand 16516 states and 38784 transitions. [2018-11-28 12:31:35,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-28 12:31:35,627 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:35,627 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:35,627 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:35,627 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:35,627 INFO L82 PathProgramCache]: Analyzing trace with hash -1887531583, now seen corresponding path program 1 times [2018-11-28 12:31:35,627 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:35,627 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:35,628 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:35,629 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:35,629 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:35,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:35,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:35,721 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:35,721 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-28 12:31:35,721 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 12:31:35,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 12:31:35,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:31:35,722 INFO L87 Difference]: Start difference. First operand 16516 states and 38784 transitions. Second operand 9 states. [2018-11-28 12:31:35,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:35,844 INFO L93 Difference]: Finished difference Result 20356 states and 48058 transitions. [2018-11-28 12:31:35,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 12:31:35,844 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 102 [2018-11-28 12:31:35,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:35,847 INFO L225 Difference]: With dead ends: 20356 [2018-11-28 12:31:35,847 INFO L226 Difference]: Without dead ends: 4035 [2018-11-28 12:31:35,848 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2018-11-28 12:31:35,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4035 states. [2018-11-28 12:31:35,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4035 to 4033. [2018-11-28 12:31:35,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4033 states. [2018-11-28 12:31:35,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4033 states to 4033 states and 9587 transitions. [2018-11-28 12:31:35,876 INFO L78 Accepts]: Start accepts. Automaton has 4033 states and 9587 transitions. Word has length 102 [2018-11-28 12:31:35,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:35,876 INFO L480 AbstractCegarLoop]: Abstraction has 4033 states and 9587 transitions. [2018-11-28 12:31:35,876 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 12:31:35,876 INFO L276 IsEmpty]: Start isEmpty. Operand 4033 states and 9587 transitions. [2018-11-28 12:31:35,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-28 12:31:35,879 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:35,879 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:35,879 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:35,880 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:35,880 INFO L82 PathProgramCache]: Analyzing trace with hash 1830394743, now seen corresponding path program 1 times [2018-11-28 12:31:35,880 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:35,880 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:35,881 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:35,881 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:35,881 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:35,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:35,919 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:35,919 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:35,919 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:31:35,920 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:31:35,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:31:35,920 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:31:35,920 INFO L87 Difference]: Start difference. First operand 4033 states and 9587 transitions. Second operand 5 states. [2018-11-28 12:31:36,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:36,057 INFO L93 Difference]: Finished difference Result 4506 states and 10608 transitions. [2018-11-28 12:31:36,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:31:36,057 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 102 [2018-11-28 12:31:36,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:36,061 INFO L225 Difference]: With dead ends: 4506 [2018-11-28 12:31:36,061 INFO L226 Difference]: Without dead ends: 4472 [2018-11-28 12:31:36,061 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:31:36,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4472 states. [2018-11-28 12:31:36,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4472 to 4081. [2018-11-28 12:31:36,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4081 states. [2018-11-28 12:31:36,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4081 states to 4081 states and 9696 transitions. [2018-11-28 12:31:36,092 INFO L78 Accepts]: Start accepts. Automaton has 4081 states and 9696 transitions. Word has length 102 [2018-11-28 12:31:36,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:36,092 INFO L480 AbstractCegarLoop]: Abstraction has 4081 states and 9696 transitions. [2018-11-28 12:31:36,092 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:31:36,092 INFO L276 IsEmpty]: Start isEmpty. Operand 4081 states and 9696 transitions. [2018-11-28 12:31:36,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-28 12:31:36,095 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:36,095 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:36,095 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:36,096 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:36,096 INFO L82 PathProgramCache]: Analyzing trace with hash -292766223, now seen corresponding path program 1 times [2018-11-28 12:31:36,096 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:36,096 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:36,096 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:36,097 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:36,097 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:36,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:36,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:36,164 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:36,164 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:31:36,164 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:31:36,164 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:31:36,164 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:31:36,166 INFO L87 Difference]: Start difference. First operand 4081 states and 9696 transitions. Second operand 7 states. [2018-11-28 12:31:36,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:36,365 INFO L93 Difference]: Finished difference Result 4528 states and 10637 transitions. [2018-11-28 12:31:36,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:31:36,365 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-28 12:31:36,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:36,368 INFO L225 Difference]: With dead ends: 4528 [2018-11-28 12:31:36,368 INFO L226 Difference]: Without dead ends: 4528 [2018-11-28 12:31:36,368 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:31:36,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4528 states. [2018-11-28 12:31:36,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4528 to 4023. [2018-11-28 12:31:36,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4023 states. [2018-11-28 12:31:36,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4023 states to 4023 states and 9578 transitions. [2018-11-28 12:31:36,398 INFO L78 Accepts]: Start accepts. Automaton has 4023 states and 9578 transitions. Word has length 102 [2018-11-28 12:31:36,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:36,398 INFO L480 AbstractCegarLoop]: Abstraction has 4023 states and 9578 transitions. [2018-11-28 12:31:36,398 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:31:36,398 INFO L276 IsEmpty]: Start isEmpty. Operand 4023 states and 9578 transitions. [2018-11-28 12:31:36,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-28 12:31:36,401 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:36,401 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:36,401 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:36,401 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:36,402 INFO L82 PathProgramCache]: Analyzing trace with hash 299428272, now seen corresponding path program 2 times [2018-11-28 12:31:36,402 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:36,402 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:36,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:36,402 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:31:36,403 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:36,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:36,510 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:36,511 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:36,511 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-28 12:31:36,511 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-28 12:31:36,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-28 12:31:36,511 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2018-11-28 12:31:36,511 INFO L87 Difference]: Start difference. First operand 4023 states and 9578 transitions. Second operand 12 states. [2018-11-28 12:31:36,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:36,915 INFO L93 Difference]: Finished difference Result 5432 states and 12702 transitions. [2018-11-28 12:31:36,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-28 12:31:36,915 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 102 [2018-11-28 12:31:36,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:36,919 INFO L225 Difference]: With dead ends: 5432 [2018-11-28 12:31:36,919 INFO L226 Difference]: Without dead ends: 5432 [2018-11-28 12:31:36,919 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=299, Unknown=0, NotChecked=0, Total=380 [2018-11-28 12:31:36,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5432 states. [2018-11-28 12:31:36,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5432 to 4068. [2018-11-28 12:31:36,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4068 states. [2018-11-28 12:31:36,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4068 states to 4068 states and 9662 transitions. [2018-11-28 12:31:36,953 INFO L78 Accepts]: Start accepts. Automaton has 4068 states and 9662 transitions. Word has length 102 [2018-11-28 12:31:36,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:36,953 INFO L480 AbstractCegarLoop]: Abstraction has 4068 states and 9662 transitions. [2018-11-28 12:31:36,953 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-28 12:31:36,953 INFO L276 IsEmpty]: Start isEmpty. Operand 4068 states and 9662 transitions. [2018-11-28 12:31:36,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-28 12:31:36,955 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:36,956 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:36,956 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:36,956 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:36,956 INFO L82 PathProgramCache]: Analyzing trace with hash 1186931953, now seen corresponding path program 2 times [2018-11-28 12:31:36,956 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:36,956 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:36,957 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:36,957 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 12:31:36,957 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:36,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:31:37,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:31:37,105 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:31:37,106 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-11-28 12:31:37,106 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-28 12:31:37,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-28 12:31:37,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2018-11-28 12:31:37,106 INFO L87 Difference]: Start difference. First operand 4068 states and 9662 transitions. Second operand 13 states. [2018-11-28 12:31:37,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:31:37,498 INFO L93 Difference]: Finished difference Result 6512 states and 15247 transitions. [2018-11-28 12:31:37,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-28 12:31:37,498 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 102 [2018-11-28 12:31:37,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:31:37,501 INFO L225 Difference]: With dead ends: 6512 [2018-11-28 12:31:37,501 INFO L226 Difference]: Without dead ends: 4690 [2018-11-28 12:31:37,502 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=387, Unknown=0, NotChecked=0, Total=462 [2018-11-28 12:31:37,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4690 states. [2018-11-28 12:31:37,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4690 to 4124. [2018-11-28 12:31:37,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4124 states. [2018-11-28 12:31:37,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4124 states to 4124 states and 9724 transitions. [2018-11-28 12:31:37,534 INFO L78 Accepts]: Start accepts. Automaton has 4124 states and 9724 transitions. Word has length 102 [2018-11-28 12:31:37,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:31:37,534 INFO L480 AbstractCegarLoop]: Abstraction has 4124 states and 9724 transitions. [2018-11-28 12:31:37,534 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-28 12:31:37,534 INFO L276 IsEmpty]: Start isEmpty. Operand 4124 states and 9724 transitions. [2018-11-28 12:31:37,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-28 12:31:37,537 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:31:37,537 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:31:37,537 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:31:37,537 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:31:37,537 INFO L82 PathProgramCache]: Analyzing trace with hash -1820697969, now seen corresponding path program 3 times [2018-11-28 12:31:37,537 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:31:37,537 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:31:37,538 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:37,538 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 12:31:37,538 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:31:37,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 12:31:37,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 12:31:37,589 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 12:31:37,693 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-28 12:31:37,694 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 12:31:37 BasicIcfg [2018-11-28 12:31:37,694 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 12:31:37,695 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 12:31:37,695 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 12:31:37,695 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 12:31:37,695 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:30:28" (3/4) ... [2018-11-28 12:31:37,697 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-28 12:31:37,804 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_fb00a6c6-0baa-4aaf-a724-5f1160dc6124/bin-2019/uautomizer/witness.graphml [2018-11-28 12:31:37,804 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 12:31:37,805 INFO L168 Benchmark]: Toolchain (without parser) took 70923.75 ms. Allocated memory was 1.0 GB in the beginning and 6.3 GB in the end (delta: 5.3 GB). Free memory was 950.6 MB in the beginning and 3.5 GB in the end (delta: -2.5 GB). Peak memory consumption was 2.8 GB. Max. memory is 11.5 GB. [2018-11-28 12:31:37,806 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 12:31:37,806 INFO L168 Benchmark]: CACSL2BoogieTranslator took 443.63 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 176.7 MB). Free memory was 950.6 MB in the beginning and 1.2 GB in the end (delta: -200.5 MB). Peak memory consumption was 37.0 MB. Max. memory is 11.5 GB. [2018-11-28 12:31:37,806 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.95 ms. Allocated memory is still 1.2 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 12:31:37,806 INFO L168 Benchmark]: Boogie Preprocessor took 28.02 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. [2018-11-28 12:31:37,807 INFO L168 Benchmark]: RCFGBuilder took 631.02 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 63.1 MB). Peak memory consumption was 63.1 MB. Max. memory is 11.5 GB. [2018-11-28 12:31:37,807 INFO L168 Benchmark]: TraceAbstraction took 69670.26 ms. Allocated memory was 1.2 GB in the beginning and 6.3 GB in the end (delta: 5.1 GB). Free memory was 1.1 GB in the beginning and 3.5 GB in the end (delta: -2.4 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. [2018-11-28 12:31:37,807 INFO L168 Benchmark]: Witness Printer took 109.49 ms. Allocated memory is still 6.3 GB. Free memory was 3.5 GB in the beginning and 3.5 GB in the end (delta: 41.7 MB). Peak memory consumption was 41.7 MB. Max. memory is 11.5 GB. [2018-11-28 12:31:37,808 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 443.63 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 176.7 MB). Free memory was 950.6 MB in the beginning and 1.2 GB in the end (delta: -200.5 MB). Peak memory consumption was 37.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.95 ms. Allocated memory is still 1.2 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 28.02 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. * RCFGBuilder took 631.02 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 63.1 MB). Peak memory consumption was 63.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 69670.26 ms. Allocated memory was 1.2 GB in the beginning and 6.3 GB in the end (delta: 5.1 GB). Free memory was 1.1 GB in the beginning and 3.5 GB in the end (delta: -2.4 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. * Witness Printer took 109.49 ms. Allocated memory is still 6.3 GB. Free memory was 3.5 GB in the beginning and 3.5 GB in the end (delta: 41.7 MB). Peak memory consumption was 41.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L679] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L680] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L682] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L684] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L685] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L686] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L687] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L688] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L689] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L690] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L691] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L692] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L693] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L694] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L695] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L696] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L697] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L698] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L699] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L700] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L786] -1 pthread_t t1765; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] FCALL, FORK -1 pthread_create(&t1765, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L788] -1 pthread_t t1766; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] FCALL, FORK -1 pthread_create(&t1766, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L734] 0 y$w_buff1 = y$w_buff0 [L735] 0 y$w_buff0 = 1 [L736] 0 y$w_buff1_used = y$w_buff0_used [L737] 0 y$w_buff0_used = (_Bool)1 [L5] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L739] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L740] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L741] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L742] 0 y$r_buff0_thd2 = (_Bool)1 [L745] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L746] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L747] 0 y$flush_delayed = weak$$choice2 [L748] 0 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L749] 0 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L750] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L751] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L751] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L752] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L753] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L753] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L754] EXPR 0 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] 0 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L755] EXPR 0 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L755] 0 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L756] 0 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 0 y = y$flush_delayed ? y$mem_tmp : y [L758] 0 y$flush_delayed = (_Bool)0 [L761] 0 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L764] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L704] 1 x = 1 [L709] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L710] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L711] 1 y$flush_delayed = weak$$choice2 [L712] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L713] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L764] 0 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L765] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L765] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L766] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L713] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L714] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L714] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L715] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L715] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L766] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L767] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L767] 0 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L768] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L768] 0 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L771] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L717] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L718] EXPR 1 weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 1 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L719] EXPR 1 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L719] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L720] 1 __unbuffered_p0_EAX = y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L721] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L721] 1 y = y$flush_delayed ? y$mem_tmp : y [L722] 1 y$flush_delayed = (_Bool)0 [L727] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L791] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L795] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L796] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L796] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L797] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L797] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L799] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L802] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 283 locations, 3 error locations. UNSAFE Result, 69.5s OverallTime, 31 OverallIterations, 1 TraceHistogramMax, 20.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 11123 SDtfs, 13726 SDslu, 29410 SDs, 0 SdLazy, 11930 SolverSat, 695 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 313 GetRequests, 76 SyntacticMatches, 19 SemanticMatches, 218 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 228 ImplicationChecksByTransitivity, 1.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=228356occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 38.8s AutomataMinimizationTime, 30 MinimizatonAttempts, 370262 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 2509 NumberOfCodeBlocks, 2509 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 2377 ConstructedInterpolants, 0 QuantifiedInterpolants, 495615 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 30 InterpolantComputations, 30 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...