./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe006_rmo.oepc_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0cd3be1d Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe006_rmo.oepc_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8f6b6893573124eb06ced2ba0a85c6131f96466e ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-0cd3be1 [2018-11-28 12:57:11,059 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 12:57:11,060 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 12:57:11,066 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 12:57:11,066 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 12:57:11,067 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 12:57:11,068 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 12:57:11,069 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 12:57:11,071 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 12:57:11,071 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 12:57:11,072 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 12:57:11,072 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 12:57:11,073 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 12:57:11,074 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 12:57:11,075 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 12:57:11,075 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 12:57:11,076 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 12:57:11,078 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 12:57:11,079 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 12:57:11,081 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 12:57:11,081 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 12:57:11,082 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 12:57:11,084 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 12:57:11,084 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 12:57:11,085 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 12:57:11,086 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 12:57:11,086 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 12:57:11,087 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 12:57:11,088 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 12:57:11,089 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 12:57:11,089 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 12:57:11,090 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 12:57:11,090 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 12:57:11,090 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 12:57:11,091 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 12:57:11,091 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 12:57:11,091 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-28 12:57:11,102 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 12:57:11,102 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 12:57:11,103 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 12:57:11,103 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 12:57:11,103 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 12:57:11,103 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 12:57:11,104 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 12:57:11,104 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 12:57:11,104 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 12:57:11,104 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 12:57:11,104 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 12:57:11,104 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 12:57:11,106 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-28 12:57:11,106 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 12:57:11,106 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-28 12:57:11,106 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 12:57:11,106 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-28 12:57:11,106 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 12:57:11,106 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-28 12:57:11,107 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 12:57:11,107 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 12:57:11,107 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 12:57:11,107 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 12:57:11,107 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 12:57:11,107 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 12:57:11,108 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 12:57:11,108 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-28 12:57:11,108 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-28 12:57:11,108 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 12:57:11,108 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-28 12:57:11,108 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8f6b6893573124eb06ced2ba0a85c6131f96466e [2018-11-28 12:57:11,132 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 12:57:11,141 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 12:57:11,143 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 12:57:11,143 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 12:57:11,144 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 12:57:11,144 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe006_rmo.oepc_false-unreach-call.i [2018-11-28 12:57:11,182 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer/data/5cd86a6de/337a6a9b81b54843b125c20d04549cef/FLAG644691582 [2018-11-28 12:57:11,608 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 12:57:11,608 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/sv-benchmarks/c/pthread-wmm/safe006_rmo.oepc_false-unreach-call.i [2018-11-28 12:57:11,615 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer/data/5cd86a6de/337a6a9b81b54843b125c20d04549cef/FLAG644691582 [2018-11-28 12:57:11,625 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer/data/5cd86a6de/337a6a9b81b54843b125c20d04549cef [2018-11-28 12:57:11,627 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 12:57:11,627 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-28 12:57:11,628 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 12:57:11,628 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 12:57:11,630 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 12:57:11,631 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:57:11" (1/1) ... [2018-11-28 12:57:11,632 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3592b053 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:57:11, skipping insertion in model container [2018-11-28 12:57:11,632 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:57:11" (1/1) ... [2018-11-28 12:57:11,636 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 12:57:11,664 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 12:57:11,884 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 12:57:11,892 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 12:57:11,985 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 12:57:12,029 INFO L195 MainTranslator]: Completed translation [2018-11-28 12:57:12,029 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:57:12 WrapperNode [2018-11-28 12:57:12,030 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 12:57:12,030 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-28 12:57:12,030 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-28 12:57:12,030 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-28 12:57:12,038 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:57:12" (1/1) ... [2018-11-28 12:57:12,049 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:57:12" (1/1) ... [2018-11-28 12:57:12,065 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-28 12:57:12,065 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 12:57:12,065 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 12:57:12,066 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 12:57:12,071 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:57:12" (1/1) ... [2018-11-28 12:57:12,072 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:57:12" (1/1) ... [2018-11-28 12:57:12,075 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:57:12" (1/1) ... [2018-11-28 12:57:12,076 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:57:12" (1/1) ... [2018-11-28 12:57:12,083 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:57:12" (1/1) ... [2018-11-28 12:57:12,085 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:57:12" (1/1) ... [2018-11-28 12:57:12,088 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:57:12" (1/1) ... [2018-11-28 12:57:12,090 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 12:57:12,091 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 12:57:12,091 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 12:57:12,091 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 12:57:12,092 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:57:12" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 12:57:12,126 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 12:57:12,126 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-28 12:57:12,126 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-28 12:57:12,126 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-28 12:57:12,126 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 12:57:12,126 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-28 12:57:12,126 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-28 12:57:12,127 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-28 12:57:12,127 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-28 12:57:12,127 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-11-28 12:57:12,127 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-28 12:57:12,127 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 12:57:12,127 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 12:57:12,128 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-28 12:57:12,548 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 12:57:12,549 INFO L280 CfgBuilder]: Removed 6 assue(true) statements. [2018-11-28 12:57:12,549 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:57:12 BoogieIcfgContainer [2018-11-28 12:57:12,549 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 12:57:12,550 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 12:57:12,550 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 12:57:12,552 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 12:57:12,553 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 12:57:11" (1/3) ... [2018-11-28 12:57:12,553 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@503fc2ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:57:12, skipping insertion in model container [2018-11-28 12:57:12,554 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:57:12" (2/3) ... [2018-11-28 12:57:12,555 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@503fc2ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:57:12, skipping insertion in model container [2018-11-28 12:57:12,555 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:57:12" (3/3) ... [2018-11-28 12:57:12,556 INFO L112 eAbstractionObserver]: Analyzing ICFG safe006_rmo.oepc_false-unreach-call.i [2018-11-28 12:57:12,583 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,583 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,584 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,584 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,584 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,584 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,584 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,584 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,584 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,585 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,585 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,585 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,585 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,585 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,585 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,585 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,585 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,586 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,586 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,586 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,586 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,586 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,586 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,586 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,586 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,587 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,587 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,587 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,587 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,587 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,587 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,587 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,587 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,588 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,588 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,588 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,588 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,588 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,588 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,588 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,588 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,589 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,589 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,589 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,589 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,589 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,589 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,589 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,590 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,590 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,590 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,590 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,590 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,590 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,591 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,591 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,592 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,593 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,593 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,593 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,593 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,593 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,594 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,594 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,594 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,594 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,594 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,594 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,594 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,594 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,595 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,595 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,595 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,595 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,595 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,595 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,596 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,596 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,596 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,596 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,596 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,596 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,596 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,597 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,597 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,597 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,597 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,597 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,597 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,597 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,598 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,598 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,598 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,598 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,598 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,598 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,598 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,599 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,599 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet30.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,599 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet30.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,599 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,599 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,599 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet30.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,599 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet30.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,600 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,600 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,600 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,600 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,600 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,600 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,601 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,601 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,601 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,601 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,601 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,601 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,601 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,602 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,602 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,602 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,602 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,602 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,602 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,602 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,603 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,603 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,603 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,603 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,603 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,603 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,603 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,604 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,604 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,604 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,604 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet38.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,604 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet38.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,604 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,604 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,605 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet38.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,605 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet38.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:57:12,612 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-28 12:57:12,612 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 12:57:12,619 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-28 12:57:12,633 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-28 12:57:12,651 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 12:57:12,652 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 12:57:12,652 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-28 12:57:12,652 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 12:57:12,652 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 12:57:12,652 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 12:57:12,652 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 12:57:12,653 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 12:57:12,653 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 12:57:12,663 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 146places, 179 transitions [2018-11-28 12:57:13,847 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 25802 states. [2018-11-28 12:57:13,849 INFO L276 IsEmpty]: Start isEmpty. Operand 25802 states. [2018-11-28 12:57:13,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-11-28 12:57:13,885 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:13,886 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:13,887 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:13,892 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:13,892 INFO L82 PathProgramCache]: Analyzing trace with hash 403141255, now seen corresponding path program 1 times [2018-11-28 12:57:13,894 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:13,894 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:13,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:13,945 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:13,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:14,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:14,138 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:14,139 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:14,140 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:57:14,142 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:57:14,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:57:14,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:57:14,154 INFO L87 Difference]: Start difference. First operand 25802 states. Second operand 4 states. [2018-11-28 12:57:14,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:14,765 INFO L93 Difference]: Finished difference Result 39928 states and 145341 transitions. [2018-11-28 12:57:14,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:57:14,767 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 69 [2018-11-28 12:57:14,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:14,934 INFO L225 Difference]: With dead ends: 39928 [2018-11-28 12:57:14,934 INFO L226 Difference]: Without dead ends: 28880 [2018-11-28 12:57:14,935 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:57:15,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28880 states. [2018-11-28 12:57:15,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28880 to 27671. [2018-11-28 12:57:15,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27671 states. [2018-11-28 12:57:16,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27671 states to 27671 states and 103448 transitions. [2018-11-28 12:57:16,003 INFO L78 Accepts]: Start accepts. Automaton has 27671 states and 103448 transitions. Word has length 69 [2018-11-28 12:57:16,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:16,003 INFO L480 AbstractCegarLoop]: Abstraction has 27671 states and 103448 transitions. [2018-11-28 12:57:16,003 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:57:16,004 INFO L276 IsEmpty]: Start isEmpty. Operand 27671 states and 103448 transitions. [2018-11-28 12:57:16,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-28 12:57:16,020 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:16,021 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:16,021 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:16,021 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:16,021 INFO L82 PathProgramCache]: Analyzing trace with hash 663832756, now seen corresponding path program 1 times [2018-11-28 12:57:16,022 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:16,022 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:16,025 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:16,025 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:16,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:16,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:16,122 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:16,123 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:16,123 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:57:16,124 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:57:16,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:57:16,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:57:16,125 INFO L87 Difference]: Start difference. First operand 27671 states and 103448 transitions. Second operand 4 states. [2018-11-28 12:57:16,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:16,254 INFO L93 Difference]: Finished difference Result 10456 states and 34455 transitions. [2018-11-28 12:57:16,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:57:16,257 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 71 [2018-11-28 12:57:16,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:16,287 INFO L225 Difference]: With dead ends: 10456 [2018-11-28 12:57:16,287 INFO L226 Difference]: Without dead ends: 9713 [2018-11-28 12:57:16,288 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:57:16,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9713 states. [2018-11-28 12:57:16,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9713 to 9713. [2018-11-28 12:57:16,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9713 states. [2018-11-28 12:57:16,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9713 states to 9713 states and 32001 transitions. [2018-11-28 12:57:16,661 INFO L78 Accepts]: Start accepts. Automaton has 9713 states and 32001 transitions. Word has length 71 [2018-11-28 12:57:16,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:16,661 INFO L480 AbstractCegarLoop]: Abstraction has 9713 states and 32001 transitions. [2018-11-28 12:57:16,662 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:57:16,662 INFO L276 IsEmpty]: Start isEmpty. Operand 9713 states and 32001 transitions. [2018-11-28 12:57:16,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-28 12:57:16,671 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:16,671 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:16,672 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:16,672 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:16,672 INFO L82 PathProgramCache]: Analyzing trace with hash 444924284, now seen corresponding path program 1 times [2018-11-28 12:57:16,672 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:16,672 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:16,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:16,675 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:16,675 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:16,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:16,750 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:16,751 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:16,751 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:57:16,751 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:57:16,751 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:57:16,751 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:57:16,752 INFO L87 Difference]: Start difference. First operand 9713 states and 32001 transitions. Second operand 4 states. [2018-11-28 12:57:16,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:16,969 INFO L93 Difference]: Finished difference Result 9893 states and 31954 transitions. [2018-11-28 12:57:16,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:57:16,969 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2018-11-28 12:57:16,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:17,004 INFO L225 Difference]: With dead ends: 9893 [2018-11-28 12:57:17,005 INFO L226 Difference]: Without dead ends: 9893 [2018-11-28 12:57:17,005 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:57:17,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9893 states. [2018-11-28 12:57:17,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9893 to 9177. [2018-11-28 12:57:17,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9177 states. [2018-11-28 12:57:17,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9177 states to 9177 states and 29797 transitions. [2018-11-28 12:57:17,164 INFO L78 Accepts]: Start accepts. Automaton has 9177 states and 29797 transitions. Word has length 82 [2018-11-28 12:57:17,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:17,165 INFO L480 AbstractCegarLoop]: Abstraction has 9177 states and 29797 transitions. [2018-11-28 12:57:17,165 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:57:17,165 INFO L276 IsEmpty]: Start isEmpty. Operand 9177 states and 29797 transitions. [2018-11-28 12:57:17,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-11-28 12:57:17,174 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:17,174 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:17,174 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:17,175 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:17,175 INFO L82 PathProgramCache]: Analyzing trace with hash -2119204312, now seen corresponding path program 1 times [2018-11-28 12:57:17,175 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:17,175 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:17,177 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:17,177 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:17,178 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:17,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:17,241 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:17,242 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:17,242 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:57:17,242 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:57:17,242 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:57:17,243 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:57:17,243 INFO L87 Difference]: Start difference. First operand 9177 states and 29797 transitions. Second operand 4 states. [2018-11-28 12:57:17,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:17,382 INFO L93 Difference]: Finished difference Result 11853 states and 38038 transitions. [2018-11-28 12:57:17,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:57:17,383 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 84 [2018-11-28 12:57:17,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:17,399 INFO L225 Difference]: With dead ends: 11853 [2018-11-28 12:57:17,399 INFO L226 Difference]: Without dead ends: 11853 [2018-11-28 12:57:17,399 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:57:17,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11853 states. [2018-11-28 12:57:17,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11853 to 10053. [2018-11-28 12:57:17,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10053 states. [2018-11-28 12:57:17,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10053 states to 10053 states and 32340 transitions. [2018-11-28 12:57:17,524 INFO L78 Accepts]: Start accepts. Automaton has 10053 states and 32340 transitions. Word has length 84 [2018-11-28 12:57:17,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:17,524 INFO L480 AbstractCegarLoop]: Abstraction has 10053 states and 32340 transitions. [2018-11-28 12:57:17,524 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:57:17,524 INFO L276 IsEmpty]: Start isEmpty. Operand 10053 states and 32340 transitions. [2018-11-28 12:57:17,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-11-28 12:57:17,531 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:17,532 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:17,532 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:17,532 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:17,532 INFO L82 PathProgramCache]: Analyzing trace with hash -831413210, now seen corresponding path program 1 times [2018-11-28 12:57:17,532 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:17,532 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:17,534 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:17,534 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:17,534 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:17,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:17,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:17,603 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:17,603 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:57:17,603 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:57:17,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:57:17,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:57:17,604 INFO L87 Difference]: Start difference. First operand 10053 states and 32340 transitions. Second operand 5 states. [2018-11-28 12:57:18,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:18,029 INFO L93 Difference]: Finished difference Result 21056 states and 66227 transitions. [2018-11-28 12:57:18,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 12:57:18,030 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2018-11-28 12:57:18,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:18,053 INFO L225 Difference]: With dead ends: 21056 [2018-11-28 12:57:18,053 INFO L226 Difference]: Without dead ends: 21056 [2018-11-28 12:57:18,053 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:57:18,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21056 states. [2018-11-28 12:57:18,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21056 to 7819. [2018-11-28 12:57:18,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7819 states. [2018-11-28 12:57:18,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7819 states to 7819 states and 24831 transitions. [2018-11-28 12:57:18,222 INFO L78 Accepts]: Start accepts. Automaton has 7819 states and 24831 transitions. Word has length 84 [2018-11-28 12:57:18,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:18,223 INFO L480 AbstractCegarLoop]: Abstraction has 7819 states and 24831 transitions. [2018-11-28 12:57:18,223 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:57:18,223 INFO L276 IsEmpty]: Start isEmpty. Operand 7819 states and 24831 transitions. [2018-11-28 12:57:18,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-11-28 12:57:18,228 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:18,228 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:18,229 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:18,229 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:18,229 INFO L82 PathProgramCache]: Analyzing trace with hash 1666602727, now seen corresponding path program 1 times [2018-11-28 12:57:18,229 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:18,229 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:18,231 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:18,231 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:18,231 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:18,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:18,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:18,286 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:18,286 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:57:18,286 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:57:18,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:57:18,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:57:18,287 INFO L87 Difference]: Start difference. First operand 7819 states and 24831 transitions. Second operand 4 states. [2018-11-28 12:57:18,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:18,510 INFO L93 Difference]: Finished difference Result 9655 states and 30460 transitions. [2018-11-28 12:57:18,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:57:18,510 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 84 [2018-11-28 12:57:18,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:18,520 INFO L225 Difference]: With dead ends: 9655 [2018-11-28 12:57:18,520 INFO L226 Difference]: Without dead ends: 9303 [2018-11-28 12:57:18,520 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:57:18,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9303 states. [2018-11-28 12:57:18,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9303 to 8907. [2018-11-28 12:57:18,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8907 states. [2018-11-28 12:57:18,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8907 states to 8907 states and 28111 transitions. [2018-11-28 12:57:18,623 INFO L78 Accepts]: Start accepts. Automaton has 8907 states and 28111 transitions. Word has length 84 [2018-11-28 12:57:18,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:18,624 INFO L480 AbstractCegarLoop]: Abstraction has 8907 states and 28111 transitions. [2018-11-28 12:57:18,624 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:57:18,624 INFO L276 IsEmpty]: Start isEmpty. Operand 8907 states and 28111 transitions. [2018-11-28 12:57:18,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-11-28 12:57:18,630 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:18,630 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:18,630 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:18,630 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:18,630 INFO L82 PathProgramCache]: Analyzing trace with hash 1373199720, now seen corresponding path program 1 times [2018-11-28 12:57:18,630 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:18,630 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:18,632 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:18,632 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:18,632 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:18,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:18,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:18,710 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:18,711 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:57:18,711 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:57:18,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:57:18,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:57:18,711 INFO L87 Difference]: Start difference. First operand 8907 states and 28111 transitions. Second operand 5 states. [2018-11-28 12:57:18,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:18,740 INFO L93 Difference]: Finished difference Result 2243 states and 5729 transitions. [2018-11-28 12:57:18,741 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 12:57:18,741 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2018-11-28 12:57:18,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:18,743 INFO L225 Difference]: With dead ends: 2243 [2018-11-28 12:57:18,743 INFO L226 Difference]: Without dead ends: 1823 [2018-11-28 12:57:18,743 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:57:18,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1823 states. [2018-11-28 12:57:18,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1823 to 1823. [2018-11-28 12:57:18,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1823 states. [2018-11-28 12:57:18,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1823 states to 1823 states and 4478 transitions. [2018-11-28 12:57:18,764 INFO L78 Accepts]: Start accepts. Automaton has 1823 states and 4478 transitions. Word has length 84 [2018-11-28 12:57:18,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:18,764 INFO L480 AbstractCegarLoop]: Abstraction has 1823 states and 4478 transitions. [2018-11-28 12:57:18,764 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:57:18,765 INFO L276 IsEmpty]: Start isEmpty. Operand 1823 states and 4478 transitions. [2018-11-28 12:57:18,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-28 12:57:18,767 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:18,767 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:18,767 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:18,767 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:18,768 INFO L82 PathProgramCache]: Analyzing trace with hash 183115434, now seen corresponding path program 1 times [2018-11-28 12:57:18,768 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:18,768 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:18,769 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:18,769 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:18,769 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:18,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:18,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:18,815 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:18,815 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:57:18,815 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:57:18,815 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:57:18,815 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:57:18,816 INFO L87 Difference]: Start difference. First operand 1823 states and 4478 transitions. Second operand 4 states. [2018-11-28 12:57:18,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:18,923 INFO L93 Difference]: Finished difference Result 2590 states and 6289 transitions. [2018-11-28 12:57:18,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:57:18,924 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 99 [2018-11-28 12:57:18,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:18,926 INFO L225 Difference]: With dead ends: 2590 [2018-11-28 12:57:18,927 INFO L226 Difference]: Without dead ends: 2590 [2018-11-28 12:57:18,927 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:57:18,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2590 states. [2018-11-28 12:57:18,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2590 to 2044. [2018-11-28 12:57:18,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2044 states. [2018-11-28 12:57:18,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2044 states to 2044 states and 4971 transitions. [2018-11-28 12:57:18,953 INFO L78 Accepts]: Start accepts. Automaton has 2044 states and 4971 transitions. Word has length 99 [2018-11-28 12:57:18,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:18,954 INFO L480 AbstractCegarLoop]: Abstraction has 2044 states and 4971 transitions. [2018-11-28 12:57:18,954 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:57:18,954 INFO L276 IsEmpty]: Start isEmpty. Operand 2044 states and 4971 transitions. [2018-11-28 12:57:18,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-28 12:57:18,957 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:18,957 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:18,957 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:18,957 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:18,957 INFO L82 PathProgramCache]: Analyzing trace with hash 478855048, now seen corresponding path program 1 times [2018-11-28 12:57:18,957 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:18,957 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:18,959 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:18,959 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:18,959 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:18,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:18,983 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:18,984 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:18,984 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:57:18,984 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:57:18,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:57:18,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:57:18,984 INFO L87 Difference]: Start difference. First operand 2044 states and 4971 transitions. Second operand 3 states. [2018-11-28 12:57:19,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:19,010 INFO L93 Difference]: Finished difference Result 3018 states and 7306 transitions. [2018-11-28 12:57:19,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:57:19,011 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 101 [2018-11-28 12:57:19,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:19,014 INFO L225 Difference]: With dead ends: 3018 [2018-11-28 12:57:19,014 INFO L226 Difference]: Without dead ends: 3018 [2018-11-28 12:57:19,014 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:57:19,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3018 states. [2018-11-28 12:57:19,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3018 to 2199. [2018-11-28 12:57:19,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2199 states. [2018-11-28 12:57:19,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2199 states to 2199 states and 5275 transitions. [2018-11-28 12:57:19,043 INFO L78 Accepts]: Start accepts. Automaton has 2199 states and 5275 transitions. Word has length 101 [2018-11-28 12:57:19,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:19,043 INFO L480 AbstractCegarLoop]: Abstraction has 2199 states and 5275 transitions. [2018-11-28 12:57:19,043 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:57:19,043 INFO L276 IsEmpty]: Start isEmpty. Operand 2199 states and 5275 transitions. [2018-11-28 12:57:19,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-28 12:57:19,046 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:19,046 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:19,046 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:19,046 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:19,047 INFO L82 PathProgramCache]: Analyzing trace with hash 1662381219, now seen corresponding path program 1 times [2018-11-28 12:57:19,047 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:19,047 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:19,048 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:19,048 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:19,048 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:19,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:19,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:19,117 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:19,117 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:57:19,117 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:57:19,117 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:57:19,117 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:57:19,119 INFO L87 Difference]: Start difference. First operand 2199 states and 5275 transitions. Second operand 5 states. [2018-11-28 12:57:19,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:19,256 INFO L93 Difference]: Finished difference Result 2586 states and 6171 transitions. [2018-11-28 12:57:19,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:57:19,256 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 101 [2018-11-28 12:57:19,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:19,258 INFO L225 Difference]: With dead ends: 2586 [2018-11-28 12:57:19,258 INFO L226 Difference]: Without dead ends: 2586 [2018-11-28 12:57:19,258 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:57:19,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2586 states. [2018-11-28 12:57:19,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2586 to 2314. [2018-11-28 12:57:19,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2314 states. [2018-11-28 12:57:19,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2314 states to 2314 states and 5529 transitions. [2018-11-28 12:57:19,278 INFO L78 Accepts]: Start accepts. Automaton has 2314 states and 5529 transitions. Word has length 101 [2018-11-28 12:57:19,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:19,278 INFO L480 AbstractCegarLoop]: Abstraction has 2314 states and 5529 transitions. [2018-11-28 12:57:19,279 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:57:19,279 INFO L276 IsEmpty]: Start isEmpty. Operand 2314 states and 5529 transitions. [2018-11-28 12:57:19,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-28 12:57:19,281 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:19,281 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:19,281 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:19,281 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:19,281 INFO L82 PathProgramCache]: Analyzing trace with hash 371905859, now seen corresponding path program 1 times [2018-11-28 12:57:19,281 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:19,282 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:19,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:19,283 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:19,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:19,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:19,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:19,369 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:19,369 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:57:19,369 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:57:19,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:57:19,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:57:19,370 INFO L87 Difference]: Start difference. First operand 2314 states and 5529 transitions. Second operand 4 states. [2018-11-28 12:57:19,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:19,526 INFO L93 Difference]: Finished difference Result 3059 states and 7192 transitions. [2018-11-28 12:57:19,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:57:19,527 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 101 [2018-11-28 12:57:19,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:19,529 INFO L225 Difference]: With dead ends: 3059 [2018-11-28 12:57:19,529 INFO L226 Difference]: Without dead ends: 2968 [2018-11-28 12:57:19,530 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:57:19,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2968 states. [2018-11-28 12:57:19,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2968 to 2748. [2018-11-28 12:57:19,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2748 states. [2018-11-28 12:57:19,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2748 states to 2748 states and 6514 transitions. [2018-11-28 12:57:19,558 INFO L78 Accepts]: Start accepts. Automaton has 2748 states and 6514 transitions. Word has length 101 [2018-11-28 12:57:19,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:19,559 INFO L480 AbstractCegarLoop]: Abstraction has 2748 states and 6514 transitions. [2018-11-28 12:57:19,559 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:57:19,559 INFO L276 IsEmpty]: Start isEmpty. Operand 2748 states and 6514 transitions. [2018-11-28 12:57:19,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-28 12:57:19,562 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:19,562 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:19,562 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:19,562 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:19,562 INFO L82 PathProgramCache]: Analyzing trace with hash 125454562, now seen corresponding path program 1 times [2018-11-28 12:57:19,563 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:19,563 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:19,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:19,564 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:19,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:19,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:19,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:19,643 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:19,644 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:57:19,644 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:57:19,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:57:19,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:57:19,645 INFO L87 Difference]: Start difference. First operand 2748 states and 6514 transitions. Second operand 5 states. [2018-11-28 12:57:19,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:19,780 INFO L93 Difference]: Finished difference Result 3237 states and 7660 transitions. [2018-11-28 12:57:19,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:57:19,780 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 101 [2018-11-28 12:57:19,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:19,783 INFO L225 Difference]: With dead ends: 3237 [2018-11-28 12:57:19,783 INFO L226 Difference]: Without dead ends: 3213 [2018-11-28 12:57:19,784 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:57:19,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3213 states. [2018-11-28 12:57:19,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3213 to 2737. [2018-11-28 12:57:19,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2737 states. [2018-11-28 12:57:19,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2737 states to 2737 states and 6490 transitions. [2018-11-28 12:57:19,819 INFO L78 Accepts]: Start accepts. Automaton has 2737 states and 6490 transitions. Word has length 101 [2018-11-28 12:57:19,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:19,819 INFO L480 AbstractCegarLoop]: Abstraction has 2737 states and 6490 transitions. [2018-11-28 12:57:19,819 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:57:19,819 INFO L276 IsEmpty]: Start isEmpty. Operand 2737 states and 6490 transitions. [2018-11-28 12:57:19,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-28 12:57:19,823 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:19,823 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:19,824 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:19,824 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:19,824 INFO L82 PathProgramCache]: Analyzing trace with hash -1884649279, now seen corresponding path program 2 times [2018-11-28 12:57:19,824 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:19,824 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:19,826 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:19,826 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:19,826 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:19,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:19,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:19,913 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:19,913 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:57:19,913 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:57:19,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:57:19,914 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:57:19,914 INFO L87 Difference]: Start difference. First operand 2737 states and 6490 transitions. Second operand 5 states. [2018-11-28 12:57:20,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:20,068 INFO L93 Difference]: Finished difference Result 3403 states and 8061 transitions. [2018-11-28 12:57:20,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 12:57:20,069 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 101 [2018-11-28 12:57:20,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:20,072 INFO L225 Difference]: With dead ends: 3403 [2018-11-28 12:57:20,073 INFO L226 Difference]: Without dead ends: 3403 [2018-11-28 12:57:20,073 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:57:20,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3403 states. [2018-11-28 12:57:20,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3403 to 2697. [2018-11-28 12:57:20,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2697 states. [2018-11-28 12:57:20,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2697 states to 2697 states and 6404 transitions. [2018-11-28 12:57:20,202 INFO L78 Accepts]: Start accepts. Automaton has 2697 states and 6404 transitions. Word has length 101 [2018-11-28 12:57:20,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:20,203 INFO L480 AbstractCegarLoop]: Abstraction has 2697 states and 6404 transitions. [2018-11-28 12:57:20,203 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:57:20,203 INFO L276 IsEmpty]: Start isEmpty. Operand 2697 states and 6404 transitions. [2018-11-28 12:57:20,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-28 12:57:20,207 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:20,207 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:20,207 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:20,207 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:20,208 INFO L82 PathProgramCache]: Analyzing trace with hash 701671620, now seen corresponding path program 1 times [2018-11-28 12:57:20,208 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:20,208 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:20,209 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:20,209 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 12:57:20,209 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:20,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:20,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:20,313 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:20,313 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:57:20,313 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:57:20,315 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:57:20,315 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:57:20,315 INFO L87 Difference]: Start difference. First operand 2697 states and 6404 transitions. Second operand 6 states. [2018-11-28 12:57:20,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:20,521 INFO L93 Difference]: Finished difference Result 3534 states and 8342 transitions. [2018-11-28 12:57:20,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 12:57:20,521 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 101 [2018-11-28 12:57:20,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:20,524 INFO L225 Difference]: With dead ends: 3534 [2018-11-28 12:57:20,524 INFO L226 Difference]: Without dead ends: 3534 [2018-11-28 12:57:20,524 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:57:20,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3534 states. [2018-11-28 12:57:20,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3534 to 2839. [2018-11-28 12:57:20,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2839 states. [2018-11-28 12:57:20,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2839 states to 2839 states and 6712 transitions. [2018-11-28 12:57:20,550 INFO L78 Accepts]: Start accepts. Automaton has 2839 states and 6712 transitions. Word has length 101 [2018-11-28 12:57:20,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:20,550 INFO L480 AbstractCegarLoop]: Abstraction has 2839 states and 6712 transitions. [2018-11-28 12:57:20,550 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:57:20,550 INFO L276 IsEmpty]: Start isEmpty. Operand 2839 states and 6712 transitions. [2018-11-28 12:57:20,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-28 12:57:20,553 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:20,553 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:20,553 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:20,554 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:20,554 INFO L82 PathProgramCache]: Analyzing trace with hash -1482005307, now seen corresponding path program 1 times [2018-11-28 12:57:20,554 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:20,554 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:20,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:20,556 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:20,556 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:20,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:20,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:20,703 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:20,703 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-28 12:57:20,704 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 12:57:20,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 12:57:20,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-11-28 12:57:20,704 INFO L87 Difference]: Start difference. First operand 2839 states and 6712 transitions. Second operand 10 states. [2018-11-28 12:57:21,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:21,151 INFO L93 Difference]: Finished difference Result 3902 states and 9221 transitions. [2018-11-28 12:57:21,151 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-28 12:57:21,151 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 101 [2018-11-28 12:57:21,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:21,154 INFO L225 Difference]: With dead ends: 3902 [2018-11-28 12:57:21,155 INFO L226 Difference]: Without dead ends: 3902 [2018-11-28 12:57:21,155 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=297, Unknown=0, NotChecked=0, Total=380 [2018-11-28 12:57:21,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3902 states. [2018-11-28 12:57:21,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3902 to 3116. [2018-11-28 12:57:21,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3116 states. [2018-11-28 12:57:21,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3116 states to 3116 states and 7373 transitions. [2018-11-28 12:57:21,183 INFO L78 Accepts]: Start accepts. Automaton has 3116 states and 7373 transitions. Word has length 101 [2018-11-28 12:57:21,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:21,184 INFO L480 AbstractCegarLoop]: Abstraction has 3116 states and 7373 transitions. [2018-11-28 12:57:21,184 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 12:57:21,184 INFO L276 IsEmpty]: Start isEmpty. Operand 3116 states and 7373 transitions. [2018-11-28 12:57:21,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-28 12:57:21,187 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:21,187 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:21,187 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:21,187 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:21,187 INFO L82 PathProgramCache]: Analyzing trace with hash 1005507526, now seen corresponding path program 1 times [2018-11-28 12:57:21,187 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:21,188 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:21,189 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:21,189 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:21,189 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:21,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:21,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:21,233 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:21,233 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:57:21,234 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:57:21,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:57:21,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:57:21,234 INFO L87 Difference]: Start difference. First operand 3116 states and 7373 transitions. Second operand 3 states. [2018-11-28 12:57:21,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:21,245 INFO L93 Difference]: Finished difference Result 3116 states and 7357 transitions. [2018-11-28 12:57:21,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:57:21,245 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 101 [2018-11-28 12:57:21,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:21,248 INFO L225 Difference]: With dead ends: 3116 [2018-11-28 12:57:21,248 INFO L226 Difference]: Without dead ends: 3116 [2018-11-28 12:57:21,248 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:57:21,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3116 states. [2018-11-28 12:57:21,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3116 to 3116. [2018-11-28 12:57:21,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3116 states. [2018-11-28 12:57:21,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3116 states to 3116 states and 7357 transitions. [2018-11-28 12:57:21,276 INFO L78 Accepts]: Start accepts. Automaton has 3116 states and 7357 transitions. Word has length 101 [2018-11-28 12:57:21,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:21,276 INFO L480 AbstractCegarLoop]: Abstraction has 3116 states and 7357 transitions. [2018-11-28 12:57:21,276 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:57:21,276 INFO L276 IsEmpty]: Start isEmpty. Operand 3116 states and 7357 transitions. [2018-11-28 12:57:21,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-11-28 12:57:21,281 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:21,281 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:21,281 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:21,281 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:21,281 INFO L82 PathProgramCache]: Analyzing trace with hash 609492140, now seen corresponding path program 1 times [2018-11-28 12:57:21,281 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:21,282 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:21,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:21,283 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:21,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:21,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:57:21,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:57:21,422 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:57:21,422 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-28 12:57:21,423 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 12:57:21,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 12:57:21,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2018-11-28 12:57:21,423 INFO L87 Difference]: Start difference. First operand 3116 states and 7357 transitions. Second operand 11 states. [2018-11-28 12:57:21,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:57:21,525 INFO L93 Difference]: Finished difference Result 4056 states and 9638 transitions. [2018-11-28 12:57:21,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 12:57:21,525 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 103 [2018-11-28 12:57:21,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:57:21,527 INFO L225 Difference]: With dead ends: 4056 [2018-11-28 12:57:21,527 INFO L226 Difference]: Without dead ends: 1363 [2018-11-28 12:57:21,527 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-11-28 12:57:21,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1363 states. [2018-11-28 12:57:21,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1363 to 1363. [2018-11-28 12:57:21,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1363 states. [2018-11-28 12:57:21,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1363 states to 1363 states and 3100 transitions. [2018-11-28 12:57:21,538 INFO L78 Accepts]: Start accepts. Automaton has 1363 states and 3100 transitions. Word has length 103 [2018-11-28 12:57:21,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:57:21,538 INFO L480 AbstractCegarLoop]: Abstraction has 1363 states and 3100 transitions. [2018-11-28 12:57:21,538 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 12:57:21,539 INFO L276 IsEmpty]: Start isEmpty. Operand 1363 states and 3100 transitions. [2018-11-28 12:57:21,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-11-28 12:57:21,540 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:57:21,540 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:57:21,540 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:57:21,540 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:57:21,540 INFO L82 PathProgramCache]: Analyzing trace with hash 574154220, now seen corresponding path program 2 times [2018-11-28 12:57:21,540 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:57:21,540 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:57:21,542 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:21,542 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:57:21,542 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:57:21,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 12:57:21,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 12:57:21,607 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 12:57:21,749 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-28 12:57:21,750 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 12:57:21 BasicIcfg [2018-11-28 12:57:21,750 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 12:57:21,750 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 12:57:21,751 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 12:57:21,751 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 12:57:21,751 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:57:12" (3/4) ... [2018-11-28 12:57:21,753 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-28 12:57:21,878 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_cd89a365-f30c-437a-b3ca-9da4e54225bd/bin-2019/uautomizer/witness.graphml [2018-11-28 12:57:21,878 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 12:57:21,879 INFO L168 Benchmark]: Toolchain (without parser) took 10251.86 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 785.9 MB). Free memory was 956.0 MB in the beginning and 958.1 MB in the end (delta: -2.1 MB). Peak memory consumption was 783.8 MB. Max. memory is 11.5 GB. [2018-11-28 12:57:21,881 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 985.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 12:57:21,881 INFO L168 Benchmark]: CACSL2BoogieTranslator took 401.79 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.1 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -164.0 MB). Peak memory consumption was 34.1 MB. Max. memory is 11.5 GB. [2018-11-28 12:57:21,882 INFO L168 Benchmark]: Boogie Procedure Inliner took 35.15 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. [2018-11-28 12:57:21,882 INFO L168 Benchmark]: Boogie Preprocessor took 25.02 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. [2018-11-28 12:57:21,882 INFO L168 Benchmark]: RCFGBuilder took 458.35 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.5 MB). Peak memory consumption was 48.5 MB. Max. memory is 11.5 GB. [2018-11-28 12:57:21,882 INFO L168 Benchmark]: TraceAbstraction took 9200.61 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 643.8 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 47.2 MB). Peak memory consumption was 691.0 MB. Max. memory is 11.5 GB. [2018-11-28 12:57:21,883 INFO L168 Benchmark]: Witness Printer took 127.59 ms. Allocated memory is still 1.8 GB. Free memory was 1.0 GB in the beginning and 958.1 MB in the end (delta: 59.6 MB). Peak memory consumption was 59.6 MB. Max. memory is 11.5 GB. [2018-11-28 12:57:21,885 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 985.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 401.79 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.1 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -164.0 MB). Peak memory consumption was 34.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 35.15 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.02 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. * RCFGBuilder took 458.35 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.5 MB). Peak memory consumption was 48.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 9200.61 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 643.8 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 47.2 MB). Peak memory consumption was 691.0 MB. Max. memory is 11.5 GB. * Witness Printer took 127.59 ms. Allocated memory is still 1.8 GB. Free memory was 1.0 GB in the beginning and 958.1 MB in the end (delta: 59.6 MB). Peak memory consumption was 59.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L675] -1 _Bool __unbuffered_p0_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0] [L676] -1 int __unbuffered_p0_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0] [L677] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0] [L678] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0] [L679] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0] [L680] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0] [L681] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0] [L682] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0] [L683] -1 _Bool __unbuffered_p0_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0] [L684] -1 int *__unbuffered_p0_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}] [L685] -1 int __unbuffered_p0_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0] [L686] -1 _Bool __unbuffered_p0_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0] [L687] -1 int __unbuffered_p0_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0] [L688] -1 _Bool __unbuffered_p0_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0] [L690] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0] [L691] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L692] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L694] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L696] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}] [L697] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0] [L698] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0] [L699] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L700] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L701] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L702] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L703] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L704] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L705] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L706] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L707] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L708] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L709] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L710] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L711] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L712] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L713] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L775] -1 pthread_t t1931; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L776] FCALL, FORK -1 pthread_create(&t1931, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] -1 pthread_t t1932; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L718] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L719] 0 y$flush_delayed = weak$$choice2 [L720] EXPR 0 \read(y) [L720] 0 y$mem_tmp = y [L778] FCALL, FORK -1 pthread_create(&t1932, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=0, y={261:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L721] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L721] EXPR 0 \read(y) [L721] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, \read(y)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=0, y={261:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L721] 0 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L722] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=0, x=0, y={261:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L722] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L723] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=0, y={261:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L723] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L724] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=0, y={261:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L724] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L725] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y={261:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L725] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L726] EXPR 0 weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=0, y={261:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L726] 0 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L727] EXPR 0 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y={261:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L727] 0 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L728] 0 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L729] 0 __unbuffered_p0_EAX$read_delayed_var = &y [L730] EXPR 0 \read(y) [L730] 0 __unbuffered_p0_EAX = y [L731] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=0, y={261:0}, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L731] 0 y = y$flush_delayed ? y$mem_tmp : y [L732] 0 y$flush_delayed = (_Bool)0 [L735] 0 x = 1 [L740] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L747] 1 __unbuffered_p1_EAX = x [L750] 1 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L753] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L753] EXPR 1 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y [L753] EXPR 1 \read(y) [L753] EXPR 1 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [\read(y)=1, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1] [L753] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\read(y)=1, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1] [L753] 1 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L754] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L754] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L755] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L755] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L756] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L756] 1 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L757] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L757] 1 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L760] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L780] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L784] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L784] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L784] EXPR -1 \read(y) [L784] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L784] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L784] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L785] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L786] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L786] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L788] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L788] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L791] -1 weak$$choice1 = __VERIFIER_nondet_bool() [L792] EXPR -1 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=1, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L792] EXPR -1 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L792] EXPR -1 \read(*__unbuffered_p0_EAX$read_delayed_var) [L792] EXPR -1 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=1, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L792] EXPR -1 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=1, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L792] -1 __unbuffered_p0_EAX = __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L793] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=1, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=1, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={261:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=1, weak$$choice2=1, x=1, y={261:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 210 locations, 1 error locations. UNSAFE Result, 9.1s OverallTime, 18 OverallIterations, 1 TraceHistogramMax, 3.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3663 SDtfs, 3658 SDslu, 7436 SDs, 0 SdLazy, 2429 SolverSat, 165 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 156 GetRequests, 46 SyntacticMatches, 22 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=27671occurred in iteration=1, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 2.3s AutomataMinimizationTime, 17 MinimizatonAttempts, 21878 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 1671 NumberOfCodeBlocks, 1671 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 1551 ConstructedInterpolants, 0 QuantifiedInterpolants, 337365 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...