./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe007_power.oepc_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0cd3be1d Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe007_power.oepc_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 246cd0fd8accc881602692e9402e2d305a4a00e9 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-0cd3be1 [2018-11-28 12:38:41,544 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 12:38:41,546 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 12:38:41,555 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 12:38:41,555 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 12:38:41,556 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 12:38:41,557 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 12:38:41,558 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 12:38:41,559 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 12:38:41,560 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 12:38:41,561 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 12:38:41,561 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 12:38:41,562 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 12:38:41,562 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 12:38:41,563 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 12:38:41,563 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 12:38:41,564 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 12:38:41,565 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 12:38:41,567 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 12:38:41,567 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 12:38:41,568 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 12:38:41,569 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 12:38:41,570 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 12:38:41,571 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 12:38:41,571 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 12:38:41,571 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 12:38:41,572 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 12:38:41,573 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 12:38:41,573 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 12:38:41,574 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 12:38:41,574 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 12:38:41,575 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 12:38:41,575 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 12:38:41,575 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 12:38:41,576 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 12:38:41,577 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 12:38:41,577 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-28 12:38:41,586 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 12:38:41,586 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 12:38:41,587 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 12:38:41,587 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 12:38:41,587 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 12:38:41,588 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 12:38:41,588 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 12:38:41,588 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 12:38:41,588 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 12:38:41,588 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 12:38:41,589 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 12:38:41,589 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 12:38:41,589 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-28 12:38:41,589 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 12:38:41,589 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-28 12:38:41,589 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 12:38:41,590 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-28 12:38:41,590 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 12:38:41,590 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-28 12:38:41,590 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 12:38:41,590 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 12:38:41,590 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 12:38:41,591 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 12:38:41,591 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 12:38:41,591 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 12:38:41,591 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 12:38:41,591 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-28 12:38:41,591 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-28 12:38:41,592 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 12:38:41,592 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-28 12:38:41,592 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 246cd0fd8accc881602692e9402e2d305a4a00e9 [2018-11-28 12:38:41,618 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 12:38:41,627 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 12:38:41,629 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 12:38:41,630 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 12:38:41,630 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 12:38:41,631 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe007_power.oepc_false-unreach-call.i [2018-11-28 12:38:41,676 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer/data/003d7d711/b753f228b4d24659be2140d6dbce0793/FLAG4afbd0b4f [2018-11-28 12:38:42,091 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 12:38:42,092 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/sv-benchmarks/c/pthread-wmm/safe007_power.oepc_false-unreach-call.i [2018-11-28 12:38:42,102 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer/data/003d7d711/b753f228b4d24659be2140d6dbce0793/FLAG4afbd0b4f [2018-11-28 12:38:42,117 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer/data/003d7d711/b753f228b4d24659be2140d6dbce0793 [2018-11-28 12:38:42,120 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 12:38:42,122 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-28 12:38:42,123 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 12:38:42,123 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 12:38:42,126 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 12:38:42,127 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:38:42" (1/1) ... [2018-11-28 12:38:42,130 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7b6c5ef8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:38:42, skipping insertion in model container [2018-11-28 12:38:42,130 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 12:38:42" (1/1) ... [2018-11-28 12:38:42,138 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 12:38:42,177 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 12:38:42,446 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 12:38:42,460 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 12:38:42,569 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 12:38:42,612 INFO L195 MainTranslator]: Completed translation [2018-11-28 12:38:42,612 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:38:42 WrapperNode [2018-11-28 12:38:42,612 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 12:38:42,613 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-28 12:38:42,613 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-28 12:38:42,613 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-28 12:38:42,619 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:38:42" (1/1) ... [2018-11-28 12:38:42,632 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:38:42" (1/1) ... [2018-11-28 12:38:42,651 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-28 12:38:42,651 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 12:38:42,651 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 12:38:42,652 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 12:38:42,659 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:38:42" (1/1) ... [2018-11-28 12:38:42,659 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:38:42" (1/1) ... [2018-11-28 12:38:42,663 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:38:42" (1/1) ... [2018-11-28 12:38:42,664 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:38:42" (1/1) ... [2018-11-28 12:38:42,674 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:38:42" (1/1) ... [2018-11-28 12:38:42,679 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:38:42" (1/1) ... [2018-11-28 12:38:42,682 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:38:42" (1/1) ... [2018-11-28 12:38:42,685 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 12:38:42,686 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 12:38:42,686 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 12:38:42,686 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 12:38:42,687 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:38:42" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 12:38:42,736 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 12:38:42,737 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-28 12:38:42,737 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-28 12:38:42,737 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-28 12:38:42,737 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 12:38:42,737 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-28 12:38:42,737 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-28 12:38:42,737 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-28 12:38:42,738 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-28 12:38:42,738 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-11-28 12:38:42,738 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-11-28 12:38:42,738 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-11-28 12:38:42,738 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-28 12:38:42,738 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 12:38:42,738 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 12:38:42,740 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-28 12:38:43,358 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 12:38:43,358 INFO L280 CfgBuilder]: Removed 6 assue(true) statements. [2018-11-28 12:38:43,359 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:38:43 BoogieIcfgContainer [2018-11-28 12:38:43,359 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 12:38:43,359 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 12:38:43,359 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 12:38:43,362 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 12:38:43,362 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 12:38:42" (1/3) ... [2018-11-28 12:38:43,363 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@64c4583b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:38:43, skipping insertion in model container [2018-11-28 12:38:43,363 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 12:38:42" (2/3) ... [2018-11-28 12:38:43,363 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@64c4583b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 12:38:43, skipping insertion in model container [2018-11-28 12:38:43,363 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:38:43" (3/3) ... [2018-11-28 12:38:43,365 INFO L112 eAbstractionObserver]: Analyzing ICFG safe007_power.oepc_false-unreach-call.i [2018-11-28 12:38:43,405 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,405 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,405 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,405 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,406 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,406 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,406 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,406 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,406 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,406 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,406 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,407 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,407 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,407 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,407 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,407 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,407 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,408 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,408 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,408 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,408 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,408 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,408 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,408 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,408 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,409 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,409 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,409 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,410 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,410 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,410 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,410 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,410 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,411 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,411 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,411 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,411 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,411 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,412 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,412 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,412 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,412 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,412 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,413 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,413 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,413 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,413 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,413 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,414 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,414 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,414 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,414 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,414 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,414 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,414 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,415 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,415 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,415 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,415 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,415 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,415 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,416 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,416 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,416 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,416 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,416 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,416 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,416 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,417 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,417 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,417 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,417 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,417 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,417 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,418 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,418 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,418 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,418 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,418 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,418 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,418 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,419 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,419 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,419 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,419 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,419 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,419 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,419 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,420 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,420 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,420 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,420 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,422 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,422 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,422 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,422 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,422 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,422 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,423 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,423 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,423 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,423 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,423 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,423 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,423 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,424 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,424 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,424 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,424 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,424 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,425 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,425 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,425 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,425 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,425 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,426 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,426 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,426 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,426 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,426 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,426 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,426 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,427 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,427 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,427 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,427 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,427 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,427 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,428 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,428 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,428 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,428 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,429 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,429 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,429 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,429 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,429 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,429 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,430 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,430 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,430 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,430 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,430 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,431 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,431 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,431 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,431 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,431 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,431 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,432 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,432 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,432 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,432 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,433 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,433 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,433 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,433 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,433 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,433 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,434 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,434 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,434 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,434 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,434 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,435 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~mem50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,435 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,435 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,435 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,435 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,436 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,436 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet52.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,436 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet52.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,436 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,436 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,437 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,437 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,437 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,437 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,437 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet52.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,437 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet52.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,438 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,438 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,438 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,438 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,438 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,438 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,439 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,439 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,439 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,439 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,440 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet53.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,440 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet53.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,440 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,440 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,440 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet53.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,440 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet53.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,441 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,441 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,441 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,441 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,441 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,442 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,442 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,442 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,442 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,442 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,443 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,443 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,443 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,443 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,443 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,444 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,444 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,444 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,444 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,444 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,445 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,445 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,445 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,445 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,445 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,445 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,446 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,446 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,446 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,446 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,446 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet61.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,447 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet61.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,447 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,447 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,447 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet61.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,447 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet61.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 12:38:43,476 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-28 12:38:43,476 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 12:38:43,481 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-28 12:38:43,490 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-28 12:38:43,506 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 12:38:43,507 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 12:38:43,507 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-28 12:38:43,507 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 12:38:43,507 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 12:38:43,507 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 12:38:43,507 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 12:38:43,507 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 12:38:43,507 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 12:38:43,518 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 201places, 252 transitions [2018-11-28 12:39:33,795 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 247742 states. [2018-11-28 12:39:33,797 INFO L276 IsEmpty]: Start isEmpty. Operand 247742 states. [2018-11-28 12:39:33,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-11-28 12:39:33,957 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:39:33,958 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:39:33,960 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:39:33,965 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:39:33,966 INFO L82 PathProgramCache]: Analyzing trace with hash -382934914, now seen corresponding path program 1 times [2018-11-28 12:39:33,967 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:39:33,968 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:39:34,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:39:34,027 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:39:34,027 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:39:34,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:39:34,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:39:34,253 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:39:34,253 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:39:34,255 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:39:34,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:39:34,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:39:34,269 INFO L87 Difference]: Start difference. First operand 247742 states. Second operand 4 states. [2018-11-28 12:39:36,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:39:36,624 INFO L93 Difference]: Finished difference Result 359554 states and 1600674 transitions. [2018-11-28 12:39:36,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:39:36,626 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2018-11-28 12:39:36,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:39:37,532 INFO L225 Difference]: With dead ends: 359554 [2018-11-28 12:39:37,532 INFO L226 Difference]: Without dead ends: 242704 [2018-11-28 12:39:37,534 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:39:39,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242704 states. [2018-11-28 12:39:48,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242704 to 233669. [2018-11-28 12:39:48,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233669 states. [2018-11-28 12:39:50,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233669 states to 233669 states and 1066251 transitions. [2018-11-28 12:39:50,589 INFO L78 Accepts]: Start accepts. Automaton has 233669 states and 1066251 transitions. Word has length 79 [2018-11-28 12:39:50,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:39:50,591 INFO L480 AbstractCegarLoop]: Abstraction has 233669 states and 1066251 transitions. [2018-11-28 12:39:50,591 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:39:50,591 INFO L276 IsEmpty]: Start isEmpty. Operand 233669 states and 1066251 transitions. [2018-11-28 12:39:50,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-11-28 12:39:50,704 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:39:50,705 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:39:50,705 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:39:50,706 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:39:50,706 INFO L82 PathProgramCache]: Analyzing trace with hash 1608091721, now seen corresponding path program 1 times [2018-11-28 12:39:50,706 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:39:50,706 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:39:50,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:39:50,709 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:39:50,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:39:50,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:39:50,805 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:39:50,806 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:39:50,806 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:39:50,808 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:39:50,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:39:50,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:39:50,809 INFO L87 Difference]: Start difference. First operand 233669 states and 1066251 transitions. Second operand 4 states. [2018-11-28 12:39:52,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:39:52,135 INFO L93 Difference]: Finished difference Result 209062 states and 934763 transitions. [2018-11-28 12:39:52,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:39:52,135 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 81 [2018-11-28 12:39:52,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:39:52,851 INFO L225 Difference]: With dead ends: 209062 [2018-11-28 12:39:52,851 INFO L226 Difference]: Without dead ends: 202957 [2018-11-28 12:39:52,852 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:39:54,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202957 states. [2018-11-28 12:40:02,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202957 to 202957. [2018-11-28 12:40:02,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202957 states. [2018-11-28 12:40:03,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202957 states to 202957 states and 912730 transitions. [2018-11-28 12:40:03,765 INFO L78 Accepts]: Start accepts. Automaton has 202957 states and 912730 transitions. Word has length 81 [2018-11-28 12:40:03,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:03,765 INFO L480 AbstractCegarLoop]: Abstraction has 202957 states and 912730 transitions. [2018-11-28 12:40:03,766 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:40:03,766 INFO L276 IsEmpty]: Start isEmpty. Operand 202957 states and 912730 transitions. [2018-11-28 12:40:03,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-28 12:40:03,813 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:03,814 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:03,814 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:03,814 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:03,814 INFO L82 PathProgramCache]: Analyzing trace with hash -348409793, now seen corresponding path program 1 times [2018-11-28 12:40:03,814 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:03,814 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:03,816 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:03,817 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:03,817 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:03,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:03,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:03,906 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:03,906 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 12:40:03,906 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 12:40:03,906 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 12:40:03,906 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:40:03,907 INFO L87 Difference]: Start difference. First operand 202957 states and 912730 transitions. Second operand 5 states. [2018-11-28 12:40:04,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:04,264 INFO L93 Difference]: Finished difference Result 71281 states and 288925 transitions. [2018-11-28 12:40:04,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 12:40:04,265 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2018-11-28 12:40:04,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:04,456 INFO L225 Difference]: With dead ends: 71281 [2018-11-28 12:40:04,456 INFO L226 Difference]: Without dead ends: 66005 [2018-11-28 12:40:04,456 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:40:04,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66005 states. [2018-11-28 12:40:05,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66005 to 66005. [2018-11-28 12:40:05,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66005 states. [2018-11-28 12:40:05,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66005 states to 66005 states and 267256 transitions. [2018-11-28 12:40:05,482 INFO L78 Accepts]: Start accepts. Automaton has 66005 states and 267256 transitions. Word has length 82 [2018-11-28 12:40:05,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:05,483 INFO L480 AbstractCegarLoop]: Abstraction has 66005 states and 267256 transitions. [2018-11-28 12:40:05,483 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 12:40:05,483 INFO L276 IsEmpty]: Start isEmpty. Operand 66005 states and 267256 transitions. [2018-11-28 12:40:05,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 12:40:05,529 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:05,529 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:05,530 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:05,530 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:05,530 INFO L82 PathProgramCache]: Analyzing trace with hash -2092655356, now seen corresponding path program 1 times [2018-11-28 12:40:05,530 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:05,530 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:05,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:05,531 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:05,532 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:05,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:05,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:05,620 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:05,621 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:40:05,622 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:40:05,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:40:05,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:40:05,622 INFO L87 Difference]: Start difference. First operand 66005 states and 267256 transitions. Second operand 4 states. [2018-11-28 12:40:06,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:06,737 INFO L93 Difference]: Finished difference Result 59359 states and 236711 transitions. [2018-11-28 12:40:06,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:40:06,738 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2018-11-28 12:40:06,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:06,868 INFO L225 Difference]: With dead ends: 59359 [2018-11-28 12:40:06,868 INFO L226 Difference]: Without dead ends: 59359 [2018-11-28 12:40:06,868 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:40:07,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59359 states. [2018-11-28 12:40:07,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59359 to 56415. [2018-11-28 12:40:07,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56415 states. [2018-11-28 12:40:07,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56415 states to 56415 states and 225639 transitions. [2018-11-28 12:40:07,704 INFO L78 Accepts]: Start accepts. Automaton has 56415 states and 225639 transitions. Word has length 93 [2018-11-28 12:40:07,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:07,704 INFO L480 AbstractCegarLoop]: Abstraction has 56415 states and 225639 transitions. [2018-11-28 12:40:07,704 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:40:07,704 INFO L276 IsEmpty]: Start isEmpty. Operand 56415 states and 225639 transitions. [2018-11-28 12:40:07,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-28 12:40:07,741 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:07,741 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:07,741 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:07,742 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:07,742 INFO L82 PathProgramCache]: Analyzing trace with hash -742600946, now seen corresponding path program 1 times [2018-11-28 12:40:07,742 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:07,742 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:07,743 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:07,743 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:07,744 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:07,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:07,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:07,818 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:07,818 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 12:40:07,818 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 12:40:07,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 12:40:07,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 12:40:07,819 INFO L87 Difference]: Start difference. First operand 56415 states and 225639 transitions. Second operand 4 states. [2018-11-28 12:40:08,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:08,198 INFO L93 Difference]: Finished difference Result 71415 states and 281304 transitions. [2018-11-28 12:40:08,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 12:40:08,198 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2018-11-28 12:40:08,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:08,355 INFO L225 Difference]: With dead ends: 71415 [2018-11-28 12:40:08,355 INFO L226 Difference]: Without dead ends: 71415 [2018-11-28 12:40:08,355 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 12:40:08,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71415 states. [2018-11-28 12:40:09,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71415 to 64615. [2018-11-28 12:40:09,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64615 states. [2018-11-28 12:40:10,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64615 states to 64615 states and 255072 transitions. [2018-11-28 12:40:10,070 INFO L78 Accepts]: Start accepts. Automaton has 64615 states and 255072 transitions. Word has length 95 [2018-11-28 12:40:10,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:10,070 INFO L480 AbstractCegarLoop]: Abstraction has 64615 states and 255072 transitions. [2018-11-28 12:40:10,070 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 12:40:10,070 INFO L276 IsEmpty]: Start isEmpty. Operand 64615 states and 255072 transitions. [2018-11-28 12:40:10,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-28 12:40:10,114 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:10,114 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:10,115 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:10,115 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:10,115 INFO L82 PathProgramCache]: Analyzing trace with hash 545190156, now seen corresponding path program 1 times [2018-11-28 12:40:10,115 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:10,115 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:10,117 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:10,117 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:10,117 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:10,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:10,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:10,229 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:10,229 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:40:10,229 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:40:10,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:40:10,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:40:10,230 INFO L87 Difference]: Start difference. First operand 64615 states and 255072 transitions. Second operand 7 states. [2018-11-28 12:40:11,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:11,315 INFO L93 Difference]: Finished difference Result 115904 states and 447241 transitions. [2018-11-28 12:40:11,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-28 12:40:11,315 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2018-11-28 12:40:11,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:11,574 INFO L225 Difference]: With dead ends: 115904 [2018-11-28 12:40:11,575 INFO L226 Difference]: Without dead ends: 115804 [2018-11-28 12:40:11,575 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-11-28 12:40:12,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115804 states. [2018-11-28 12:40:12,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115804 to 72637. [2018-11-28 12:40:12,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72637 states. [2018-11-28 12:40:13,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72637 states to 72637 states and 281800 transitions. [2018-11-28 12:40:13,042 INFO L78 Accepts]: Start accepts. Automaton has 72637 states and 281800 transitions. Word has length 95 [2018-11-28 12:40:13,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:13,042 INFO L480 AbstractCegarLoop]: Abstraction has 72637 states and 281800 transitions. [2018-11-28 12:40:13,042 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:40:13,042 INFO L276 IsEmpty]: Start isEmpty. Operand 72637 states and 281800 transitions. [2018-11-28 12:40:13,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-28 12:40:13,085 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:13,085 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:13,086 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:13,086 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:13,086 INFO L82 PathProgramCache]: Analyzing trace with hash -290147186, now seen corresponding path program 1 times [2018-11-28 12:40:13,086 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:13,086 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:13,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:13,088 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:13,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:13,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:13,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:13,163 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:13,163 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:40:13,163 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:40:13,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:40:13,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:40:13,163 INFO L87 Difference]: Start difference. First operand 72637 states and 281800 transitions. Second operand 6 states. [2018-11-28 12:40:13,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:13,246 INFO L93 Difference]: Finished difference Result 18909 states and 62264 transitions. [2018-11-28 12:40:13,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:40:13,246 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-28 12:40:13,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:13,265 INFO L225 Difference]: With dead ends: 18909 [2018-11-28 12:40:13,266 INFO L226 Difference]: Without dead ends: 15405 [2018-11-28 12:40:13,266 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:40:13,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15405 states. [2018-11-28 12:40:13,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15405 to 15405. [2018-11-28 12:40:13,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15405 states. [2018-11-28 12:40:13,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15405 states to 15405 states and 49664 transitions. [2018-11-28 12:40:13,418 INFO L78 Accepts]: Start accepts. Automaton has 15405 states and 49664 transitions. Word has length 95 [2018-11-28 12:40:13,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:13,419 INFO L480 AbstractCegarLoop]: Abstraction has 15405 states and 49664 transitions. [2018-11-28 12:40:13,419 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:40:13,419 INFO L276 IsEmpty]: Start isEmpty. Operand 15405 states and 49664 transitions. [2018-11-28 12:40:13,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-11-28 12:40:13,432 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:13,432 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:13,432 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:13,432 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:13,432 INFO L82 PathProgramCache]: Analyzing trace with hash 753687416, now seen corresponding path program 1 times [2018-11-28 12:40:13,432 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:13,432 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:13,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:13,434 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:13,434 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:13,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:13,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:13,568 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:13,568 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 12:40:13,569 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 12:40:13,569 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 12:40:13,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:40:13,569 INFO L87 Difference]: Start difference. First operand 15405 states and 49664 transitions. Second operand 8 states. [2018-11-28 12:40:14,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:14,217 INFO L93 Difference]: Finished difference Result 34372 states and 108112 transitions. [2018-11-28 12:40:14,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-28 12:40:14,217 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 110 [2018-11-28 12:40:14,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:14,255 INFO L225 Difference]: With dead ends: 34372 [2018-11-28 12:40:14,255 INFO L226 Difference]: Without dead ends: 33910 [2018-11-28 12:40:14,256 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=195, Unknown=0, NotChecked=0, Total=272 [2018-11-28 12:40:14,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33910 states. [2018-11-28 12:40:14,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33910 to 14794. [2018-11-28 12:40:14,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14794 states. [2018-11-28 12:40:14,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14794 states to 14794 states and 47623 transitions. [2018-11-28 12:40:14,500 INFO L78 Accepts]: Start accepts. Automaton has 14794 states and 47623 transitions. Word has length 110 [2018-11-28 12:40:14,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:14,501 INFO L480 AbstractCegarLoop]: Abstraction has 14794 states and 47623 transitions. [2018-11-28 12:40:14,501 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 12:40:14,501 INFO L276 IsEmpty]: Start isEmpty. Operand 14794 states and 47623 transitions. [2018-11-28 12:40:14,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-11-28 12:40:14,512 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:14,513 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:14,513 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:14,513 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:14,513 INFO L82 PathProgramCache]: Analyzing trace with hash 460284409, now seen corresponding path program 1 times [2018-11-28 12:40:14,513 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:14,513 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:14,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:14,515 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:14,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:14,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:14,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:14,601 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:14,601 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 12:40:14,602 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 12:40:14,602 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 12:40:14,602 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-28 12:40:14,602 INFO L87 Difference]: Start difference. First operand 14794 states and 47623 transitions. Second operand 6 states. [2018-11-28 12:40:14,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:14,881 INFO L93 Difference]: Finished difference Result 25520 states and 80603 transitions. [2018-11-28 12:40:14,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 12:40:14,881 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 110 [2018-11-28 12:40:14,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:14,910 INFO L225 Difference]: With dead ends: 25520 [2018-11-28 12:40:14,910 INFO L226 Difference]: Without dead ends: 25210 [2018-11-28 12:40:14,910 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2018-11-28 12:40:14,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25210 states. [2018-11-28 12:40:15,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25210 to 17648. [2018-11-28 12:40:15,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17648 states. [2018-11-28 12:40:15,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17648 states to 17648 states and 56300 transitions. [2018-11-28 12:40:15,157 INFO L78 Accepts]: Start accepts. Automaton has 17648 states and 56300 transitions. Word has length 110 [2018-11-28 12:40:15,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:15,157 INFO L480 AbstractCegarLoop]: Abstraction has 17648 states and 56300 transitions. [2018-11-28 12:40:15,157 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 12:40:15,157 INFO L276 IsEmpty]: Start isEmpty. Operand 17648 states and 56300 transitions. [2018-11-28 12:40:15,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-11-28 12:40:15,178 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:15,178 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:15,178 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:15,178 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:15,178 INFO L82 PathProgramCache]: Analyzing trace with hash -1723392518, now seen corresponding path program 1 times [2018-11-28 12:40:15,179 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:15,179 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:15,180 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:15,180 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:15,180 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:15,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:15,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:15,316 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:15,316 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:40:15,317 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:40:15,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:40:15,317 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:40:15,317 INFO L87 Difference]: Start difference. First operand 17648 states and 56300 transitions. Second operand 7 states. [2018-11-28 12:40:15,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:15,725 INFO L93 Difference]: Finished difference Result 28931 states and 90480 transitions. [2018-11-28 12:40:15,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-28 12:40:15,726 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 110 [2018-11-28 12:40:15,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:15,757 INFO L225 Difference]: With dead ends: 28931 [2018-11-28 12:40:15,758 INFO L226 Difference]: Without dead ends: 28931 [2018-11-28 12:40:15,758 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=139, Unknown=0, NotChecked=0, Total=210 [2018-11-28 12:40:15,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28931 states. [2018-11-28 12:40:15,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28931 to 19718. [2018-11-28 12:40:15,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19718 states. [2018-11-28 12:40:16,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19718 states to 19718 states and 62566 transitions. [2018-11-28 12:40:16,010 INFO L78 Accepts]: Start accepts. Automaton has 19718 states and 62566 transitions. Word has length 110 [2018-11-28 12:40:16,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:16,010 INFO L480 AbstractCegarLoop]: Abstraction has 19718 states and 62566 transitions. [2018-11-28 12:40:16,010 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:40:16,010 INFO L276 IsEmpty]: Start isEmpty. Operand 19718 states and 62566 transitions. [2018-11-28 12:40:16,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-11-28 12:40:16,028 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:16,028 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:16,028 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:16,028 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:16,028 INFO L82 PathProgramCache]: Analyzing trace with hash -1030290821, now seen corresponding path program 1 times [2018-11-28 12:40:16,028 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:16,028 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:16,030 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:16,030 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:16,030 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:16,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:16,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:16,153 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:16,153 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-28 12:40:16,154 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 12:40:16,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 12:40:16,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-28 12:40:16,154 INFO L87 Difference]: Start difference. First operand 19718 states and 62566 transitions. Second operand 9 states. [2018-11-28 12:40:16,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:16,502 INFO L93 Difference]: Finished difference Result 25556 states and 80436 transitions. [2018-11-28 12:40:16,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-28 12:40:16,502 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 110 [2018-11-28 12:40:16,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:16,531 INFO L225 Difference]: With dead ends: 25556 [2018-11-28 12:40:16,531 INFO L226 Difference]: Without dead ends: 25556 [2018-11-28 12:40:16,532 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=58, Invalid=182, Unknown=0, NotChecked=0, Total=240 [2018-11-28 12:40:16,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25556 states. [2018-11-28 12:40:16,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25556 to 21546. [2018-11-28 12:40:16,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21546 states. [2018-11-28 12:40:16,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21546 states to 21546 states and 68074 transitions. [2018-11-28 12:40:16,802 INFO L78 Accepts]: Start accepts. Automaton has 21546 states and 68074 transitions. Word has length 110 [2018-11-28 12:40:16,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:16,802 INFO L480 AbstractCegarLoop]: Abstraction has 21546 states and 68074 transitions. [2018-11-28 12:40:16,802 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 12:40:16,802 INFO L276 IsEmpty]: Start isEmpty. Operand 21546 states and 68074 transitions. [2018-11-28 12:40:16,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-11-28 12:40:16,818 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:16,818 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:16,819 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:16,819 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:16,819 INFO L82 PathProgramCache]: Analyzing trace with hash 1457222012, now seen corresponding path program 1 times [2018-11-28 12:40:16,819 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:16,819 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:16,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:16,820 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:16,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:16,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:16,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:16,867 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:16,868 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:40:16,868 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:40:16,868 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:40:16,868 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:40:16,870 INFO L87 Difference]: Start difference. First operand 21546 states and 68074 transitions. Second operand 3 states. [2018-11-28 12:40:16,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:16,935 INFO L93 Difference]: Finished difference Result 18073 states and 56040 transitions. [2018-11-28 12:40:16,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:40:16,936 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 110 [2018-11-28 12:40:16,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:16,955 INFO L225 Difference]: With dead ends: 18073 [2018-11-28 12:40:16,955 INFO L226 Difference]: Without dead ends: 17533 [2018-11-28 12:40:16,955 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:40:16,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17533 states. [2018-11-28 12:40:17,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17533 to 16114. [2018-11-28 12:40:17,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16114 states. [2018-11-28 12:40:17,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16114 states to 16114 states and 50176 transitions. [2018-11-28 12:40:17,120 INFO L78 Accepts]: Start accepts. Automaton has 16114 states and 50176 transitions. Word has length 110 [2018-11-28 12:40:17,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:17,120 INFO L480 AbstractCegarLoop]: Abstraction has 16114 states and 50176 transitions. [2018-11-28 12:40:17,120 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:40:17,120 INFO L276 IsEmpty]: Start isEmpty. Operand 16114 states and 50176 transitions. [2018-11-28 12:40:17,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-11-28 12:40:17,133 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:17,134 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:17,134 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:17,134 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:17,134 INFO L82 PathProgramCache]: Analyzing trace with hash -893981857, now seen corresponding path program 1 times [2018-11-28 12:40:17,134 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:17,134 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:17,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:17,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:17,136 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:17,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:17,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:17,219 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:17,219 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:40:17,219 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:40:17,219 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:40:17,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:40:17,220 INFO L87 Difference]: Start difference. First operand 16114 states and 50176 transitions. Second operand 7 states. [2018-11-28 12:40:17,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:17,443 INFO L93 Difference]: Finished difference Result 21922 states and 67831 transitions. [2018-11-28 12:40:17,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 12:40:17,443 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 112 [2018-11-28 12:40:17,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:17,468 INFO L225 Difference]: With dead ends: 21922 [2018-11-28 12:40:17,468 INFO L226 Difference]: Without dead ends: 21922 [2018-11-28 12:40:17,468 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2018-11-28 12:40:17,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21922 states. [2018-11-28 12:40:17,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21922 to 15319. [2018-11-28 12:40:17,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15319 states. [2018-11-28 12:40:17,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15319 states to 15319 states and 47215 transitions. [2018-11-28 12:40:17,654 INFO L78 Accepts]: Start accepts. Automaton has 15319 states and 47215 transitions. Word has length 112 [2018-11-28 12:40:17,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:17,654 INFO L480 AbstractCegarLoop]: Abstraction has 15319 states and 47215 transitions. [2018-11-28 12:40:17,654 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:40:17,654 INFO L276 IsEmpty]: Start isEmpty. Operand 15319 states and 47215 transitions. [2018-11-28 12:40:17,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-11-28 12:40:17,667 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:17,667 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:17,667 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:17,667 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:17,668 INFO L82 PathProgramCache]: Analyzing trace with hash -200880160, now seen corresponding path program 1 times [2018-11-28 12:40:17,668 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:17,668 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:17,669 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:17,669 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:17,669 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:17,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:17,749 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:17,750 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:17,750 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 12:40:17,750 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 12:40:17,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 12:40:17,750 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-28 12:40:17,750 INFO L87 Difference]: Start difference. First operand 15319 states and 47215 transitions. Second operand 8 states. [2018-11-28 12:40:17,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:17,934 INFO L93 Difference]: Finished difference Result 17646 states and 54461 transitions. [2018-11-28 12:40:17,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 12:40:17,935 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 112 [2018-11-28 12:40:17,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:17,954 INFO L225 Difference]: With dead ends: 17646 [2018-11-28 12:40:17,954 INFO L226 Difference]: Without dead ends: 17646 [2018-11-28 12:40:17,955 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2018-11-28 12:40:17,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17646 states. [2018-11-28 12:40:18,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17646 to 16812. [2018-11-28 12:40:18,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16812 states. [2018-11-28 12:40:18,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16812 states to 16812 states and 51735 transitions. [2018-11-28 12:40:18,135 INFO L78 Accepts]: Start accepts. Automaton has 16812 states and 51735 transitions. Word has length 112 [2018-11-28 12:40:18,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:18,135 INFO L480 AbstractCegarLoop]: Abstraction has 16812 states and 51735 transitions. [2018-11-28 12:40:18,135 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 12:40:18,135 INFO L276 IsEmpty]: Start isEmpty. Operand 16812 states and 51735 transitions. [2018-11-28 12:40:18,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-11-28 12:40:18,150 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:18,150 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:18,150 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:18,150 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:18,150 INFO L82 PathProgramCache]: Analyzing trace with hash -2008334623, now seen corresponding path program 1 times [2018-11-28 12:40:18,150 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:18,150 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:18,151 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:18,152 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:18,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:18,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:18,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:18,213 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:18,213 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 12:40:18,213 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 12:40:18,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 12:40:18,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:40:18,213 INFO L87 Difference]: Start difference. First operand 16812 states and 51735 transitions. Second operand 3 states. [2018-11-28 12:40:18,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:18,279 INFO L93 Difference]: Finished difference Result 16812 states and 51671 transitions. [2018-11-28 12:40:18,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 12:40:18,280 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 112 [2018-11-28 12:40:18,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:18,304 INFO L225 Difference]: With dead ends: 16812 [2018-11-28 12:40:18,304 INFO L226 Difference]: Without dead ends: 16812 [2018-11-28 12:40:18,305 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 12:40:18,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16812 states. [2018-11-28 12:40:18,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16812 to 16812. [2018-11-28 12:40:18,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16812 states. [2018-11-28 12:40:18,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16812 states to 16812 states and 51671 transitions. [2018-11-28 12:40:18,513 INFO L78 Accepts]: Start accepts. Automaton has 16812 states and 51671 transitions. Word has length 112 [2018-11-28 12:40:18,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:18,514 INFO L480 AbstractCegarLoop]: Abstraction has 16812 states and 51671 transitions. [2018-11-28 12:40:18,514 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 12:40:18,514 INFO L276 IsEmpty]: Start isEmpty. Operand 16812 states and 51671 transitions. [2018-11-28 12:40:18,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-11-28 12:40:18,529 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:18,529 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:18,529 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:18,529 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:18,529 INFO L82 PathProgramCache]: Analyzing trace with hash -196611291, now seen corresponding path program 1 times [2018-11-28 12:40:18,530 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:18,530 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:18,530 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:18,531 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:18,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:18,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:18,636 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:18,636 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:18,636 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:40:18,636 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:40:18,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:40:18,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:40:18,637 INFO L87 Difference]: Start difference. First operand 16812 states and 51671 transitions. Second operand 7 states. [2018-11-28 12:40:18,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:18,748 INFO L93 Difference]: Finished difference Result 19676 states and 60623 transitions. [2018-11-28 12:40:18,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:40:18,748 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 114 [2018-11-28 12:40:18,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:18,755 INFO L225 Difference]: With dead ends: 19676 [2018-11-28 12:40:18,755 INFO L226 Difference]: Without dead ends: 6252 [2018-11-28 12:40:18,755 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-28 12:40:18,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6252 states. [2018-11-28 12:40:18,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6252 to 6252. [2018-11-28 12:40:18,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6252 states. [2018-11-28 12:40:18,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6252 states to 6252 states and 16863 transitions. [2018-11-28 12:40:18,809 INFO L78 Accepts]: Start accepts. Automaton has 6252 states and 16863 transitions. Word has length 114 [2018-11-28 12:40:18,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:18,809 INFO L480 AbstractCegarLoop]: Abstraction has 6252 states and 16863 transitions. [2018-11-28 12:40:18,809 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:40:18,810 INFO L276 IsEmpty]: Start isEmpty. Operand 6252 states and 16863 transitions. [2018-11-28 12:40:18,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-11-28 12:40:18,814 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:18,814 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:18,814 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:18,814 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:18,815 INFO L82 PathProgramCache]: Analyzing trace with hash 1103975957, now seen corresponding path program 2 times [2018-11-28 12:40:18,815 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:18,815 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:18,816 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:18,816 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 12:40:18,816 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:18,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 12:40:18,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 12:40:18,906 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 12:40:18,907 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 12:40:18,907 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 12:40:18,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 12:40:18,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-28 12:40:18,907 INFO L87 Difference]: Start difference. First operand 6252 states and 16863 transitions. Second operand 7 states. [2018-11-28 12:40:18,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 12:40:18,967 INFO L93 Difference]: Finished difference Result 8956 states and 25415 transitions. [2018-11-28 12:40:18,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 12:40:18,967 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 114 [2018-11-28 12:40:18,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 12:40:18,971 INFO L225 Difference]: With dead ends: 8956 [2018-11-28 12:40:18,972 INFO L226 Difference]: Without dead ends: 3899 [2018-11-28 12:40:18,972 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-28 12:40:18,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3899 states. [2018-11-28 12:40:19,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3899 to 3899. [2018-11-28 12:40:19,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3899 states. [2018-11-28 12:40:19,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3899 states to 3899 states and 11300 transitions. [2018-11-28 12:40:19,005 INFO L78 Accepts]: Start accepts. Automaton has 3899 states and 11300 transitions. Word has length 114 [2018-11-28 12:40:19,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 12:40:19,005 INFO L480 AbstractCegarLoop]: Abstraction has 3899 states and 11300 transitions. [2018-11-28 12:40:19,005 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 12:40:19,005 INFO L276 IsEmpty]: Start isEmpty. Operand 3899 states and 11300 transitions. [2018-11-28 12:40:19,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-11-28 12:40:19,008 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 12:40:19,008 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 12:40:19,008 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 12:40:19,009 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 12:40:19,009 INFO L82 PathProgramCache]: Analyzing trace with hash 822100215, now seen corresponding path program 3 times [2018-11-28 12:40:19,009 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 12:40:19,009 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 12:40:19,010 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:19,010 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 12:40:19,010 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 12:40:19,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 12:40:19,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 12:40:19,069 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 12:40:19,214 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-28 12:40:19,215 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 12:40:19 BasicIcfg [2018-11-28 12:40:19,215 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 12:40:19,215 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 12:40:19,216 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 12:40:19,216 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 12:40:19,218 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 12:38:43" (3/4) ... [2018-11-28 12:40:19,220 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-28 12:40:19,382 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_021eacd3-a086-46c1-a541-489cb54ef7f2/bin-2019/uautomizer/witness.graphml [2018-11-28 12:40:19,382 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 12:40:19,383 INFO L168 Benchmark]: Toolchain (without parser) took 97262.49 ms. Allocated memory was 1.0 GB in the beginning and 7.3 GB in the end (delta: 6.3 GB). Free memory was 951.7 MB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 3.3 GB. Max. memory is 11.5 GB. [2018-11-28 12:40:19,385 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 12:40:19,385 INFO L168 Benchmark]: CACSL2BoogieTranslator took 489.92 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 149.4 MB). Free memory was 951.7 MB in the beginning and 1.1 GB in the end (delta: -175.6 MB). Peak memory consumption was 38.1 MB. Max. memory is 11.5 GB. [2018-11-28 12:40:19,385 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.41 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.8 MB). Peak memory consumption was 3.8 MB. Max. memory is 11.5 GB. [2018-11-28 12:40:19,385 INFO L168 Benchmark]: Boogie Preprocessor took 34.20 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-28 12:40:19,386 INFO L168 Benchmark]: RCFGBuilder took 672.90 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 57.0 MB). Peak memory consumption was 57.0 MB. Max. memory is 11.5 GB. [2018-11-28 12:40:19,386 INFO L168 Benchmark]: TraceAbstraction took 95855.91 ms. Allocated memory was 1.2 GB in the beginning and 7.3 GB in the end (delta: 6.1 GB). Free memory was 1.1 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 5.0 GB. Max. memory is 11.5 GB. [2018-11-28 12:40:19,386 INFO L168 Benchmark]: Witness Printer took 167.09 ms. Allocated memory is still 7.3 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 67.0 MB). Peak memory consumption was 67.0 MB. Max. memory is 11.5 GB. [2018-11-28 12:40:19,387 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 489.92 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 149.4 MB). Free memory was 951.7 MB in the beginning and 1.1 GB in the end (delta: -175.6 MB). Peak memory consumption was 38.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.41 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.8 MB). Peak memory consumption was 3.8 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 34.20 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 672.90 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 57.0 MB). Peak memory consumption was 57.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 95855.91 ms. Allocated memory was 1.2 GB in the beginning and 7.3 GB in the end (delta: 6.1 GB). Free memory was 1.1 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 5.0 GB. Max. memory is 11.5 GB. * Witness Printer took 167.09 ms. Allocated memory is still 7.3 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 67.0 MB). Peak memory consumption was 67.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L673] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L675] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 _Bool __unbuffered_p0_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0] [L677] -1 int __unbuffered_p0_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0] [L678] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0] [L679] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0] [L680] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0] [L681] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0] [L682] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0] [L683] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0] [L684] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0] [L685] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0] [L686] -1 _Bool __unbuffered_p0_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0] [L687] -1 int *__unbuffered_p0_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}] [L688] -1 int __unbuffered_p0_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0] [L689] -1 _Bool __unbuffered_p0_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0] [L690] -1 int __unbuffered_p0_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0] [L691] -1 _Bool __unbuffered_p0_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0] [L693] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0] [L695] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L696] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L697] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L699] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L701] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L703] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}] [L704] -1 _Bool z$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0] [L705] -1 int z$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0] [L706] -1 _Bool z$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0] [L707] -1 _Bool z$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0] [L708] -1 _Bool z$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0] [L709] -1 _Bool z$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0] [L710] -1 _Bool z$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0] [L711] -1 _Bool z$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0] [L712] -1 _Bool z$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0] [L713] -1 _Bool z$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0] [L714] -1 _Bool z$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0] [L715] -1 int *z$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}] [L716] -1 int z$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0] [L717] -1 _Bool z$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0] [L718] -1 int z$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0] [L719] -1 _Bool z$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L720] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L721] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L722] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] -1 pthread_t t1939; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L801] FCALL, FORK -1 pthread_create(&t1939, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L726] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L727] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L728] 0 z$flush_delayed = weak$$choice2 [L729] EXPR 0 \read(z) [L729] 0 z$mem_tmp = z [L730] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L731] EXPR 0 !z$w_buff0_used ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (weak$$choice0 ? z : (weak$$choice1 ? z$w_buff0 : z$w_buff1)) : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (weak$$choice0 ? z$w_buff1 : z$w_buff0) : (weak$$choice0 ? z$w_buff0 : z)))) [L731] EXPR 0 \read(z) [L731] EXPR 0 !z$w_buff0_used ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (weak$$choice0 ? z : (weak$$choice1 ? z$w_buff0 : z$w_buff1)) : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (weak$$choice0 ? z$w_buff1 : z$w_buff0) : (weak$$choice0 ? z$w_buff0 : z)))) VAL [!z$w_buff0_used ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (weak$$choice0 ? z : (weak$$choice1 ? z$w_buff0 : z$w_buff1)) : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (weak$$choice0 ? z$w_buff1 : z$w_buff0) : (weak$$choice0 ? z$w_buff0 : z))))=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=0, y=0, z={263:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L802] -1 pthread_t t1940; VAL [!z$w_buff0_used ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (weak$$choice0 ? z : (weak$$choice1 ? z$w_buff0 : z$w_buff1)) : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (weak$$choice0 ? z$w_buff1 : z$w_buff0) : (weak$$choice0 ? z$w_buff0 : z))))=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=0, y=0, z={263:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 0 z = !z$w_buff0_used ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (weak$$choice0 ? z : (weak$$choice1 ? z$w_buff0 : z$w_buff1)) : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (weak$$choice0 ? z$w_buff1 : z$w_buff0) : (weak$$choice0 ? z$w_buff0 : z)))) [L732] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))))=0, x=0, y=0, z={263:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L732] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)))) [L733] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1))))=0, x=0, y=0, z={263:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L733] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)))) [L734] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? weak$$choice0 || !weak$$choice1 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? weak$$choice0 || !weak$$choice1 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? weak$$choice0 : weak$$choice0))))=0, x=0, y=0, z={263:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L734] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? weak$$choice0 || !weak$$choice1 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? weak$$choice0 : weak$$choice0)))) [L735] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? weak$$choice0 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? weak$$choice0 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))))=0, x=0, y=0, z={263:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L735] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? weak$$choice0 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)))) [L803] FCALL, FORK -1 pthread_create(&t1940, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=0, y=0, z={263:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L804] -1 pthread_t t1941; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=0, y=0, z={263:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L805] FCALL, FORK -1 pthread_create(&t1941, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=0, y=0, z={263:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L736] EXPR 0 weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))))=0, x=0, y=0, z={263:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L736] 0 z$r_buff0_thd1 = weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)))) [L737] EXPR 0 weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (weak$$choice0 ? z$r_buff1_thd1 : (_Bool)0) : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (weak$$choice0 ? z$r_buff1_thd1 : (_Bool)0) : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))))=0, x=0, y=0, z={263:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L737] 0 z$r_buff1_thd1 = weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (weak$$choice0 ? z$r_buff1_thd1 : (_Bool)0) : (z$w_buff0_used && z$r_buff1_thd1 && z$w_buff1_used && !z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)))) [L738] 0 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L739] 0 __unbuffered_p0_EAX$read_delayed_var = &z [L740] EXPR 0 \read(z) [L740] 0 __unbuffered_p0_EAX = z [L741] EXPR 0 z$flush_delayed ? z$mem_tmp : z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=0, y=0, z={263:0}, z$flush_delayed=1, z$flush_delayed ? z$mem_tmp : z=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L741] 0 z = z$flush_delayed ? z$mem_tmp : z [L742] 0 z$flush_delayed = (_Bool)0 [L745] 0 x = 1 [L750] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=0, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L757] 1 __unbuffered_p1_EAX = x [L760] 1 y = 1 [L765] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L772] 2 __unbuffered_p2_EAX = y [L775] 2 z = 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L778] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L778] EXPR 2 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z [L778] EXPR 2 \read(z) [L778] EXPR 2 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L778] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z)=1, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L778] 2 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L779] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L779] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L780] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L781] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L781] 2 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L782] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L782] 2 z$r_buff1_thd3 = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 [L785] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L807] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L811] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L811] EXPR -1 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z [L811] EXPR -1 \read(z) [L811] EXPR -1 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L811] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L811] -1 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L812] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L812] -1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L813] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L813] -1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L814] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L814] -1 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L815] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=4, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L815] -1 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L818] -1 weak$$choice1 = __VERIFIER_nondet_bool() [L819] EXPR -1 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L819] EXPR -1 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L819] EXPR -1 \read(*__unbuffered_p0_EAX$read_delayed_var) [L819] EXPR -1 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L819] EXPR -1 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L819] -1 __unbuffered_p0_EAX = __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L820] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={263:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={263:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 308 locations, 1 error locations. UNSAFE Result, 95.7s OverallTime, 18 OverallIterations, 1 TraceHistogramMax, 11.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 5031 SDtfs, 7289 SDslu, 12548 SDs, 0 SdLazy, 3658 SolverSat, 314 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 198 GetRequests, 52 SyntacticMatches, 19 SemanticMatches, 127 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 134 ImplicationChecksByTransitivity, 1.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=247742occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 30.9s AutomataMinimizationTime, 17 MinimizatonAttempts, 110703 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 1848 NumberOfCodeBlocks, 1848 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 1717 ConstructedInterpolants, 0 QuantifiedInterpolants, 442990 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...