./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c -s /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 440325a953e10d2173456ab8f8c8fc1313a6b958 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(valid-deref) --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-02 15:10:04,627 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 15:10:04,628 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 15:10:04,634 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-02 15:10:04,634 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-02 15:10:04,635 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-02 15:10:04,636 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-02 15:10:04,637 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-02 15:10:04,637 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-02 15:10:04,638 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-02 15:10:04,638 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-02 15:10:04,639 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 15:10:04,639 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 15:10:04,640 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 15:10:04,640 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 15:10:04,641 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 15:10:04,641 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 15:10:04,642 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 15:10:04,643 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 15:10:04,644 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 15:10:04,644 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 15:10:04,645 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 15:10:04,646 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 15:10:04,646 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 15:10:04,646 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 15:10:04,647 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 15:10:04,647 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 15:10:04,648 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 15:10:04,648 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 15:10:04,649 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 15:10:04,649 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 15:10:04,649 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 15:10:04,649 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 15:10:04,650 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 15:10:04,650 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 15:10:04,650 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 15:10:04,651 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-12-02 15:10:04,658 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 15:10:04,658 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 15:10:04,658 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 15:10:04,658 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 15:10:04,659 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-02 15:10:04,659 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-02 15:10:04,659 INFO L133 SettingsManager]: * Use SBE=true [2018-12-02 15:10:04,659 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 15:10:04,659 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-02 15:10:04,659 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-02 15:10:04,660 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-02 15:10:04,660 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-02 15:10:04,660 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 15:10:04,660 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-02 15:10:04,660 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-02 15:10:04,660 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-02 15:10:04,660 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 15:10:04,660 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-02 15:10:04,661 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-02 15:10:04,661 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 15:10:04,661 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 15:10:04,661 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 15:10:04,661 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 15:10:04,661 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 15:10:04,661 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 15:10:04,662 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 15:10:04,662 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-02 15:10:04,662 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 15:10:04,662 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 440325a953e10d2173456ab8f8c8fc1313a6b958 [2018-12-02 15:10:04,679 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 15:10:04,686 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 15:10:04,688 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 15:10:04,689 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 15:10:04,689 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 15:10:04,689 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/../../sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c [2018-12-02 15:10:04,724 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/data/f21a1e7e5/5c861fa0e064486fa5ba2d245d274abc/FLAG0c76f28ba [2018-12-02 15:10:05,145 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 15:10:05,146 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c [2018-12-02 15:10:05,149 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/data/f21a1e7e5/5c861fa0e064486fa5ba2d245d274abc/FLAG0c76f28ba [2018-12-02 15:10:05,157 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/data/f21a1e7e5/5c861fa0e064486fa5ba2d245d274abc [2018-12-02 15:10:05,159 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 15:10:05,160 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-02 15:10:05,160 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 15:10:05,160 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 15:10:05,162 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 15:10:05,163 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 03:10:05" (1/1) ... [2018-12-02 15:10:05,164 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@56acabfb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:10:05, skipping insertion in model container [2018-12-02 15:10:05,164 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 03:10:05" (1/1) ... [2018-12-02 15:10:05,168 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 15:10:05,177 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 15:10:05,270 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 15:10:05,279 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 15:10:05,292 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 15:10:05,303 INFO L195 MainTranslator]: Completed translation [2018-12-02 15:10:05,303 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:10:05 WrapperNode [2018-12-02 15:10:05,303 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 15:10:05,304 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 15:10:05,304 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 15:10:05,304 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 15:10:05,312 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:10:05" (1/1) ... [2018-12-02 15:10:05,312 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:10:05" (1/1) ... [2018-12-02 15:10:05,318 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:10:05" (1/1) ... [2018-12-02 15:10:05,318 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:10:05" (1/1) ... [2018-12-02 15:10:05,323 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:10:05" (1/1) ... [2018-12-02 15:10:05,356 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:10:05" (1/1) ... [2018-12-02 15:10:05,357 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:10:05" (1/1) ... [2018-12-02 15:10:05,358 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 15:10:05,358 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 15:10:05,358 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 15:10:05,359 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 15:10:05,359 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:10:05" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 15:10:05,391 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-02 15:10:05,391 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 15:10:05,391 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers [2018-12-02 15:10:05,391 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers2 [2018-12-02 15:10:05,391 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers3 [2018-12-02 15:10:05,392 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers4 [2018-12-02 15:10:05,392 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-02 15:10:05,392 INFO L130 BoogieDeclarations]: Found specification of procedure printf [2018-12-02 15:10:05,392 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers [2018-12-02 15:10:05,392 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-02 15:10:05,392 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers2 [2018-12-02 15:10:05,392 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-02 15:10:05,392 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers3 [2018-12-02 15:10:05,392 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-02 15:10:05,392 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-02 15:10:05,392 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers4 [2018-12-02 15:10:05,392 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-02 15:10:05,392 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-02 15:10:05,392 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-02 15:10:05,393 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 15:10:05,587 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 15:10:05,587 INFO L280 CfgBuilder]: Removed 5 assue(true) statements. [2018-12-02 15:10:05,587 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 03:10:05 BoogieIcfgContainer [2018-12-02 15:10:05,587 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 15:10:05,588 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 15:10:05,588 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 15:10:05,590 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 15:10:05,590 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 03:10:05" (1/3) ... [2018-12-02 15:10:05,590 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e07ebe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 03:10:05, skipping insertion in model container [2018-12-02 15:10:05,590 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:10:05" (2/3) ... [2018-12-02 15:10:05,591 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e07ebe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 03:10:05, skipping insertion in model container [2018-12-02 15:10:05,591 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 03:10:05" (3/3) ... [2018-12-02 15:10:05,592 INFO L112 eAbstractionObserver]: Analyzing ICFG getNumbers4_false-valid-deref.c [2018-12-02 15:10:05,597 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 15:10:05,602 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 17 error locations. [2018-12-02 15:10:05,610 INFO L257 AbstractCegarLoop]: Starting to check reachability of 17 error locations. [2018-12-02 15:10:05,625 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-02 15:10:05,625 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 15:10:05,625 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-02 15:10:05,625 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 15:10:05,625 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 15:10:05,625 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 15:10:05,626 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 15:10:05,626 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 15:10:05,626 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 15:10:05,635 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states. [2018-12-02 15:10:05,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-02 15:10:05,640 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:05,640 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:05,642 INFO L423 AbstractCegarLoop]: === Iteration 1 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:05,645 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:05,645 INFO L82 PathProgramCache]: Analyzing trace with hash 1833468390, now seen corresponding path program 1 times [2018-12-02 15:10:05,646 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:05,647 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:05,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:05,674 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:05,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:05,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:05,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:10:05,764 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:10:05,764 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 15:10:05,766 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:10:05,774 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:10:05,774 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:10:05,775 INFO L87 Difference]: Start difference. First operand 70 states. Second operand 3 states. [2018-12-02 15:10:05,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:05,830 INFO L93 Difference]: Finished difference Result 69 states and 73 transitions. [2018-12-02 15:10:05,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:10:05,831 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-12-02 15:10:05,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:05,836 INFO L225 Difference]: With dead ends: 69 [2018-12-02 15:10:05,836 INFO L226 Difference]: Without dead ends: 66 [2018-12-02 15:10:05,837 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:10:05,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-12-02 15:10:05,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-12-02 15:10:05,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-12-02 15:10:05,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2018-12-02 15:10:05,860 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 70 transitions. Word has length 12 [2018-12-02 15:10:05,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:05,860 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 70 transitions. [2018-12-02 15:10:05,860 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:10:05,860 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 70 transitions. [2018-12-02 15:10:05,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-02 15:10:05,861 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:05,861 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:05,861 INFO L423 AbstractCegarLoop]: === Iteration 2 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:05,861 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:05,861 INFO L82 PathProgramCache]: Analyzing trace with hash 1833468391, now seen corresponding path program 1 times [2018-12-02 15:10:05,862 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:05,862 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:05,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:05,863 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:05,863 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:05,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:05,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:10:05,978 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:10:05,978 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 15:10:05,979 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 15:10:05,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 15:10:05,980 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-02 15:10:05,980 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. Second operand 4 states. [2018-12-02 15:10:06,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:06,032 INFO L93 Difference]: Finished difference Result 69 states and 73 transitions. [2018-12-02 15:10:06,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 15:10:06,032 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-12-02 15:10:06,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:06,033 INFO L225 Difference]: With dead ends: 69 [2018-12-02 15:10:06,033 INFO L226 Difference]: Without dead ends: 69 [2018-12-02 15:10:06,033 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-02 15:10:06,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-12-02 15:10:06,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 68. [2018-12-02 15:10:06,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-12-02 15:10:06,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 72 transitions. [2018-12-02 15:10:06,037 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 72 transitions. Word has length 12 [2018-12-02 15:10:06,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:06,038 INFO L480 AbstractCegarLoop]: Abstraction has 68 states and 72 transitions. [2018-12-02 15:10:06,038 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 15:10:06,038 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 72 transitions. [2018-12-02 15:10:06,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-02 15:10:06,038 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:06,038 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:06,038 INFO L423 AbstractCegarLoop]: === Iteration 3 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:06,039 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:06,039 INFO L82 PathProgramCache]: Analyzing trace with hash 1757784526, now seen corresponding path program 1 times [2018-12-02 15:10:06,039 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:06,039 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:06,039 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:06,039 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:06,040 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:06,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:06,132 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:10:06,133 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:06,133 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:06,140 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:06,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:06,161 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:06,189 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-02 15:10:06,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,193 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-02 15:10:06,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,199 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,200 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-02 15:10:06,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,204 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,205 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,205 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,206 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-02 15:10:06,207 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:06,218 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:06,223 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:06,228 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:06,241 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-02 15:10:06,253 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,258 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-02 15:10:06,298 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,302 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,307 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-02 15:10:06,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,363 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,365 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 36 [2018-12-02 15:10:06,366 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:06,398 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,403 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,404 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 33 [2018-12-02 15:10:06,405 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:06,417 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:06,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,433 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-02 15:10:06,462 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:06,465 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-02 15:10:06,466 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:06,471 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:06,476 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:06,480 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:06,488 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-02 15:10:06,488 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-02 15:10:06,572 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:10:06,596 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:06,596 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4] total 9 [2018-12-02 15:10:06,596 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 15:10:06,597 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 15:10:06,597 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=58, Unknown=0, NotChecked=0, Total=90 [2018-12-02 15:10:06,597 INFO L87 Difference]: Start difference. First operand 68 states and 72 transitions. Second operand 10 states. [2018-12-02 15:10:06,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:06,772 INFO L93 Difference]: Finished difference Result 72 states and 76 transitions. [2018-12-02 15:10:06,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 15:10:06,772 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 15 [2018-12-02 15:10:06,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:06,773 INFO L225 Difference]: With dead ends: 72 [2018-12-02 15:10:06,773 INFO L226 Difference]: Without dead ends: 72 [2018-12-02 15:10:06,773 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=82, Unknown=0, NotChecked=0, Total=132 [2018-12-02 15:10:06,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-12-02 15:10:06,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2018-12-02 15:10:06,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-12-02 15:10:06,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 76 transitions. [2018-12-02 15:10:06,777 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 76 transitions. Word has length 15 [2018-12-02 15:10:06,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:06,777 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 76 transitions. [2018-12-02 15:10:06,778 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 15:10:06,778 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 76 transitions. [2018-12-02 15:10:06,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-02 15:10:06,778 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:06,778 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:06,778 INFO L423 AbstractCegarLoop]: === Iteration 4 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:06,778 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:06,779 INFO L82 PathProgramCache]: Analyzing trace with hash -16477363, now seen corresponding path program 1 times [2018-12-02 15:10:06,779 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:06,779 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:06,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:06,779 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:06,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:06,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:06,834 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-12-02 15:10:06,834 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:10:06,834 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 15:10:06,834 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 15:10:06,834 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 15:10:06,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-02 15:10:06,835 INFO L87 Difference]: Start difference. First operand 72 states and 76 transitions. Second operand 6 states. [2018-12-02 15:10:06,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:06,894 INFO L93 Difference]: Finished difference Result 71 states and 75 transitions. [2018-12-02 15:10:06,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 15:10:06,894 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-12-02 15:10:06,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:06,895 INFO L225 Difference]: With dead ends: 71 [2018-12-02 15:10:06,895 INFO L226 Difference]: Without dead ends: 71 [2018-12-02 15:10:06,895 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-12-02 15:10:06,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-12-02 15:10:06,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 71. [2018-12-02 15:10:06,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-12-02 15:10:06,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 75 transitions. [2018-12-02 15:10:06,898 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 75 transitions. Word has length 26 [2018-12-02 15:10:06,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:06,898 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 75 transitions. [2018-12-02 15:10:06,898 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 15:10:06,898 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 75 transitions. [2018-12-02 15:10:06,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-02 15:10:06,899 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:06,899 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:06,899 INFO L423 AbstractCegarLoop]: === Iteration 5 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:06,899 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:06,900 INFO L82 PathProgramCache]: Analyzing trace with hash -16477362, now seen corresponding path program 1 times [2018-12-02 15:10:06,900 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:06,900 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:06,901 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:06,901 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:06,901 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:06,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:06,934 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:10:06,935 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:06,935 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:06,940 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:06,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:06,958 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:06,966 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:10:06,980 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:06,980 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-12-02 15:10:06,980 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 15:10:06,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 15:10:06,980 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-02 15:10:06,980 INFO L87 Difference]: Start difference. First operand 71 states and 75 transitions. Second operand 7 states. [2018-12-02 15:10:06,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:06,999 INFO L93 Difference]: Finished difference Result 76 states and 80 transitions. [2018-12-02 15:10:06,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 15:10:06,999 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2018-12-02 15:10:06,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:07,000 INFO L225 Difference]: With dead ends: 76 [2018-12-02 15:10:07,000 INFO L226 Difference]: Without dead ends: 76 [2018-12-02 15:10:07,000 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-02 15:10:07,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-12-02 15:10:07,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 74. [2018-12-02 15:10:07,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-12-02 15:10:07,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 78 transitions. [2018-12-02 15:10:07,003 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 78 transitions. Word has length 26 [2018-12-02 15:10:07,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:07,003 INFO L480 AbstractCegarLoop]: Abstraction has 74 states and 78 transitions. [2018-12-02 15:10:07,003 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 15:10:07,004 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 78 transitions. [2018-12-02 15:10:07,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-02 15:10:07,004 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:07,004 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:07,004 INFO L423 AbstractCegarLoop]: === Iteration 6 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:07,004 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:07,005 INFO L82 PathProgramCache]: Analyzing trace with hash 502160117, now seen corresponding path program 2 times [2018-12-02 15:10:07,005 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:07,005 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:07,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:07,005 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:07,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:07,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:07,061 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:10:07,061 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:07,062 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:07,067 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 15:10:07,084 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 15:10:07,084 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:07,087 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:07,092 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-02 15:10:07,095 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,096 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-02 15:10:07,098 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,100 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-02 15:10:07,103 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,104 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,105 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,107 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-02 15:10:07,107 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:07,130 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:07,139 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:07,145 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:07,156 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-02 15:10:07,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,171 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-02 15:10:07,210 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,213 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,218 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-02 15:10:07,256 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,259 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,262 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-12-02 15:10:07,263 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:07,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,289 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,291 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 29 [2018-12-02 15:10:07,291 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:07,300 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:07,311 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,312 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,313 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-02 15:10:07,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,329 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,329 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,330 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-02 15:10:07,330 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:07,335 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:07,339 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:07,342 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:07,349 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-02 15:10:07,350 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-02 15:10:07,449 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-02 15:10:07,463 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:10:07,463 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2018-12-02 15:10:07,464 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-02 15:10:07,464 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-02 15:10:07,464 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-12-02 15:10:07,464 INFO L87 Difference]: Start difference. First operand 74 states and 78 transitions. Second operand 12 states. [2018-12-02 15:10:07,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:07,694 INFO L93 Difference]: Finished difference Result 79 states and 83 transitions. [2018-12-02 15:10:07,694 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-02 15:10:07,694 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 29 [2018-12-02 15:10:07,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:07,695 INFO L225 Difference]: With dead ends: 79 [2018-12-02 15:10:07,695 INFO L226 Difference]: Without dead ends: 79 [2018-12-02 15:10:07,695 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=87, Invalid=293, Unknown=0, NotChecked=0, Total=380 [2018-12-02 15:10:07,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-12-02 15:10:07,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 77. [2018-12-02 15:10:07,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-12-02 15:10:07,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 81 transitions. [2018-12-02 15:10:07,699 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 81 transitions. Word has length 29 [2018-12-02 15:10:07,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:07,699 INFO L480 AbstractCegarLoop]: Abstraction has 77 states and 81 transitions. [2018-12-02 15:10:07,699 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-02 15:10:07,699 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 81 transitions. [2018-12-02 15:10:07,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-02 15:10:07,700 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:07,700 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:07,700 INFO L423 AbstractCegarLoop]: === Iteration 7 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:07,700 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:07,700 INFO L82 PathProgramCache]: Analyzing trace with hash 532455402, now seen corresponding path program 1 times [2018-12-02 15:10:07,700 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:07,700 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:07,701 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:07,701 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:07,701 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:07,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:07,740 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:10:07,740 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:07,741 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:07,747 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:07,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:07,765 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:07,772 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:10:07,789 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:07,789 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-12-02 15:10:07,790 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 15:10:07,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 15:10:07,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-02 15:10:07,790 INFO L87 Difference]: Start difference. First operand 77 states and 81 transitions. Second operand 9 states. [2018-12-02 15:10:07,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:07,810 INFO L93 Difference]: Finished difference Result 82 states and 86 transitions. [2018-12-02 15:10:07,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 15:10:07,811 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-12-02 15:10:07,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:07,811 INFO L225 Difference]: With dead ends: 82 [2018-12-02 15:10:07,811 INFO L226 Difference]: Without dead ends: 82 [2018-12-02 15:10:07,811 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-02 15:10:07,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-12-02 15:10:07,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 80. [2018-12-02 15:10:07,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-12-02 15:10:07,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 84 transitions. [2018-12-02 15:10:07,814 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 84 transitions. Word has length 33 [2018-12-02 15:10:07,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:07,814 INFO L480 AbstractCegarLoop]: Abstraction has 80 states and 84 transitions. [2018-12-02 15:10:07,814 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 15:10:07,814 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 84 transitions. [2018-12-02 15:10:07,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-02 15:10:07,815 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:07,815 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:07,815 INFO L423 AbstractCegarLoop]: === Iteration 8 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:07,815 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:07,815 INFO L82 PathProgramCache]: Analyzing trace with hash -428261789, now seen corresponding path program 2 times [2018-12-02 15:10:07,815 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:07,815 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:07,816 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:07,816 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:07,816 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:07,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:07,855 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:10:07,855 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:07,855 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:07,863 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 15:10:07,877 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 15:10:07,877 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:07,879 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:07,882 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2018-12-02 15:10:07,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,909 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 51 treesize of output 61 [2018-12-02 15:10:07,957 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:07,981 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 66 [2018-12-02 15:10:08,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,052 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,052 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,053 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,054 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,055 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 64 [2018-12-02 15:10:08,057 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-02 15:10:08,057 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:08,072 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:08,095 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,096 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,101 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,105 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 39 treesize of output 74 [2018-12-02 15:10:08,108 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-12-02 15:10:08,108 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:08,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,142 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,145 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,150 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 10 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 72 [2018-12-02 15:10:08,150 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-12-02 15:10:08,194 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-02 15:10:08,237 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-12-02 15:10:08,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,296 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,296 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 56 [2018-12-02 15:10:08,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,322 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,322 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,323 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,324 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:08,325 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 60 [2018-12-02 15:10:08,328 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-02 15:10:08,328 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:08,339 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:08,349 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:08,425 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-02 15:10:08,481 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-02 15:10:08,551 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 12 dim-0 vars, and 5 xjuncts. [2018-12-02 15:10:08,551 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 4 variables, input treesize:61, output treesize:234 [2018-12-02 15:10:08,821 WARN L180 SmtUtils]: Spent 251.00 ms on a formula simplification. DAG size of input: 117 DAG size of output: 79 [2018-12-02 15:10:08,940 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-12-02 15:10:08,964 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:10:08,965 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [9] total 10 [2018-12-02 15:10:08,965 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 15:10:08,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 15:10:08,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-12-02 15:10:08,965 INFO L87 Difference]: Start difference. First operand 80 states and 84 transitions. Second operand 10 states. [2018-12-02 15:10:09,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:09,276 INFO L93 Difference]: Finished difference Result 84 states and 88 transitions. [2018-12-02 15:10:09,277 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 15:10:09,277 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-12-02 15:10:09,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:09,277 INFO L225 Difference]: With dead ends: 84 [2018-12-02 15:10:09,277 INFO L226 Difference]: Without dead ends: 84 [2018-12-02 15:10:09,278 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 33 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=108, Invalid=164, Unknown=0, NotChecked=0, Total=272 [2018-12-02 15:10:09,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-12-02 15:10:09,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 82. [2018-12-02 15:10:09,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-12-02 15:10:09,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 86 transitions. [2018-12-02 15:10:09,281 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 86 transitions. Word has length 36 [2018-12-02 15:10:09,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:09,281 INFO L480 AbstractCegarLoop]: Abstraction has 82 states and 86 transitions. [2018-12-02 15:10:09,281 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 15:10:09,281 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 86 transitions. [2018-12-02 15:10:09,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-12-02 15:10:09,281 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:09,281 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:09,282 INFO L423 AbstractCegarLoop]: === Iteration 9 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:09,282 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:09,282 INFO L82 PathProgramCache]: Analyzing trace with hash 507961675, now seen corresponding path program 1 times [2018-12-02 15:10:09,282 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:09,282 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:09,282 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:09,282 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:09,282 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:09,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:09,337 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:10:09,338 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:09,338 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:09,344 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:09,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:09,362 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:09,374 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:10:09,390 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:09,390 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-12-02 15:10:09,390 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 15:10:09,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 15:10:09,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-02 15:10:09,391 INFO L87 Difference]: Start difference. First operand 82 states and 86 transitions. Second operand 11 states. [2018-12-02 15:10:09,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:09,414 INFO L93 Difference]: Finished difference Result 87 states and 91 transitions. [2018-12-02 15:10:09,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 15:10:09,415 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 39 [2018-12-02 15:10:09,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:09,415 INFO L225 Difference]: With dead ends: 87 [2018-12-02 15:10:09,415 INFO L226 Difference]: Without dead ends: 87 [2018-12-02 15:10:09,416 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-02 15:10:09,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-12-02 15:10:09,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 85. [2018-12-02 15:10:09,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-12-02 15:10:09,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 89 transitions. [2018-12-02 15:10:09,418 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 89 transitions. Word has length 39 [2018-12-02 15:10:09,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:09,418 INFO L480 AbstractCegarLoop]: Abstraction has 85 states and 89 transitions. [2018-12-02 15:10:09,418 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 15:10:09,418 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 89 transitions. [2018-12-02 15:10:09,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-02 15:10:09,419 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:09,419 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:09,419 INFO L423 AbstractCegarLoop]: === Iteration 10 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:09,419 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:09,419 INFO L82 PathProgramCache]: Analyzing trace with hash 23527684, now seen corresponding path program 2 times [2018-12-02 15:10:09,419 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:09,419 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:09,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:09,420 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:09,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:09,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:09,483 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:10:09,483 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:09,483 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:09,490 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 15:10:09,501 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 15:10:09,502 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:09,503 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:09,507 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-02 15:10:09,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,510 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-02 15:10:09,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,515 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-02 15:10:09,517 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,520 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,520 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-02 15:10:09,521 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:09,533 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:09,539 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:09,544 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:09,557 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-02 15:10:09,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,569 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-02 15:10:09,598 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,605 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-02 15:10:09,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,643 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 36 [2018-12-02 15:10:09,644 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:09,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,665 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,666 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 33 [2018-12-02 15:10:09,666 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:09,678 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:09,690 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,691 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-02 15:10:09,704 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,705 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,706 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,706 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,707 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:09,707 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-02 15:10:09,707 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:09,712 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:09,716 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:09,719 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:09,726 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-02 15:10:09,726 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-02 15:10:09,793 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-12-02 15:10:09,818 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:10:09,818 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [11] total 14 [2018-12-02 15:10:09,818 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-02 15:10:09,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-02 15:10:09,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2018-12-02 15:10:09,819 INFO L87 Difference]: Start difference. First operand 85 states and 89 transitions. Second operand 14 states. [2018-12-02 15:10:10,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:10,013 INFO L93 Difference]: Finished difference Result 89 states and 93 transitions. [2018-12-02 15:10:10,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-02 15:10:10,013 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 42 [2018-12-02 15:10:10,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:10,014 INFO L225 Difference]: With dead ends: 89 [2018-12-02 15:10:10,014 INFO L226 Difference]: Without dead ends: 89 [2018-12-02 15:10:10,014 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=172, Invalid=334, Unknown=0, NotChecked=0, Total=506 [2018-12-02 15:10:10,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-12-02 15:10:10,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 87. [2018-12-02 15:10:10,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-12-02 15:10:10,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 91 transitions. [2018-12-02 15:10:10,018 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 91 transitions. Word has length 42 [2018-12-02 15:10:10,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:10,018 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 91 transitions. [2018-12-02 15:10:10,018 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-02 15:10:10,018 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 91 transitions. [2018-12-02 15:10:10,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-12-02 15:10:10,019 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:10,019 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:10,019 INFO L423 AbstractCegarLoop]: === Iteration 11 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:10,020 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:10,020 INFO L82 PathProgramCache]: Analyzing trace with hash -1213368515, now seen corresponding path program 1 times [2018-12-02 15:10:10,020 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:10,020 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:10,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:10,020 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:10,021 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:10,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:10,084 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-02 15:10:10,084 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:10,084 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:10,092 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:10,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:10,113 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:10,122 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-02 15:10:10,146 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:10,146 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-12-02 15:10:10,147 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 15:10:10,147 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 15:10:10,147 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-02 15:10:10,147 INFO L87 Difference]: Start difference. First operand 87 states and 91 transitions. Second operand 13 states. [2018-12-02 15:10:10,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:10,173 INFO L93 Difference]: Finished difference Result 90 states and 94 transitions. [2018-12-02 15:10:10,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-02 15:10:10,174 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2018-12-02 15:10:10,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:10,174 INFO L225 Difference]: With dead ends: 90 [2018-12-02 15:10:10,174 INFO L226 Difference]: Without dead ends: 90 [2018-12-02 15:10:10,175 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-02 15:10:10,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-12-02 15:10:10,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 90. [2018-12-02 15:10:10,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-12-02 15:10:10,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 94 transitions. [2018-12-02 15:10:10,178 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 94 transitions. Word has length 54 [2018-12-02 15:10:10,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:10,178 INFO L480 AbstractCegarLoop]: Abstraction has 90 states and 94 transitions. [2018-12-02 15:10:10,178 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 15:10:10,178 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 94 transitions. [2018-12-02 15:10:10,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-12-02 15:10:10,179 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:10,179 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:10,179 INFO L423 AbstractCegarLoop]: === Iteration 12 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:10,179 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:10,179 INFO L82 PathProgramCache]: Analyzing trace with hash -590033308, now seen corresponding path program 2 times [2018-12-02 15:10:10,179 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:10,179 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:10,180 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:10,180 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:10,180 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:10,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:10,209 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-02 15:10:10,209 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:10,209 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:10,216 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 15:10:10,230 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 15:10:10,231 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:10,232 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:10,235 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2018-12-02 15:10:10,247 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,254 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 51 treesize of output 61 [2018-12-02 15:10:10,310 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,312 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,314 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,319 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 66 [2018-12-02 15:10:10,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,375 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,377 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,383 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 43 treesize of output 74 [2018-12-02 15:10:10,385 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-12-02 15:10:10,385 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:10,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,428 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 10 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 72 [2018-12-02 15:10:10,429 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-12-02 15:10:10,475 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-02 15:10:10,525 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,528 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,529 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 60 [2018-12-02 15:10:10,531 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-02 15:10:10,531 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:10,542 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:10,586 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-12-02 15:10:10,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,645 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,646 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 56 [2018-12-02 15:10:10,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,671 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:10,672 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 60 [2018-12-02 15:10:10,674 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-02 15:10:10,675 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:10,685 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:10,697 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:10,750 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-02 15:10:10,808 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-02 15:10:10,868 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 12 dim-0 vars, and 5 xjuncts. [2018-12-02 15:10:10,868 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 4 variables, input treesize:61, output treesize:234 [2018-12-02 15:10:11,154 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 61 [2018-12-02 15:10:11,155 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:11,210 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 54 [2018-12-02 15:10:11,211 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:11,256 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:11,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:11,259 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:11,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:11,262 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:11,267 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 11 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 83 [2018-12-02 15:10:11,267 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-12-02 15:10:11,338 INFO L267 ElimStorePlain]: Start of recursive call 1: 11 dim-0 vars, 3 dim-1 vars, End of recursive call: 14 dim-0 vars, and 4 xjuncts. [2018-12-02 15:10:11,338 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 14 variables, input treesize:162, output treesize:225 [2018-12-02 15:10:13,457 WARN L180 SmtUtils]: Spent 2.10 s on a formula simplification. DAG size of input: 121 DAG size of output: 79 [2018-12-02 15:10:13,502 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-02 15:10:13,517 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:10:13,517 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [4] total 8 [2018-12-02 15:10:13,517 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-02 15:10:13,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-02 15:10:13,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-02 15:10:13,518 INFO L87 Difference]: Start difference. First operand 90 states and 94 transitions. Second operand 8 states. [2018-12-02 15:10:13,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:13,877 INFO L93 Difference]: Finished difference Result 98 states and 102 transitions. [2018-12-02 15:10:13,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 15:10:13,878 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 57 [2018-12-02 15:10:13,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:13,878 INFO L225 Difference]: With dead ends: 98 [2018-12-02 15:10:13,878 INFO L226 Difference]: Without dead ends: 98 [2018-12-02 15:10:13,879 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 51 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-12-02 15:10:13,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-12-02 15:10:13,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 94. [2018-12-02 15:10:13,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-12-02 15:10:13,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 98 transitions. [2018-12-02 15:10:13,880 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 98 transitions. Word has length 57 [2018-12-02 15:10:13,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:13,881 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 98 transitions. [2018-12-02 15:10:13,881 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-02 15:10:13,881 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 98 transitions. [2018-12-02 15:10:13,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-02 15:10:13,881 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:13,881 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:13,881 INFO L423 AbstractCegarLoop]: === Iteration 13 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:13,882 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:13,882 INFO L82 PathProgramCache]: Analyzing trace with hash -317183977, now seen corresponding path program 1 times [2018-12-02 15:10:13,882 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:13,882 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:13,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:13,882 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:13,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:13,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:13,908 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-02 15:10:13,908 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:13,908 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:13,916 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:13,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:13,939 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:13,948 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-02 15:10:13,962 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:13,963 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-12-02 15:10:13,963 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 15:10:13,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 15:10:13,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-12-02 15:10:13,963 INFO L87 Difference]: Start difference. First operand 94 states and 98 transitions. Second operand 6 states. [2018-12-02 15:10:13,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:13,979 INFO L93 Difference]: Finished difference Result 103 states and 107 transitions. [2018-12-02 15:10:13,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 15:10:13,980 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 62 [2018-12-02 15:10:13,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:13,980 INFO L225 Difference]: With dead ends: 103 [2018-12-02 15:10:13,980 INFO L226 Difference]: Without dead ends: 103 [2018-12-02 15:10:13,980 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-12-02 15:10:13,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-12-02 15:10:13,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 99. [2018-12-02 15:10:13,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-02 15:10:13,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 103 transitions. [2018-12-02 15:10:13,982 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 103 transitions. Word has length 62 [2018-12-02 15:10:13,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:13,982 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 103 transitions. [2018-12-02 15:10:13,982 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 15:10:13,982 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 103 transitions. [2018-12-02 15:10:13,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-02 15:10:13,983 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:13,983 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:13,983 INFO L423 AbstractCegarLoop]: === Iteration 14 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:13,983 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:13,983 INFO L82 PathProgramCache]: Analyzing trace with hash -1648161371, now seen corresponding path program 2 times [2018-12-02 15:10:13,983 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:13,984 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:13,984 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:13,984 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:13,984 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:13,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:14,024 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-02 15:10:14,024 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:14,024 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:14,030 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 15:10:14,044 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 15:10:14,044 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:14,047 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:14,050 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-02 15:10:14,062 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,067 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-02 15:10:14,103 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,103 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,104 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 47 [2018-12-02 15:10:14,119 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,119 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,122 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,122 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-12-02 15:10:14,122 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:14,130 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:14,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,150 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,154 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-02 15:10:14,190 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,196 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-12-02 15:10:14,196 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:14,216 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,217 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,217 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,219 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,219 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 29 [2018-12-02 15:10:14,219 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:14,232 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:14,244 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:14,249 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:14,260 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-02 15:10:14,261 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 5 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-02 15:10:14,263 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-02 15:10:14,265 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,266 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-02 15:10:14,266 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:14,276 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:14,280 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:14,284 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:14,295 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-02 15:10:14,295 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-02 15:10:14,353 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,358 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 15:10:14,363 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 54 [2018-12-02 15:10:14,363 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-12-02 15:10:14,401 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 7 dim-0 vars, and 2 xjuncts. [2018-12-02 15:10:14,402 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:45, output treesize:96 [2018-12-02 15:10:14,525 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-02 15:10:14,540 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:10:14,540 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 11 [2018-12-02 15:10:14,540 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 15:10:14,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 15:10:14,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-12-02 15:10:14,541 INFO L87 Difference]: Start difference. First operand 99 states and 103 transitions. Second operand 11 states. [2018-12-02 15:10:14,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:14,708 INFO L93 Difference]: Finished difference Result 108 states and 112 transitions. [2018-12-02 15:10:14,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-02 15:10:14,708 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2018-12-02 15:10:14,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:14,709 INFO L225 Difference]: With dead ends: 108 [2018-12-02 15:10:14,709 INFO L226 Difference]: Without dead ends: 108 [2018-12-02 15:10:14,709 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=181, Unknown=0, NotChecked=0, Total=240 [2018-12-02 15:10:14,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-12-02 15:10:14,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 104. [2018-12-02 15:10:14,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-02 15:10:14,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 108 transitions. [2018-12-02 15:10:14,712 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 108 transitions. Word has length 67 [2018-12-02 15:10:14,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:14,712 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 108 transitions. [2018-12-02 15:10:14,712 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 15:10:14,712 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 108 transitions. [2018-12-02 15:10:14,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-02 15:10:14,713 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:14,713 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:14,713 INFO L423 AbstractCegarLoop]: === Iteration 15 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:14,713 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:14,713 INFO L82 PathProgramCache]: Analyzing trace with hash 1853794825, now seen corresponding path program 1 times [2018-12-02 15:10:14,713 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:14,713 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:14,713 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:14,713 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:14,714 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:14,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:14,738 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 179 trivial. 0 not checked. [2018-12-02 15:10:14,738 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:10:14,738 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 15:10:14,738 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:10:14,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:10:14,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:10:14,739 INFO L87 Difference]: Start difference. First operand 104 states and 108 transitions. Second operand 3 states. [2018-12-02 15:10:14,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:14,753 INFO L93 Difference]: Finished difference Result 103 states and 107 transitions. [2018-12-02 15:10:14,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:10:14,754 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 73 [2018-12-02 15:10:14,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:14,754 INFO L225 Difference]: With dead ends: 103 [2018-12-02 15:10:14,754 INFO L226 Difference]: Without dead ends: 103 [2018-12-02 15:10:14,754 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:10:14,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-12-02 15:10:14,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 103. [2018-12-02 15:10:14,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-02 15:10:14,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 107 transitions. [2018-12-02 15:10:14,757 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 107 transitions. Word has length 73 [2018-12-02 15:10:14,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:14,757 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 107 transitions. [2018-12-02 15:10:14,757 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:10:14,757 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 107 transitions. [2018-12-02 15:10:14,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-02 15:10:14,758 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:14,758 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:14,758 INFO L423 AbstractCegarLoop]: === Iteration 16 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:14,758 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:14,759 INFO L82 PathProgramCache]: Analyzing trace with hash 1853794826, now seen corresponding path program 1 times [2018-12-02 15:10:14,759 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:14,759 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:14,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:14,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:14,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:14,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:14,800 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-02 15:10:14,800 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:14,800 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:14,808 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:14,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:14,833 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:14,842 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-02 15:10:14,857 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:14,857 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-12-02 15:10:14,857 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-02 15:10:14,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-02 15:10:14,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-12-02 15:10:14,857 INFO L87 Difference]: Start difference. First operand 103 states and 107 transitions. Second operand 8 states. [2018-12-02 15:10:14,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:14,879 INFO L93 Difference]: Finished difference Result 112 states and 116 transitions. [2018-12-02 15:10:14,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 15:10:14,879 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 73 [2018-12-02 15:10:14,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:14,880 INFO L225 Difference]: With dead ends: 112 [2018-12-02 15:10:14,880 INFO L226 Difference]: Without dead ends: 112 [2018-12-02 15:10:14,880 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 73 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-12-02 15:10:14,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-12-02 15:10:14,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 108. [2018-12-02 15:10:14,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-12-02 15:10:14,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 112 transitions. [2018-12-02 15:10:14,882 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 112 transitions. Word has length 73 [2018-12-02 15:10:14,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:14,882 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 112 transitions. [2018-12-02 15:10:14,882 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-02 15:10:14,882 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 112 transitions. [2018-12-02 15:10:14,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-02 15:10:14,882 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:14,882 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:14,883 INFO L423 AbstractCegarLoop]: === Iteration 17 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:14,883 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:14,883 INFO L82 PathProgramCache]: Analyzing trace with hash -1123262532, now seen corresponding path program 2 times [2018-12-02 15:10:14,883 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:14,883 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:14,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:14,883 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:14,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:14,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:14,915 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-02 15:10:14,915 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:14,915 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:14,921 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 15:10:14,937 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 15:10:14,937 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:14,939 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:14,943 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 15:10:14,943 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 15:10:14,946 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 15:10:14,946 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-12-02 15:10:14,964 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-12-02 15:10:14,979 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:10:14,979 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [8] total 10 [2018-12-02 15:10:14,979 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 15:10:14,979 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 15:10:14,979 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-12-02 15:10:14,980 INFO L87 Difference]: Start difference. First operand 108 states and 112 transitions. Second operand 10 states. [2018-12-02 15:10:15,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:15,038 INFO L93 Difference]: Finished difference Result 116 states and 120 transitions. [2018-12-02 15:10:15,038 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 15:10:15,038 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 78 [2018-12-02 15:10:15,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:15,039 INFO L225 Difference]: With dead ends: 116 [2018-12-02 15:10:15,039 INFO L226 Difference]: Without dead ends: 116 [2018-12-02 15:10:15,039 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-12-02 15:10:15,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-12-02 15:10:15,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 112. [2018-12-02 15:10:15,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-12-02 15:10:15,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 116 transitions. [2018-12-02 15:10:15,041 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 116 transitions. Word has length 78 [2018-12-02 15:10:15,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:15,041 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 116 transitions. [2018-12-02 15:10:15,041 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 15:10:15,041 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 116 transitions. [2018-12-02 15:10:15,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-02 15:10:15,041 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:15,041 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:15,041 INFO L423 AbstractCegarLoop]: === Iteration 18 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:15,042 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:15,042 INFO L82 PathProgramCache]: Analyzing trace with hash -1854312006, now seen corresponding path program 1 times [2018-12-02 15:10:15,042 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:15,042 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:15,042 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:15,042 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:15,042 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:15,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:15,082 INFO L134 CoverageAnalysis]: Checked inductivity of 227 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-02 15:10:15,082 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:15,083 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:15,088 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:15,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:15,119 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:15,133 INFO L134 CoverageAnalysis]: Checked inductivity of 227 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-02 15:10:15,148 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:15,148 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-12-02 15:10:15,148 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 15:10:15,148 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 15:10:15,148 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-02 15:10:15,148 INFO L87 Difference]: Start difference. First operand 112 states and 116 transitions. Second operand 10 states. [2018-12-02 15:10:15,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:15,173 INFO L93 Difference]: Finished difference Result 121 states and 125 transitions. [2018-12-02 15:10:15,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 15:10:15,173 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 92 [2018-12-02 15:10:15,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:15,174 INFO L225 Difference]: With dead ends: 121 [2018-12-02 15:10:15,174 INFO L226 Difference]: Without dead ends: 121 [2018-12-02 15:10:15,174 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 92 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-02 15:10:15,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-12-02 15:10:15,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 117. [2018-12-02 15:10:15,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-12-02 15:10:15,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 121 transitions. [2018-12-02 15:10:15,177 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 121 transitions. Word has length 92 [2018-12-02 15:10:15,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:15,178 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 121 transitions. [2018-12-02 15:10:15,178 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 15:10:15,178 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 121 transitions. [2018-12-02 15:10:15,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-12-02 15:10:15,179 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:15,179 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:15,179 INFO L423 AbstractCegarLoop]: === Iteration 19 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:15,179 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:15,184 INFO L82 PathProgramCache]: Analyzing trace with hash 283421384, now seen corresponding path program 2 times [2018-12-02 15:10:15,184 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:15,184 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:15,185 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:15,185 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:15,185 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:15,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:15,254 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-02 15:10:15,255 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:15,255 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:15,261 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 15:10:15,289 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-02 15:10:15,289 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:15,291 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:15,298 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-02 15:10:15,313 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:15,313 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-12-02 15:10:15,313 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 15:10:15,314 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 15:10:15,314 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-02 15:10:15,314 INFO L87 Difference]: Start difference. First operand 117 states and 121 transitions. Second operand 11 states. [2018-12-02 15:10:15,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:15,341 INFO L93 Difference]: Finished difference Result 126 states and 130 transitions. [2018-12-02 15:10:15,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 15:10:15,341 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 97 [2018-12-02 15:10:15,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:15,342 INFO L225 Difference]: With dead ends: 126 [2018-12-02 15:10:15,342 INFO L226 Difference]: Without dead ends: 126 [2018-12-02 15:10:15,342 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 97 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-02 15:10:15,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-12-02 15:10:15,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 122. [2018-12-02 15:10:15,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-12-02 15:10:15,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 126 transitions. [2018-12-02 15:10:15,345 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 126 transitions. Word has length 97 [2018-12-02 15:10:15,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:15,345 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 126 transitions. [2018-12-02 15:10:15,345 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 15:10:15,345 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 126 transitions. [2018-12-02 15:10:15,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-02 15:10:15,346 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:15,346 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:15,346 INFO L423 AbstractCegarLoop]: === Iteration 20 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:15,346 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:15,347 INFO L82 PathProgramCache]: Analyzing trace with hash -663164294, now seen corresponding path program 3 times [2018-12-02 15:10:15,347 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:15,347 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:15,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:15,347 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:15,348 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:15,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:15,410 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-02 15:10:15,410 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:15,410 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:15,419 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 15:10:15,445 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-12-02 15:10:15,445 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:15,447 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:15,460 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 293 trivial. 0 not checked. [2018-12-02 15:10:15,475 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:15,475 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 4] total 13 [2018-12-02 15:10:15,475 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 15:10:15,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 15:10:15,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=96, Unknown=0, NotChecked=0, Total=156 [2018-12-02 15:10:15,476 INFO L87 Difference]: Start difference. First operand 122 states and 126 transitions. Second operand 13 states. [2018-12-02 15:10:15,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:15,513 INFO L93 Difference]: Finished difference Result 140 states and 144 transitions. [2018-12-02 15:10:15,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 15:10:15,514 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 102 [2018-12-02 15:10:15,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:15,514 INFO L225 Difference]: With dead ends: 140 [2018-12-02 15:10:15,514 INFO L226 Difference]: Without dead ends: 140 [2018-12-02 15:10:15,514 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 101 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=60, Invalid=96, Unknown=0, NotChecked=0, Total=156 [2018-12-02 15:10:15,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-02 15:10:15,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 132. [2018-12-02 15:10:15,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-02 15:10:15,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 136 transitions. [2018-12-02 15:10:15,516 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 136 transitions. Word has length 102 [2018-12-02 15:10:15,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:15,516 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 136 transitions. [2018-12-02 15:10:15,516 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 15:10:15,517 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 136 transitions. [2018-12-02 15:10:15,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-02 15:10:15,517 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:15,517 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 9, 9, 9, 9, 9, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:15,517 INFO L423 AbstractCegarLoop]: === Iteration 21 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:15,517 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:15,517 INFO L82 PathProgramCache]: Analyzing trace with hash -138503934, now seen corresponding path program 4 times [2018-12-02 15:10:15,517 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:15,517 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:15,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:15,518 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:15,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:15,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:15,575 INFO L134 CoverageAnalysis]: Checked inductivity of 341 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-02 15:10:15,575 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:15,575 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:15,584 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-02 15:10:15,609 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-02 15:10:15,609 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:15,611 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:15,619 INFO L134 CoverageAnalysis]: Checked inductivity of 341 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-02 15:10:15,644 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:15,644 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-12-02 15:10:15,644 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 15:10:15,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 15:10:15,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-02 15:10:15,645 INFO L87 Difference]: Start difference. First operand 132 states and 136 transitions. Second operand 13 states. [2018-12-02 15:10:15,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:15,680 INFO L93 Difference]: Finished difference Result 137 states and 141 transitions. [2018-12-02 15:10:15,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-02 15:10:15,680 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 112 [2018-12-02 15:10:15,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:15,680 INFO L225 Difference]: With dead ends: 137 [2018-12-02 15:10:15,680 INFO L226 Difference]: Without dead ends: 137 [2018-12-02 15:10:15,681 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-02 15:10:15,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-12-02 15:10:15,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-12-02 15:10:15,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-12-02 15:10:15,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 141 transitions. [2018-12-02 15:10:15,682 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 141 transitions. Word has length 112 [2018-12-02 15:10:15,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:15,682 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 141 transitions. [2018-12-02 15:10:15,682 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 15:10:15,683 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 141 transitions. [2018-12-02 15:10:15,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-12-02 15:10:15,683 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:15,683 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:15,683 INFO L423 AbstractCegarLoop]: === Iteration 22 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:15,683 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:15,683 INFO L82 PathProgramCache]: Analyzing trace with hash 1387314960, now seen corresponding path program 5 times [2018-12-02 15:10:15,683 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:15,683 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:15,684 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:15,684 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:15,684 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:15,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:15,709 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:15,709 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:15,710 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:15,718 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-12-02 15:10:17,548 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2018-12-02 15:10:17,548 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:17,552 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:17,560 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:17,576 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:17,576 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-12-02 15:10:17,576 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 15:10:17,576 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 15:10:17,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-12-02 15:10:17,577 INFO L87 Difference]: Start difference. First operand 137 states and 141 transitions. Second operand 6 states. [2018-12-02 15:10:17,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:17,596 INFO L93 Difference]: Finished difference Result 146 states and 150 transitions. [2018-12-02 15:10:17,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 15:10:17,597 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 117 [2018-12-02 15:10:17,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:17,597 INFO L225 Difference]: With dead ends: 146 [2018-12-02 15:10:17,597 INFO L226 Difference]: Without dead ends: 146 [2018-12-02 15:10:17,597 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 117 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-12-02 15:10:17,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-02 15:10:17,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 142. [2018-12-02 15:10:17,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-02 15:10:17,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 146 transitions. [2018-12-02 15:10:17,599 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 146 transitions. Word has length 117 [2018-12-02 15:10:17,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:17,599 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 146 transitions. [2018-12-02 15:10:17,599 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 15:10:17,599 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 146 transitions. [2018-12-02 15:10:17,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 15:10:17,600 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:17,600 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:17,600 INFO L423 AbstractCegarLoop]: === Iteration 23 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:17,600 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:17,600 INFO L82 PathProgramCache]: Analyzing trace with hash -575903494, now seen corresponding path program 6 times [2018-12-02 15:10:17,600 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:17,600 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:17,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:17,600 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:17,601 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:17,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:17,640 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:17,640 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:17,640 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:17,649 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-12-02 15:10:17,853 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-12-02 15:10:17,854 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:17,856 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:17,879 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:17,894 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:17,895 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-12-02 15:10:17,895 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 15:10:17,895 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 15:10:17,895 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-02 15:10:17,895 INFO L87 Difference]: Start difference. First operand 142 states and 146 transitions. Second operand 7 states. [2018-12-02 15:10:17,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:17,910 INFO L93 Difference]: Finished difference Result 151 states and 155 transitions. [2018-12-02 15:10:17,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 15:10:17,911 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 122 [2018-12-02 15:10:17,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:17,911 INFO L225 Difference]: With dead ends: 151 [2018-12-02 15:10:17,911 INFO L226 Difference]: Without dead ends: 151 [2018-12-02 15:10:17,911 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-02 15:10:17,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-02 15:10:17,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 147. [2018-12-02 15:10:17,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-02 15:10:17,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 151 transitions. [2018-12-02 15:10:17,913 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 151 transitions. Word has length 122 [2018-12-02 15:10:17,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:17,913 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 151 transitions. [2018-12-02 15:10:17,913 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 15:10:17,913 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 151 transitions. [2018-12-02 15:10:17,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-12-02 15:10:17,914 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:17,914 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:17,914 INFO L423 AbstractCegarLoop]: === Iteration 24 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:17,914 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:17,914 INFO L82 PathProgramCache]: Analyzing trace with hash -371170992, now seen corresponding path program 7 times [2018-12-02 15:10:17,914 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:17,914 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:17,915 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:17,915 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:17,915 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:17,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:17,959 INFO L134 CoverageAnalysis]: Checked inductivity of 414 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:17,959 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:17,959 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:17,965 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:18,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:18,003 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:18,018 INFO L134 CoverageAnalysis]: Checked inductivity of 414 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:18,033 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:18,033 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-12-02 15:10:18,033 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-02 15:10:18,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-02 15:10:18,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-12-02 15:10:18,034 INFO L87 Difference]: Start difference. First operand 147 states and 151 transitions. Second operand 8 states. [2018-12-02 15:10:18,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:18,054 INFO L93 Difference]: Finished difference Result 156 states and 160 transitions. [2018-12-02 15:10:18,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 15:10:18,055 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 127 [2018-12-02 15:10:18,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:18,055 INFO L225 Difference]: With dead ends: 156 [2018-12-02 15:10:18,055 INFO L226 Difference]: Without dead ends: 156 [2018-12-02 15:10:18,056 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-12-02 15:10:18,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-02 15:10:18,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 152. [2018-12-02 15:10:18,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-12-02 15:10:18,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 156 transitions. [2018-12-02 15:10:18,059 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 156 transitions. Word has length 127 [2018-12-02 15:10:18,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:18,059 INFO L480 AbstractCegarLoop]: Abstraction has 152 states and 156 transitions. [2018-12-02 15:10:18,059 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-02 15:10:18,059 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 156 transitions. [2018-12-02 15:10:18,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-12-02 15:10:18,059 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:18,059 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:18,059 INFO L423 AbstractCegarLoop]: === Iteration 25 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:18,060 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:18,060 INFO L82 PathProgramCache]: Analyzing trace with hash 1244147386, now seen corresponding path program 8 times [2018-12-02 15:10:18,060 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:18,060 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:18,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:18,060 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:10:18,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:18,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:18,123 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:18,123 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:18,123 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:18,135 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 15:10:18,170 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-02 15:10:18,170 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:18,172 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:18,181 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:18,196 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:18,196 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-12-02 15:10:18,196 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 15:10:18,196 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 15:10:18,196 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-02 15:10:18,196 INFO L87 Difference]: Start difference. First operand 152 states and 156 transitions. Second operand 9 states. [2018-12-02 15:10:18,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:18,220 INFO L93 Difference]: Finished difference Result 161 states and 165 transitions. [2018-12-02 15:10:18,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 15:10:18,220 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 132 [2018-12-02 15:10:18,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:18,220 INFO L225 Difference]: With dead ends: 161 [2018-12-02 15:10:18,220 INFO L226 Difference]: Without dead ends: 161 [2018-12-02 15:10:18,221 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-02 15:10:18,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-12-02 15:10:18,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 157. [2018-12-02 15:10:18,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-12-02 15:10:18,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 161 transitions. [2018-12-02 15:10:18,223 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 161 transitions. Word has length 132 [2018-12-02 15:10:18,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:18,223 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 161 transitions. [2018-12-02 15:10:18,223 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 15:10:18,223 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 161 transitions. [2018-12-02 15:10:18,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-12-02 15:10:18,224 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:18,224 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:18,224 INFO L423 AbstractCegarLoop]: === Iteration 26 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:18,224 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:18,225 INFO L82 PathProgramCache]: Analyzing trace with hash -2070269040, now seen corresponding path program 9 times [2018-12-02 15:10:18,225 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:18,225 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:18,225 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:18,225 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:18,225 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:18,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:18,280 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:18,280 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:18,280 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:18,290 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 15:10:18,631 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-12-02 15:10:18,631 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:18,633 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:18,643 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:18,658 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:18,658 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-12-02 15:10:18,658 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 15:10:18,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 15:10:18,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-02 15:10:18,658 INFO L87 Difference]: Start difference. First operand 157 states and 161 transitions. Second operand 10 states. [2018-12-02 15:10:18,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:18,684 INFO L93 Difference]: Finished difference Result 166 states and 170 transitions. [2018-12-02 15:10:18,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 15:10:18,684 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 137 [2018-12-02 15:10:18,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:18,685 INFO L225 Difference]: With dead ends: 166 [2018-12-02 15:10:18,685 INFO L226 Difference]: Without dead ends: 166 [2018-12-02 15:10:18,685 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 137 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-02 15:10:18,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-12-02 15:10:18,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 162. [2018-12-02 15:10:18,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-12-02 15:10:18,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 166 transitions. [2018-12-02 15:10:18,687 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 166 transitions. Word has length 137 [2018-12-02 15:10:18,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:18,687 INFO L480 AbstractCegarLoop]: Abstraction has 162 states and 166 transitions. [2018-12-02 15:10:18,687 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 15:10:18,687 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 166 transitions. [2018-12-02 15:10:18,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-12-02 15:10:18,688 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:18,688 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:18,688 INFO L423 AbstractCegarLoop]: === Iteration 27 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:18,688 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:18,688 INFO L82 PathProgramCache]: Analyzing trace with hash 1106756730, now seen corresponding path program 10 times [2018-12-02 15:10:18,688 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:18,688 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:18,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:18,689 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:18,689 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:18,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:18,741 INFO L134 CoverageAnalysis]: Checked inductivity of 492 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:18,741 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:18,741 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:18,748 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-02 15:10:19,323 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-02 15:10:19,323 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:19,326 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:19,337 INFO L134 CoverageAnalysis]: Checked inductivity of 492 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:19,353 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:19,353 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-12-02 15:10:19,353 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 15:10:19,354 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 15:10:19,354 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-02 15:10:19,354 INFO L87 Difference]: Start difference. First operand 162 states and 166 transitions. Second operand 11 states. [2018-12-02 15:10:19,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:19,404 INFO L93 Difference]: Finished difference Result 171 states and 175 transitions. [2018-12-02 15:10:19,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 15:10:19,404 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 142 [2018-12-02 15:10:19,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:19,405 INFO L225 Difference]: With dead ends: 171 [2018-12-02 15:10:19,405 INFO L226 Difference]: Without dead ends: 171 [2018-12-02 15:10:19,405 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-02 15:10:19,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-12-02 15:10:19,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 167. [2018-12-02 15:10:19,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-12-02 15:10:19,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 171 transitions. [2018-12-02 15:10:19,407 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 171 transitions. Word has length 142 [2018-12-02 15:10:19,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:19,408 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 171 transitions. [2018-12-02 15:10:19,408 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 15:10:19,408 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 171 transitions. [2018-12-02 15:10:19,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-12-02 15:10:19,408 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:19,408 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:19,408 INFO L423 AbstractCegarLoop]: === Iteration 28 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:19,408 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:19,408 INFO L82 PathProgramCache]: Analyzing trace with hash -1612565040, now seen corresponding path program 11 times [2018-12-02 15:10:19,408 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:19,408 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:19,409 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:19,409 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:19,409 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:19,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:19,463 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:19,463 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:19,463 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:19,469 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-12-02 15:10:34,166 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2018-12-02 15:10:34,167 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:34,178 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:34,205 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:34,224 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:34,225 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-12-02 15:10:34,225 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-02 15:10:34,225 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-02 15:10:34,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-12-02 15:10:34,225 INFO L87 Difference]: Start difference. First operand 167 states and 171 transitions. Second operand 12 states. [2018-12-02 15:10:34,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:34,255 INFO L93 Difference]: Finished difference Result 176 states and 180 transitions. [2018-12-02 15:10:34,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-02 15:10:34,255 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 147 [2018-12-02 15:10:34,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:34,256 INFO L225 Difference]: With dead ends: 176 [2018-12-02 15:10:34,256 INFO L226 Difference]: Without dead ends: 176 [2018-12-02 15:10:34,256 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-12-02 15:10:34,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-12-02 15:10:34,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 172. [2018-12-02 15:10:34,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-12-02 15:10:34,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 176 transitions. [2018-12-02 15:10:34,258 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 176 transitions. Word has length 147 [2018-12-02 15:10:34,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:34,258 INFO L480 AbstractCegarLoop]: Abstraction has 172 states and 176 transitions. [2018-12-02 15:10:34,258 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-02 15:10:34,258 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 176 transitions. [2018-12-02 15:10:34,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-12-02 15:10:34,258 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:34,258 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:34,259 INFO L423 AbstractCegarLoop]: === Iteration 29 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:34,259 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:34,259 INFO L82 PathProgramCache]: Analyzing trace with hash -896062918, now seen corresponding path program 12 times [2018-12-02 15:10:34,259 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:34,259 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:34,259 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:34,260 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:34,260 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:34,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:10:34,315 INFO L134 CoverageAnalysis]: Checked inductivity of 569 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:34,315 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:10:34,315 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:10:34,322 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-12-02 15:10:36,385 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-12-02 15:10:36,385 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 15:10:36,391 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:10:36,410 INFO L134 CoverageAnalysis]: Checked inductivity of 569 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-02 15:10:36,425 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:10:36,426 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-12-02 15:10:36,426 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 15:10:36,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 15:10:36,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-02 15:10:36,426 INFO L87 Difference]: Start difference. First operand 172 states and 176 transitions. Second operand 13 states. [2018-12-02 15:10:36,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:10:36,461 INFO L93 Difference]: Finished difference Result 177 states and 181 transitions. [2018-12-02 15:10:36,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-02 15:10:36,461 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 152 [2018-12-02 15:10:36,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:10:36,462 INFO L225 Difference]: With dead ends: 177 [2018-12-02 15:10:36,462 INFO L226 Difference]: Without dead ends: 177 [2018-12-02 15:10:36,462 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 152 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-02 15:10:36,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-12-02 15:10:36,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2018-12-02 15:10:36,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-12-02 15:10:36,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 181 transitions. [2018-12-02 15:10:36,465 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 181 transitions. Word has length 152 [2018-12-02 15:10:36,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:10:36,465 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 181 transitions. [2018-12-02 15:10:36,465 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 15:10:36,466 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 181 transitions. [2018-12-02 15:10:36,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-12-02 15:10:36,466 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:10:36,466 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:10:36,467 INFO L423 AbstractCegarLoop]: === Iteration 30 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr1REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION]=== [2018-12-02 15:10:36,467 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:10:36,467 INFO L82 PathProgramCache]: Analyzing trace with hash 1136420880, now seen corresponding path program 13 times [2018-12-02 15:10:36,467 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 15:10:36,467 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 15:10:36,467 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:36,467 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 15:10:36,468 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:10:36,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 15:10:36,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 15:10:36,695 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-02 15:10:36,737 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 03:10:36 BoogieIcfgContainer [2018-12-02 15:10:36,737 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-02 15:10:36,737 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-02 15:10:36,737 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-02 15:10:36,737 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-02 15:10:36,738 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 03:10:05" (3/4) ... [2018-12-02 15:10:36,740 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-02 15:10:36,778 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_fe58fd90-d9ab-493c-b4de-05b8a59ef30b/bin-2019/uautomizer/witness.graphml [2018-12-02 15:10:36,778 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-02 15:10:36,779 INFO L168 Benchmark]: Toolchain (without parser) took 31619.64 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 423.1 MB). Free memory was 957.1 MB in the beginning and 1.4 GB in the end (delta: -431.9 MB). There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 15:10:36,779 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 976.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 15:10:36,779 INFO L168 Benchmark]: CACSL2BoogieTranslator took 143.56 ms. Allocated memory is still 1.0 GB. Free memory was 957.1 MB in the beginning and 946.3 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2018-12-02 15:10:36,779 INFO L168 Benchmark]: Boogie Preprocessor took 54.27 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 140.0 MB). Free memory was 946.3 MB in the beginning and 1.1 GB in the end (delta: -188.5 MB). Peak memory consumption was 18.8 MB. Max. memory is 11.5 GB. [2018-12-02 15:10:36,780 INFO L168 Benchmark]: RCFGBuilder took 228.87 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 28.5 MB). Peak memory consumption was 28.5 MB. Max. memory is 11.5 GB. [2018-12-02 15:10:36,780 INFO L168 Benchmark]: TraceAbstraction took 31149.03 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 283.1 MB). Free memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: -294.2 MB). Peak memory consumption was 582.3 MB. Max. memory is 11.5 GB. [2018-12-02 15:10:36,780 INFO L168 Benchmark]: Witness Printer took 40.89 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 11.5 MB). Peak memory consumption was 11.5 MB. Max. memory is 11.5 GB. [2018-12-02 15:10:36,781 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 976.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 143.56 ms. Allocated memory is still 1.0 GB. Free memory was 957.1 MB in the beginning and 946.3 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 54.27 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 140.0 MB). Free memory was 946.3 MB in the beginning and 1.1 GB in the end (delta: -188.5 MB). Peak memory consumption was 18.8 MB. Max. memory is 11.5 GB. * RCFGBuilder took 228.87 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 28.5 MB). Peak memory consumption was 28.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 31149.03 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 283.1 MB). Free memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: -294.2 MB). Peak memory consumption was 582.3 MB. Max. memory is 11.5 GB. * Witness Printer took 40.89 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 11.5 MB). Peak memory consumption was 11.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 38]: pointer dereference may fail pointer dereference may fail We found a FailurePath: [L6] static int array[10]; [L17] static int numbers2[10]; [L36] static int numbers4[10]; [L45] CALL getNumbers4() VAL [array={1:0}, numbers2={-1:0}, numbers4={110:0}] [L35] CALL, EXPR getNumbers3() VAL [array={1:0}, numbers2={-1:0}, numbers4={110:0}] [L25] CALL, EXPR getNumbers2() VAL [array={1:0}, numbers2={-1:0}, numbers4={110:0}] [L16] CALL, EXPR getNumbers() VAL [array={1:0}, numbers2={-1:0}, numbers4={110:0}] [L8] int i = 0; VAL [array={1:0}, i=0, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=0, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=0, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=1, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=1, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=1, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=2, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=2, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=2, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=3, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=3, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=3, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=4, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=4, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=4, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=5, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=5, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=5, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=6, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=6, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=6, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=7, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=7, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=7, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=8, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=8, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=8, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=9, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=9, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=9, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=10, numbers2={-1:0}, numbers4={110:0}] [L8] COND FALSE !(i < 10) VAL [array={1:0}, i=10, numbers2={-1:0}, numbers4={110:0}] [L12] return array; VAL [\result={1:0}, array={1:0}, i=10, numbers2={-1:0}, numbers4={110:0}] [L16] RET, EXPR getNumbers() VAL [array={1:0}, getNumbers()={1:0}, numbers2={-1:0}, numbers4={110:0}] [L16] int* numbers = getNumbers(); [L18] int i = 0; VAL [array={1:0}, i=0, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=0, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=0, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=0] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=0, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=0] [L18] ++i VAL [array={1:0}, i=1, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=1, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=1, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=1] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=1, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=1] [L18] ++i VAL [array={1:0}, i=2, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=2, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=2, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=2] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=2, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=2] [L18] ++i VAL [array={1:0}, i=3, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=3, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=3, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=3] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=3, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=3] [L18] ++i VAL [array={1:0}, i=4, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=4, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=4, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=4] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=4, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=4] [L18] ++i VAL [array={1:0}, i=5, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=5, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=5, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=5] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=5, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=5] [L18] ++i VAL [array={1:0}, i=6, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=6, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=6, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=6] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=6, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=6] [L18] ++i VAL [array={1:0}, i=7, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=7, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=7, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=7] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=7, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=7] [L18] ++i VAL [array={1:0}, i=8, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=8, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=8, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=8] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=8, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=8] [L18] ++i VAL [array={1:0}, i=9, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=9, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=9, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=9] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=9, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=9] [L18] ++i VAL [array={1:0}, i=10, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND FALSE !(i < 10) VAL [array={1:0}, i=10, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L21] return numbers2; VAL [\result={-1:0}, array={1:0}, i=10, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L25] RET, EXPR getNumbers2() VAL [array={1:0}, getNumbers2()={-1:0}, numbers2={-1:0}, numbers4={110:0}] [L25] int* numbers = getNumbers2(); [L26] int numbers3[10]; [L27] int i = 0; VAL [array={1:0}, i=0, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=0, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=0, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=0] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=0, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=0] [L27] ++i VAL [array={1:0}, i=1, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=1, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=1, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=1] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=1, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=1] [L27] ++i VAL [array={1:0}, i=2, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=2, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=2, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=2] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=2, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=2] [L27] ++i VAL [array={1:0}, i=3, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=3, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=3, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=3] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=3, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=3] [L27] ++i VAL [array={1:0}, i=4, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=4, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=4, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=4] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=4, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=4] [L27] ++i VAL [array={1:0}, i=5, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=5, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=5, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=5] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=5, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=5] [L27] ++i VAL [array={1:0}, i=6, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=6, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=6, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=6] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=6, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=6] [L27] ++i VAL [array={1:0}, i=7, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=7, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=7, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=7] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=7, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=7] [L27] ++i VAL [array={1:0}, i=8, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=8, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=8, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=8] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=8, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=8] [L27] ++i VAL [array={1:0}, i=9, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=9, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=9, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=9] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=9, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=9] [L27] ++i VAL [array={1:0}, i=10, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND FALSE !(i < 10) VAL [array={1:0}, i=10, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L31] return numbers3; [L31] return numbers3; VAL [\result={105:0}, array={1:0}, i=10, numbers={-1:0}, numbers2={-1:0}, numbers4={110:0}] [L35] RET, EXPR getNumbers3() VAL [array={1:0}, getNumbers3()={105:0}, numbers2={-1:0}, numbers4={110:0}] [L35] int* numbers = getNumbers3(); [L37] int i = 0; VAL [array={1:0}, i=0, numbers={105:0}, numbers2={-1:0}, numbers4={110:0}] [L37] COND TRUE i < 10 VAL [array={1:0}, i=0, numbers={105:0}, numbers2={-1:0}, numbers4={110:0}] [L38] numbers[i] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 70 locations, 17 error locations. UNSAFE Result, 31.1s OverallTime, 30 OverallIterations, 10 TraceHistogramMax, 2.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1638 SDtfs, 877 SDslu, 8411 SDs, 0 SdLazy, 1812 SolverSat, 79 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2332 GetRequests, 2077 SyntacticMatches, 8 SemanticMatches, 247 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 421 ImplicationChecksByTransitivity, 4.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=177occurred in iteration=29, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 29 MinimizatonAttempts, 77 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 20.2s SatisfiabilityAnalysisTime, 7.3s InterpolantComputationTime, 4460 NumberOfCodeBlocks, 4143 NumberOfCodeBlocksAsserted, 101 NumberOfCheckSat, 4249 ConstructedInterpolants, 234 QuantifiedInterpolants, 1568965 SizeOfPredicates, 61 NumberOfNonLiveVariables, 7364 ConjunctsInSsa, 273 ConjunctsInUnsatCore, 54 InterpolantComputations, 10 PerfectInterpolantSequences, 9289/12283 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...