./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2f4049400be941342f32e9ba06dfe9aa51e5b146 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2f4049400be941342f32e9ba06dfe9aa51e5b146 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Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-02 20:55:36,496 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 20:55:36,496 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 20:55:36,503 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-02 20:55:36,503 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-02 20:55:36,503 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-02 20:55:36,504 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-02 20:55:36,505 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-02 20:55:36,505 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-02 20:55:36,506 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-02 20:55:36,506 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-02 20:55:36,506 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 20:55:36,507 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 20:55:36,507 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 20:55:36,508 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 20:55:36,508 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 20:55:36,509 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 20:55:36,510 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 20:55:36,511 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 20:55:36,511 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 20:55:36,512 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 20:55:36,512 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 20:55:36,513 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 20:55:36,514 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 20:55:36,514 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 20:55:36,514 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 20:55:36,515 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 20:55:36,515 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 20:55:36,516 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 20:55:36,516 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 20:55:36,516 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 20:55:36,517 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 20:55:36,517 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 20:55:36,517 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 20:55:36,517 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 20:55:36,518 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 20:55:36,518 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-12-02 20:55:36,525 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 20:55:36,525 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 20:55:36,525 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 20:55:36,525 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 20:55:36,526 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-02 20:55:36,526 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-02 20:55:36,526 INFO L133 SettingsManager]: * Use SBE=true [2018-12-02 20:55:36,526 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 20:55:36,526 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-02 20:55:36,526 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-02 20:55:36,527 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-02 20:55:36,527 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-02 20:55:36,527 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 20:55:36,527 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-02 20:55:36,527 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-02 20:55:36,527 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-02 20:55:36,527 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 20:55:36,527 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-02 20:55:36,528 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-02 20:55:36,528 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 20:55:36,528 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 20:55:36,528 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 20:55:36,528 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 20:55:36,528 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 20:55:36,528 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 20:55:36,529 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 20:55:36,529 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-02 20:55:36,529 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 20:55:36,529 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2f4049400be941342f32e9ba06dfe9aa51e5b146 [2018-12-02 20:55:36,547 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 20:55:36,556 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 20:55:36,559 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 20:55:36,560 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 20:55:36,560 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 20:55:36,561 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-12-02 20:55:36,599 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/data/eadacc17b/4aee722b373e497485d4fc906b94a156/FLAGf5115adee [2018-12-02 20:55:37,036 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 20:55:37,036 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-12-02 20:55:37,043 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/data/eadacc17b/4aee722b373e497485d4fc906b94a156/FLAGf5115adee [2018-12-02 20:55:37,053 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/data/eadacc17b/4aee722b373e497485d4fc906b94a156 [2018-12-02 20:55:37,055 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 20:55:37,056 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-02 20:55:37,056 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 20:55:37,056 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 20:55:37,059 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 20:55:37,059 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:55:37" (1/1) ... [2018-12-02 20:55:37,061 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@33416e95 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:55:37, skipping insertion in model container [2018-12-02 20:55:37,061 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:55:37" (1/1) ... [2018-12-02 20:55:37,065 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 20:55:37,094 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 20:55:37,318 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 20:55:37,329 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 20:55:37,363 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 20:55:37,395 INFO L195 MainTranslator]: Completed translation [2018-12-02 20:55:37,395 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:55:37 WrapperNode [2018-12-02 20:55:37,395 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 20:55:37,396 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 20:55:37,396 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 20:55:37,396 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 20:55:37,404 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:55:37" (1/1) ... [2018-12-02 20:55:37,404 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:55:37" (1/1) ... [2018-12-02 20:55:37,416 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:55:37" (1/1) ... [2018-12-02 20:55:37,417 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:55:37" (1/1) ... [2018-12-02 20:55:37,436 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:55:37" (1/1) ... [2018-12-02 20:55:37,439 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:55:37" (1/1) ... [2018-12-02 20:55:37,442 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:55:37" (1/1) ... [2018-12-02 20:55:37,446 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 20:55:37,446 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 20:55:37,446 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 20:55:37,446 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 20:55:37,447 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:55:37" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 20:55:37,479 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-02 20:55:37,479 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 20:55:37,479 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-12-02 20:55:37,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-02 20:55:37,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-02 20:55:37,482 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-02 20:55:37,482 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-02 20:55:37,482 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-02 20:55:37,482 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-02 20:55:37,482 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-02 20:55:37,482 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-12-02 20:55:37,482 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-12-02 20:55:37,482 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_get_clientdata [2018-12-02 20:55:37,482 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_set_clientdata [2018-12-02 20:55:37,483 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_3_11 [2018-12-02 20:55:37,483 INFO L138 BoogieDeclarations]: Found implementation of procedure free_11 [2018-12-02 20:55:37,483 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-02 20:55:37,483 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-02 20:55:37,483 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-02 20:55:37,483 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-02 20:55:37,483 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-12-02 20:55:37,483 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-12-02 20:55:37,484 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-12-02 20:55:37,484 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-12-02 20:55:37,484 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-12-02 20:55:37,484 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-12-02 20:55:37,484 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-12-02 20:55:37,484 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-12-02 20:55:37,484 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-12-02 20:55:37,484 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-12-02 20:55:37,485 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-12-02 20:55:37,485 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-12-02 20:55:37,485 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-12-02 20:55:37,485 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-12-02 20:55:37,485 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-12-02 20:55:37,485 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-12-02 20:55:37,485 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-12-02 20:55:37,485 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-12-02 20:55:37,485 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-12-02 20:55:37,485 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-12-02 20:55:37,486 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-12-02 20:55:37,486 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-12-02 20:55:37,486 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-12-02 20:55:37,486 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-12-02 20:55:37,486 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-12-02 20:55:37,486 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-12-02 20:55:37,486 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-12-02 20:55:37,486 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-12-02 20:55:37,486 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-12-02 20:55:37,487 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-12-02 20:55:37,487 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-12-02 20:55:37,487 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-12-02 20:55:37,487 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-12-02 20:55:37,487 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-12-02 20:55:37,487 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-12-02 20:55:37,487 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-12-02 20:55:37,487 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-12-02 20:55:37,487 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-12-02 20:55:37,488 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-12-02 20:55:37,488 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-12-02 20:55:37,488 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-12-02 20:55:37,488 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-12-02 20:55:37,488 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-12-02 20:55:37,488 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-12-02 20:55:37,488 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-12-02 20:55:37,488 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-12-02 20:55:37,488 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-12-02 20:55:37,488 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-12-02 20:55:37,489 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-12-02 20:55:37,489 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-12-02 20:55:37,489 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-12-02 20:55:37,489 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-12-02 20:55:37,489 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-12-02 20:55:37,489 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-12-02 20:55:37,489 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-12-02 20:55:37,489 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-12-02 20:55:37,489 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-12-02 20:55:37,490 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-12-02 20:55:37,490 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-12-02 20:55:37,490 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-12-02 20:55:37,490 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-12-02 20:55:37,490 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-12-02 20:55:37,490 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-12-02 20:55:37,490 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-12-02 20:55:37,490 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-12-02 20:55:37,490 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-12-02 20:55:37,491 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-12-02 20:55:37,491 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-12-02 20:55:37,491 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-12-02 20:55:37,491 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-12-02 20:55:37,491 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-12-02 20:55:37,491 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-12-02 20:55:37,491 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-12-02 20:55:37,491 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-12-02 20:55:37,491 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-12-02 20:55:37,492 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-12-02 20:55:37,492 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-12-02 20:55:37,492 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-12-02 20:55:37,492 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-12-02 20:55:37,492 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-12-02 20:55:37,492 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-12-02 20:55:37,492 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-12-02 20:55:37,492 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-12-02 20:55:37,492 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-12-02 20:55:37,492 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-12-02 20:55:37,493 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-12-02 20:55:37,493 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-12-02 20:55:37,493 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-12-02 20:55:37,493 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-12-02 20:55:37,493 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-12-02 20:55:37,493 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-12-02 20:55:37,493 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-12-02 20:55:37,493 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-12-02 20:55:37,493 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-12-02 20:55:37,494 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-12-02 20:55:37,494 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-12-02 20:55:37,494 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-12-02 20:55:37,494 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-12-02 20:55:37,494 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-12-02 20:55:37,494 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-12-02 20:55:37,494 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-12-02 20:55:37,494 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-12-02 20:55:37,494 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-12-02 20:55:37,494 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-02 20:55:37,495 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-12-02 20:55:37,495 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-12-02 20:55:37,495 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-12-02 20:55:37,495 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-12-02 20:55:37,495 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-12-02 20:55:37,495 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-12-02 20:55:37,495 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-02 20:55:37,495 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-02 20:55:37,495 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-02 20:55:37,495 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-02 20:55:37,496 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-02 20:55:37,496 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-02 20:55:37,496 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-12-02 20:55:37,496 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-12-02 20:55:37,496 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-12-02 20:55:37,496 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-02 20:55:37,496 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-12-02 20:55:37,496 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-12-02 20:55:37,496 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-12-02 20:55:37,496 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-12-02 20:55:37,497 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-12-02 20:55:37,497 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-12-02 20:55:37,497 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-02 20:55:37,497 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-12-02 20:55:37,497 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-12-02 20:55:37,497 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-02 20:55:37,497 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-02 20:55:37,497 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-02 20:55:37,497 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-02 20:55:37,497 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-02 20:55:37,498 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-02 20:55:37,498 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-02 20:55:37,498 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-02 20:55:37,498 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-02 20:55:37,498 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-02 20:55:37,498 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-02 20:55:37,498 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-12-02 20:55:37,498 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-02 20:55:37,498 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-02 20:55:37,498 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-02 20:55:37,499 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-02 20:55:37,499 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-02 20:55:37,499 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-02 20:55:37,499 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-02 20:55:37,499 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-02 20:55:37,499 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-12-02 20:55:37,499 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-12-02 20:55:37,499 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_get_clientdata [2018-12-02 20:55:37,499 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_set_clientdata [2018-12-02 20:55:37,499 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_3_11 [2018-12-02 20:55:37,500 INFO L130 BoogieDeclarations]: Found specification of procedure free_11 [2018-12-02 20:55:37,500 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-02 20:55:37,500 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-02 20:55:37,500 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-02 20:55:37,500 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-02 20:55:37,500 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 20:55:37,500 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-12-02 20:55:37,500 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2018-12-02 20:55:37,500 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-12-02 20:55:37,500 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-12-02 20:55:37,762 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-02 20:55:37,879 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-02 20:55:38,046 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 20:55:38,047 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-02 20:55:38,047 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:55:38 BoogieIcfgContainer [2018-12-02 20:55:38,047 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 20:55:38,048 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 20:55:38,048 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 20:55:38,050 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 20:55:38,051 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:55:37" (1/3) ... [2018-12-02 20:55:38,051 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@42e46e01 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:55:38, skipping insertion in model container [2018-12-02 20:55:38,051 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:55:37" (2/3) ... [2018-12-02 20:55:38,052 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@42e46e01 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:55:38, skipping insertion in model container [2018-12-02 20:55:38,052 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:55:38" (3/3) ... [2018-12-02 20:55:38,053 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-12-02 20:55:38,059 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 20:55:38,064 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 85 error locations. [2018-12-02 20:55:38,074 INFO L257 AbstractCegarLoop]: Starting to check reachability of 85 error locations. [2018-12-02 20:55:38,089 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-02 20:55:38,090 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 20:55:38,090 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-02 20:55:38,090 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 20:55:38,090 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 20:55:38,090 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 20:55:38,090 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 20:55:38,090 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 20:55:38,090 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 20:55:38,102 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states. [2018-12-02 20:55:38,110 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-02 20:55:38,110 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:38,111 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:38,114 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:38,118 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:38,118 INFO L82 PathProgramCache]: Analyzing trace with hash 1348674973, now seen corresponding path program 1 times [2018-12-02 20:55:38,120 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:38,120 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:38,155 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:38,155 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:38,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:38,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:38,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:55:38,255 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:55:38,255 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:55:38,259 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:55:38,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:55:38,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:55:38,272 INFO L87 Difference]: Start difference. First operand 170 states. Second operand 5 states. [2018-12-02 20:55:38,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:38,325 INFO L93 Difference]: Finished difference Result 132 states and 153 transitions. [2018-12-02 20:55:38,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:55:38,326 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-12-02 20:55:38,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:38,333 INFO L225 Difference]: With dead ends: 132 [2018-12-02 20:55:38,333 INFO L226 Difference]: Without dead ends: 129 [2018-12-02 20:55:38,334 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:55:38,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-12-02 20:55:38,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 101. [2018-12-02 20:55:38,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-02 20:55:38,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 113 transitions. [2018-12-02 20:55:38,365 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 113 transitions. Word has length 16 [2018-12-02 20:55:38,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:38,365 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 113 transitions. [2018-12-02 20:55:38,365 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:55:38,365 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 113 transitions. [2018-12-02 20:55:38,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-02 20:55:38,366 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:38,366 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:38,367 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:38,367 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:38,367 INFO L82 PathProgramCache]: Analyzing trace with hash -1203481988, now seen corresponding path program 1 times [2018-12-02 20:55:38,367 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:38,367 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:38,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:38,368 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:38,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:38,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:38,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:55:38,400 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:55:38,400 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 20:55:38,401 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 20:55:38,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 20:55:38,401 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 20:55:38,401 INFO L87 Difference]: Start difference. First operand 101 states and 113 transitions. Second operand 3 states. [2018-12-02 20:55:38,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:38,493 INFO L93 Difference]: Finished difference Result 144 states and 168 transitions. [2018-12-02 20:55:38,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 20:55:38,494 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-12-02 20:55:38,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:38,495 INFO L225 Difference]: With dead ends: 144 [2018-12-02 20:55:38,495 INFO L226 Difference]: Without dead ends: 141 [2018-12-02 20:55:38,496 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 20:55:38,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-02 20:55:38,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 97. [2018-12-02 20:55:38,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-02 20:55:38,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 105 transitions. [2018-12-02 20:55:38,502 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 105 transitions. Word has length 16 [2018-12-02 20:55:38,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:38,503 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 105 transitions. [2018-12-02 20:55:38,503 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 20:55:38,503 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 105 transitions. [2018-12-02 20:55:38,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-02 20:55:38,503 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:38,503 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:38,504 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:38,504 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:38,504 INFO L82 PathProgramCache]: Analyzing trace with hash -1252423737, now seen corresponding path program 1 times [2018-12-02 20:55:38,504 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:38,504 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:38,505 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:38,505 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:38,505 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:38,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:38,536 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:55:38,536 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:55:38,536 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:55:38,536 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:55:38,536 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:55:38,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:55:38,537 INFO L87 Difference]: Start difference. First operand 97 states and 105 transitions. Second operand 5 states. [2018-12-02 20:55:38,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:38,568 INFO L93 Difference]: Finished difference Result 126 states and 143 transitions. [2018-12-02 20:55:38,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:55:38,568 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-12-02 20:55:38,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:38,569 INFO L225 Difference]: With dead ends: 126 [2018-12-02 20:55:38,569 INFO L226 Difference]: Without dead ends: 126 [2018-12-02 20:55:38,570 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:55:38,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-12-02 20:55:38,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 101. [2018-12-02 20:55:38,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-02 20:55:38,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 112 transitions. [2018-12-02 20:55:38,576 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 112 transitions. Word has length 21 [2018-12-02 20:55:38,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:38,576 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 112 transitions. [2018-12-02 20:55:38,576 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:55:38,576 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 112 transitions. [2018-12-02 20:55:38,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-02 20:55:38,577 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:38,577 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:38,577 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:38,577 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:38,577 INFO L82 PathProgramCache]: Analyzing trace with hash -1252423700, now seen corresponding path program 1 times [2018-12-02 20:55:38,577 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:38,578 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:38,579 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:38,579 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:38,579 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:38,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:38,651 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:55:38,651 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:55:38,651 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:55:38,659 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:38,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:38,684 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:55:38,710 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:55:38,711 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:38,713 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:38,713 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:55:38,739 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:38,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:38,741 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-02 20:55:38,741 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:38,747 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:55:38,747 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-12-02 20:55:38,766 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:55:38,780 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:55:38,780 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7] total 8 [2018-12-02 20:55:38,781 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 20:55:38,781 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 20:55:38,781 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-12-02 20:55:38,781 INFO L87 Difference]: Start difference. First operand 101 states and 112 transitions. Second operand 9 states. [2018-12-02 20:55:39,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:39,258 INFO L93 Difference]: Finished difference Result 193 states and 229 transitions. [2018-12-02 20:55:39,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 20:55:39,259 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-12-02 20:55:39,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:39,262 INFO L225 Difference]: With dead ends: 193 [2018-12-02 20:55:39,262 INFO L226 Difference]: Without dead ends: 193 [2018-12-02 20:55:39,263 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 18 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2018-12-02 20:55:39,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-12-02 20:55:39,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 111. [2018-12-02 20:55:39,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-12-02 20:55:39,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 127 transitions. [2018-12-02 20:55:39,289 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 127 transitions. Word has length 21 [2018-12-02 20:55:39,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:39,289 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 127 transitions. [2018-12-02 20:55:39,289 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 20:55:39,290 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 127 transitions. [2018-12-02 20:55:39,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-02 20:55:39,291 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:39,291 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:39,292 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:39,293 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:39,294 INFO L82 PathProgramCache]: Analyzing trace with hash -1252423699, now seen corresponding path program 1 times [2018-12-02 20:55:39,294 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:39,294 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:39,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:39,296 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:39,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:39,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:39,401 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:55:39,401 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:55:39,401 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:55:39,410 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:39,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:39,427 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:55:39,431 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:55:39,431 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:39,445 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:55:39,445 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:39,451 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:39,451 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-12-02 20:55:39,483 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:39,484 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:39,485 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:55:39,485 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:39,492 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 20:55:39,492 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:39,497 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:39,497 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-02 20:55:39,504 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:55:39,518 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:55:39,519 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-12-02 20:55:39,519 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 20:55:39,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 20:55:39,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-12-02 20:55:39,519 INFO L87 Difference]: Start difference. First operand 111 states and 127 transitions. Second operand 10 states. [2018-12-02 20:55:40,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:40,104 INFO L93 Difference]: Finished difference Result 257 states and 303 transitions. [2018-12-02 20:55:40,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-02 20:55:40,104 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 21 [2018-12-02 20:55:40,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:40,105 INFO L225 Difference]: With dead ends: 257 [2018-12-02 20:55:40,105 INFO L226 Difference]: Without dead ends: 257 [2018-12-02 20:55:40,105 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 16 SyntacticMatches, 5 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=162, Unknown=0, NotChecked=0, Total=210 [2018-12-02 20:55:40,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-12-02 20:55:40,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 136. [2018-12-02 20:55:40,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-02 20:55:40,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 172 transitions. [2018-12-02 20:55:40,112 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 172 transitions. Word has length 21 [2018-12-02 20:55:40,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:40,113 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 172 transitions. [2018-12-02 20:55:40,113 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 20:55:40,113 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 172 transitions. [2018-12-02 20:55:40,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-02 20:55:40,113 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:40,113 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:40,113 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:40,114 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:40,114 INFO L82 PathProgramCache]: Analyzing trace with hash -1545826707, now seen corresponding path program 1 times [2018-12-02 20:55:40,114 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:40,114 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:40,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:40,115 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:40,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:40,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:40,139 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:55:40,140 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:55:40,140 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:55:40,148 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:40,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:40,158 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:55:40,169 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:55:40,184 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 20:55:40,184 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-12-02 20:55:40,184 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:55:40,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:55:40,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:55:40,184 INFO L87 Difference]: Start difference. First operand 136 states and 172 transitions. Second operand 5 states. [2018-12-02 20:55:40,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:40,195 INFO L93 Difference]: Finished difference Result 123 states and 148 transitions. [2018-12-02 20:55:40,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:55:40,195 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-12-02 20:55:40,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:40,196 INFO L225 Difference]: With dead ends: 123 [2018-12-02 20:55:40,196 INFO L226 Difference]: Without dead ends: 121 [2018-12-02 20:55:40,196 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 19 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:55:40,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-12-02 20:55:40,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2018-12-02 20:55:40,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-12-02 20:55:40,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 146 transitions. [2018-12-02 20:55:40,201 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 146 transitions. Word has length 21 [2018-12-02 20:55:40,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:40,201 INFO L480 AbstractCegarLoop]: Abstraction has 121 states and 146 transitions. [2018-12-02 20:55:40,201 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:55:40,201 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 146 transitions. [2018-12-02 20:55:40,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-02 20:55:40,202 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:40,202 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:40,202 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:40,202 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:40,203 INFO L82 PathProgramCache]: Analyzing trace with hash -817295485, now seen corresponding path program 1 times [2018-12-02 20:55:40,203 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:40,203 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:40,204 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:40,204 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:40,204 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:40,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:40,254 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:55:40,254 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:55:40,254 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:55:40,261 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:40,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:40,275 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:55:41,644 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:55:41,659 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:55:41,659 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6] total 9 [2018-12-02 20:55:41,659 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 20:55:41,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 20:55:41,659 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=63, Unknown=6, NotChecked=0, Total=90 [2018-12-02 20:55:41,659 INFO L87 Difference]: Start difference. First operand 121 states and 146 transitions. Second operand 10 states. [2018-12-02 20:55:42,243 WARN L180 SmtUtils]: Spent 533.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 11 [2018-12-02 20:55:42,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:42,449 INFO L93 Difference]: Finished difference Result 146 states and 176 transitions. [2018-12-02 20:55:42,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 20:55:42,449 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 25 [2018-12-02 20:55:42,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:42,450 INFO L225 Difference]: With dead ends: 146 [2018-12-02 20:55:42,450 INFO L226 Difference]: Without dead ends: 141 [2018-12-02 20:55:42,451 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 25 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=26, Invalid=78, Unknown=6, NotChecked=0, Total=110 [2018-12-02 20:55:42,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-02 20:55:42,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 117. [2018-12-02 20:55:42,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-12-02 20:55:42,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 141 transitions. [2018-12-02 20:55:42,455 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 141 transitions. Word has length 25 [2018-12-02 20:55:42,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:42,455 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 141 transitions. [2018-12-02 20:55:42,455 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 20:55:42,455 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 141 transitions. [2018-12-02 20:55:42,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-02 20:55:42,455 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:42,456 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:42,456 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:42,456 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:42,456 INFO L82 PathProgramCache]: Analyzing trace with hash 514865073, now seen corresponding path program 1 times [2018-12-02 20:55:42,456 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:42,456 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:42,457 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:42,457 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:42,457 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:42,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:42,479 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:55:42,479 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:55:42,480 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:55:42,480 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:55:42,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:55:42,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:55:42,480 INFO L87 Difference]: Start difference. First operand 117 states and 141 transitions. Second operand 5 states. [2018-12-02 20:55:42,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:42,496 INFO L93 Difference]: Finished difference Result 133 states and 156 transitions. [2018-12-02 20:55:42,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:55:42,497 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-02 20:55:42,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:42,498 INFO L225 Difference]: With dead ends: 133 [2018-12-02 20:55:42,498 INFO L226 Difference]: Without dead ends: 133 [2018-12-02 20:55:42,498 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:55:42,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-12-02 20:55:42,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 117. [2018-12-02 20:55:42,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-12-02 20:55:42,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 140 transitions. [2018-12-02 20:55:42,501 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 140 transitions. Word has length 29 [2018-12-02 20:55:42,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:42,502 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 140 transitions. [2018-12-02 20:55:42,502 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:55:42,502 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 140 transitions. [2018-12-02 20:55:42,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-02 20:55:42,503 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:42,503 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:42,503 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:42,503 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:42,503 INFO L82 PathProgramCache]: Analyzing trace with hash 514865125, now seen corresponding path program 1 times [2018-12-02 20:55:42,503 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:42,504 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:42,504 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:42,504 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:42,505 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:42,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:42,560 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:55:42,560 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:55:42,560 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:55:42,566 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:42,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:42,585 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:55:42,588 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:55:42,588 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:42,589 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:42,589 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:55:42,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:42,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:42,611 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-02 20:55:42,612 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:42,616 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:55:42,616 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-12-02 20:55:42,629 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:55:42,648 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:55:42,648 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7] total 8 [2018-12-02 20:55:42,648 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 20:55:42,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 20:55:42,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-12-02 20:55:42,649 INFO L87 Difference]: Start difference. First operand 117 states and 140 transitions. Second operand 9 states. [2018-12-02 20:55:42,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:42,958 INFO L93 Difference]: Finished difference Result 162 states and 195 transitions. [2018-12-02 20:55:42,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 20:55:42,958 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-12-02 20:55:42,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:42,959 INFO L225 Difference]: With dead ends: 162 [2018-12-02 20:55:42,959 INFO L226 Difference]: Without dead ends: 162 [2018-12-02 20:55:42,960 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 25 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2018-12-02 20:55:42,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-12-02 20:55:42,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 129. [2018-12-02 20:55:42,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-12-02 20:55:42,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 158 transitions. [2018-12-02 20:55:42,963 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 158 transitions. Word has length 29 [2018-12-02 20:55:42,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:42,964 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 158 transitions. [2018-12-02 20:55:42,964 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 20:55:42,964 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 158 transitions. [2018-12-02 20:55:42,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-02 20:55:42,964 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:42,964 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:42,965 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:42,965 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:42,965 INFO L82 PathProgramCache]: Analyzing trace with hash 514865126, now seen corresponding path program 1 times [2018-12-02 20:55:42,965 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:42,965 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:42,966 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:42,966 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:42,966 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:42,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:43,037 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-02 20:55:43,037 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:55:43,037 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:55:43,046 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:43,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:43,066 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:55:43,070 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:55:43,070 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:43,077 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:55:43,077 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:43,081 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:43,082 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-12-02 20:55:43,119 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:43,120 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 20:55:43,120 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:43,127 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:43,128 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:43,128 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:55:43,129 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:43,133 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:43,133 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-02 20:55:43,134 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-02 20:55:43,150 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:55:43,151 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-12-02 20:55:43,151 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 20:55:43,151 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 20:55:43,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-12-02 20:55:43,151 INFO L87 Difference]: Start difference. First operand 129 states and 158 transitions. Second operand 10 states. [2018-12-02 20:55:44,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:44,565 INFO L93 Difference]: Finished difference Result 182 states and 219 transitions. [2018-12-02 20:55:44,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 20:55:44,565 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 29 [2018-12-02 20:55:44,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:44,566 INFO L225 Difference]: With dead ends: 182 [2018-12-02 20:55:44,566 INFO L226 Difference]: Without dead ends: 182 [2018-12-02 20:55:44,567 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2018-12-02 20:55:44,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-12-02 20:55:44,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 141. [2018-12-02 20:55:44,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-02 20:55:44,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 177 transitions. [2018-12-02 20:55:44,572 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 177 transitions. Word has length 29 [2018-12-02 20:55:44,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:44,572 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 177 transitions. [2018-12-02 20:55:44,572 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 20:55:44,572 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 177 transitions. [2018-12-02 20:55:44,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-02 20:55:44,573 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:44,573 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:44,573 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:44,574 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:44,574 INFO L82 PathProgramCache]: Analyzing trace with hash 9306500, now seen corresponding path program 1 times [2018-12-02 20:55:44,574 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:44,574 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:44,575 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:44,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:44,575 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:44,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:44,596 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:55:44,596 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:55:44,597 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:55:44,603 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:44,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:44,619 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:55:44,633 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:55:44,648 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 20:55:44,648 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-12-02 20:55:44,648 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:55:44,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:55:44,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:55:44,649 INFO L87 Difference]: Start difference. First operand 141 states and 177 transitions. Second operand 5 states. [2018-12-02 20:55:44,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:44,658 INFO L93 Difference]: Finished difference Result 118 states and 137 transitions. [2018-12-02 20:55:44,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:55:44,658 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-02 20:55:44,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:44,659 INFO L225 Difference]: With dead ends: 118 [2018-12-02 20:55:44,659 INFO L226 Difference]: Without dead ends: 116 [2018-12-02 20:55:44,659 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:55:44,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-12-02 20:55:44,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-12-02 20:55:44,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-12-02 20:55:44,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 135 transitions. [2018-12-02 20:55:44,663 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 135 transitions. Word has length 29 [2018-12-02 20:55:44,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:44,664 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 135 transitions. [2018-12-02 20:55:44,664 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:55:44,664 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 135 transitions. [2018-12-02 20:55:44,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 20:55:44,664 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:44,665 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:44,665 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:44,665 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:44,665 INFO L82 PathProgramCache]: Analyzing trace with hash 1019181102, now seen corresponding path program 1 times [2018-12-02 20:55:44,665 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:44,665 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:44,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:44,666 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:44,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:44,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:44,712 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-02 20:55:44,712 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:55:44,712 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 20:55:44,712 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 20:55:44,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 20:55:44,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-02 20:55:44,713 INFO L87 Difference]: Start difference. First operand 116 states and 135 transitions. Second operand 7 states. [2018-12-02 20:55:44,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:44,861 INFO L93 Difference]: Finished difference Result 125 states and 145 transitions. [2018-12-02 20:55:44,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 20:55:44,861 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 32 [2018-12-02 20:55:44,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:44,862 INFO L225 Difference]: With dead ends: 125 [2018-12-02 20:55:44,862 INFO L226 Difference]: Without dead ends: 125 [2018-12-02 20:55:44,862 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-12-02 20:55:44,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-12-02 20:55:44,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 115. [2018-12-02 20:55:44,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-12-02 20:55:44,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 134 transitions. [2018-12-02 20:55:44,864 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 134 transitions. Word has length 32 [2018-12-02 20:55:44,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:44,864 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 134 transitions. [2018-12-02 20:55:44,865 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 20:55:44,865 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 134 transitions. [2018-12-02 20:55:44,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 20:55:44,865 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:44,865 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:44,865 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:44,865 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:44,865 INFO L82 PathProgramCache]: Analyzing trace with hash 1019181103, now seen corresponding path program 1 times [2018-12-02 20:55:44,866 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:44,866 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:44,866 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:44,866 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:44,866 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:44,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:44,950 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:55:44,950 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:55:44,950 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:55:44,958 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:44,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:44,980 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:55:45,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:45,008 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 20:55:45,008 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,015 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:45,015 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:45,016 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:55:45,016 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,021 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,021 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-12-02 20:55:45,050 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-02 20:55:45,065 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 20:55:45,065 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2018-12-02 20:55:45,065 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-02 20:55:45,066 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-02 20:55:45,066 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2018-12-02 20:55:45,066 INFO L87 Difference]: Start difference. First operand 115 states and 134 transitions. Second operand 16 states. [2018-12-02 20:55:45,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:45,454 INFO L93 Difference]: Finished difference Result 130 states and 147 transitions. [2018-12-02 20:55:45,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-02 20:55:45,454 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 32 [2018-12-02 20:55:45,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:45,454 INFO L225 Difference]: With dead ends: 130 [2018-12-02 20:55:45,454 INFO L226 Difference]: Without dead ends: 130 [2018-12-02 20:55:45,455 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=387, Unknown=0, NotChecked=0, Total=462 [2018-12-02 20:55:45,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-12-02 20:55:45,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 95. [2018-12-02 20:55:45,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-12-02 20:55:45,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 103 transitions. [2018-12-02 20:55:45,457 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 103 transitions. Word has length 32 [2018-12-02 20:55:45,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:45,457 INFO L480 AbstractCegarLoop]: Abstraction has 95 states and 103 transitions. [2018-12-02 20:55:45,457 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-02 20:55:45,457 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 103 transitions. [2018-12-02 20:55:45,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 20:55:45,457 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:45,458 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:45,458 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:45,458 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:45,458 INFO L82 PathProgramCache]: Analyzing trace with hash -789849662, now seen corresponding path program 1 times [2018-12-02 20:55:45,458 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:45,458 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:45,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:45,459 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:45,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:45,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:45,519 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:55:45,519 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:55:45,520 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:55:45,528 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:45,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:45,543 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:55:45,545 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:55:45,545 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,546 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,546 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:55:45,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:45,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:45,559 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:55:45,559 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,560 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,560 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-02 20:55:45,583 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:45,583 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-12-02 20:55:45,583 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,588 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:55:45,588 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-12-02 20:55:45,597 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:55:45,612 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:55:45,612 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10] total 10 [2018-12-02 20:55:45,612 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 20:55:45,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 20:55:45,613 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-12-02 20:55:45,613 INFO L87 Difference]: Start difference. First operand 95 states and 103 transitions. Second operand 11 states. [2018-12-02 20:55:45,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:45,803 INFO L93 Difference]: Finished difference Result 118 states and 133 transitions. [2018-12-02 20:55:45,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 20:55:45,804 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-12-02 20:55:45,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:45,804 INFO L225 Difference]: With dead ends: 118 [2018-12-02 20:55:45,804 INFO L226 Difference]: Without dead ends: 118 [2018-12-02 20:55:45,805 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 26 SyntacticMatches, 8 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-12-02 20:55:45,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-12-02 20:55:45,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 97. [2018-12-02 20:55:45,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-02 20:55:45,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 105 transitions. [2018-12-02 20:55:45,807 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 105 transitions. Word has length 32 [2018-12-02 20:55:45,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:45,807 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 105 transitions. [2018-12-02 20:55:45,807 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 20:55:45,807 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 105 transitions. [2018-12-02 20:55:45,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-02 20:55:45,808 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:45,808 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:45,808 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:45,808 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:45,808 INFO L82 PathProgramCache]: Analyzing trace with hash 180504079, now seen corresponding path program 1 times [2018-12-02 20:55:45,808 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:45,809 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:45,809 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:45,809 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:45,809 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:45,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:45,909 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:55:45,909 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:55:45,909 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:55:45,925 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:45,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:45,942 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:55:45,945 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:55:45,945 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,950 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,950 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:55:45,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:45,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:45,962 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:55:45,963 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,964 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,964 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-02 20:55:45,971 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 20:55:45,972 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 20:55:45,972 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,973 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,982 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:45,982 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:16, output treesize:12 [2018-12-02 20:55:47,984 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_4 Int) (v_entry_point_~c11~0.base_BEFORE_CALL_9 Int)) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_9 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_9) v_entry_point_~c11~0.offset_BEFORE_CALL_4)))) is different from true [2018-12-02 20:55:48,005 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-12-02 20:55:48,008 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-02 20:55:48,008 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:48,011 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:48,015 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:48,015 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:37, output treesize:18 [2018-12-02 20:55:48,051 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-12-02 20:55:48,053 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-12-02 20:55:48,053 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:48,056 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:48,058 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:48,058 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:5 [2018-12-02 20:55:48,066 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-12-02 20:55:48,081 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:55:48,081 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 18 [2018-12-02 20:55:48,081 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-02 20:55:48,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-02 20:55:48,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=270, Unknown=1, NotChecked=32, Total=342 [2018-12-02 20:55:48,081 INFO L87 Difference]: Start difference. First operand 97 states and 105 transitions. Second operand 19 states. [2018-12-02 20:55:52,166 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-02 20:55:56,184 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 18 [2018-12-02 20:55:58,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:55:58,547 INFO L93 Difference]: Finished difference Result 123 states and 138 transitions. [2018-12-02 20:55:58,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-02 20:55:58,547 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 34 [2018-12-02 20:55:58,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:55:58,548 INFO L225 Difference]: With dead ends: 123 [2018-12-02 20:55:58,548 INFO L226 Difference]: Without dead ends: 123 [2018-12-02 20:55:58,548 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 26 SyntacticMatches, 5 SemanticMatches, 29 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 12.2s TimeCoverageRelationStatistics Valid=119, Invalid=751, Unknown=4, NotChecked=56, Total=930 [2018-12-02 20:55:58,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-12-02 20:55:58,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 100. [2018-12-02 20:55:58,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-02 20:55:58,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 108 transitions. [2018-12-02 20:55:58,551 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 108 transitions. Word has length 34 [2018-12-02 20:55:58,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:55:58,551 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 108 transitions. [2018-12-02 20:55:58,552 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-02 20:55:58,552 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 108 transitions. [2018-12-02 20:55:58,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-02 20:55:58,552 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:55:58,552 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:55:58,553 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:55:58,553 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:55:58,553 INFO L82 PathProgramCache]: Analyzing trace with hash 180504080, now seen corresponding path program 1 times [2018-12-02 20:55:58,553 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:55:58,553 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:55:58,554 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:58,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:58,554 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:55:58,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:58,680 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:55:58,681 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:55:58,681 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:55:58,689 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:55:58,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:55:58,705 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:55:58,707 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:55:58,707 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:58,710 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:58,710 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:55:58,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:58,731 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:55:58,731 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:55:58,731 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:58,732 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:58,732 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-02 20:55:58,759 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 20:55:58,761 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 20:55:58,761 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:58,762 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:58,767 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 20:55:58,768 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 20:55:58,768 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 20:55:58,769 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:58,772 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:55:58,772 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-12-02 20:56:00,787 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_12 Int) (v_entry_point_~c11~0.offset_BEFORE_CALL_6 Int)) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_12 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_12) v_entry_point_~c11~0.offset_BEFORE_CALL_6)))) is different from true [2018-12-02 20:56:00,811 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 70 [2018-12-02 20:56:00,812 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-02 20:56:00,813 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:00,818 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:00,828 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 58 [2018-12-02 20:56:00,830 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-02 20:56:00,830 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:00,840 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:00,846 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:00,846 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:77, output treesize:31 [2018-12-02 20:56:00,901 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-12-02 20:56:00,902 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 16 [2018-12-02 20:56:00,902 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:00,905 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:00,910 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 20 [2018-12-02 20:56:00,912 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 11 [2018-12-02 20:56:00,912 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:00,914 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:00,917 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:00,917 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:45, output treesize:11 [2018-12-02 20:56:00,948 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-12-02 20:56:00,963 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:56:00,964 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 24 [2018-12-02 20:56:00,964 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-12-02 20:56:00,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-12-02 20:56:00,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=501, Unknown=1, NotChecked=44, Total=600 [2018-12-02 20:56:00,964 INFO L87 Difference]: Start difference. First operand 100 states and 108 transitions. Second operand 25 states. [2018-12-02 20:56:05,093 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-02 20:56:09,123 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 20 [2018-12-02 20:56:09,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:56:09,734 INFO L93 Difference]: Finished difference Result 122 states and 137 transitions. [2018-12-02 20:56:09,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-02 20:56:09,734 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 34 [2018-12-02 20:56:09,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:56:09,734 INFO L225 Difference]: With dead ends: 122 [2018-12-02 20:56:09,734 INFO L226 Difference]: Without dead ends: 122 [2018-12-02 20:56:09,735 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 22 SyntacticMatches, 3 SemanticMatches, 35 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 10.4s TimeCoverageRelationStatistics Valid=149, Invalid=1112, Unknown=3, NotChecked=68, Total=1332 [2018-12-02 20:56:09,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-12-02 20:56:09,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 99. [2018-12-02 20:56:09,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-02 20:56:09,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 107 transitions. [2018-12-02 20:56:09,737 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 107 transitions. Word has length 34 [2018-12-02 20:56:09,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:56:09,737 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 107 transitions. [2018-12-02 20:56:09,737 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-12-02 20:56:09,737 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 107 transitions. [2018-12-02 20:56:09,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-12-02 20:56:09,737 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:56:09,737 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:56:09,738 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:56:09,738 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:56:09,738 INFO L82 PathProgramCache]: Analyzing trace with hash 1714971376, now seen corresponding path program 1 times [2018-12-02 20:56:09,738 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:56:09,738 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:56:09,739 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:56:09,739 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:56:09,739 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:56:09,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:56:09,924 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-02 20:56:09,924 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:56:09,924 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:56:09,933 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:56:09,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:56:09,947 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:56:12,558 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:56:12,573 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:56:12,573 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-12-02 20:56:12,573 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-02 20:56:12,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-02 20:56:12,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=226, Unknown=6, NotChecked=0, Total=272 [2018-12-02 20:56:12,574 INFO L87 Difference]: Start difference. First operand 99 states and 107 transitions. Second operand 17 states. [2018-12-02 20:56:14,197 WARN L180 SmtUtils]: Spent 1.42 s on a formula simplification. DAG size of input: 29 DAG size of output: 25 [2018-12-02 20:56:15,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:56:15,013 INFO L93 Difference]: Finished difference Result 123 states and 137 transitions. [2018-12-02 20:56:15,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-02 20:56:15,013 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 35 [2018-12-02 20:56:15,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:56:15,013 INFO L225 Difference]: With dead ends: 123 [2018-12-02 20:56:15,013 INFO L226 Difference]: Without dead ends: 116 [2018-12-02 20:56:15,014 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 34 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=66, Invalid=390, Unknown=6, NotChecked=0, Total=462 [2018-12-02 20:56:15,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-12-02 20:56:15,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 93. [2018-12-02 20:56:15,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-02 20:56:15,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 100 transitions. [2018-12-02 20:56:15,016 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 100 transitions. Word has length 35 [2018-12-02 20:56:15,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:56:15,016 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 100 transitions. [2018-12-02 20:56:15,016 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-02 20:56:15,016 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 100 transitions. [2018-12-02 20:56:15,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-02 20:56:15,017 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:56:15,017 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:56:15,017 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:56:15,017 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:56:15,017 INFO L82 PathProgramCache]: Analyzing trace with hash 1753082646, now seen corresponding path program 1 times [2018-12-02 20:56:15,017 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:56:15,017 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:56:15,018 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:56:15,018 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:56:15,018 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:56:15,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:56:15,204 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-02 20:56:15,204 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:56:15,204 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:56:15,210 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:56:15,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:56:15,228 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:56:15,230 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:56:15,230 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:15,231 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:15,231 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:56:15,235 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:56:15,235 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:56:15,236 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:56:15,236 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:15,237 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:15,237 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-02 20:56:15,244 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 20:56:15,245 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 20:56:15,245 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:15,246 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:15,251 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 20:56:15,252 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 20:56:15,252 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:15,253 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:15,258 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:15,258 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-12-02 20:56:17,260 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_17 Int) (v_entry_point_~c11~0.offset_BEFORE_CALL_8 Int)) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_17 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_17) v_entry_point_~c11~0.offset_BEFORE_CALL_8)))) is different from true [2018-12-02 20:56:17,263 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:56:17,263 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:17,266 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 20:56:17,266 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:14 [2018-12-02 20:56:21,285 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 14 [2018-12-02 20:56:21,349 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-12-02 20:56:21,351 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 20:56:21,351 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:21,354 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:21,364 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 35 [2018-12-02 20:56:21,366 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 11 [2018-12-02 20:56:21,366 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:21,370 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:21,378 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:21,378 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:62, output treesize:26 [2018-12-02 20:56:21,433 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-12-02 20:56:21,434 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-12-02 20:56:21,435 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:21,436 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:21,439 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 20:56:21,439 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:29 [2018-12-02 20:56:21,484 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-12-02 20:56:21,485 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-02 20:56:21,486 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:21,488 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-02 20:56:21,489 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:21,489 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:21,490 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:21,490 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:33, output treesize:5 [2018-12-02 20:56:21,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:56:21,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:56:21,875 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-02 20:56:21,875 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:21,879 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:56:21,879 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-12-02 20:56:21,901 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 4 not checked. [2018-12-02 20:56:21,915 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:56:21,916 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 22] total 28 [2018-12-02 20:56:21,916 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-12-02 20:56:21,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-12-02 20:56:21,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=688, Unknown=3, NotChecked=52, Total=812 [2018-12-02 20:56:21,916 INFO L87 Difference]: Start difference. First operand 93 states and 100 transitions. Second operand 29 states. [2018-12-02 20:56:26,627 WARN L180 SmtUtils]: Spent 304.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-12-02 20:56:33,163 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-02 20:56:37,522 WARN L180 SmtUtils]: Spent 2.33 s on a formula simplification that was a NOOP. DAG size: 25 [2018-12-02 20:56:40,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:56:40,534 INFO L93 Difference]: Finished difference Result 140 states and 158 transitions. [2018-12-02 20:56:40,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-12-02 20:56:40,534 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 43 [2018-12-02 20:56:40,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:56:40,535 INFO L225 Difference]: With dead ends: 140 [2018-12-02 20:56:40,535 INFO L226 Difference]: Without dead ends: 140 [2018-12-02 20:56:40,535 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 29 SyntacticMatches, 8 SemanticMatches, 48 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 474 ImplicationChecksByTransitivity, 19.6s TimeCoverageRelationStatistics Valid=243, Invalid=2106, Unknown=7, NotChecked=94, Total=2450 [2018-12-02 20:56:40,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-02 20:56:40,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 124. [2018-12-02 20:56:40,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-12-02 20:56:40,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 145 transitions. [2018-12-02 20:56:40,539 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 145 transitions. Word has length 43 [2018-12-02 20:56:40,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:56:40,539 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 145 transitions. [2018-12-02 20:56:40,539 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-12-02 20:56:40,539 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 145 transitions. [2018-12-02 20:56:40,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-02 20:56:40,540 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:56:40,540 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:56:40,540 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:56:40,540 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:56:40,540 INFO L82 PathProgramCache]: Analyzing trace with hash 1753082647, now seen corresponding path program 1 times [2018-12-02 20:56:40,541 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:56:40,541 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:56:40,541 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:56:40,542 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:56:40,542 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:56:40,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:56:40,823 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-02 20:56:40,824 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:56:40,824 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:56:40,831 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:56:40,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:56:40,850 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:56:40,852 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:56:40,853 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:40,854 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:40,854 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:56:40,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:56:40,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:56:40,862 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:56:40,862 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:40,863 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:40,863 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-02 20:56:40,870 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 20:56:40,871 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 20:56:40,871 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:40,873 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:40,878 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 20:56:40,879 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 20:56:40,879 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:40,880 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:40,884 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:40,884 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-12-02 20:56:42,886 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_20 Int) (v_entry_point_~c11~0.offset_BEFORE_CALL_10 Int)) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_20) v_entry_point_~c11~0.offset_BEFORE_CALL_10) v_entry_point_~c11~0.base_BEFORE_CALL_20))) is different from true [2018-12-02 20:56:43,961 WARN L180 SmtUtils]: Spent 466.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-12-02 20:56:43,964 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:56:43,964 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:43,971 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:56:43,971 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:43,976 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 20:56:43,976 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:27, output treesize:22 [2018-12-02 20:56:48,006 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 21 [2018-12-02 20:56:48,063 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-12-02 20:56:48,065 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 11 [2018-12-02 20:56:48,065 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:48,069 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:48,080 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 35 [2018-12-02 20:56:48,082 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 20:56:48,082 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:48,086 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:48,093 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:48,093 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:67, output treesize:58 [2018-12-02 20:56:48,241 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 69 [2018-12-02 20:56:48,242 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-12-02 20:56:48,243 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:56:48,256 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 11 [2018-12-02 20:56:48,256 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:48,261 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:56:48,267 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-12-02 20:56:48,269 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-12-02 20:56:48,269 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:48,272 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:48,275 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:48,275 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:88, output treesize:14 [2018-12-02 20:56:48,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:56:48,640 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 20:56:48,641 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:48,647 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:56:48,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:56:48,648 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:56:48,648 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:56:48,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:56:48,652 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-02 20:56:48,656 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-12-02 20:56:48,681 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:56:48,681 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 24] total 32 [2018-12-02 20:56:48,681 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-12-02 20:56:48,681 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-12-02 20:56:48,682 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=911, Unknown=4, NotChecked=60, Total=1056 [2018-12-02 20:56:48,682 INFO L87 Difference]: Start difference. First operand 124 states and 145 transitions. Second operand 33 states. [2018-12-02 20:56:58,192 WARN L180 SmtUtils]: Spent 335.00 ms on a formula simplification that was a NOOP. DAG size: 26 [2018-12-02 20:57:09,467 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 15 [2018-12-02 20:57:12,138 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 18 [2018-12-02 20:57:16,508 WARN L180 SmtUtils]: Spent 2.35 s on a formula simplification that was a NOOP. DAG size: 34 [2018-12-02 20:57:20,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:20,215 INFO L93 Difference]: Finished difference Result 146 states and 165 transitions. [2018-12-02 20:57:20,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-12-02 20:57:20,215 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 43 [2018-12-02 20:57:20,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:20,216 INFO L225 Difference]: With dead ends: 146 [2018-12-02 20:57:20,216 INFO L226 Difference]: Without dead ends: 146 [2018-12-02 20:57:20,216 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 30 SyntacticMatches, 6 SemanticMatches, 50 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 508 ImplicationChecksByTransitivity, 27.0s TimeCoverageRelationStatistics Valid=247, Invalid=2295, Unknown=12, NotChecked=98, Total=2652 [2018-12-02 20:57:20,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-02 20:57:20,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 114. [2018-12-02 20:57:20,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-12-02 20:57:20,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 125 transitions. [2018-12-02 20:57:20,220 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 125 transitions. Word has length 43 [2018-12-02 20:57:20,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:20,220 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 125 transitions. [2018-12-02 20:57:20,220 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-12-02 20:57:20,220 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 125 transitions. [2018-12-02 20:57:20,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-02 20:57:20,221 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:20,221 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:20,221 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:20,221 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:20,221 INFO L82 PathProgramCache]: Analyzing trace with hash 1344258421, now seen corresponding path program 1 times [2018-12-02 20:57:20,221 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:20,221 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:20,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:20,222 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:20,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:20,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:20,249 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 20:57:20,249 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:20,249 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:20,257 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:20,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:20,276 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:20,279 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:57:20,293 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 20:57:20,293 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-12-02 20:57:20,294 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:57:20,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:57:20,294 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:57:20,294 INFO L87 Difference]: Start difference. First operand 114 states and 125 transitions. Second operand 5 states. [2018-12-02 20:57:20,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:20,302 INFO L93 Difference]: Finished difference Result 95 states and 100 transitions. [2018-12-02 20:57:20,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:57:20,303 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2018-12-02 20:57:20,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:20,303 INFO L225 Difference]: With dead ends: 95 [2018-12-02 20:57:20,303 INFO L226 Difference]: Without dead ends: 91 [2018-12-02 20:57:20,303 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:57:20,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-12-02 20:57:20,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 91. [2018-12-02 20:57:20,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-12-02 20:57:20,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 96 transitions. [2018-12-02 20:57:20,305 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 96 transitions. Word has length 43 [2018-12-02 20:57:20,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:20,305 INFO L480 AbstractCegarLoop]: Abstraction has 91 states and 96 transitions. [2018-12-02 20:57:20,305 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:57:20,305 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 96 transitions. [2018-12-02 20:57:20,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 20:57:20,305 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:20,306 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:20,306 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:20,306 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:20,306 INFO L82 PathProgramCache]: Analyzing trace with hash -658039088, now seen corresponding path program 1 times [2018-12-02 20:57:20,306 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:20,306 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:20,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:20,307 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:20,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:20,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:20,326 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 20:57:20,327 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:57:20,327 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:57:20,327 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:57:20,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:57:20,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:57:20,327 INFO L87 Difference]: Start difference. First operand 91 states and 96 transitions. Second operand 5 states. [2018-12-02 20:57:20,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:20,336 INFO L93 Difference]: Finished difference Result 98 states and 104 transitions. [2018-12-02 20:57:20,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:57:20,336 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-12-02 20:57:20,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:20,336 INFO L225 Difference]: With dead ends: 98 [2018-12-02 20:57:20,337 INFO L226 Difference]: Without dead ends: 98 [2018-12-02 20:57:20,337 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:57:20,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-12-02 20:57:20,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 93. [2018-12-02 20:57:20,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-02 20:57:20,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 98 transitions. [2018-12-02 20:57:20,338 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 98 transitions. Word has length 47 [2018-12-02 20:57:20,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:20,338 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 98 transitions. [2018-12-02 20:57:20,338 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:57:20,338 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 98 transitions. [2018-12-02 20:57:20,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 20:57:20,339 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:20,339 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:20,339 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:20,339 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:20,339 INFO L82 PathProgramCache]: Analyzing trace with hash -854552593, now seen corresponding path program 1 times [2018-12-02 20:57:20,339 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:20,339 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:20,340 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:20,340 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:20,340 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:20,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:20,366 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-02 20:57:20,366 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:57:20,366 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 20:57:20,366 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-02 20:57:20,366 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-02 20:57:20,366 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-02 20:57:20,366 INFO L87 Difference]: Start difference. First operand 93 states and 98 transitions. Second operand 8 states. [2018-12-02 20:57:20,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:20,522 INFO L93 Difference]: Finished difference Result 109 states and 114 transitions. [2018-12-02 20:57:20,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 20:57:20,522 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-12-02 20:57:20,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:20,523 INFO L225 Difference]: With dead ends: 109 [2018-12-02 20:57:20,523 INFO L226 Difference]: Without dead ends: 109 [2018-12-02 20:57:20,523 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2018-12-02 20:57:20,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-12-02 20:57:20,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 103. [2018-12-02 20:57:20,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-02 20:57:20,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 109 transitions. [2018-12-02 20:57:20,526 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 109 transitions. Word has length 47 [2018-12-02 20:57:20,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:20,526 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 109 transitions. [2018-12-02 20:57:20,526 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-02 20:57:20,526 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 109 transitions. [2018-12-02 20:57:20,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 20:57:20,526 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:20,526 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:20,527 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:20,527 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:20,527 INFO L82 PathProgramCache]: Analyzing trace with hash -854552592, now seen corresponding path program 1 times [2018-12-02 20:57:20,527 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:20,527 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:20,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:20,528 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:20,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:20,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:20,673 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-02 20:57:20,673 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:20,673 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:20,682 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:20,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:20,704 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:20,707 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:57:20,707 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:20,714 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:57:20,714 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:20,720 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:20,721 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-12-02 20:57:20,752 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:20,753 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 20:57:20,753 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:20,760 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:20,760 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:20,761 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:57:20,761 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:20,765 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:20,765 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-02 20:57:20,769 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:20,770 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 20:57:20,770 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:20,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:20,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:20,780 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:57:20,781 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:20,785 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:20,785 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-02 20:57:20,833 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 17 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-02 20:57:20,848 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:57:20,848 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16] total 18 [2018-12-02 20:57:20,848 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-02 20:57:20,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-02 20:57:20,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=300, Unknown=0, NotChecked=0, Total=342 [2018-12-02 20:57:20,848 INFO L87 Difference]: Start difference. First operand 103 states and 109 transitions. Second operand 19 states. [2018-12-02 20:57:21,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:21,428 INFO L93 Difference]: Finished difference Result 122 states and 129 transitions. [2018-12-02 20:57:21,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-02 20:57:21,429 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-12-02 20:57:21,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:21,429 INFO L225 Difference]: With dead ends: 122 [2018-12-02 20:57:21,429 INFO L226 Difference]: Without dead ends: 122 [2018-12-02 20:57:21,429 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 43 SyntacticMatches, 6 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=110, Invalid=702, Unknown=0, NotChecked=0, Total=812 [2018-12-02 20:57:21,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-12-02 20:57:21,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 103. [2018-12-02 20:57:21,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-02 20:57:21,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 108 transitions. [2018-12-02 20:57:21,431 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 108 transitions. Word has length 47 [2018-12-02 20:57:21,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:21,431 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 108 transitions. [2018-12-02 20:57:21,431 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-02 20:57:21,432 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 108 transitions. [2018-12-02 20:57:21,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-02 20:57:21,432 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:21,432 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:21,432 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:21,432 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:21,432 INFO L82 PathProgramCache]: Analyzing trace with hash -1632542409, now seen corresponding path program 1 times [2018-12-02 20:57:21,432 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:21,432 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:21,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:21,433 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:21,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:21,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:21,480 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-02 20:57:21,480 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:57:21,480 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-02 20:57:21,480 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 20:57:21,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 20:57:21,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-12-02 20:57:21,480 INFO L87 Difference]: Start difference. First operand 103 states and 108 transitions. Second operand 9 states. [2018-12-02 20:57:21,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:21,677 INFO L93 Difference]: Finished difference Result 107 states and 112 transitions. [2018-12-02 20:57:21,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 20:57:21,677 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 48 [2018-12-02 20:57:21,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:21,677 INFO L225 Difference]: With dead ends: 107 [2018-12-02 20:57:21,678 INFO L226 Difference]: Without dead ends: 107 [2018-12-02 20:57:21,678 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=160, Unknown=0, NotChecked=0, Total=210 [2018-12-02 20:57:21,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-12-02 20:57:21,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 102. [2018-12-02 20:57:21,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-02 20:57:21,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 107 transitions. [2018-12-02 20:57:21,679 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 107 transitions. Word has length 48 [2018-12-02 20:57:21,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:21,679 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 107 transitions. [2018-12-02 20:57:21,680 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 20:57:21,680 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 107 transitions. [2018-12-02 20:57:21,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-02 20:57:21,680 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:21,680 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:21,680 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:21,680 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:21,680 INFO L82 PathProgramCache]: Analyzing trace with hash -1632542408, now seen corresponding path program 1 times [2018-12-02 20:57:21,680 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:21,680 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:21,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:21,681 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:21,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:21,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:21,842 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:57:21,842 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:21,842 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:21,849 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:21,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:21,879 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:21,882 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:57:21,882 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:21,895 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:57:21,895 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:21,900 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:21,900 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-12-02 20:57:21,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:21,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:21,934 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:57:21,934 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:21,940 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 20:57:21,941 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:21,948 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:21,948 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-02 20:57:21,953 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:21,954 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:21,954 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:57:21,954 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:21,961 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 20:57:21,961 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:21,965 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:21,966 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-02 20:57:22,002 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:22,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:22,003 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:57:22,003 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:22,009 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 20:57:22,009 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:22,013 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:22,013 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-02 20:57:22,036 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-02 20:57:22,051 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:57:22,051 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 19 [2018-12-02 20:57:22,051 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-02 20:57:22,051 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-02 20:57:22,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=334, Unknown=0, NotChecked=0, Total=380 [2018-12-02 20:57:22,051 INFO L87 Difference]: Start difference. First operand 102 states and 107 transitions. Second operand 20 states. [2018-12-02 20:57:23,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:23,144 INFO L93 Difference]: Finished difference Result 120 states and 127 transitions. [2018-12-02 20:57:23,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-02 20:57:23,145 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 48 [2018-12-02 20:57:23,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:23,145 INFO L225 Difference]: With dead ends: 120 [2018-12-02 20:57:23,145 INFO L226 Difference]: Without dead ends: 120 [2018-12-02 20:57:23,145 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 46 SyntacticMatches, 6 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=133, Invalid=859, Unknown=0, NotChecked=0, Total=992 [2018-12-02 20:57:23,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-12-02 20:57:23,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 101. [2018-12-02 20:57:23,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-02 20:57:23,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 106 transitions. [2018-12-02 20:57:23,148 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 106 transitions. Word has length 48 [2018-12-02 20:57:23,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:23,148 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 106 transitions. [2018-12-02 20:57:23,148 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-02 20:57:23,148 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 106 transitions. [2018-12-02 20:57:23,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-02 20:57:23,148 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:23,148 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:23,148 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:23,149 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:23,149 INFO L82 PathProgramCache]: Analyzing trace with hash -773284884, now seen corresponding path program 1 times [2018-12-02 20:57:23,149 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:23,149 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:23,149 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:23,149 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:23,149 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:23,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:23,213 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-02 20:57:23,213 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:57:23,213 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-02 20:57:23,213 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 20:57:23,214 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 20:57:23,214 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-12-02 20:57:23,214 INFO L87 Difference]: Start difference. First operand 101 states and 106 transitions. Second operand 13 states. [2018-12-02 20:57:23,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:23,493 INFO L93 Difference]: Finished difference Result 133 states and 140 transitions. [2018-12-02 20:57:23,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-02 20:57:23,493 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 62 [2018-12-02 20:57:23,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:23,493 INFO L225 Difference]: With dead ends: 133 [2018-12-02 20:57:23,493 INFO L226 Difference]: Without dead ends: 133 [2018-12-02 20:57:23,494 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=71, Invalid=391, Unknown=0, NotChecked=0, Total=462 [2018-12-02 20:57:23,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-12-02 20:57:23,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 124. [2018-12-02 20:57:23,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-12-02 20:57:23,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-12-02 20:57:23,496 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 62 [2018-12-02 20:57:23,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:23,496 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-12-02 20:57:23,496 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 20:57:23,496 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-12-02 20:57:23,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-02 20:57:23,496 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:23,496 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:23,496 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:23,497 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:23,497 INFO L82 PathProgramCache]: Analyzing trace with hash -773284883, now seen corresponding path program 1 times [2018-12-02 20:57:23,497 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:23,497 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:23,497 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:23,497 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:23,497 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:23,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:23,645 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 20:57:23,645 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:23,645 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:23,652 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:23,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:23,677 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:23,816 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:57:23,830 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:57:23,830 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 19] total 25 [2018-12-02 20:57:23,831 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-02 20:57:23,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-02 20:57:23,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=594, Unknown=0, NotChecked=0, Total=650 [2018-12-02 20:57:23,831 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 26 states. [2018-12-02 20:57:24,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:24,349 INFO L93 Difference]: Finished difference Result 123 states and 130 transitions. [2018-12-02 20:57:24,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-02 20:57:24,349 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 62 [2018-12-02 20:57:24,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:24,350 INFO L225 Difference]: With dead ends: 123 [2018-12-02 20:57:24,350 INFO L226 Difference]: Without dead ends: 123 [2018-12-02 20:57:24,350 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 48 SyntacticMatches, 6 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 229 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=154, Invalid=1568, Unknown=0, NotChecked=0, Total=1722 [2018-12-02 20:57:24,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-12-02 20:57:24,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 123. [2018-12-02 20:57:24,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-12-02 20:57:24,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 130 transitions. [2018-12-02 20:57:24,352 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 130 transitions. Word has length 62 [2018-12-02 20:57:24,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:24,352 INFO L480 AbstractCegarLoop]: Abstraction has 123 states and 130 transitions. [2018-12-02 20:57:24,352 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-02 20:57:24,352 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 130 transitions. [2018-12-02 20:57:24,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-12-02 20:57:24,352 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:24,353 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:24,353 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:24,353 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:24,353 INFO L82 PathProgramCache]: Analyzing trace with hash -632987292, now seen corresponding path program 1 times [2018-12-02 20:57:24,353 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:24,353 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:24,354 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:24,354 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:24,354 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:24,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:24,453 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-02 20:57:24,453 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:57:24,453 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-12-02 20:57:24,453 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-02 20:57:24,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-02 20:57:24,453 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-12-02 20:57:24,454 INFO L87 Difference]: Start difference. First operand 123 states and 130 transitions. Second operand 15 states. [2018-12-02 20:57:24,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:24,650 INFO L93 Difference]: Finished difference Result 126 states and 133 transitions. [2018-12-02 20:57:24,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-02 20:57:24,651 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 63 [2018-12-02 20:57:24,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:24,651 INFO L225 Difference]: With dead ends: 126 [2018-12-02 20:57:24,652 INFO L226 Difference]: Without dead ends: 126 [2018-12-02 20:57:24,652 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=369, Unknown=0, NotChecked=0, Total=420 [2018-12-02 20:57:24,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-12-02 20:57:24,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 99. [2018-12-02 20:57:24,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-02 20:57:24,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 104 transitions. [2018-12-02 20:57:24,655 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 104 transitions. Word has length 63 [2018-12-02 20:57:24,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:24,655 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 104 transitions. [2018-12-02 20:57:24,655 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-02 20:57:24,655 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 104 transitions. [2018-12-02 20:57:24,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 20:57:24,655 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:24,656 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:24,656 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:24,656 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:24,656 INFO L82 PathProgramCache]: Analyzing trace with hash 1765117560, now seen corresponding path program 1 times [2018-12-02 20:57:24,656 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:24,656 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:24,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:24,657 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:24,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:24,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:24,683 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 20:57:24,684 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:57:24,684 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:57:24,684 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:57:24,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:57:24,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:57:24,684 INFO L87 Difference]: Start difference. First operand 99 states and 104 transitions. Second operand 5 states. [2018-12-02 20:57:24,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:24,691 INFO L93 Difference]: Finished difference Result 99 states and 102 transitions. [2018-12-02 20:57:24,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:57:24,692 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-12-02 20:57:24,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:24,692 INFO L225 Difference]: With dead ends: 99 [2018-12-02 20:57:24,692 INFO L226 Difference]: Without dead ends: 99 [2018-12-02 20:57:24,692 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:57:24,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-12-02 20:57:24,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 97. [2018-12-02 20:57:24,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-02 20:57:24,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 100 transitions. [2018-12-02 20:57:24,694 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 100 transitions. Word has length 72 [2018-12-02 20:57:24,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:24,694 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 100 transitions. [2018-12-02 20:57:24,694 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:57:24,694 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 100 transitions. [2018-12-02 20:57:24,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-02 20:57:24,694 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:24,694 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:24,695 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:24,695 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:24,695 INFO L82 PathProgramCache]: Analyzing trace with hash 1556016431, now seen corresponding path program 1 times [2018-12-02 20:57:24,695 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:24,695 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:24,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:24,695 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:24,696 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:24,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:24,938 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 20:57:24,939 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:24,939 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:24,947 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:24,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:24,980 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:25,011 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-02 20:57:25,012 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-02 20:57:25,012 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:25,013 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:25,014 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:25,014 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-02 20:57:25,307 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2018-12-02 20:57:25,309 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 3 [2018-12-02 20:57:25,310 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:25,314 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:25,314 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:25,314 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:28, output treesize:3 [2018-12-02 20:57:25,319 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-02 20:57:25,333 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 20:57:25,333 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [21] total 35 [2018-12-02 20:57:25,334 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-12-02 20:57:25,334 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-12-02 20:57:25,334 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=1164, Unknown=0, NotChecked=0, Total=1260 [2018-12-02 20:57:25,334 INFO L87 Difference]: Start difference. First operand 97 states and 100 transitions. Second operand 36 states. [2018-12-02 20:57:25,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:25,936 INFO L93 Difference]: Finished difference Result 102 states and 104 transitions. [2018-12-02 20:57:25,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-02 20:57:25,936 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 71 [2018-12-02 20:57:25,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:25,937 INFO L225 Difference]: With dead ends: 102 [2018-12-02 20:57:25,937 INFO L226 Difference]: Without dead ends: 100 [2018-12-02 20:57:25,938 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 56 SyntacticMatches, 2 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 320 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=179, Invalid=2173, Unknown=0, NotChecked=0, Total=2352 [2018-12-02 20:57:25,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-12-02 20:57:25,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2018-12-02 20:57:25,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-02 20:57:25,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 102 transitions. [2018-12-02 20:57:25,940 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 102 transitions. Word has length 71 [2018-12-02 20:57:25,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:25,940 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 102 transitions. [2018-12-02 20:57:25,940 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-12-02 20:57:25,940 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 102 transitions. [2018-12-02 20:57:25,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 20:57:25,941 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:25,941 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:25,941 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:25,941 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:25,941 INFO L82 PathProgramCache]: Analyzing trace with hash 991869487, now seen corresponding path program 1 times [2018-12-02 20:57:25,942 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:25,942 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:25,942 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:25,942 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:25,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:25,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:26,169 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 20:57:26,169 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:26,169 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:26,177 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:26,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:26,204 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:26,235 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-02 20:57:26,236 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-02 20:57:26,236 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:26,237 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:26,238 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:26,238 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-02 20:57:26,554 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2018-12-02 20:57:26,558 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 3 [2018-12-02 20:57:26,559 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:26,567 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:26,568 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:26,569 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:28, output treesize:3 [2018-12-02 20:57:26,602 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-02 20:57:26,632 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 20:57:26,632 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [21] total 35 [2018-12-02 20:57:26,633 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-12-02 20:57:26,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-12-02 20:57:26,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=1164, Unknown=0, NotChecked=0, Total=1260 [2018-12-02 20:57:26,633 INFO L87 Difference]: Start difference. First operand 100 states and 102 transitions. Second operand 36 states. [2018-12-02 20:57:27,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:27,578 INFO L93 Difference]: Finished difference Result 99 states and 101 transitions. [2018-12-02 20:57:27,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-02 20:57:27,579 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 72 [2018-12-02 20:57:27,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:27,580 INFO L225 Difference]: With dead ends: 99 [2018-12-02 20:57:27,580 INFO L226 Difference]: Without dead ends: 99 [2018-12-02 20:57:27,581 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 56 SyntacticMatches, 3 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 270 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=166, Invalid=1904, Unknown=0, NotChecked=0, Total=2070 [2018-12-02 20:57:27,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-12-02 20:57:27,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-12-02 20:57:27,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-02 20:57:27,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 101 transitions. [2018-12-02 20:57:27,584 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 101 transitions. Word has length 72 [2018-12-02 20:57:27,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:27,584 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 101 transitions. [2018-12-02 20:57:27,584 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-12-02 20:57:27,584 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 101 transitions. [2018-12-02 20:57:27,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-02 20:57:27,585 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:27,585 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:27,585 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:27,586 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:27,586 INFO L82 PathProgramCache]: Analyzing trace with hash 683372519, now seen corresponding path program 1 times [2018-12-02 20:57:27,586 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:27,586 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:27,587 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:27,587 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:27,587 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:27,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:27,625 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 20:57:27,625 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:27,625 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:27,635 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:27,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:27,662 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:27,668 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 20:57:27,683 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:57:27,683 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-12-02 20:57:27,684 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:57:27,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:57:27,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:57:27,684 INFO L87 Difference]: Start difference. First operand 99 states and 101 transitions. Second operand 5 states. [2018-12-02 20:57:27,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:27,694 INFO L93 Difference]: Finished difference Result 98 states and 100 transitions. [2018-12-02 20:57:27,694 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:57:27,695 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2018-12-02 20:57:27,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:27,695 INFO L225 Difference]: With dead ends: 98 [2018-12-02 20:57:27,695 INFO L226 Difference]: Without dead ends: 98 [2018-12-02 20:57:27,695 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 72 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:57:27,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-12-02 20:57:27,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-12-02 20:57:27,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-12-02 20:57:27,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 100 transitions. [2018-12-02 20:57:27,697 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 100 transitions. Word has length 73 [2018-12-02 20:57:27,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:27,697 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 100 transitions. [2018-12-02 20:57:27,697 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:57:27,697 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 100 transitions. [2018-12-02 20:57:27,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-02 20:57:27,698 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:27,698 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:27,698 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:27,698 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:27,698 INFO L82 PathProgramCache]: Analyzing trace with hash -290287964, now seen corresponding path program 1 times [2018-12-02 20:57:27,698 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:27,698 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:27,699 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:27,699 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:27,699 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:27,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:27,731 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:57:27,731 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:27,731 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:27,738 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:27,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:27,763 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:27,765 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:57:27,765 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:27,766 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:27,766 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:57:27,771 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:57:27,789 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:57:27,789 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-12-02 20:57:27,789 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 20:57:27,789 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 20:57:27,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-02 20:57:27,789 INFO L87 Difference]: Start difference. First operand 98 states and 100 transitions. Second operand 6 states. [2018-12-02 20:57:27,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:27,887 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2018-12-02 20:57:27,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 20:57:27,887 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2018-12-02 20:57:27,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:27,887 INFO L225 Difference]: With dead ends: 106 [2018-12-02 20:57:27,887 INFO L226 Difference]: Without dead ends: 106 [2018-12-02 20:57:27,888 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 78 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-02 20:57:27,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-02 20:57:27,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-12-02 20:57:27,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-02 20:57:27,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 110 transitions. [2018-12-02 20:57:27,889 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 110 transitions. Word has length 74 [2018-12-02 20:57:27,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:27,889 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 110 transitions. [2018-12-02 20:57:27,889 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 20:57:27,889 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 110 transitions. [2018-12-02 20:57:27,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-12-02 20:57:27,890 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:27,890 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:27,890 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:27,890 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:27,890 INFO L82 PathProgramCache]: Analyzing trace with hash -293937124, now seen corresponding path program 1 times [2018-12-02 20:57:27,890 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:27,890 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:27,891 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:27,891 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:27,891 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:27,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:27,931 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:57:27,931 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:27,931 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:27,939 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:27,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:27,967 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:27,970 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:57:27,970 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:27,971 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:27,971 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:57:28,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:28,007 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-12-02 20:57:28,008 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:28,009 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:57:28,009 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-12-02 20:57:28,039 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:28,040 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:28,040 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-02 20:57:28,041 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:28,045 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:57:28,045 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-12-02 20:57:28,059 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:57:28,075 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:57:28,075 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8] total 9 [2018-12-02 20:57:28,075 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 20:57:28,075 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 20:57:28,075 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-12-02 20:57:28,075 INFO L87 Difference]: Start difference. First operand 106 states and 110 transitions. Second operand 10 states. [2018-12-02 20:57:28,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:28,272 INFO L93 Difference]: Finished difference Result 111 states and 115 transitions. [2018-12-02 20:57:28,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 20:57:28,272 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 75 [2018-12-02 20:57:28,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:28,273 INFO L225 Difference]: With dead ends: 111 [2018-12-02 20:57:28,273 INFO L226 Difference]: Without dead ends: 111 [2018-12-02 20:57:28,273 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 73 SyntacticMatches, 5 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2018-12-02 20:57:28,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-12-02 20:57:28,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 102. [2018-12-02 20:57:28,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-02 20:57:28,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 104 transitions. [2018-12-02 20:57:28,275 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 104 transitions. Word has length 75 [2018-12-02 20:57:28,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:28,276 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 104 transitions. [2018-12-02 20:57:28,276 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 20:57:28,276 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 104 transitions. [2018-12-02 20:57:28,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-02 20:57:28,276 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:28,276 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:28,277 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:28,277 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:28,277 INFO L82 PathProgramCache]: Analyzing trace with hash 206154598, now seen corresponding path program 1 times [2018-12-02 20:57:28,277 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:28,277 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:28,278 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:28,278 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:28,278 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:28,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:28,361 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-02 20:57:28,361 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:28,361 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:28,369 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:28,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:28,397 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:28,399 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:57:28,400 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:28,401 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:28,401 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:57:28,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:28,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:28,412 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:57:28,413 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:28,414 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:28,414 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-02 20:57:28,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:28,419 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-12-02 20:57:28,419 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:28,423 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:57:28,423 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-12-02 20:57:28,434 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-02 20:57:28,449 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:57:28,449 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10] total 10 [2018-12-02 20:57:28,449 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 20:57:28,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 20:57:28,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-12-02 20:57:28,450 INFO L87 Difference]: Start difference. First operand 102 states and 104 transitions. Second operand 11 states. [2018-12-02 20:57:28,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:28,603 INFO L93 Difference]: Finished difference Result 110 states and 114 transitions. [2018-12-02 20:57:28,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 20:57:28,603 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 76 [2018-12-02 20:57:28,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:28,604 INFO L225 Difference]: With dead ends: 110 [2018-12-02 20:57:28,604 INFO L226 Difference]: Without dead ends: 110 [2018-12-02 20:57:28,604 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 79 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-12-02 20:57:28,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-12-02 20:57:28,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-12-02 20:57:28,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-12-02 20:57:28,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 114 transitions. [2018-12-02 20:57:28,606 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 114 transitions. Word has length 76 [2018-12-02 20:57:28,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:28,607 INFO L480 AbstractCegarLoop]: Abstraction has 110 states and 114 transitions. [2018-12-02 20:57:28,607 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 20:57:28,607 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 114 transitions. [2018-12-02 20:57:28,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-02 20:57:28,607 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:28,607 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:28,608 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:28,608 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:28,608 INFO L82 PathProgramCache]: Analyzing trace with hash -1132496672, now seen corresponding path program 1 times [2018-12-02 20:57:28,608 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:28,608 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:28,609 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:28,609 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:28,609 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:28,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:28,874 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 20:57:28,874 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:28,874 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:28,881 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:28,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:28,907 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:28,973 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-02 20:57:28,975 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-02 20:57:28,975 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:28,976 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:28,977 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:28,977 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-02 20:57:29,399 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 20:57:29,413 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:57:29,413 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 25] total 42 [2018-12-02 20:57:29,414 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-12-02 20:57:29,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-12-02 20:57:29,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=114, Invalid=1608, Unknown=0, NotChecked=0, Total=1722 [2018-12-02 20:57:29,414 INFO L87 Difference]: Start difference. First operand 110 states and 114 transitions. Second operand 42 states. [2018-12-02 20:57:29,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:29,957 INFO L93 Difference]: Finished difference Result 107 states and 109 transitions. [2018-12-02 20:57:29,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-02 20:57:29,957 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 76 [2018-12-02 20:57:29,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:29,958 INFO L225 Difference]: With dead ends: 107 [2018-12-02 20:57:29,958 INFO L226 Difference]: Without dead ends: 103 [2018-12-02 20:57:29,959 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 55 SyntacticMatches, 5 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 472 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=204, Invalid=2658, Unknown=0, NotChecked=0, Total=2862 [2018-12-02 20:57:29,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-12-02 20:57:29,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 103. [2018-12-02 20:57:29,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-02 20:57:29,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 105 transitions. [2018-12-02 20:57:29,962 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 105 transitions. Word has length 76 [2018-12-02 20:57:29,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:29,962 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 105 transitions. [2018-12-02 20:57:29,962 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-12-02 20:57:29,962 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 105 transitions. [2018-12-02 20:57:29,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-02 20:57:29,963 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:29,963 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:29,964 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:29,964 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:29,964 INFO L82 PathProgramCache]: Analyzing trace with hash 994279134, now seen corresponding path program 1 times [2018-12-02 20:57:29,964 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:29,964 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:29,965 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:29,965 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:29,965 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:29,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:30,268 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-02 20:57:30,268 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:30,268 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:30,274 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:30,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:30,301 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:30,303 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:57:30,303 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:30,304 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:30,304 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:57:30,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:30,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:30,355 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:57:30,355 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:30,357 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:30,357 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-02 20:57:30,991 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:30,992 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-12-02 20:57:30,992 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:30,993 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:57:30,993 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-12-02 20:57:31,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:31,365 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:31,366 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-02 20:57:31,366 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:31,370 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:57:31,371 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-12-02 20:57:31,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:31,397 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 34 [2018-12-02 20:57:31,398 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-12-02 20:57:31,414 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-12-02 20:57:31,414 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:25, output treesize:36 [2018-12-02 20:57:31,446 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-02 20:57:31,461 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:57:31,461 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 13] total 31 [2018-12-02 20:57:31,461 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-12-02 20:57:31,462 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-12-02 20:57:31,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=873, Unknown=2, NotChecked=0, Total=992 [2018-12-02 20:57:31,462 INFO L87 Difference]: Start difference. First operand 103 states and 105 transitions. Second operand 32 states. [2018-12-02 20:57:32,207 WARN L180 SmtUtils]: Spent 318.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-12-02 20:57:34,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:34,177 INFO L93 Difference]: Finished difference Result 102 states and 104 transitions. [2018-12-02 20:57:34,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-02 20:57:34,177 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 77 [2018-12-02 20:57:34,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:34,178 INFO L225 Difference]: With dead ends: 102 [2018-12-02 20:57:34,178 INFO L226 Difference]: Without dead ends: 102 [2018-12-02 20:57:34,178 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 69 SyntacticMatches, 6 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 651 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=312, Invalid=2338, Unknown=2, NotChecked=0, Total=2652 [2018-12-02 20:57:34,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-12-02 20:57:34,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 94. [2018-12-02 20:57:34,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-12-02 20:57:34,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 95 transitions. [2018-12-02 20:57:34,180 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 95 transitions. Word has length 77 [2018-12-02 20:57:34,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:34,180 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 95 transitions. [2018-12-02 20:57:34,180 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-12-02 20:57:34,180 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 95 transitions. [2018-12-02 20:57:34,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-02 20:57:34,181 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:34,181 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:34,181 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:34,181 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:34,181 INFO L82 PathProgramCache]: Analyzing trace with hash 546086984, now seen corresponding path program 1 times [2018-12-02 20:57:34,181 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:34,181 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:34,182 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:34,182 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:34,182 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:34,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:34,329 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-02 20:57:34,329 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:34,329 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:34,337 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:34,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:34,363 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:34,365 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:57:34,366 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:34,367 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:34,367 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:57:34,377 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:34,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:34,378 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:57:34,379 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:34,381 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:34,381 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-02 20:57:34,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:34,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:34,395 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:57:34,395 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:34,397 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:34,397 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:9 [2018-12-02 20:57:34,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:34,475 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-12-02 20:57:34,475 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:34,479 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:57:34,479 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:15 [2018-12-02 20:57:34,497 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:34,499 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:57:34,499 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-12-02 20:57:34,500 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:34,504 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 20:57:34,505 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-12-02 20:57:34,526 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:57:34,545 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:57:34,545 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17] total 23 [2018-12-02 20:57:34,545 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-02 20:57:34,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-02 20:57:34,546 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=483, Unknown=0, NotChecked=0, Total=552 [2018-12-02 20:57:34,546 INFO L87 Difference]: Start difference. First operand 94 states and 95 transitions. Second operand 24 states. [2018-12-02 20:57:35,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:35,125 INFO L93 Difference]: Finished difference Result 103 states and 107 transitions. [2018-12-02 20:57:35,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-12-02 20:57:35,126 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 78 [2018-12-02 20:57:35,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:35,126 INFO L225 Difference]: With dead ends: 103 [2018-12-02 20:57:35,126 INFO L226 Difference]: Without dead ends: 103 [2018-12-02 20:57:35,127 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 68 SyntacticMatches, 12 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 330 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=197, Invalid=1609, Unknown=0, NotChecked=0, Total=1806 [2018-12-02 20:57:35,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-12-02 20:57:35,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 93. [2018-12-02 20:57:35,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-02 20:57:35,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 94 transitions. [2018-12-02 20:57:35,128 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 94 transitions. Word has length 78 [2018-12-02 20:57:35,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:35,129 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 94 transitions. [2018-12-02 20:57:35,129 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-02 20:57:35,129 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 94 transitions. [2018-12-02 20:57:35,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-02 20:57:35,129 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:35,129 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:35,129 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:35,129 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:35,130 INFO L82 PathProgramCache]: Analyzing trace with hash -858339670, now seen corresponding path program 1 times [2018-12-02 20:57:35,130 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:35,130 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:35,130 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:35,130 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:35,130 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:35,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:35,710 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-12-02 20:57:35,710 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:57:35,710 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:57:35,718 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:35,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:35,746 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:41,957 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 20:57:41,972 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:57:41,972 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 23 [2018-12-02 20:57:41,972 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-02 20:57:41,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-02 20:57:41,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=483, Unknown=9, NotChecked=0, Total=552 [2018-12-02 20:57:41,972 INFO L87 Difference]: Start difference. First operand 93 states and 94 transitions. Second operand 24 states. [2018-12-02 20:57:55,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:55,816 INFO L93 Difference]: Finished difference Result 106 states and 107 transitions. [2018-12-02 20:57:55,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-02 20:57:55,816 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 81 [2018-12-02 20:57:55,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:55,817 INFO L225 Difference]: With dead ends: 106 [2018-12-02 20:57:55,817 INFO L226 Difference]: Without dead ends: 79 [2018-12-02 20:57:55,817 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 82 SyntacticMatches, 4 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 7.0s TimeCoverageRelationStatistics Valid=104, Invalid=879, Unknown=9, NotChecked=0, Total=992 [2018-12-02 20:57:55,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-12-02 20:57:55,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-12-02 20:57:55,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-12-02 20:57:55,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 79 transitions. [2018-12-02 20:57:55,818 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 79 transitions. Word has length 81 [2018-12-02 20:57:55,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:55,819 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 79 transitions. [2018-12-02 20:57:55,819 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-02 20:57:55,819 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 79 transitions. [2018-12-02 20:57:55,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-02 20:57:55,819 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:55,819 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:55,819 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION]=== [2018-12-02 20:57:55,819 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:55,820 INFO L82 PathProgramCache]: Analyzing trace with hash -322019790, now seen corresponding path program 1 times [2018-12-02 20:57:55,820 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 20:57:55,820 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 20:57:55,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:55,820 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:55,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 20:57:55,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 20:57:55,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 20:57:55,856 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-02 20:57:55,868 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-02 20:57:55,872 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 22 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-02 20:57:55,872 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 21 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-02 20:57:55,882 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 08:57:55 BoogieIcfgContainer [2018-12-02 20:57:55,882 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-02 20:57:55,882 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-02 20:57:55,882 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-02 20:57:55,882 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-02 20:57:55,883 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:55:38" (3/4) ... [2018-12-02 20:57:55,886 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-02 20:57:55,886 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-02 20:57:55,886 INFO L168 Benchmark]: Toolchain (without parser) took 138831.10 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 193.5 MB). Free memory was 950.6 MB in the beginning and 937.7 MB in the end (delta: 12.9 MB). Peak memory consumption was 206.4 MB. Max. memory is 11.5 GB. [2018-12-02 20:57:55,887 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 20:57:55,887 INFO L168 Benchmark]: CACSL2BoogieTranslator took 339.32 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 75.0 MB). Free memory was 950.6 MB in the beginning and 1.0 GB in the end (delta: -96.4 MB). Peak memory consumption was 27.7 MB. Max. memory is 11.5 GB. [2018-12-02 20:57:55,887 INFO L168 Benchmark]: Boogie Preprocessor took 50.20 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 3.6 MB). Peak memory consumption was 3.6 MB. Max. memory is 11.5 GB. [2018-12-02 20:57:55,887 INFO L168 Benchmark]: RCFGBuilder took 601.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 923.2 MB in the end (delta: 116.6 MB). Peak memory consumption was 116.6 MB. Max. memory is 11.5 GB. [2018-12-02 20:57:55,887 INFO L168 Benchmark]: TraceAbstraction took 137833.73 ms. Allocated memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: 118.5 MB). Free memory was 923.2 MB in the beginning and 937.7 MB in the end (delta: -14.5 MB). Peak memory consumption was 104.0 MB. Max. memory is 11.5 GB. [2018-12-02 20:57:55,888 INFO L168 Benchmark]: Witness Printer took 3.71 ms. Allocated memory is still 1.2 GB. Free memory is still 937.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 20:57:55,889 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 339.32 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 75.0 MB). Free memory was 950.6 MB in the beginning and 1.0 GB in the end (delta: -96.4 MB). Peak memory consumption was 27.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 50.20 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 3.6 MB). Peak memory consumption was 3.6 MB. Max. memory is 11.5 GB. * RCFGBuilder took 601.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 923.2 MB in the end (delta: 116.6 MB). Peak memory consumption was 116.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 137833.73 ms. Allocated memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: 118.5 MB). Free memory was 923.2 MB in the beginning and 937.7 MB in the end (delta: -14.5 MB). Peak memory consumption was 104.0 MB. Max. memory is 11.5 GB. * Witness Printer took 3.71 ms. Allocated memory is still 1.2 GB. Free memory is still 937.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 22 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 21 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1512]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1512. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={31:0}] [L1513] CALL entry_point() VAL [ldv_global_msg_list={31:0}] [L1490] CALL, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [\old(size)=20, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=20, \result={33:0}, ldv_global_msg_list={31:0}, malloc(size)={33:0}, size=20] [L1490] RET, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct ldv_i2c_client))={33:0}] [L1490] struct ldv_i2c_client *c11 = (struct ldv_i2c_client *)ldv_malloc(sizeof(struct ldv_i2c_client)); [L1491] COND FALSE !(!c11) VAL [c11={33:0}, ldv_global_msg_list={31:0}] [L1493] CALL, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [\old(size)=4, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={28:0}, ldv_global_msg_list={31:0}, malloc(size)={28:0}, size=4] [L1493] RET, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [c11={33:0}, ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct ldv_m88ts2022_config))={28:0}] [L1492-L1493] struct ldv_m88ts2022_config *cfg = (struct ldv_m88ts2022_config *) ldv_malloc(sizeof(struct ldv_m88ts2022_config)); [L1494] COND FALSE !(!cfg) VAL [c11={33:0}, cfg={28:0}, ldv_global_msg_list={31:0}] [L1495] c11->dev.platform_data = cfg VAL [c11={33:0}, cfg={28:0}, ldv_global_msg_list={31:0}] [L1497] CALL, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [\old(size)=4, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={27:0}, ldv_global_msg_list={31:0}, malloc(size)={27:0}, size=4] [L1497] RET, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [c11={33:0}, cfg={28:0}, ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct ldv_dvb_frontend))={27:0}] [L1496-L1497] struct ldv_dvb_frontend *fe = (struct ldv_dvb_frontend *) ldv_malloc(sizeof(struct ldv_dvb_frontend)); [L1498] COND FALSE !(!fe) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1499] cfg->fe = fe VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1500] CALL alloc_3_11(c11) VAL [client={33:0}, ldv_global_msg_list={31:0}] [L1470] EXPR client->dev.platform_data VAL [client={33:0}, client={33:0}, client->dev.platform_data={28:0}, ldv_global_msg_list={31:0}] [L1470] struct ldv_m88ts2022_config *cfg = client->dev.platform_data; [L1471] EXPR cfg->fe VAL [cfg={28:0}, cfg->fe={27:0}, client={33:0}, client={33:0}, ldv_global_msg_list={31:0}] [L1471] struct ldv_dvb_frontend *fe = cfg->fe; [L1472] CALL, EXPR ldv_malloc(sizeof(struct Data11)) VAL [\old(size)=12, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=12, \result={29:0}, ldv_global_msg_list={31:0}, malloc(size)={29:0}, size=12] [L1472] RET, EXPR ldv_malloc(sizeof(struct Data11)) VAL [cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct Data11))={29:0}] [L1472] struct Data11 *priv = (struct Data11*)ldv_malloc(sizeof(struct Data11)); [L1473] COND FALSE !(!priv) VAL [cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={29:0}] [L1474] fe->tuner_priv = priv VAL [cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={29:0}] [L1475] CALL ldv_i2c_set_clientdata(client, 0) VAL [data={0:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1462] CALL ldv_dev_set_drvdata(&dev->dev, data) VAL [data={0:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1198] dev->driver_data = data VAL [data={0:0}, data={0:0}, dev={33:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1462] RET ldv_dev_set_drvdata(&dev->dev, data) VAL [data={0:0}, data={0:0}, dev={33:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1475] RET ldv_i2c_set_clientdata(client, 0) VAL [cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={29:0}] [L1476] return 0; VAL [\result=0, cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={29:0}] [L1500] RET alloc_3_11(c11) VAL [alloc_3_11(c11)=0, c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1501] CALL free_11(c11) VAL [client={33:0}, ldv_global_msg_list={31:0}] [L1483] CALL, EXPR ldv_i2c_get_clientdata(client) VAL [dev={33:0}, ldv_global_msg_list={31:0}] [L1457] CALL, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={33:0}, ldv_global_msg_list={31:0}] [L1193] EXPR dev->driver_data VAL [dev={33:0}, dev={33:0}, dev->driver_data={0:0}, ldv_global_msg_list={31:0}] [L1193] return dev->driver_data; [L1457] RET, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={33:0}, dev={33:0}, ldv_dev_get_drvdata(&dev->dev)={0:0}, ldv_global_msg_list={31:0}] [L1457] return ldv_dev_get_drvdata(&dev->dev); [L1483] RET, EXPR ldv_i2c_get_clientdata(client) VAL [client={33:0}, client={33:0}, ldv_global_msg_list={31:0}, ldv_i2c_get_clientdata(client)={0:0}] [L1483] void *priv = (struct Data11*)ldv_i2c_get_clientdata(client); [L1484] COND FALSE !(\read(*priv)) VAL [client={33:0}, client={33:0}, ldv_global_msg_list={31:0}, priv={0:0}] [L1501] RET free_11(c11) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1503] free(fe) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1503] free(fe) [L1505] free(cfg) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1505] free(cfg) [L1507] free(c11) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1507] free(c11) [L1513] RET entry_point() VAL [ldv_global_msg_list={31:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 47 procedures, 375 locations, 85 error locations. UNSAFE Result, 137.7s OverallTime, 40 OverallIterations, 4 TraceHistogramMax, 99.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3329 SDtfs, 3033 SDslu, 18277 SDs, 0 SdLazy, 22201 SolverSat, 1328 SolverUnsat, 48 SolverUnknown, 0 SolverNotchecked, 41.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2110 GetRequests, 1242 SyntacticMatches, 116 SemanticMatches, 752 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 4160 ImplicationChecksByTransitivity, 90.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=170occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 39 MinimizatonAttempts, 716 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 36.6s InterpolantComputationTime, 3297 NumberOfCodeBlocks, 3297 NumberOfCodeBlocksAsserted, 68 NumberOfCheckSat, 3148 ConstructedInterpolants, 169 QuantifiedInterpolants, 1014112 SizeOfPredicates, 224 NumberOfNonLiveVariables, 7488 ConjunctsInSsa, 1024 ConjunctsInUnsatCore, 67 InterpolantComputations, 17 PerfectInterpolantSequences, 855/1164 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-02 20:57:57,111 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 20:57:57,112 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 20:57:57,118 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-02 20:57:57,118 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-02 20:57:57,119 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-02 20:57:57,119 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-02 20:57:57,120 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-02 20:57:57,121 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-02 20:57:57,121 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-02 20:57:57,122 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-02 20:57:57,122 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 20:57:57,122 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 20:57:57,123 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 20:57:57,123 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 20:57:57,124 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 20:57:57,124 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 20:57:57,125 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 20:57:57,126 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 20:57:57,127 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 20:57:57,127 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 20:57:57,128 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 20:57:57,129 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 20:57:57,129 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 20:57:57,129 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 20:57:57,130 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 20:57:57,130 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 20:57:57,131 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 20:57:57,131 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 20:57:57,132 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 20:57:57,132 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 20:57:57,132 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 20:57:57,132 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 20:57:57,132 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 20:57:57,133 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 20:57:57,133 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 20:57:57,133 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf [2018-12-02 20:57:57,140 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 20:57:57,141 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 20:57:57,141 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 20:57:57,141 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 20:57:57,142 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-02 20:57:57,142 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-02 20:57:57,142 INFO L133 SettingsManager]: * Use SBE=true [2018-12-02 20:57:57,142 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 20:57:57,142 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-02 20:57:57,142 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-02 20:57:57,142 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-02 20:57:57,142 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-02 20:57:57,142 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 20:57:57,143 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-02 20:57:57,143 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-02 20:57:57,143 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-02 20:57:57,143 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 20:57:57,143 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-02 20:57:57,143 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-02 20:57:57,143 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-02 20:57:57,143 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-02 20:57:57,143 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 20:57:57,143 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 20:57:57,143 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 20:57:57,144 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 20:57:57,144 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 20:57:57,144 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 20:57:57,144 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 20:57:57,144 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-12-02 20:57:57,144 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 20:57:57,144 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-02 20:57:57,144 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2f4049400be941342f32e9ba06dfe9aa51e5b146 [2018-12-02 20:57:57,163 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 20:57:57,172 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 20:57:57,175 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 20:57:57,176 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 20:57:57,177 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 20:57:57,177 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-12-02 20:57:57,224 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/data/ba2c83c09/9da179bac5064d80a5aeb43de0c7c01a/FLAG5cffc1568 [2018-12-02 20:57:57,707 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 20:57:57,707 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-12-02 20:57:57,718 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/data/ba2c83c09/9da179bac5064d80a5aeb43de0c7c01a/FLAG5cffc1568 [2018-12-02 20:57:57,730 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/data/ba2c83c09/9da179bac5064d80a5aeb43de0c7c01a [2018-12-02 20:57:57,732 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 20:57:57,733 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-02 20:57:57,734 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 20:57:57,734 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 20:57:57,737 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 20:57:57,738 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:57:57" (1/1) ... [2018-12-02 20:57:57,739 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7d255691 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:57:57, skipping insertion in model container [2018-12-02 20:57:57,739 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:57:57" (1/1) ... [2018-12-02 20:57:57,744 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 20:57:57,768 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 20:57:57,968 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 20:57:58,013 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 20:57:58,049 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 20:57:58,083 INFO L195 MainTranslator]: Completed translation [2018-12-02 20:57:58,084 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:57:58 WrapperNode [2018-12-02 20:57:58,084 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 20:57:58,084 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 20:57:58,084 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 20:57:58,084 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 20:57:58,092 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:57:58" (1/1) ... [2018-12-02 20:57:58,092 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:57:58" (1/1) ... [2018-12-02 20:57:58,104 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:57:58" (1/1) ... [2018-12-02 20:57:58,104 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:57:58" (1/1) ... [2018-12-02 20:57:58,120 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:57:58" (1/1) ... [2018-12-02 20:57:58,124 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:57:58" (1/1) ... [2018-12-02 20:57:58,127 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:57:58" (1/1) ... [2018-12-02 20:57:58,132 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 20:57:58,132 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 20:57:58,132 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 20:57:58,132 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 20:57:58,133 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:57:58" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 20:57:58,165 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-02 20:57:58,165 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 20:57:58,165 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-02 20:57:58,165 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-12-02 20:57:58,165 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-12-02 20:57:58,165 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-12-02 20:57:58,165 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-12-02 20:57:58,166 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-02 20:57:58,166 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-02 20:57:58,166 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-02 20:57:58,166 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-12-02 20:57:58,166 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-12-02 20:57:58,166 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-12-02 20:57:58,166 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-12-02 20:57:58,166 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-12-02 20:57:58,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-12-02 20:57:58,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-12-02 20:57:58,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-12-02 20:57:58,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-12-02 20:57:58,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-12-02 20:57:58,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-02 20:57:58,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-02 20:57:58,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-02 20:57:58,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-02 20:57:58,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-02 20:57:58,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-02 20:57:58,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-02 20:57:58,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-02 20:57:58,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-12-02 20:57:58,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-02 20:57:58,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-02 20:57:58,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-02 20:57:58,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-02 20:57:58,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-02 20:57:58,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-02 20:57:58,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-02 20:57:58,168 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-12-02 20:57:58,168 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-12-02 20:57:58,168 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_get_clientdata [2018-12-02 20:57:58,169 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_set_clientdata [2018-12-02 20:57:58,169 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_3_11 [2018-12-02 20:57:58,169 INFO L138 BoogieDeclarations]: Found implementation of procedure free_11 [2018-12-02 20:57:58,169 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-02 20:57:58,169 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-02 20:57:58,169 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-02 20:57:58,169 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-02 20:57:58,169 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-12-02 20:57:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-12-02 20:57:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-12-02 20:57:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-12-02 20:57:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-12-02 20:57:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-12-02 20:57:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-12-02 20:57:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-12-02 20:57:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-12-02 20:57:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-12-02 20:57:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-12-02 20:57:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-12-02 20:57:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-12-02 20:57:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-12-02 20:57:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-12-02 20:57:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-12-02 20:57:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-12-02 20:57:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-12-02 20:57:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-12-02 20:57:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-12-02 20:57:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-12-02 20:57:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-12-02 20:57:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-12-02 20:57:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-12-02 20:57:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-12-02 20:57:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-12-02 20:57:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-12-02 20:57:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-12-02 20:57:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-12-02 20:57:58,172 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-12-02 20:57:58,172 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-12-02 20:57:58,172 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-12-02 20:57:58,172 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-12-02 20:57:58,172 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-12-02 20:57:58,172 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-12-02 20:57:58,172 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-12-02 20:57:58,172 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-12-02 20:57:58,172 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-12-02 20:57:58,173 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-12-02 20:57:58,173 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-12-02 20:57:58,173 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-12-02 20:57:58,173 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-12-02 20:57:58,173 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-12-02 20:57:58,173 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-12-02 20:57:58,173 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-12-02 20:57:58,173 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-12-02 20:57:58,173 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-12-02 20:57:58,174 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-12-02 20:57:58,174 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-12-02 20:57:58,174 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-12-02 20:57:58,174 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-12-02 20:57:58,174 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-12-02 20:57:58,174 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-12-02 20:57:58,174 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-12-02 20:57:58,174 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-12-02 20:57:58,174 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-12-02 20:57:58,174 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-12-02 20:57:58,174 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-12-02 20:57:58,174 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-12-02 20:57:58,175 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-12-02 20:57:58,175 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-12-02 20:57:58,175 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-12-02 20:57:58,175 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-12-02 20:57:58,175 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-12-02 20:57:58,175 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-12-02 20:57:58,175 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-12-02 20:57:58,175 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-12-02 20:57:58,175 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-12-02 20:57:58,175 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-12-02 20:57:58,175 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-12-02 20:57:58,175 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-12-02 20:57:58,176 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-12-02 20:57:58,177 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-12-02 20:57:58,177 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-12-02 20:57:58,177 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-12-02 20:57:58,177 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-12-02 20:57:58,177 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-12-02 20:57:58,177 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-12-02 20:57:58,177 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-12-02 20:57:58,177 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-12-02 20:57:58,177 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-12-02 20:57:58,178 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-12-02 20:57:58,178 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-12-02 20:57:58,178 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-12-02 20:57:58,178 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-12-02 20:57:58,178 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-12-02 20:57:58,178 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-12-02 20:57:58,178 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-12-02 20:57:58,178 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-12-02 20:57:58,178 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-02 20:57:58,178 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-12-02 20:57:58,178 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-12-02 20:57:58,179 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-12-02 20:57:58,180 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_get_clientdata [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_set_clientdata [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_3_11 [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure free_11 [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-02 20:57:58,181 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-02 20:57:58,182 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 20:57:58,182 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-12-02 20:57:58,182 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-12-02 20:57:58,182 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-12-02 20:57:58,182 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE4 [2018-12-02 20:57:58,474 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-02 20:57:58,723 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-02 20:57:59,008 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 20:57:59,008 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-02 20:57:59,008 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:57:59 BoogieIcfgContainer [2018-12-02 20:57:59,008 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 20:57:59,009 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 20:57:59,009 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 20:57:59,011 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 20:57:59,011 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:57:57" (1/3) ... [2018-12-02 20:57:59,012 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@79ddc320 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:57:59, skipping insertion in model container [2018-12-02 20:57:59,012 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:57:58" (2/3) ... [2018-12-02 20:57:59,012 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@79ddc320 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:57:59, skipping insertion in model container [2018-12-02 20:57:59,012 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:57:59" (3/3) ... [2018-12-02 20:57:59,013 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-12-02 20:57:59,019 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 20:57:59,024 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 85 error locations. [2018-12-02 20:57:59,033 INFO L257 AbstractCegarLoop]: Starting to check reachability of 85 error locations. [2018-12-02 20:57:59,048 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-02 20:57:59,048 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 20:57:59,048 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-02 20:57:59,048 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 20:57:59,048 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 20:57:59,049 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 20:57:59,049 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 20:57:59,049 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 20:57:59,049 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 20:57:59,060 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states. [2018-12-02 20:57:59,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-02 20:57:59,066 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:59,066 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:59,068 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:57:59,071 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:59,071 INFO L82 PathProgramCache]: Analyzing trace with hash -307556449, now seen corresponding path program 1 times [2018-12-02 20:57:59,073 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:57:59,074 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:57:59,089 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:59,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:59,125 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:59,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:57:59,154 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:57:59,156 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:57:59,157 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:57:59,159 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:57:59,167 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:57:59,167 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:57:59,168 INFO L87 Difference]: Start difference. First operand 170 states. Second operand 5 states. [2018-12-02 20:57:59,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:59,238 INFO L93 Difference]: Finished difference Result 132 states and 153 transitions. [2018-12-02 20:57:59,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:57:59,240 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-12-02 20:57:59,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:59,247 INFO L225 Difference]: With dead ends: 132 [2018-12-02 20:57:59,247 INFO L226 Difference]: Without dead ends: 129 [2018-12-02 20:57:59,248 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:57:59,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-12-02 20:57:59,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 101. [2018-12-02 20:57:59,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-02 20:57:59,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 113 transitions. [2018-12-02 20:57:59,278 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 113 transitions. Word has length 16 [2018-12-02 20:57:59,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:59,279 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 113 transitions. [2018-12-02 20:57:59,279 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:57:59,279 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 113 transitions. [2018-12-02 20:57:59,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-02 20:57:59,280 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:59,280 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:59,280 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:57:59,281 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:59,281 INFO L82 PathProgramCache]: Analyzing trace with hash 1435253886, now seen corresponding path program 1 times [2018-12-02 20:57:59,281 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:57:59,281 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:57:59,301 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:59,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:59,323 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:59,329 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:57:59,329 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:57:59,330 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:57:59,330 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 20:57:59,331 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 20:57:59,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 20:57:59,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 20:57:59,331 INFO L87 Difference]: Start difference. First operand 101 states and 113 transitions. Second operand 3 states. [2018-12-02 20:57:59,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:59,500 INFO L93 Difference]: Finished difference Result 144 states and 168 transitions. [2018-12-02 20:57:59,500 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 20:57:59,500 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-12-02 20:57:59,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:59,502 INFO L225 Difference]: With dead ends: 144 [2018-12-02 20:57:59,502 INFO L226 Difference]: Without dead ends: 141 [2018-12-02 20:57:59,503 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 20:57:59,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-02 20:57:59,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 97. [2018-12-02 20:57:59,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-02 20:57:59,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 105 transitions. [2018-12-02 20:57:59,512 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 105 transitions. Word has length 16 [2018-12-02 20:57:59,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:59,512 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 105 transitions. [2018-12-02 20:57:59,512 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 20:57:59,512 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 105 transitions. [2018-12-02 20:57:59,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-02 20:57:59,513 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:59,513 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:59,513 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:57:59,513 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:59,514 INFO L82 PathProgramCache]: Analyzing trace with hash -758951418, now seen corresponding path program 1 times [2018-12-02 20:57:59,514 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:57:59,514 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:57:59,530 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:59,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:59,553 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:59,567 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:57:59,567 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:57:59,597 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:57:59,598 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:57:59,598 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-12-02 20:57:59,598 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:57:59,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:57:59,599 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:57:59,599 INFO L87 Difference]: Start difference. First operand 97 states and 105 transitions. Second operand 5 states. [2018-12-02 20:57:59,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:57:59,629 INFO L93 Difference]: Finished difference Result 96 states and 104 transitions. [2018-12-02 20:57:59,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:57:59,629 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-12-02 20:57:59,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:57:59,630 INFO L225 Difference]: With dead ends: 96 [2018-12-02 20:57:59,631 INFO L226 Difference]: Without dead ends: 96 [2018-12-02 20:57:59,631 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:57:59,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-12-02 20:57:59,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 96. [2018-12-02 20:57:59,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-12-02 20:57:59,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 104 transitions. [2018-12-02 20:57:59,637 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 104 transitions. Word has length 21 [2018-12-02 20:57:59,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:57:59,637 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 104 transitions. [2018-12-02 20:57:59,637 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:57:59,637 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 104 transitions. [2018-12-02 20:57:59,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-02 20:57:59,638 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:57:59,638 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:57:59,639 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:57:59,639 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:57:59,639 INFO L82 PathProgramCache]: Analyzing trace with hash -758951381, now seen corresponding path program 1 times [2018-12-02 20:57:59,639 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:57:59,639 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:57:59,654 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:57:59,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:57:59,698 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:57:59,713 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:57:59,715 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:57:59,717 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:57:59,718 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:58:00,144 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|)) is different from true [2018-12-02 20:58:00,152 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-02 20:58:00,153 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:58:00,156 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:58:00,157 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:11 [2018-12-02 20:58:00,162 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-12-02 20:58:00,163 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:58:00,226 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:58:00,227 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:58:00,228 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5] total 7 [2018-12-02 20:58:00,228 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-02 20:58:00,228 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-02 20:58:00,228 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=27, Unknown=5, NotChecked=10, Total=56 [2018-12-02 20:58:00,228 INFO L87 Difference]: Start difference. First operand 96 states and 104 transitions. Second operand 8 states. [2018-12-02 20:58:01,129 WARN L180 SmtUtils]: Spent 867.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 13 [2018-12-02 20:58:01,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:58:01,811 INFO L93 Difference]: Finished difference Result 179 states and 221 transitions. [2018-12-02 20:58:01,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 20:58:01,811 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-12-02 20:58:01,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:58:01,813 INFO L225 Difference]: With dead ends: 179 [2018-12-02 20:58:01,813 INFO L226 Difference]: Without dead ends: 179 [2018-12-02 20:58:01,814 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 32 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=32, Invalid=73, Unknown=9, NotChecked=18, Total=132 [2018-12-02 20:58:01,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-12-02 20:58:01,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 106. [2018-12-02 20:58:01,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-02 20:58:01,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 121 transitions. [2018-12-02 20:58:01,821 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 121 transitions. Word has length 21 [2018-12-02 20:58:01,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:58:01,822 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 121 transitions. [2018-12-02 20:58:01,822 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-02 20:58:01,822 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 121 transitions. [2018-12-02 20:58:01,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-02 20:58:01,823 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:58:01,823 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:58:01,823 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:58:01,823 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:58:01,823 INFO L82 PathProgramCache]: Analyzing trace with hash -758951380, now seen corresponding path program 1 times [2018-12-02 20:58:01,824 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:58:01,824 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:58:01,840 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:58:01,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:58:01,888 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:58:01,897 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:58:01,898 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:58:01,906 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:58:01,906 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:58:01,911 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:58:01,912 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-02 20:58:02,799 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-02 20:58:02,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:58:02,808 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:58:02,809 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:58:02,809 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:58:02,822 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 20:58:02,822 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:58:02,835 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:58:02,835 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-12-02 20:58:02,847 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-12-02 20:58:02,847 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:58:02,978 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:58:02,978 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:58:02,984 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:58:02,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:58:02,999 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:58:03,002 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:58:03,003 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:58:03,014 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:58:03,014 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:58:03,020 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:58:03,020 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-02 20:58:03,031 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:58:03,032 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:58:03,033 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 20:58:03,033 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:58:03,048 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 20:58:03,048 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:58:03,057 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:58:03,057 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-02 20:58:03,058 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-12-02 20:58:03,058 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:58:03,157 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:58:03,157 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-12-02 20:58:03,157 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 20:58:03,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 20:58:03,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=70, Unknown=1, NotChecked=16, Total=110 [2018-12-02 20:58:03,158 INFO L87 Difference]: Start difference. First operand 106 states and 121 transitions. Second operand 9 states. [2018-12-02 20:58:04,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:58:04,259 INFO L93 Difference]: Finished difference Result 187 states and 225 transitions. [2018-12-02 20:58:04,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 20:58:04,260 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-12-02 20:58:04,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:58:04,262 INFO L225 Difference]: With dead ends: 187 [2018-12-02 20:58:04,262 INFO L226 Difference]: Without dead ends: 187 [2018-12-02 20:58:04,262 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 38 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=31, Invalid=104, Unknown=1, NotChecked=20, Total=156 [2018-12-02 20:58:04,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-12-02 20:58:04,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 106. [2018-12-02 20:58:04,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-02 20:58:04,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 120 transitions. [2018-12-02 20:58:04,273 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 120 transitions. Word has length 21 [2018-12-02 20:58:04,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:58:04,273 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 120 transitions. [2018-12-02 20:58:04,273 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 20:58:04,273 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 120 transitions. [2018-12-02 20:58:04,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-02 20:58:04,274 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:58:04,274 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:58:04,275 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:58:04,275 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:58:04,275 INFO L82 PathProgramCache]: Analyzing trace with hash -1052354388, now seen corresponding path program 1 times [2018-12-02 20:58:04,275 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:58:04,275 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:58:04,300 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:58:04,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:58:04,330 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:58:04,350 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 20:58:04,350 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:58:04,351 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:58:04,352 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:58:04,352 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:58:04,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:58:04,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:58:04,352 INFO L87 Difference]: Start difference. First operand 106 states and 120 transitions. Second operand 5 states. [2018-12-02 20:58:04,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:58:04,367 INFO L93 Difference]: Finished difference Result 100 states and 110 transitions. [2018-12-02 20:58:04,368 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:58:04,368 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-12-02 20:58:04,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:58:04,368 INFO L225 Difference]: With dead ends: 100 [2018-12-02 20:58:04,368 INFO L226 Difference]: Without dead ends: 98 [2018-12-02 20:58:04,368 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:58:04,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-12-02 20:58:04,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-12-02 20:58:04,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-12-02 20:58:04,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 108 transitions. [2018-12-02 20:58:04,372 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 108 transitions. Word has length 21 [2018-12-02 20:58:04,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:58:04,372 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 108 transitions. [2018-12-02 20:58:04,372 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:58:04,372 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 108 transitions. [2018-12-02 20:58:04,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-02 20:58:04,372 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:58:04,372 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:58:04,372 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:58:04,373 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:58:04,373 INFO L82 PathProgramCache]: Analyzing trace with hash 1038858468, now seen corresponding path program 1 times [2018-12-02 20:58:04,373 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:58:04,373 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:58:04,387 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:58:04,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:58:04,406 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:58:04,421 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:58:04,421 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:58:04,422 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:58:04,422 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:58:04,422 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:58:04,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:58:04,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:58:04,423 INFO L87 Difference]: Start difference. First operand 98 states and 108 transitions. Second operand 5 states. [2018-12-02 20:58:04,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:58:04,476 INFO L93 Difference]: Finished difference Result 122 states and 138 transitions. [2018-12-02 20:58:04,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:58:04,477 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-12-02 20:58:04,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:58:04,478 INFO L225 Difference]: With dead ends: 122 [2018-12-02 20:58:04,478 INFO L226 Difference]: Without dead ends: 122 [2018-12-02 20:58:04,478 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:58:04,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-12-02 20:58:04,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 100. [2018-12-02 20:58:04,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-02 20:58:04,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 110 transitions. [2018-12-02 20:58:04,483 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 110 transitions. Word has length 25 [2018-12-02 20:58:04,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:58:04,483 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 110 transitions. [2018-12-02 20:58:04,483 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:58:04,483 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 110 transitions. [2018-12-02 20:58:04,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-02 20:58:04,484 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:58:04,484 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:58:04,485 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:58:04,485 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:58:04,485 INFO L82 PathProgramCache]: Analyzing trace with hash 842344963, now seen corresponding path program 1 times [2018-12-02 20:58:04,485 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:58:04,485 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:58:04,503 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:58:04,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:58:04,544 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:58:04,559 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 17 [2018-12-02 20:58:04,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:58:04,570 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 15 [2018-12-02 20:58:04,570 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-12-02 20:58:04,577 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-02 20:58:04,578 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 15 [2018-12-02 20:58:04,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:58:04,581 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2018-12-02 20:58:04,581 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 20:58:04,583 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:58:04,590 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-02 20:58:04,590 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:18, output treesize:19 [2018-12-02 20:58:06,651 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~c11~0.base (_ BitVec 32))) (and (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= |c_#valid| (store |c_old(#valid)| entry_point_~c11~0.base (_ bv0 1))))) is different from true [2018-12-02 20:58:06,674 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:58:06,674 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:58:07,094 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_17 (_ BitVec 32))) (or (not (= (select |c_#valid| v_entry_point_~c11~0.base_17) (_ bv0 1))) (= |c_old(#valid)| (store |c_#valid| v_entry_point_~c11~0.base_17 (_ bv0 1))))) is different from false [2018-12-02 20:58:07,098 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:58:07,098 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:58:07,104 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:58:07,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:58:07,117 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:58:07,123 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:58:07,123 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:58:07,550 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_20 (_ BitVec 32))) (or (not (= (select |c_#valid| v_entry_point_~c11~0.base_20) (_ bv0 1))) (= |c_old(#valid)| (store |c_#valid| v_entry_point_~c11~0.base_20 (_ bv0 1))))) is different from false [2018-12-02 20:58:07,566 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:58:07,566 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 6] total 9 [2018-12-02 20:58:07,566 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 20:58:07,566 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 20:58:07,566 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=52, Unknown=3, NotChecked=48, Total=132 [2018-12-02 20:58:07,567 INFO L87 Difference]: Start difference. First operand 100 states and 110 transitions. Second operand 10 states. [2018-12-02 20:58:28,097 WARN L180 SmtUtils]: Spent 918.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 10 [2018-12-02 20:59:12,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:59:12,482 INFO L93 Difference]: Finished difference Result 121 states and 131 transitions. [2018-12-02 20:59:12,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 20:59:12,483 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 25 [2018-12-02 20:59:12,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:59:12,484 INFO L225 Difference]: With dead ends: 121 [2018-12-02 20:59:12,484 INFO L226 Difference]: Without dead ends: 116 [2018-12-02 20:59:12,484 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=33, Invalid=66, Unknown=3, NotChecked=54, Total=156 [2018-12-02 20:59:12,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-12-02 20:59:12,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 100. [2018-12-02 20:59:12,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-02 20:59:12,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 107 transitions. [2018-12-02 20:59:12,489 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 107 transitions. Word has length 25 [2018-12-02 20:59:12,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:59:12,489 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 107 transitions. [2018-12-02 20:59:12,489 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 20:59:12,489 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 107 transitions. [2018-12-02 20:59:12,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-02 20:59:12,490 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:59:12,490 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:59:12,490 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:59:12,491 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:59:12,491 INFO L82 PathProgramCache]: Analyzing trace with hash -677007919, now seen corresponding path program 1 times [2018-12-02 20:59:12,491 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:59:12,491 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:59:12,507 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:59:12,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:59:12,532 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:59:12,552 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:59:12,552 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:59:12,580 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:59:12,581 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:59:12,582 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-12-02 20:59:12,582 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:59:12,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:59:12,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:59:12,582 INFO L87 Difference]: Start difference. First operand 100 states and 107 transitions. Second operand 5 states. [2018-12-02 20:59:12,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:59:12,623 INFO L93 Difference]: Finished difference Result 99 states and 106 transitions. [2018-12-02 20:59:12,623 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:59:12,623 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-02 20:59:12,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:59:12,624 INFO L225 Difference]: With dead ends: 99 [2018-12-02 20:59:12,624 INFO L226 Difference]: Without dead ends: 99 [2018-12-02 20:59:12,624 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:59:12,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-12-02 20:59:12,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-12-02 20:59:12,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-02 20:59:12,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 106 transitions. [2018-12-02 20:59:12,628 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 106 transitions. Word has length 29 [2018-12-02 20:59:12,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:59:12,628 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 106 transitions. [2018-12-02 20:59:12,628 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:59:12,628 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 106 transitions. [2018-12-02 20:59:12,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-02 20:59:12,629 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:59:12,629 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:59:12,629 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:59:12,629 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:59:12,629 INFO L82 PathProgramCache]: Analyzing trace with hash -677007867, now seen corresponding path program 1 times [2018-12-02 20:59:12,630 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:59:12,630 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:59:12,649 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:59:12,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:59:12,721 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:59:12,724 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:59:12,724 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:12,726 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:12,726 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:59:13,140 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|)) is different from true [2018-12-02 20:59:13,144 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-12-02 20:59:13,144 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:13,148 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:59:13,148 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:14, output treesize:11 [2018-12-02 20:59:13,154 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 2 not checked. [2018-12-02 20:59:13,154 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:59:13,250 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:59:13,252 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:59:13,252 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-12-02 20:59:13,253 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 20:59:13,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 20:59:13,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=66, Unknown=5, NotChecked=16, Total=110 [2018-12-02 20:59:13,253 INFO L87 Difference]: Start difference. First operand 99 states and 106 transitions. Second operand 11 states. [2018-12-02 20:59:14,194 WARN L180 SmtUtils]: Spent 907.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 13 [2018-12-02 20:59:14,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:59:14,862 INFO L93 Difference]: Finished difference Result 138 states and 159 transitions. [2018-12-02 20:59:14,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 20:59:14,863 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 29 [2018-12-02 20:59:14,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:59:14,863 INFO L225 Difference]: With dead ends: 138 [2018-12-02 20:59:14,863 INFO L226 Difference]: Without dead ends: 138 [2018-12-02 20:59:14,864 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 44 SyntacticMatches, 4 SemanticMatches, 12 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=38, Invalid=114, Unknown=8, NotChecked=22, Total=182 [2018-12-02 20:59:14,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-02 20:59:14,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 108. [2018-12-02 20:59:14,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-12-02 20:59:14,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 118 transitions. [2018-12-02 20:59:14,866 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 118 transitions. Word has length 29 [2018-12-02 20:59:14,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:59:14,867 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 118 transitions. [2018-12-02 20:59:14,867 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 20:59:14,867 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 118 transitions. [2018-12-02 20:59:14,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-02 20:59:14,867 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:59:14,867 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:59:14,867 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:59:14,867 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:59:14,868 INFO L82 PathProgramCache]: Analyzing trace with hash -677007866, now seen corresponding path program 1 times [2018-12-02 20:59:14,868 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:59:14,868 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:59:14,887 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:59:14,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:59:14,951 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:59:14,960 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:59:14,961 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:14,968 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:59:14,968 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:14,974 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:14,974 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-02 20:59:15,950 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-02 20:59:15,956 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:15,959 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 20:59:15,959 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:15,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:15,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:15,976 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 20:59:15,976 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:15,984 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:15,984 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-02 20:59:15,996 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 2 not checked. [2018-12-02 20:59:15,996 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:59:16,138 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:59:16,139 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:59:16,145 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:59:16,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:59:16,160 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:59:16,163 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:59:16,163 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:16,170 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:59:16,170 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:16,175 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:16,175 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-02 20:59:16,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:16,185 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 20:59:16,185 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:16,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:16,199 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:16,199 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:59:16,199 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:16,207 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:16,207 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-12-02 20:59:16,208 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 2 not checked. [2018-12-02 20:59:16,209 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:59:16,306 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:59:16,306 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-12-02 20:59:16,306 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 20:59:16,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 20:59:16,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=70, Unknown=1, NotChecked=16, Total=110 [2018-12-02 20:59:16,306 INFO L87 Difference]: Start difference. First operand 108 states and 118 transitions. Second operand 9 states. [2018-12-02 20:59:16,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:59:16,972 INFO L93 Difference]: Finished difference Result 147 states and 166 transitions. [2018-12-02 20:59:16,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 20:59:16,973 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-12-02 20:59:16,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:59:16,973 INFO L225 Difference]: With dead ends: 147 [2018-12-02 20:59:16,974 INFO L226 Difference]: Without dead ends: 147 [2018-12-02 20:59:16,974 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 55 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=31, Invalid=104, Unknown=1, NotChecked=20, Total=156 [2018-12-02 20:59:16,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-02 20:59:16,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 108. [2018-12-02 20:59:16,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-12-02 20:59:16,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 117 transitions. [2018-12-02 20:59:16,977 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 117 transitions. Word has length 29 [2018-12-02 20:59:16,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:59:16,977 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 117 transitions. [2018-12-02 20:59:16,977 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 20:59:16,977 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 117 transitions. [2018-12-02 20:59:16,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-02 20:59:16,978 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:59:16,978 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:59:16,978 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:59:16,979 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:59:16,979 INFO L82 PathProgramCache]: Analyzing trace with hash -1182566492, now seen corresponding path program 1 times [2018-12-02 20:59:16,979 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:59:16,979 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:59:16,995 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:59:17,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:59:17,035 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:59:17,055 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:59:17,055 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:59:17,056 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:59:17,057 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:59:17,057 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:59:17,057 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:59:17,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:59:17,057 INFO L87 Difference]: Start difference. First operand 108 states and 117 transitions. Second operand 5 states. [2018-12-02 20:59:17,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:59:17,078 INFO L93 Difference]: Finished difference Result 103 states and 110 transitions. [2018-12-02 20:59:17,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:59:17,079 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-02 20:59:17,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:59:17,079 INFO L225 Difference]: With dead ends: 103 [2018-12-02 20:59:17,079 INFO L226 Difference]: Without dead ends: 99 [2018-12-02 20:59:17,079 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:59:17,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-12-02 20:59:17,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 97. [2018-12-02 20:59:17,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-02 20:59:17,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 103 transitions. [2018-12-02 20:59:17,081 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 103 transitions. Word has length 29 [2018-12-02 20:59:17,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:59:17,081 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 103 transitions. [2018-12-02 20:59:17,081 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:59:17,082 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 103 transitions. [2018-12-02 20:59:17,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 20:59:17,082 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:59:17,082 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:59:17,082 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:59:17,082 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:59:17,083 INFO L82 PathProgramCache]: Analyzing trace with hash 425511469, now seen corresponding path program 1 times [2018-12-02 20:59:17,083 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:59:17,083 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:59:17,099 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:59:17,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:59:17,161 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:59:17,551 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|)) is different from true [2018-12-02 20:59:17,555 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-12-02 20:59:17,555 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:17,559 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:59:17,559 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:14, output treesize:11 [2018-12-02 20:59:17,570 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-02 20:59:17,570 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:59:17,572 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:59:17,572 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 20:59:17,572 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 20:59:17,572 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 20:59:17,572 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=22, Unknown=1, NotChecked=8, Total=42 [2018-12-02 20:59:17,573 INFO L87 Difference]: Start difference. First operand 97 states and 103 transitions. Second operand 7 states. [2018-12-02 20:59:17,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:59:17,831 INFO L93 Difference]: Finished difference Result 117 states and 129 transitions. [2018-12-02 20:59:17,831 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 20:59:17,831 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 32 [2018-12-02 20:59:17,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:59:17,832 INFO L225 Difference]: With dead ends: 117 [2018-12-02 20:59:17,832 INFO L226 Difference]: Without dead ends: 117 [2018-12-02 20:59:17,832 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=21, Invalid=38, Unknown=1, NotChecked=12, Total=72 [2018-12-02 20:59:17,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-12-02 20:59:17,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 96. [2018-12-02 20:59:17,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-12-02 20:59:17,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 102 transitions. [2018-12-02 20:59:17,835 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 102 transitions. Word has length 32 [2018-12-02 20:59:17,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:59:17,835 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 102 transitions. [2018-12-02 20:59:17,835 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 20:59:17,836 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 102 transitions. [2018-12-02 20:59:17,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 20:59:17,836 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:59:17,836 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:59:17,837 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:59:17,837 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:59:17,837 INFO L82 PathProgramCache]: Analyzing trace with hash 425511470, now seen corresponding path program 1 times [2018-12-02 20:59:17,837 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:59:17,837 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:59:17,853 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:59:17,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:59:17,929 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:59:17,934 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:59:17,935 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:17,943 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:59:17,943 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:17,949 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:17,949 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-02 20:59:18,922 WARN L180 SmtUtils]: Spent 921.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-12-02 20:59:18,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:18,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:18,930 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 20:59:18,930 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:18,945 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 20:59:18,946 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:18,953 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:18,954 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:15 [2018-12-02 20:59:19,836 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-02 20:59:19,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:19,844 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 20:59:19,844 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:19,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:19,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:19,857 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 20:59:19,857 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:19,864 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:19,865 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-02 20:59:19,900 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 4 not checked. [2018-12-02 20:59:19,900 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:59:20,202 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:59:20,202 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:59:20,208 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:59:20,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:59:20,229 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:59:20,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:20,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:20,359 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 20:59:20,359 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:20,377 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 20:59:20,378 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:20,389 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:20,389 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-02 20:59:20,523 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 2 not checked. [2018-12-02 20:59:20,523 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:59:20,666 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:59:20,666 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 19 [2018-12-02 20:59:20,666 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-02 20:59:20,666 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-02 20:59:20,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=437, Unknown=1, NotChecked=42, Total=552 [2018-12-02 20:59:20,666 INFO L87 Difference]: Start difference. First operand 96 states and 102 transitions. Second operand 20 states. [2018-12-02 20:59:23,061 WARN L180 SmtUtils]: Spent 2.29 s on a formula simplification. DAG size of input: 31 DAG size of output: 24 [2018-12-02 20:59:41,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:59:41,650 INFO L93 Difference]: Finished difference Result 136 states and 153 transitions. [2018-12-02 20:59:41,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-02 20:59:41,651 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-12-02 20:59:41,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:59:41,652 INFO L225 Difference]: With dead ends: 136 [2018-12-02 20:59:41,652 INFO L226 Difference]: Without dead ends: 136 [2018-12-02 20:59:41,652 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 54 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=111, Invalid=704, Unknown=1, NotChecked=54, Total=870 [2018-12-02 20:59:41,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-02 20:59:41,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 95. [2018-12-02 20:59:41,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-12-02 20:59:41,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 101 transitions. [2018-12-02 20:59:41,656 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 101 transitions. Word has length 32 [2018-12-02 20:59:41,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:59:41,656 INFO L480 AbstractCegarLoop]: Abstraction has 95 states and 101 transitions. [2018-12-02 20:59:41,656 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-02 20:59:41,656 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 101 transitions. [2018-12-02 20:59:41,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 20:59:41,657 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:59:41,657 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:59:41,657 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:59:41,657 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:59:41,657 INFO L82 PathProgramCache]: Analyzing trace with hash 423935168, now seen corresponding path program 1 times [2018-12-02 20:59:41,657 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:59:41,657 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:59:41,676 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:59:41,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:59:41,704 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:59:41,717 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 20:59:41,717 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 20:59:41,719 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 20:59:41,719 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 20:59:41,719 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 20:59:41,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 20:59:41,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:59:41,719 INFO L87 Difference]: Start difference. First operand 95 states and 101 transitions. Second operand 5 states. [2018-12-02 20:59:41,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:59:41,749 INFO L93 Difference]: Finished difference Result 114 states and 124 transitions. [2018-12-02 20:59:41,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 20:59:41,750 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2018-12-02 20:59:41,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:59:41,750 INFO L225 Difference]: With dead ends: 114 [2018-12-02 20:59:41,750 INFO L226 Difference]: Without dead ends: 114 [2018-12-02 20:59:41,751 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 20:59:41,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-02 20:59:41,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 99. [2018-12-02 20:59:41,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-02 20:59:41,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 106 transitions. [2018-12-02 20:59:41,753 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 106 transitions. Word has length 32 [2018-12-02 20:59:41,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:59:41,753 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 106 transitions. [2018-12-02 20:59:41,753 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 20:59:41,753 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 106 transitions. [2018-12-02 20:59:41,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 20:59:41,753 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:59:41,753 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:59:41,754 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:59:41,754 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:59:41,754 INFO L82 PathProgramCache]: Analyzing trace with hash -1383519295, now seen corresponding path program 1 times [2018-12-02 20:59:41,754 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:59:41,754 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:59:41,770 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:59:41,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:59:41,824 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:59:41,826 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:59:41,826 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:41,827 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:41,827 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:59:41,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:41,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:41,852 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 20:59:41,852 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:41,853 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:41,853 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-02 20:59:41,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:41,894 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-02 20:59:41,894 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:41,900 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 20:59:41,900 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:13 [2018-12-02 20:59:41,916 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:59:41,916 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:59:41,958 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 20:59:41,958 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:41,962 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:41,962 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:26, output treesize:4 [2018-12-02 20:59:42,024 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 4 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:59:42,026 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 20:59:42,026 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 11 [2018-12-02 20:59:42,027 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-02 20:59:42,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-02 20:59:42,027 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=101, Unknown=6, NotChecked=0, Total=132 [2018-12-02 20:59:42,027 INFO L87 Difference]: Start difference. First operand 99 states and 106 transitions. Second operand 12 states. [2018-12-02 20:59:47,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 20:59:47,345 INFO L93 Difference]: Finished difference Result 115 states and 126 transitions. [2018-12-02 20:59:47,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-02 20:59:47,345 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 32 [2018-12-02 20:59:47,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 20:59:47,346 INFO L225 Difference]: With dead ends: 115 [2018-12-02 20:59:47,346 INFO L226 Difference]: Without dead ends: 115 [2018-12-02 20:59:47,346 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 47 SyntacticMatches, 6 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=57, Invalid=236, Unknown=13, NotChecked=0, Total=306 [2018-12-02 20:59:47,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-12-02 20:59:47,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 101. [2018-12-02 20:59:47,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-02 20:59:47,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 108 transitions. [2018-12-02 20:59:47,348 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 108 transitions. Word has length 32 [2018-12-02 20:59:47,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 20:59:47,348 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 108 transitions. [2018-12-02 20:59:47,348 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-02 20:59:47,348 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 108 transitions. [2018-12-02 20:59:47,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-02 20:59:47,348 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 20:59:47,349 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 20:59:47,349 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 20:59:47,349 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 20:59:47,349 INFO L82 PathProgramCache]: Analyzing trace with hash 894637102, now seen corresponding path program 1 times [2018-12-02 20:59:47,349 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 20:59:47,349 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 20:59:47,365 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:59:47,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:59:47,440 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:59:47,442 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:59:47,442 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:47,446 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:47,446 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 20:59:47,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:47,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:47,477 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 20:59:47,477 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:47,481 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:47,481 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-02 20:59:47,510 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-02 20:59:47,510 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:47,522 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 20:59:47,523 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 20:59:47,523 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:47,525 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:47,531 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:47,531 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:24, output treesize:15 [2018-12-02 20:59:49,554 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_19 (_ BitVec 32))) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_19 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_19) (_ bv0 32))))) is different from true [2018-12-02 20:59:49,589 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-12-02 20:59:49,592 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-02 20:59:49,592 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:49,599 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:49,608 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:49,608 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:21 [2018-12-02 20:59:49,669 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-12-02 20:59:49,671 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-12-02 20:59:49,672 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:49,676 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:49,680 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:49,680 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:5 [2018-12-02 20:59:49,715 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-12-02 20:59:49,715 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:59:49,793 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 19 [2018-12-02 20:59:49,793 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:49,796 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 20:59:49,796 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:24, output treesize:15 [2018-12-02 20:59:49,881 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 20:59:49,881 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 20:59:49,889 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 20:59:49,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 20:59:49,912 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 20:59:49,914 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 20:59:49,915 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:49,916 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:49,916 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 20:59:49,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:49,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 20:59:49,987 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 20:59:49,987 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:49,988 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:49,988 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-02 20:59:50,048 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 20:59:50,050 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 20:59:50,050 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:50,052 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:50,057 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:50,057 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:16, output treesize:12 [2018-12-02 20:59:52,104 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_14 (_ BitVec 32)) (v_entry_point_~c11~0.base_BEFORE_CALL_22 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_22) v_entry_point_~c11~0.offset_BEFORE_CALL_14) v_entry_point_~c11~0.base_BEFORE_CALL_22))) is different from true [2018-12-02 20:59:52,190 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-12-02 20:59:52,192 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-02 20:59:52,193 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:52,200 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:52,208 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:52,208 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:20 [2018-12-02 20:59:52,334 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-12-02 20:59:52,336 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-12-02 20:59:52,336 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:52,340 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:52,344 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 20:59:52,344 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:5 [2018-12-02 20:59:52,345 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-12-02 20:59:52,345 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 20:59:52,350 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 19 [2018-12-02 20:59:52,350 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 20:59:52,355 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 20:59:52,355 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:24, output treesize:15 [2018-12-02 20:59:52,454 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 20:59:52,468 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 20:59:52,469 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14] total 29 [2018-12-02 20:59:52,469 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-12-02 20:59:52,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-12-02 20:59:52,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=720, Unknown=18, NotChecked=110, Total=930 [2018-12-02 20:59:52,469 INFO L87 Difference]: Start difference. First operand 101 states and 108 transitions. Second operand 30 states. [2018-12-02 20:59:59,127 WARN L180 SmtUtils]: Spent 4.01 s on a formula simplification. DAG size of input: 19 DAG size of output: 12 [2018-12-02 21:00:05,228 WARN L180 SmtUtils]: Spent 4.03 s on a formula simplification. DAG size of input: 36 DAG size of output: 29 [2018-12-02 21:00:15,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:00:15,501 INFO L93 Difference]: Finished difference Result 123 states and 133 transitions. [2018-12-02 21:00:15,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-02 21:00:15,501 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 34 [2018-12-02 21:00:15,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:00:15,502 INFO L225 Difference]: With dead ends: 123 [2018-12-02 21:00:15,502 INFO L226 Difference]: Without dead ends: 123 [2018-12-02 21:00:15,502 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 76 SyntacticMatches, 4 SemanticMatches, 46 ConstructedPredicates, 2 IntricatePredicates, 1 DeprecatedPredicates, 332 ImplicationChecksByTransitivity, 19.5s TimeCoverageRelationStatistics Valid=236, Invalid=1806, Unknown=36, NotChecked=178, Total=2256 [2018-12-02 21:00:15,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-12-02 21:00:15,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 104. [2018-12-02 21:00:15,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-02 21:00:15,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 111 transitions. [2018-12-02 21:00:15,505 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 111 transitions. Word has length 34 [2018-12-02 21:00:15,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:00:15,505 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 111 transitions. [2018-12-02 21:00:15,505 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-12-02 21:00:15,505 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 111 transitions. [2018-12-02 21:00:15,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-02 21:00:15,505 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:00:15,505 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:00:15,506 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:00:15,506 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:00:15,506 INFO L82 PathProgramCache]: Analyzing trace with hash 894637103, now seen corresponding path program 1 times [2018-12-02 21:00:15,506 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:00:15,506 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:00:15,521 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:00:15,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:00:15,609 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:00:15,611 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:00:15,611 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,614 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,615 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 21:00:15,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:00:15,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:00:15,655 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:00:15,655 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,660 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,660 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:11 [2018-12-02 21:00:15,693 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:00:15,695 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:00:15,695 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,698 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,715 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:00:15,717 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:00:15,717 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,719 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,729 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,729 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:33, output treesize:25 [2018-12-02 21:00:15,837 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2018-12-02 21:00:15,841 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-02 21:00:15,841 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,856 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,887 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-12-02 21:00:15,890 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-02 21:00:15,891 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,899 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,917 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:15,917 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:66, output treesize:28 [2018-12-02 21:00:16,023 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-12-02 21:00:16,025 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-02 21:00:16,026 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:16,028 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:16,039 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-12-02 21:00:16,041 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-12-02 21:00:16,041 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:16,047 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:16,054 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:16,054 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:9 [2018-12-02 21:00:16,111 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:00:16,112 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:00:16,505 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 44 [2018-12-02 21:00:16,506 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-12-02 21:00:16,605 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2018-12-02 21:00:16,606 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:00:16,721 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-12-02 21:00:16,721 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:00:16,832 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 10 dim-0 vars, and 4 xjuncts. [2018-12-02 21:00:16,832 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:103, output treesize:122 [2018-12-02 21:00:17,608 WARN L180 SmtUtils]: Spent 410.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 46 [2018-12-02 21:00:17,615 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 21:00:17,615 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 21:00:17,623 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:00:17,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:00:17,650 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:00:17,653 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:00:17,653 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:17,654 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:17,654 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:00:17,765 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:00:17,765 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:00:17,766 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:00:17,766 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:17,770 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:17,770 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-02 21:00:17,870 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:00:17,872 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:00:17,872 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:17,875 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:17,890 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:00:17,892 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:00:17,892 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:17,894 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:17,902 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:17,903 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:22 [2018-12-02 21:00:18,152 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-12-02 21:00:18,155 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-02 21:00:18,156 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:18,165 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:18,197 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 44 [2018-12-02 21:00:18,200 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-02 21:00:18,200 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:18,215 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:18,232 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:18,232 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:63, output treesize:25 [2018-12-02 21:00:18,448 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-12-02 21:00:18,450 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-02 21:00:18,450 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:18,453 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:18,464 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-12-02 21:00:18,466 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-12-02 21:00:18,466 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:18,471 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:18,482 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:18,482 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:39, output treesize:9 [2018-12-02 21:00:18,483 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:00:18,484 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:00:18,490 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2018-12-02 21:00:18,491 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:00:18,663 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 54 [2018-12-02 21:00:18,664 INFO L267 ElimStorePlain]: Start of recursive call 3: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-12-02 21:00:18,859 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-12-02 21:00:18,859 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:00:19,050 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 10 dim-0 vars, and 4 xjuncts. [2018-12-02 21:00:19,050 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:133, output treesize:162 [2018-12-02 21:00:19,928 WARN L180 SmtUtils]: Spent 471.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 54 [2018-12-02 21:00:19,949 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:00:19,950 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 25 [2018-12-02 21:00:19,950 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-02 21:00:19,950 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-02 21:00:19,950 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=955, Unknown=0, NotChecked=0, Total=1056 [2018-12-02 21:00:19,950 INFO L87 Difference]: Start difference. First operand 104 states and 111 transitions. Second operand 26 states. [2018-12-02 21:00:22,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:00:22,323 INFO L93 Difference]: Finished difference Result 134 states and 148 transitions. [2018-12-02 21:00:22,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-02 21:00:22,323 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 34 [2018-12-02 21:00:22,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:00:22,324 INFO L225 Difference]: With dead ends: 134 [2018-12-02 21:00:22,324 INFO L226 Difference]: Without dead ends: 134 [2018-12-02 21:00:22,324 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 52 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 343 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=223, Invalid=1669, Unknown=0, NotChecked=0, Total=1892 [2018-12-02 21:00:22,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-02 21:00:22,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 103. [2018-12-02 21:00:22,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-02 21:00:22,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 110 transitions. [2018-12-02 21:00:22,327 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 110 transitions. Word has length 34 [2018-12-02 21:00:22,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:00:22,328 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 110 transitions. [2018-12-02 21:00:22,328 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-02 21:00:22,328 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 110 transitions. [2018-12-02 21:00:22,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-12-02 21:00:22,328 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:00:22,328 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:00:22,329 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:00:22,329 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:00:22,329 INFO L82 PathProgramCache]: Analyzing trace with hash -1916708687, now seen corresponding path program 1 times [2018-12-02 21:00:22,329 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:00:22,329 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:00:22,344 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:00:22,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:00:22,409 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:00:22,425 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 17 [2018-12-02 21:00:22,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:00:22,435 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 15 [2018-12-02 21:00:22,435 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-12-02 21:00:22,445 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-02 21:00:22,446 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 15 [2018-12-02 21:00:22,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:00:22,448 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2018-12-02 21:00:22,448 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:00:22,450 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:00:22,457 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-02 21:00:22,457 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:18, output treesize:19 [2018-12-02 21:00:31,946 WARN L180 SmtUtils]: Spent 5.79 s on a formula simplification that was a NOOP. DAG size: 24 [2018-12-02 21:00:32,395 WARN L180 SmtUtils]: Spent 423.00 ms on a formula simplification that was a NOOP. DAG size: 19 [2018-12-02 21:00:33,283 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~c11~0.base (_ BitVec 32)) (v_prenex_27 (_ BitVec 32))) (let ((.cse0 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (let ((.cse1 (store .cse0 v_prenex_27 (_ bv0 1)))) (and (not (= (_ bv0 32) entry_point_~c11~0.base)) (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= (select .cse0 v_prenex_27) (_ bv0 1)) (= |c_#valid| (store .cse1 entry_point_~c11~0.base (_ bv0 1))) (= (_ bv1 1) (select .cse1 entry_point_~c11~0.base)))))) is different from true [2018-12-02 21:00:33,342 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 21:00:33,342 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:00:33,510 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 47 [2018-12-02 21:00:34,596 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_25 (_ BitVec 32)) (v_entry_point_~cfg~1.base_26 (_ BitVec 32))) (let ((.cse0 (store |c_#valid| v_entry_point_~c11~0.base_25 (_ bv1 1)))) (or (= v_entry_point_~c11~0.base_25 (_ bv0 32)) (= (store (store .cse0 v_entry_point_~cfg~1.base_26 (_ bv0 1)) v_entry_point_~c11~0.base_25 (_ bv0 1)) |c_old(#valid)|) (not (= (_ bv0 1) (select .cse0 v_entry_point_~cfg~1.base_26))) (not (= (select |c_#valid| v_entry_point_~c11~0.base_25) (_ bv0 1)))))) is different from false [2018-12-02 21:00:34,599 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 21:00:34,599 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 21:00:34,605 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:00:34,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:00:34,623 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:00:42,836 WARN L180 SmtUtils]: Spent 1.30 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-02 21:00:44,251 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~c11~0.base (_ BitVec 32)) (entry_point_~cfg~1.base (_ BitVec 32))) (let ((.cse0 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (and (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= (select .cse0 entry_point_~cfg~1.base) (_ bv0 1)) (= |c_#valid| (store (store .cse0 entry_point_~cfg~1.base (_ bv0 1)) entry_point_~c11~0.base (_ bv0 1)))))) is different from true [2018-12-02 21:00:44,254 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 21:00:44,255 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:00:46,384 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_28 (_ BitVec 32)) (v_entry_point_~cfg~1.base_29 (_ BitVec 32))) (let ((.cse0 (store |c_#valid| v_entry_point_~c11~0.base_28 (_ bv1 1)))) (or (not (= (select .cse0 v_entry_point_~cfg~1.base_29) (_ bv0 1))) (not (= (select |c_#valid| v_entry_point_~c11~0.base_28) (_ bv0 1))) (= |c_old(#valid)| (store (store .cse0 v_entry_point_~cfg~1.base_29 (_ bv0 1)) v_entry_point_~c11~0.base_28 (_ bv0 1)))))) is different from false [2018-12-02 21:00:46,401 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:00:46,401 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 9] total 18 [2018-12-02 21:00:46,401 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-02 21:00:46,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-02 21:00:46,401 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=209, Unknown=13, NotChecked=132, Total=420 [2018-12-02 21:00:46,401 INFO L87 Difference]: Start difference. First operand 103 states and 110 transitions. Second operand 19 states. [2018-12-02 21:01:22,536 WARN L180 SmtUtils]: Spent 1.98 s on a formula simplification. DAG size of input: 31 DAG size of output: 21 [2018-12-02 21:01:46,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:01:46,082 INFO L93 Difference]: Finished difference Result 134 states and 147 transitions. [2018-12-02 21:01:46,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-02 21:01:46,082 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 35 [2018-12-02 21:01:46,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:01:46,083 INFO L225 Difference]: With dead ends: 134 [2018-12-02 21:01:46,083 INFO L226 Difference]: Without dead ends: 127 [2018-12-02 21:01:46,083 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 53 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 25.5s TimeCoverageRelationStatistics Valid=70, Invalid=239, Unknown=13, NotChecked=140, Total=462 [2018-12-02 21:01:46,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-12-02 21:01:46,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 97. [2018-12-02 21:01:46,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-02 21:01:46,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 103 transitions. [2018-12-02 21:01:46,085 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 103 transitions. Word has length 35 [2018-12-02 21:01:46,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:01:46,086 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 103 transitions. [2018-12-02 21:01:46,086 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-02 21:01:46,086 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 103 transitions. [2018-12-02 21:01:46,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-02 21:01:46,086 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:01:46,086 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:01:46,086 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:01:46,086 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:01:46,087 INFO L82 PathProgramCache]: Analyzing trace with hash -776766537, now seen corresponding path program 1 times [2018-12-02 21:01:46,087 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:01:46,087 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:01:46,101 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:01:46,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:01:46,200 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:01:46,203 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:01:46,203 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:46,207 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:46,207 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 21:01:46,236 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:01:46,238 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:01:46,238 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:01:46,239 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:46,242 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:46,242 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-02 21:01:46,269 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-02 21:01:46,269 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:46,296 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:01:46,298 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:01:46,298 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:46,301 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:46,319 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:01:46,321 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:01:46,321 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:46,324 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:46,334 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:46,334 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:35, output treesize:22 [2018-12-02 21:01:48,365 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_37 (_ BitVec 32))) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_37 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_37) (_ bv0 32))))) is different from true [2018-12-02 21:01:48,369 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:01:48,369 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:48,374 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:01:48,374 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:14 [2018-12-02 21:01:52,399 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-02 21:01:52,515 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-12-02 21:01:52,519 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-02 21:01:52,519 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:52,531 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:52,559 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-12-02 21:01:52,563 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-02 21:01:52,563 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:52,580 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:52,593 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:52,593 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:63, output treesize:31 [2018-12-02 21:01:52,693 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-12-02 21:01:52,696 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 15 [2018-12-02 21:01:52,696 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:52,698 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:52,705 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:01:52,706 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:31 [2018-12-02 21:01:52,805 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-12-02 21:01:52,807 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-02 21:01:52,807 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:52,813 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-02 21:01:52,813 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:52,814 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:52,815 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:52,815 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:33, output treesize:5 [2018-12-02 21:01:54,874 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-12-02 21:01:54,879 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:01:54,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:01:54,880 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-02 21:01:54,880 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:54,886 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:01:54,886 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-12-02 21:01:54,936 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 10 not checked. [2018-12-02 21:01:54,936 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:01:55,004 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 21:01:55,004 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 21:01:55,010 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:01:55,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:01:55,043 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:01:55,045 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:01:55,045 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:55,047 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:55,047 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:01:57,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:01:57,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:01:57,144 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:01:57,145 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:57,146 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:57,146 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-02 21:01:57,227 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:01:57,230 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:01:57,230 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:57,233 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:57,251 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:01:57,254 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:01:57,254 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:57,257 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:57,267 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:01:57,267 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-12-02 21:01:59,351 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_27 (_ BitVec 32)) (v_entry_point_~c11~0.base_BEFORE_CALL_40 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_40) v_entry_point_~c11~0.offset_BEFORE_CALL_27) v_entry_point_~c11~0.base_BEFORE_CALL_40))) is different from true [2018-12-02 21:01:59,355 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:01:59,355 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:01:59,362 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 21:01:59,362 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:14 [2018-12-02 21:02:07,425 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-02 21:02:07,625 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-12-02 21:02:07,627 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-02 21:02:07,628 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:07,639 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:07,665 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-12-02 21:02:07,667 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-02 21:02:07,667 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:07,678 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:07,690 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:07,690 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:60, output treesize:28 [2018-12-02 21:02:07,912 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-12-02 21:02:07,914 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-12-02 21:02:07,914 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:07,916 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:07,924 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 21:02:07,924 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:29 [2018-12-02 21:02:08,075 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 [2018-12-02 21:02:08,078 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-12-02 21:02:08,078 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:08,085 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-02 21:02:08,085 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:08,086 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:08,087 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:08,087 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:35, output treesize:7 [2018-12-02 21:02:08,119 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:02:08,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:02:08,120 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-02 21:02:08,120 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:08,126 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:02:08,126 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-12-02 21:02:08,129 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 10 not checked. [2018-12-02 21:02:08,129 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:02:08,211 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:02:08,212 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 37 [2018-12-02 21:02:08,212 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-12-02 21:02:08,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-12-02 21:02:08,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=1155, Unknown=8, NotChecked=210, Total=1482 [2018-12-02 21:02:08,212 INFO L87 Difference]: Start difference. First operand 97 states and 103 transitions. Second operand 38 states. [2018-12-02 21:02:15,113 WARN L180 SmtUtils]: Spent 756.00 ms on a formula simplification that was a NOOP. DAG size: 21 [2018-12-02 21:02:23,672 WARN L180 SmtUtils]: Spent 4.01 s on a formula simplification. DAG size of input: 19 DAG size of output: 12 [2018-12-02 21:02:29,173 WARN L180 SmtUtils]: Spent 3.40 s on a formula simplification that was a NOOP. DAG size: 28 [2018-12-02 21:02:38,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:02:38,958 INFO L93 Difference]: Finished difference Result 146 states and 165 transitions. [2018-12-02 21:02:38,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-02 21:02:38,958 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 43 [2018-12-02 21:02:38,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:02:38,959 INFO L225 Difference]: With dead ends: 146 [2018-12-02 21:02:38,959 INFO L226 Difference]: Without dead ends: 146 [2018-12-02 21:02:38,960 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 54 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 468 ImplicationChecksByTransitivity, 40.7s TimeCoverageRelationStatistics Valid=270, Invalid=2485, Unknown=13, NotChecked=312, Total=3080 [2018-12-02 21:02:38,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-02 21:02:38,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 128. [2018-12-02 21:02:38,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-12-02 21:02:38,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 148 transitions. [2018-12-02 21:02:38,963 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 148 transitions. Word has length 43 [2018-12-02 21:02:38,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:02:38,964 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 148 transitions. [2018-12-02 21:02:38,964 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-12-02 21:02:38,964 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 148 transitions. [2018-12-02 21:02:38,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-02 21:02:38,964 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:02:38,965 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:02:38,965 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:02:38,965 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:02:38,965 INFO L82 PathProgramCache]: Analyzing trace with hash -776766536, now seen corresponding path program 1 times [2018-12-02 21:02:38,965 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:02:38,965 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:02:38,992 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:02:39,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:02:39,126 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:02:39,129 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:02:39,129 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:39,134 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:39,134 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 21:02:39,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:02:39,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:02:39,164 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:02:39,164 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:39,169 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:39,169 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-02 21:02:39,199 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:02:39,202 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:02:39,202 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:39,205 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:39,221 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:02:39,223 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:02:39,224 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:39,226 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:39,235 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:39,236 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:22 [2018-12-02 21:02:41,268 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_43 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_43) (_ bv0 32)) v_entry_point_~c11~0.base_BEFORE_CALL_43))) is different from true [2018-12-02 21:02:43,296 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-02 21:02:43,299 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:02:43,299 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:43,314 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:02:43,314 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:43,322 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:02:43,323 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:24, output treesize:22 [2018-12-02 21:02:45,357 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 22 [2018-12-02 21:02:45,502 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-12-02 21:02:45,505 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-02 21:02:45,505 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:45,514 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:45,543 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-12-02 21:02:45,546 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-02 21:02:45,546 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:45,559 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:45,574 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:45,575 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:68, output treesize:65 [2018-12-02 21:02:45,872 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 68 [2018-12-02 21:02:45,874 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-12-02 21:02:45,874 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:45,886 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 40 [2018-12-02 21:02:45,886 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:02:45,895 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:02:45,911 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 33 [2018-12-02 21:02:45,913 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-02 21:02:45,913 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:45,920 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 13 [2018-12-02 21:02:45,920 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:45,924 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:45,928 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:45,928 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:90, output treesize:16 [2018-12-02 21:02:46,968 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-02 21:02:46,973 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:02:46,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:02:46,974 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 21:02:46,974 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:46,987 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 21:02:46,987 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:46,995 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:46,995 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-02 21:02:47,037 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 8 not checked. [2018-12-02 21:02:47,037 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:02:47,352 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 21:02:47,352 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 21:02:47,358 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:02:47,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:02:47,391 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:02:47,393 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:02:47,394 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:47,395 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:47,395 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:02:47,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:02:47,539 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:02:47,540 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:02:47,540 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:47,542 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:47,542 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-02 21:02:47,634 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:02:47,636 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:02:47,636 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:47,640 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:47,654 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:02:47,656 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:02:47,656 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:47,658 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:47,667 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:47,667 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-12-02 21:02:49,756 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_32 (_ BitVec 32)) (v_entry_point_~c11~0.base_BEFORE_CALL_46 (_ BitVec 32))) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_46 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_46) v_entry_point_~c11~0.offset_BEFORE_CALL_32)))) is different from true [2018-12-02 21:02:53,837 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-02 21:02:53,848 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:02:53,849 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:53,860 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:02:53,860 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:53,869 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 21:02:53,869 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:24, output treesize:22 [2018-12-02 21:02:57,960 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 23 [2018-12-02 21:02:58,213 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-12-02 21:02:58,216 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-02 21:02:58,216 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:58,225 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:58,249 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-12-02 21:02:58,252 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-02 21:02:58,252 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:58,260 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:58,272 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:58,273 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:65, output treesize:62 [2018-12-02 21:02:58,798 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 66 [2018-12-02 21:02:58,800 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-12-02 21:02:58,800 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:58,815 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-12-02 21:02:58,815 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:02:58,827 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:02:58,843 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 31 [2018-12-02 21:02:58,846 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 11 [2018-12-02 21:02:58,846 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:58,854 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-02 21:02:58,854 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:58,857 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:58,861 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:58,861 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:88, output treesize:14 [2018-12-02 21:02:58,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:02:58,908 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 21:02:58,909 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:58,924 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:02:58,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:02:58,925 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:02:58,925 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:02:58,934 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:02:58,934 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-02 21:02:58,972 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 8 not checked. [2018-12-02 21:02:58,972 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:02:59,157 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:02:59,157 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 40 [2018-12-02 21:02:59,157 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-12-02 21:02:59,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-12-02 21:02:59,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=1443, Unknown=7, NotChecked=234, Total=1806 [2018-12-02 21:02:59,158 INFO L87 Difference]: Start difference. First operand 128 states and 148 transitions. Second operand 41 states. [2018-12-02 21:03:05,336 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 24 [2018-12-02 21:03:11,839 WARN L180 SmtUtils]: Spent 4.02 s on a formula simplification. DAG size of input: 22 DAG size of output: 15 [2018-12-02 21:03:13,899 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 18 [2018-12-02 21:03:17,389 WARN L180 SmtUtils]: Spent 3.36 s on a formula simplification that was a NOOP. DAG size: 35 [2018-12-02 21:03:23,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:03:23,508 INFO L93 Difference]: Finished difference Result 150 states and 168 transitions. [2018-12-02 21:03:23,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-02 21:03:23,509 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 43 [2018-12-02 21:03:23,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:03:23,510 INFO L225 Difference]: With dead ends: 150 [2018-12-02 21:03:23,510 INFO L226 Difference]: Without dead ends: 150 [2018-12-02 21:03:23,510 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 49 SyntacticMatches, 3 SemanticMatches, 55 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 543 ImplicationChecksByTransitivity, 36.1s TimeCoverageRelationStatistics Valid=258, Invalid=2607, Unknown=9, NotChecked=318, Total=3192 [2018-12-02 21:03:23,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-02 21:03:23,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 116. [2018-12-02 21:03:23,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-12-02 21:03:23,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 125 transitions. [2018-12-02 21:03:23,514 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 125 transitions. Word has length 43 [2018-12-02 21:03:23,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:03:23,514 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 125 transitions. [2018-12-02 21:03:23,514 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-12-02 21:03:23,514 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 125 transitions. [2018-12-02 21:03:23,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-02 21:03:23,514 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:03:23,514 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:03:23,514 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:03:23,515 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:03:23,515 INFO L82 PathProgramCache]: Analyzing trace with hash -1185590762, now seen corresponding path program 1 times [2018-12-02 21:03:23,515 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:03:23,515 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:03:23,530 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:03:23,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:03:23,604 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:03:23,620 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 21:03:23,620 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 21:03:23,622 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:03:23,622 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 21:03:23,622 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 21:03:23,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 21:03:23,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:03:23,622 INFO L87 Difference]: Start difference. First operand 116 states and 125 transitions. Second operand 5 states. [2018-12-02 21:03:23,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:03:23,640 INFO L93 Difference]: Finished difference Result 99 states and 103 transitions. [2018-12-02 21:03:23,640 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 21:03:23,640 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2018-12-02 21:03:23,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:03:23,641 INFO L225 Difference]: With dead ends: 99 [2018-12-02 21:03:23,641 INFO L226 Difference]: Without dead ends: 95 [2018-12-02 21:03:23,641 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:03:23,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-12-02 21:03:23,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 93. [2018-12-02 21:03:23,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-02 21:03:23,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 97 transitions. [2018-12-02 21:03:23,643 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 97 transitions. Word has length 43 [2018-12-02 21:03:23,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:03:23,643 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 97 transitions. [2018-12-02 21:03:23,643 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 21:03:23,643 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 97 transitions. [2018-12-02 21:03:23,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 21:03:23,643 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:03:23,643 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:03:23,643 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:03:23,644 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:03:23,644 INFO L82 PathProgramCache]: Analyzing trace with hash -1785629904, now seen corresponding path program 1 times [2018-12-02 21:03:23,644 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:03:23,644 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 33 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:03:23,658 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:03:23,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:03:23,691 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:03:23,703 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 21:03:23,704 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 21:03:23,705 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:03:23,705 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 21:03:23,705 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 21:03:23,705 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 21:03:23,705 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:03:23,705 INFO L87 Difference]: Start difference. First operand 93 states and 97 transitions. Second operand 5 states. [2018-12-02 21:03:23,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:03:23,726 INFO L93 Difference]: Finished difference Result 102 states and 107 transitions. [2018-12-02 21:03:23,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 21:03:23,727 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-12-02 21:03:23,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:03:23,728 INFO L225 Difference]: With dead ends: 102 [2018-12-02 21:03:23,728 INFO L226 Difference]: Without dead ends: 102 [2018-12-02 21:03:23,728 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:03:23,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-12-02 21:03:23,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 97. [2018-12-02 21:03:23,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-02 21:03:23,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 101 transitions. [2018-12-02 21:03:23,729 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 101 transitions. Word has length 47 [2018-12-02 21:03:23,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:03:23,730 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 101 transitions. [2018-12-02 21:03:23,730 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 21:03:23,730 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 101 transitions. [2018-12-02 21:03:23,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 21:03:23,730 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:03:23,730 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:03:23,731 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:03:23,731 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:03:23,731 INFO L82 PathProgramCache]: Analyzing trace with hash -1982143409, now seen corresponding path program 1 times [2018-12-02 21:03:23,731 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:03:23,731 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:03:23,745 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:03:23,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:03:23,825 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:03:23,827 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-02 21:03:23,827 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:23,828 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:23,828 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-12-02 21:03:23,865 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-02 21:03:23,865 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 21:03:23,867 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:03:23,867 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 21:03:23,867 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-02 21:03:23,867 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-02 21:03:23,867 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-02 21:03:23,868 INFO L87 Difference]: Start difference. First operand 97 states and 101 transitions. Second operand 8 states. [2018-12-02 21:03:24,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:03:24,292 INFO L93 Difference]: Finished difference Result 113 states and 117 transitions. [2018-12-02 21:03:24,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 21:03:24,292 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-12-02 21:03:24,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:03:24,293 INFO L225 Difference]: With dead ends: 113 [2018-12-02 21:03:24,293 INFO L226 Difference]: Without dead ends: 113 [2018-12-02 21:03:24,293 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2018-12-02 21:03:24,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-12-02 21:03:24,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 107. [2018-12-02 21:03:24,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-12-02 21:03:24,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 112 transitions. [2018-12-02 21:03:24,296 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 112 transitions. Word has length 47 [2018-12-02 21:03:24,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:03:24,296 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 112 transitions. [2018-12-02 21:03:24,297 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-02 21:03:24,297 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 112 transitions. [2018-12-02 21:03:24,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 21:03:24,297 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:03:24,297 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:03:24,298 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:03:24,298 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:03:24,298 INFO L82 PathProgramCache]: Analyzing trace with hash -1982143408, now seen corresponding path program 1 times [2018-12-02 21:03:24,298 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:03:24,298 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:03:24,320 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:03:24,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:03:24,452 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:03:24,458 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:03:24,458 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:24,466 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:03:24,466 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:24,471 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:24,472 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-02 21:03:25,432 WARN L180 SmtUtils]: Spent 905.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-12-02 21:03:25,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:25,438 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 21:03:25,439 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:25,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:25,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:25,453 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:03:25,453 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:25,462 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:25,462 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:15 [2018-12-02 21:03:26,197 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-02 21:03:26,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:26,204 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 21:03:26,205 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:26,219 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:26,220 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:26,220 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:03:26,221 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:26,229 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:26,230 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-02 21:03:26,431 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 6 not checked. [2018-12-02 21:03:26,431 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:03:27,761 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 21:03:27,762 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 21:03:27,768 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:03:27,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:03:27,802 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:03:27,806 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:03:27,806 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:27,815 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:03:27,815 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:27,820 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:27,820 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-02 21:03:28,980 WARN L180 SmtUtils]: Spent 1.08 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-02 21:03:28,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:28,989 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 21:03:28,989 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:29,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:29,006 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:29,006 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-02 21:03:29,006 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:29,019 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:29,019 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:31, output treesize:23 [2018-12-02 21:03:29,153 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:29,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:29,157 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:29,157 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 13 [2018-12-02 21:03:29,158 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:29,181 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 21:03:29,181 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:29,194 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:29,195 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:38, output treesize:9 [2018-12-02 21:03:29,234 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 6 not checked. [2018-12-02 21:03:29,234 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:03:30,784 WARN L180 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 41 [2018-12-02 21:03:30,799 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:03:30,800 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 18] total 20 [2018-12-02 21:03:30,800 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-12-02 21:03:30,800 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-12-02 21:03:30,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=1015, Unknown=1, NotChecked=64, Total=1190 [2018-12-02 21:03:30,800 INFO L87 Difference]: Start difference. First operand 107 states and 112 transitions. Second operand 21 states. [2018-12-02 21:03:33,338 WARN L180 SmtUtils]: Spent 2.34 s on a formula simplification. DAG size of input: 33 DAG size of output: 23 [2018-12-02 21:03:51,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:03:51,995 INFO L93 Difference]: Finished difference Result 130 states and 136 transitions. [2018-12-02 21:03:51,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-02 21:03:51,996 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 47 [2018-12-02 21:03:51,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:03:51,996 INFO L225 Difference]: With dead ends: 130 [2018-12-02 21:03:51,996 INFO L226 Difference]: Without dead ends: 130 [2018-12-02 21:03:51,997 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 99 SyntacticMatches, 4 SemanticMatches, 41 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 258 ImplicationChecksByTransitivity, 8.7s TimeCoverageRelationStatistics Valid=177, Invalid=1548, Unknown=1, NotChecked=80, Total=1806 [2018-12-02 21:03:51,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-12-02 21:03:51,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 107. [2018-12-02 21:03:51,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-12-02 21:03:51,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 111 transitions. [2018-12-02 21:03:51,999 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 111 transitions. Word has length 47 [2018-12-02 21:03:51,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:03:51,999 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 111 transitions. [2018-12-02 21:03:51,999 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-12-02 21:03:51,999 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 111 transitions. [2018-12-02 21:03:51,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-02 21:03:51,999 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:03:51,999 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:03:52,000 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:03:52,000 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:03:52,000 INFO L82 PathProgramCache]: Analyzing trace with hash 2065953268, now seen corresponding path program 1 times [2018-12-02 21:03:52,000 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:03:52,000 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:03:52,014 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:03:52,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:03:52,146 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:03:52,148 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-02 21:03:52,148 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:52,149 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:52,149 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-12-02 21:03:52,494 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|)) is different from true [2018-12-02 21:03:52,498 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-12-02 21:03:52,498 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:52,502 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:03:52,502 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:14, output treesize:11 [2018-12-02 21:03:52,526 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-02 21:03:52,526 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 21:03:52,529 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:03:52,529 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-02 21:03:52,529 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 21:03:52,529 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 21:03:52,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=44, Unknown=1, NotChecked=12, Total=72 [2018-12-02 21:03:52,529 INFO L87 Difference]: Start difference. First operand 107 states and 111 transitions. Second operand 9 states. [2018-12-02 21:03:52,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:03:52,900 INFO L93 Difference]: Finished difference Result 111 states and 115 transitions. [2018-12-02 21:03:52,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 21:03:52,900 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 48 [2018-12-02 21:03:52,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:03:52,901 INFO L225 Difference]: With dead ends: 111 [2018-12-02 21:03:52,901 INFO L226 Difference]: Without dead ends: 111 [2018-12-02 21:03:52,901 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=39, Invalid=120, Unknown=1, NotChecked=22, Total=182 [2018-12-02 21:03:52,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-12-02 21:03:52,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 106. [2018-12-02 21:03:52,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-02 21:03:52,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 110 transitions. [2018-12-02 21:03:52,903 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 110 transitions. Word has length 48 [2018-12-02 21:03:52,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:03:52,904 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 110 transitions. [2018-12-02 21:03:52,904 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 21:03:52,904 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 110 transitions. [2018-12-02 21:03:52,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-02 21:03:52,904 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:03:52,904 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:03:52,905 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:03:52,905 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:03:52,905 INFO L82 PathProgramCache]: Analyzing trace with hash 2065953269, now seen corresponding path program 1 times [2018-12-02 21:03:52,905 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:03:52,905 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 38 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:03:52,919 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:03:53,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:03:53,081 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:03:53,087 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:03:53,087 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:53,096 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:03:53,096 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:53,102 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:53,102 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-02 21:03:54,052 WARN L180 SmtUtils]: Spent 901.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-12-02 21:03:54,057 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:54,059 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 21:03:54,059 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:54,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:54,073 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:54,073 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 21:03:54,073 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:54,081 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:54,081 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:27, output treesize:15 [2018-12-02 21:03:55,069 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-02 21:03:55,074 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:55,075 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:55,076 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:03:55,076 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:55,091 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 21:03:55,091 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:55,100 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:55,100 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-12-02 21:03:55,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:55,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:55,166 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:03:55,166 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:55,184 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 21:03:55,184 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:55,195 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:55,195 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-12-02 21:03:55,336 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 8 not checked. [2018-12-02 21:03:55,336 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:03:55,979 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 21:03:55,979 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 21:03:55,985 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:03:56,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:03:56,026 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:03:56,029 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:03:56,029 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:56,038 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:03:56,039 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:56,045 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:56,045 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-02 21:03:56,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:56,052 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 21:03:56,053 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:56,066 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:56,067 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:56,067 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:03:56,068 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:56,076 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:56,076 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-02 21:03:56,988 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-12-02 21:03:56,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:56,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:56,995 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-02 21:03:56,996 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:57,018 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-02 21:03:57,018 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:57,029 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:03:57,029 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:35, output treesize:27 [2018-12-02 21:03:57,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:57,289 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-02 21:03:57,289 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:57,311 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:57,312 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:57,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:03:57,313 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-12-02 21:03:57,314 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:03:57,328 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:03:57,328 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:36, output treesize:9 [2018-12-02 21:03:57,349 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 10 not checked. [2018-12-02 21:03:57,349 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:03:57,548 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:03:57,548 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 21 [2018-12-02 21:03:57,549 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-02 21:03:57,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-02 21:03:57,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=586, Unknown=2, NotChecked=98, Total=756 [2018-12-02 21:03:57,549 INFO L87 Difference]: Start difference. First operand 106 states and 110 transitions. Second operand 22 states. [2018-12-02 21:04:01,376 WARN L180 SmtUtils]: Spent 3.64 s on a formula simplification. DAG size of input: 35 DAG size of output: 30 [2018-12-02 21:04:04,235 WARN L180 SmtUtils]: Spent 321.00 ms on a formula simplification that was a NOOP. DAG size: 25 [2018-12-02 21:04:04,947 WARN L180 SmtUtils]: Spent 668.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 35 [2018-12-02 21:04:18,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:04:18,625 INFO L93 Difference]: Finished difference Result 114 states and 118 transitions. [2018-12-02 21:04:18,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-02 21:04:18,626 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 48 [2018-12-02 21:04:18,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:04:18,626 INFO L225 Difference]: With dead ends: 114 [2018-12-02 21:04:18,626 INFO L226 Difference]: Without dead ends: 114 [2018-12-02 21:04:18,627 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 82 SyntacticMatches, 4 SemanticMatches, 36 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 172 ImplicationChecksByTransitivity, 9.1s TimeCoverageRelationStatistics Valid=137, Invalid=1129, Unknown=2, NotChecked=138, Total=1406 [2018-12-02 21:04:18,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-02 21:04:18,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 105. [2018-12-02 21:04:18,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-12-02 21:04:18,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 109 transitions. [2018-12-02 21:04:18,628 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 109 transitions. Word has length 48 [2018-12-02 21:04:18,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:04:18,629 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 109 transitions. [2018-12-02 21:04:18,629 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-02 21:04:18,629 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 109 transitions. [2018-12-02 21:04:18,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-02 21:04:18,629 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:04:18,629 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:04:18,629 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:04:18,629 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:04:18,629 INFO L82 PathProgramCache]: Analyzing trace with hash 1976737196, now seen corresponding path program 1 times [2018-12-02 21:04:18,630 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:04:18,630 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 40 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:04:18,643 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:04:18,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:04:18,739 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:04:18,741 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-02 21:04:18,742 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:18,742 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:18,742 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-12-02 21:04:18,852 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-02 21:04:18,852 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 21:04:18,854 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:04:18,854 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-02 21:04:18,854 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 21:04:18,855 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 21:04:18,855 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-12-02 21:04:18,855 INFO L87 Difference]: Start difference. First operand 105 states and 109 transitions. Second operand 13 states. [2018-12-02 21:04:19,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:04:19,729 INFO L93 Difference]: Finished difference Result 141 states and 147 transitions. [2018-12-02 21:04:19,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-02 21:04:19,730 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 62 [2018-12-02 21:04:19,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:04:19,730 INFO L225 Difference]: With dead ends: 141 [2018-12-02 21:04:19,730 INFO L226 Difference]: Without dead ends: 141 [2018-12-02 21:04:19,730 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 49 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=101, Invalid=405, Unknown=0, NotChecked=0, Total=506 [2018-12-02 21:04:19,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-02 21:04:19,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 128. [2018-12-02 21:04:19,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-12-02 21:04:19,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 135 transitions. [2018-12-02 21:04:19,732 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 135 transitions. Word has length 62 [2018-12-02 21:04:19,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:04:19,733 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 135 transitions. [2018-12-02 21:04:19,733 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 21:04:19,733 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 135 transitions. [2018-12-02 21:04:19,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-02 21:04:19,733 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:04:19,733 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:04:19,733 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:04:19,734 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:04:19,734 INFO L82 PathProgramCache]: Analyzing trace with hash 1976737197, now seen corresponding path program 1 times [2018-12-02 21:04:19,734 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:04:19,734 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 41 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:04:19,752 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:04:19,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:04:19,866 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:04:20,275 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 21:04:20,275 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:04:21,210 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2018-12-02 21:04:21,210 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:04:21,236 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-12-02 21:04:21,236 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:04:21,256 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-12-02 21:04:21,256 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:27 [2018-12-02 21:04:22,955 WARN L180 SmtUtils]: Spent 269.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 44 [2018-12-02 21:04:23,217 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 21:04:23,219 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:04:23,219 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 33 [2018-12-02 21:04:23,220 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-12-02 21:04:23,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-12-02 21:04:23,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=1031, Unknown=0, NotChecked=0, Total=1122 [2018-12-02 21:04:23,220 INFO L87 Difference]: Start difference. First operand 128 states and 135 transitions. Second operand 34 states. [2018-12-02 21:04:26,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:04:26,730 INFO L93 Difference]: Finished difference Result 127 states and 133 transitions. [2018-12-02 21:04:26,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-02 21:04:26,731 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 62 [2018-12-02 21:04:26,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:04:26,731 INFO L225 Difference]: With dead ends: 127 [2018-12-02 21:04:26,731 INFO L226 Difference]: Without dead ends: 127 [2018-12-02 21:04:26,732 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 258 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=178, Invalid=1892, Unknown=0, NotChecked=0, Total=2070 [2018-12-02 21:04:26,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-12-02 21:04:26,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-12-02 21:04:26,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-12-02 21:04:26,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 133 transitions. [2018-12-02 21:04:26,734 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 133 transitions. Word has length 62 [2018-12-02 21:04:26,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:04:26,735 INFO L480 AbstractCegarLoop]: Abstraction has 127 states and 133 transitions. [2018-12-02 21:04:26,735 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-12-02 21:04:26,735 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 133 transitions. [2018-12-02 21:04:26,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-12-02 21:04:26,735 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:04:26,735 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:04:26,735 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:04:26,735 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:04:26,736 INFO L82 PathProgramCache]: Analyzing trace with hash 998588711, now seen corresponding path program 1 times [2018-12-02 21:04:26,736 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:04:26,736 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 42 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:04:26,755 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:04:26,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:04:26,856 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:04:26,859 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-02 21:04:26,859 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:26,859 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:26,859 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-12-02 21:04:26,976 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-02 21:04:26,976 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 21:04:26,978 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:04:26,978 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-12-02 21:04:26,978 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-02 21:04:26,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-02 21:04:26,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-12-02 21:04:26,978 INFO L87 Difference]: Start difference. First operand 127 states and 133 transitions. Second operand 15 states. [2018-12-02 21:04:27,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:04:27,583 INFO L93 Difference]: Finished difference Result 130 states and 136 transitions. [2018-12-02 21:04:27,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-02 21:04:27,583 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 63 [2018-12-02 21:04:27,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:04:27,584 INFO L225 Difference]: With dead ends: 130 [2018-12-02 21:04:27,584 INFO L226 Difference]: Without dead ends: 130 [2018-12-02 21:04:27,584 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=369, Unknown=0, NotChecked=0, Total=420 [2018-12-02 21:04:27,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-12-02 21:04:27,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 103. [2018-12-02 21:04:27,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-02 21:04:27,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 107 transitions. [2018-12-02 21:04:27,586 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 107 transitions. Word has length 63 [2018-12-02 21:04:27,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:04:27,587 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 107 transitions. [2018-12-02 21:04:27,587 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-02 21:04:27,587 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 107 transitions. [2018-12-02 21:04:27,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 21:04:27,587 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:04:27,587 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:04:27,587 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:04:27,588 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:04:27,588 INFO L82 PathProgramCache]: Analyzing trace with hash -680851820, now seen corresponding path program 1 times [2018-12-02 21:04:27,588 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:04:27,588 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:04:27,604 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:04:27,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:04:27,732 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:04:27,800 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-02 21:04:27,802 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-02 21:04:27,802 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:27,806 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:27,809 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:27,810 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-02 21:04:28,361 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-12-02 21:04:28,363 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-12-02 21:04:28,363 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:28,373 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-02 21:04:28,374 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:28,377 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:28,378 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:28,378 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:22, output treesize:3 [2018-12-02 21:04:28,446 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 21:04:28,446 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:04:29,775 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-02 21:04:29,777 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-02 21:04:29,777 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:29,779 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:29,783 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-12-02 21:04:29,783 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:7 [2018-12-02 21:04:29,974 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-02 21:04:29,976 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-02 21:04:29,977 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:29,979 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:29,987 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-02 21:04:29,987 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-02 21:04:30,191 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-02 21:04:30,193 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-02 21:04:30,193 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:30,195 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:30,203 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-02 21:04:30,203 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-02 21:04:30,310 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-02 21:04:30,312 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 21:04:30,312 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [22] total 35 [2018-12-02 21:04:30,312 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-12-02 21:04:30,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-12-02 21:04:30,313 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=1168, Unknown=0, NotChecked=0, Total=1260 [2018-12-02 21:04:30,313 INFO L87 Difference]: Start difference. First operand 103 states and 107 transitions. Second operand 36 states. [2018-12-02 21:04:32,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:04:32,680 INFO L93 Difference]: Finished difference Result 102 states and 106 transitions. [2018-12-02 21:04:32,681 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-02 21:04:32,681 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 72 [2018-12-02 21:04:32,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:04:32,681 INFO L225 Difference]: With dead ends: 102 [2018-12-02 21:04:32,681 INFO L226 Difference]: Without dead ends: 102 [2018-12-02 21:04:32,682 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 319 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=174, Invalid=2178, Unknown=0, NotChecked=0, Total=2352 [2018-12-02 21:04:32,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-12-02 21:04:32,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 102. [2018-12-02 21:04:32,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-02 21:04:32,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 106 transitions. [2018-12-02 21:04:32,683 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 106 transitions. Word has length 72 [2018-12-02 21:04:32,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:04:32,683 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 106 transitions. [2018-12-02 21:04:32,683 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-12-02 21:04:32,684 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 106 transitions. [2018-12-02 21:04:32,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 21:04:32,684 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:04:32,684 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:04:32,684 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:04:32,684 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:04:32,684 INFO L82 PathProgramCache]: Analyzing trace with hash -1429090481, now seen corresponding path program 1 times [2018-12-02 21:04:32,684 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:04:32,685 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 44 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:04:32,699 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:04:32,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:04:32,807 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:04:32,866 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-02 21:04:32,868 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-02 21:04:32,868 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:32,871 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:32,873 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:32,874 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-02 21:04:33,438 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-12-02 21:04:33,439 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-02 21:04:33,439 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:33,444 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:33,444 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:33,445 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:22, output treesize:3 [2018-12-02 21:04:33,535 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 21:04:33,535 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:04:34,973 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-02 21:04:34,975 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-02 21:04:34,975 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:34,977 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:34,981 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-12-02 21:04:34,981 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:7 [2018-12-02 21:04:35,166 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-02 21:04:35,169 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-02 21:04:35,169 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:35,171 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:35,179 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-02 21:04:35,179 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-02 21:04:35,363 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-02 21:04:35,366 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-02 21:04:35,366 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:35,368 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:35,376 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-02 21:04:35,377 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-02 21:04:35,495 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-02 21:04:35,498 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 21:04:35,498 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [24] total 37 [2018-12-02 21:04:35,498 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-12-02 21:04:35,498 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-12-02 21:04:35,498 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1238, Unknown=0, NotChecked=0, Total=1332 [2018-12-02 21:04:35,498 INFO L87 Difference]: Start difference. First operand 102 states and 106 transitions. Second operand 37 states. [2018-12-02 21:04:37,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:04:37,623 INFO L93 Difference]: Finished difference Result 100 states and 103 transitions. [2018-12-02 21:04:37,623 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-02 21:04:37,623 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 72 [2018-12-02 21:04:37,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:04:37,624 INFO L225 Difference]: With dead ends: 100 [2018-12-02 21:04:37,624 INFO L226 Difference]: Without dead ends: 99 [2018-12-02 21:04:37,624 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 301 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=174, Invalid=2082, Unknown=0, NotChecked=0, Total=2256 [2018-12-02 21:04:37,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-12-02 21:04:37,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-12-02 21:04:37,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-02 21:04:37,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 102 transitions. [2018-12-02 21:04:37,626 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 102 transitions. Word has length 72 [2018-12-02 21:04:37,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:04:37,626 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 102 transitions. [2018-12-02 21:04:37,626 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-12-02 21:04:37,626 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 102 transitions. [2018-12-02 21:04:37,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-02 21:04:37,627 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:04:37,627 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:04:37,627 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:04:37,627 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:04:37,627 INFO L82 PathProgramCache]: Analyzing trace with hash -1351942458, now seen corresponding path program 1 times [2018-12-02 21:04:37,627 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:04:37,627 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:04:37,642 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:04:37,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:04:37,682 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:04:37,693 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 21:04:37,693 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:04:37,724 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 21:04:37,725 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:04:37,726 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-12-02 21:04:37,726 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 21:04:37,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 21:04:37,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:04:37,726 INFO L87 Difference]: Start difference. First operand 99 states and 102 transitions. Second operand 5 states. [2018-12-02 21:04:37,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:04:37,748 INFO L93 Difference]: Finished difference Result 98 states and 101 transitions. [2018-12-02 21:04:37,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 21:04:37,749 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2018-12-02 21:04:37,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:04:37,749 INFO L225 Difference]: With dead ends: 98 [2018-12-02 21:04:37,749 INFO L226 Difference]: Without dead ends: 98 [2018-12-02 21:04:37,749 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:04:37,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-12-02 21:04:37,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-12-02 21:04:37,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-12-02 21:04:37,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 101 transitions. [2018-12-02 21:04:37,751 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 101 transitions. Word has length 73 [2018-12-02 21:04:37,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:04:37,751 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 101 transitions. [2018-12-02 21:04:37,752 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 21:04:37,752 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 101 transitions. [2018-12-02 21:04:37,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-02 21:04:37,752 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:04:37,752 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:04:37,752 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:04:37,753 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:04:37,753 INFO L82 PathProgramCache]: Analyzing trace with hash 1039457188, now seen corresponding path program 1 times [2018-12-02 21:04:37,753 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:04:37,753 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 46 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:04:37,778 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:04:37,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:04:37,909 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:04:37,912 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:04:37,912 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:37,913 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:37,914 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:04:37,935 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 21:04:37,935 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:04:37,962 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 21:04:37,962 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 21:04:37,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:04:37,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:04:37,999 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:04:38,001 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:04:38,001 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:38,002 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:38,003 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:04:38,007 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 21:04:38,007 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:04:38,041 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:04:38,041 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-12-02 21:04:38,041 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 21:04:38,041 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 21:04:38,041 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=26, Unknown=4, NotChecked=0, Total=42 [2018-12-02 21:04:38,041 INFO L87 Difference]: Start difference. First operand 98 states and 101 transitions. Second operand 6 states. [2018-12-02 21:04:38,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:04:38,316 INFO L93 Difference]: Finished difference Result 105 states and 109 transitions. [2018-12-02 21:04:38,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 21:04:38,316 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2018-12-02 21:04:38,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:04:38,316 INFO L225 Difference]: With dead ends: 105 [2018-12-02 21:04:38,316 INFO L226 Difference]: Without dead ends: 105 [2018-12-02 21:04:38,317 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 156 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=26, Unknown=4, NotChecked=0, Total=42 [2018-12-02 21:04:38,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-12-02 21:04:38,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2018-12-02 21:04:38,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-12-02 21:04:38,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 109 transitions. [2018-12-02 21:04:38,318 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 109 transitions. Word has length 74 [2018-12-02 21:04:38,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:04:38,318 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 109 transitions. [2018-12-02 21:04:38,318 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 21:04:38,318 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 109 transitions. [2018-12-02 21:04:38,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-12-02 21:04:38,319 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:04:38,319 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:04:38,319 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:04:38,319 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:04:38,319 INFO L82 PathProgramCache]: Analyzing trace with hash 247406239, now seen corresponding path program 1 times [2018-12-02 21:04:38,319 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:04:38,319 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 48 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:04:38,339 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:04:38,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:04:38,537 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:04:38,539 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:04:38,539 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:38,542 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:38,542 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 21:04:38,575 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:04:38,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:04:38,576 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:04:38,576 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:38,580 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:38,580 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-02 21:04:38,609 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-02 21:04:38,609 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:38,638 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:04:38,641 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:04:38,641 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:38,644 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:38,660 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 21:04:38,662 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 21:04:38,662 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:38,665 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:38,675 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:38,675 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:35, output treesize:22 [2018-12-02 21:04:40,704 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_71 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_71) (_ bv0 32)) v_entry_point_~c11~0.base_BEFORE_CALL_71))) is different from true [2018-12-02 21:04:40,751 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-12-02 21:04:40,753 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-02 21:04:40,753 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:40,766 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:40,791 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 40 [2018-12-02 21:04:40,794 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-02 21:04:40,794 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:40,802 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:40,814 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:40,814 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:58, output treesize:27 [2018-12-02 21:04:41,100 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 17 [2018-12-02 21:04:41,102 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-12-02 21:04:41,102 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:04:41,104 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:04:41,118 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 23 [2018-12-02 21:04:41,120 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-02 21:04:41,120 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:04:41,131 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-12-02 21:04:41,131 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:41,136 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-02 21:04:41,136 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:04:41,139 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-12-02 21:04:41,143 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-12-02 21:04:41,143 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:19, output treesize:15 [2018-12-02 21:04:41,225 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-12-02 21:04:41,227 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 5 [2018-12-02 21:04:41,227 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:41,233 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-02 21:04:41,233 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:41,234 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:41,236 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:41,236 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:41, output treesize:5 [2018-12-02 21:04:41,272 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 8 refuted. 4 times theorem prover too weak. 2 trivial. 6 not checked. [2018-12-02 21:04:41,273 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:04:41,323 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 21:04:41,323 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 21:04:41,330 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:04:41,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:04:41,367 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:04:41,369 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:04:41,369 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:41,371 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:04:41,371 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:04:43,449 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-12-02 21:04:43,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:04:43,454 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-12-02 21:04:43,455 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:43,456 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:04:43,456 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-12-02 21:04:46,504 WARN L180 SmtUtils]: Spent 578.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 11 [2018-12-02 21:04:46,508 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:04:46,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:04:46,509 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-02 21:04:46,509 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:04:46,516 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:04:46,516 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-12-02 21:04:46,568 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 2 not checked. [2018-12-02 21:04:46,568 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:04:46,629 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:04:46,629 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 9] total 25 [2018-12-02 21:04:46,629 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-02 21:04:46,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-02 21:04:46,630 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=538, Unknown=4, NotChecked=94, Total=702 [2018-12-02 21:04:46,630 INFO L87 Difference]: Start difference. First operand 105 states and 109 transitions. Second operand 26 states. [2018-12-02 21:04:53,210 WARN L180 SmtUtils]: Spent 657.00 ms on a formula simplification that was a NOOP. DAG size: 27 [2018-12-02 21:05:01,181 WARN L180 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 24 [2018-12-02 21:05:07,279 WARN L180 SmtUtils]: Spent 4.02 s on a formula simplification that was a NOOP. DAG size: 33 [2018-12-02 21:05:49,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:05:49,260 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2018-12-02 21:05:49,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-12-02 21:05:49,260 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 75 [2018-12-02 21:05:49,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:05:49,261 INFO L225 Difference]: With dead ends: 106 [2018-12-02 21:05:49,261 INFO L226 Difference]: Without dead ends: 106 [2018-12-02 21:05:49,261 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 137 SyntacticMatches, 4 SemanticMatches, 50 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 24.6s TimeCoverageRelationStatistics Valid=298, Invalid=2147, Unknown=13, NotChecked=194, Total=2652 [2018-12-02 21:05:49,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-02 21:05:49,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 97. [2018-12-02 21:05:49,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-02 21:05:49,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 100 transitions. [2018-12-02 21:05:49,263 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 100 transitions. Word has length 75 [2018-12-02 21:05:49,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:05:49,263 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 100 transitions. [2018-12-02 21:05:49,263 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-02 21:05:49,263 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 100 transitions. [2018-12-02 21:05:49,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-02 21:05:49,263 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:05:49,263 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:05:49,263 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:05:49,264 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:05:49,264 INFO L82 PathProgramCache]: Analyzing trace with hash -1809008570, now seen corresponding path program 1 times [2018-12-02 21:05:49,264 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:05:49,264 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 50 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:05:49,279 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:05:49,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:05:49,457 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:05:49,459 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:05:49,459 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:49,461 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:05:49,461 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:05:49,487 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:49,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:49,488 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:05:49,488 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:49,489 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:05:49,489 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-02 21:05:49,522 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:49,522 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-02 21:05:49,523 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:49,528 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:05:49,528 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:12 [2018-12-02 21:05:49,546 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-02 21:05:49,546 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:05:49,583 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 21:05:49,583 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 21:05:49,590 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:05:49,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:05:49,623 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:05:49,625 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:05:49,626 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:49,627 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:05:49,627 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:05:49,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:49,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:49,633 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:05:49,633 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:49,635 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:05:49,635 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-02 21:05:49,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:49,642 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-02 21:05:49,642 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:49,650 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:05:49,650 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:12 [2018-12-02 21:05:49,653 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-02 21:05:49,653 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:05:49,710 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:05:49,711 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2018-12-02 21:05:49,711 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 21:05:49,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 21:05:49,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=101, Unknown=6, NotChecked=0, Total=132 [2018-12-02 21:05:49,711 INFO L87 Difference]: Start difference. First operand 97 states and 100 transitions. Second operand 11 states. [2018-12-02 21:05:54,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:05:54,172 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2018-12-02 21:05:54,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 21:05:54,172 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 76 [2018-12-02 21:05:54,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:05:54,173 INFO L225 Difference]: With dead ends: 106 [2018-12-02 21:05:54,173 INFO L226 Difference]: Without dead ends: 106 [2018-12-02 21:05:54,173 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 156 SyntacticMatches, 4 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=140, Unknown=7, NotChecked=0, Total=182 [2018-12-02 21:05:54,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-02 21:05:54,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-12-02 21:05:54,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-02 21:05:54,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 110 transitions. [2018-12-02 21:05:54,174 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 110 transitions. Word has length 76 [2018-12-02 21:05:54,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:05:54,174 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 110 transitions. [2018-12-02 21:05:54,175 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 21:05:54,175 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 110 transitions. [2018-12-02 21:05:54,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-02 21:05:54,175 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:05:54,175 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:05:54,175 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:05:54,175 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:05:54,175 INFO L82 PathProgramCache]: Analyzing trace with hash 1534208129, now seen corresponding path program 1 times [2018-12-02 21:05:54,175 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:05:54,176 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 52 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:05:54,196 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:05:54,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:05:54,405 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:05:54,408 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:05:54,408 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:54,410 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:05:54,410 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:05:54,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:54,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:54,452 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:05:54,452 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:54,453 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:05:54,453 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-02 21:05:55,109 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-12-02 21:05:55,114 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:55,114 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-12-02 21:05:55,114 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:55,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:05:55,116 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-12-02 21:05:56,621 WARN L180 SmtUtils]: Spent 1.48 s on a formula simplification. DAG size of input: 16 DAG size of output: 11 [2018-12-02 21:05:56,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:56,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:56,627 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-02 21:05:56,627 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:56,634 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:05:56,634 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:23, output treesize:20 [2018-12-02 21:05:56,663 INFO L683 Elim1Store]: detected equality via solver [2018-12-02 21:05:56,669 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 34 [2018-12-02 21:05:56,670 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-12-02 21:05:56,693 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-12-02 21:05:56,693 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:26, output treesize:38 [2018-12-02 21:05:58,737 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 4 not checked. [2018-12-02 21:05:58,737 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:05:58,781 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 21:05:58,781 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 21:05:58,787 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:05:58,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:05:58,829 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:05:58,831 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:05:58,831 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:58,833 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:05:58,833 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:05:58,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:58,837 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:58,837 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 21:05:58,837 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:58,839 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:05:58,839 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-02 21:05:58,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:58,844 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-12-02 21:05:58,844 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:58,846 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:05:58,847 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-12-02 21:05:58,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:58,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:05:58,870 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-02 21:05:58,870 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:05:58,878 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:05:58,878 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:23, output treesize:20 [2018-12-02 21:05:58,883 INFO L683 Elim1Store]: detected equality via solver [2018-12-02 21:05:58,892 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 34 [2018-12-02 21:05:58,892 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-12-02 21:05:58,916 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-12-02 21:05:58,916 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:26, output treesize:38 [2018-12-02 21:06:00,944 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 4 not checked. [2018-12-02 21:06:00,944 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:06:00,994 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:06:00,995 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 14 [2018-12-02 21:06:00,995 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-02 21:06:00,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-02 21:06:00,995 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=4, NotChecked=26, Total=240 [2018-12-02 21:06:00,995 INFO L87 Difference]: Start difference. First operand 106 states and 110 transitions. Second operand 15 states. [2018-12-02 21:06:04,634 WARN L180 SmtUtils]: Spent 1.33 s on a formula simplification. DAG size of input: 25 DAG size of output: 18 [2018-12-02 21:06:23,521 WARN L854 $PredicateComparison]: unable to prove that (and (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) (exists ((v_prenex_50 (_ BitVec 32))) (and (= (store |c_old(#valid)| v_prenex_50 (_ bv1 1)) |c_#valid|) (= (select |c_old(#valid)| v_prenex_50) (_ bv0 1))))) is different from true [2018-12-02 21:06:46,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:06:46,007 INFO L93 Difference]: Finished difference Result 105 states and 109 transitions. [2018-12-02 21:06:46,007 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-02 21:06:46,007 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 77 [2018-12-02 21:06:46,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:06:46,008 INFO L225 Difference]: With dead ends: 105 [2018-12-02 21:06:46,008 INFO L226 Difference]: Without dead ends: 105 [2018-12-02 21:06:46,008 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 178 GetRequests, 153 SyntacticMatches, 6 SemanticMatches, 19 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 10.4s TimeCoverageRelationStatistics Valid=70, Invalid=275, Unknown=5, NotChecked=70, Total=420 [2018-12-02 21:06:46,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-12-02 21:06:46,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 96. [2018-12-02 21:06:46,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-12-02 21:06:46,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 99 transitions. [2018-12-02 21:06:46,011 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 99 transitions. Word has length 77 [2018-12-02 21:06:46,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:06:46,011 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 99 transitions. [2018-12-02 21:06:46,011 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-02 21:06:46,011 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 99 transitions. [2018-12-02 21:06:46,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-02 21:06:46,012 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:06:46,012 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:06:46,012 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:06:46,012 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:06:46,012 INFO L82 PathProgramCache]: Analyzing trace with hash 1004533000, now seen corresponding path program 1 times [2018-12-02 21:06:46,013 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:06:46,013 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 54 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:06:46,027 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:06:46,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:06:46,176 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:06:46,179 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:06:46,179 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:46,181 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:46,181 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:06:46,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:46,207 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:46,207 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:06:46,208 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:46,209 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:46,209 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-02 21:06:46,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:46,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:46,242 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:06:46,242 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:46,247 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:46,247 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:9 [2018-12-02 21:06:46,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:46,432 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-02 21:06:46,432 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:46,440 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:06:46,440 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:17 [2018-12-02 21:06:46,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:46,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:46,476 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-12-02 21:06:46,476 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:46,485 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 21:06:46,485 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-12-02 21:06:46,522 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 21:06:46,522 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:06:46,737 WARN L288 Elim1Store]: Array PQE input equivalent to true [2018-12-02 21:06:46,738 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:46,757 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 21:06:46,757 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:46,772 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 21:06:46,772 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:46,779 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-02 21:06:46,780 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-12-02 21:06:47,018 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 21:06:47,018 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 21:06:47,028 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:06:47,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:06:47,086 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:06:47,088 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:06:47,088 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:47,089 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:47,089 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:06:47,093 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:47,094 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:47,094 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-02 21:06:47,094 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:47,096 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:47,096 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-02 21:06:47,100 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:47,101 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:47,102 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:06:47,102 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:47,106 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:47,107 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:9 [2018-12-02 21:06:47,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:47,184 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-02 21:06:47,184 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:47,192 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:06:47,192 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:17 [2018-12-02 21:06:47,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:47,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:47,197 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-12-02 21:06:47,198 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:47,206 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 21:06:47,206 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-12-02 21:06:47,211 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 21:06:47,211 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:06:47,301 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:06:47,301 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17] total 21 [2018-12-02 21:06:47,301 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-02 21:06:47,301 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-02 21:06:47,302 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=553, Unknown=3, NotChecked=0, Total=650 [2018-12-02 21:06:47,302 INFO L87 Difference]: Start difference. First operand 96 states and 99 transitions. Second operand 22 states. [2018-12-02 21:06:52,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:06:52,714 INFO L93 Difference]: Finished difference Result 107 states and 111 transitions. [2018-12-02 21:06:52,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-02 21:06:52,714 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 78 [2018-12-02 21:06:52,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:06:52,715 INFO L225 Difference]: With dead ends: 107 [2018-12-02 21:06:52,715 INFO L226 Difference]: Without dead ends: 107 [2018-12-02 21:06:52,715 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 232 GetRequests, 183 SyntacticMatches, 13 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 443 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=189, Invalid=1214, Unknown=3, NotChecked=0, Total=1406 [2018-12-02 21:06:52,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-12-02 21:06:52,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 107. [2018-12-02 21:06:52,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-12-02 21:06:52,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 111 transitions. [2018-12-02 21:06:52,717 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 111 transitions. Word has length 78 [2018-12-02 21:06:52,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:06:52,717 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 111 transitions. [2018-12-02 21:06:52,717 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-02 21:06:52,717 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 111 transitions. [2018-12-02 21:06:52,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-12-02 21:06:52,717 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:06:52,718 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:06:52,718 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:06:52,718 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:06:52,718 INFO L82 PathProgramCache]: Analyzing trace with hash 1200243331, now seen corresponding path program 1 times [2018-12-02 21:06:52,718 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:06:52,718 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 56 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:06:52,749 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:06:52,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:06:52,930 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:06:52,932 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:06:52,932 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:52,934 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:52,934 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:06:52,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:52,956 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:52,956 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:06:52,956 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:52,958 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:52,958 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-02 21:06:52,992 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:52,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:52,993 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:06:52,993 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:52,997 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:52,997 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:9 [2018-12-02 21:06:53,247 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:53,248 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-02 21:06:53,248 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,267 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:06:53,267 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:17 [2018-12-02 21:06:53,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:53,338 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:53,339 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-12-02 21:06:53,339 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,354 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 21:06:53,355 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-12-02 21:06:53,430 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-02 21:06:53,430 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:06:53,728 WARN L288 Elim1Store]: Array PQE input equivalent to true [2018-12-02 21:06:53,728 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,739 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:06:53,739 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,747 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:06:53,747 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,751 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-02 21:06:53,751 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:43, output treesize:9 [2018-12-02 21:06:53,788 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 7 [2018-12-02 21:06:53,789 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,790 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,790 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:3 [2018-12-02 21:06:53,807 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 9 [2018-12-02 21:06:53,807 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,809 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,809 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:3 [2018-12-02 21:06:53,826 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-12-02 21:06:53,826 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,827 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,827 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:3 [2018-12-02 21:06:53,892 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 21:06:53,892 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 21:06:53,899 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:06:53,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:06:53,934 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:06:53,936 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 21:06:53,936 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,937 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,937 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 21:06:53,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:53,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:53,942 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:06:53,942 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,943 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,943 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-02 21:06:53,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:53,948 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:53,949 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-02 21:06:53,949 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,953 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,954 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:9 [2018-12-02 21:06:53,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:53,983 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-02 21:06:53,984 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:53,993 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 21:06:53,993 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:17 [2018-12-02 21:06:53,996 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:53,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:06:53,998 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-12-02 21:06:53,998 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 21:06:54,006 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 21:06:54,007 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-12-02 21:06:54,011 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-02 21:06:54,011 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:06:54,129 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:06:54,129 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 20] total 22 [2018-12-02 21:06:54,129 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-12-02 21:06:54,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-12-02 21:06:54,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=567, Unknown=11, NotChecked=0, Total=650 [2018-12-02 21:06:54,129 INFO L87 Difference]: Start difference. First operand 107 states and 111 transitions. Second operand 23 states. [2018-12-02 21:06:59,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:06:59,759 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2018-12-02 21:06:59,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-02 21:06:59,759 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 79 [2018-12-02 21:06:59,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:06:59,760 INFO L225 Difference]: With dead ends: 106 [2018-12-02 21:06:59,760 INFO L226 Difference]: Without dead ends: 106 [2018-12-02 21:06:59,760 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 191 SyntacticMatches, 8 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 239 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=153, Invalid=1239, Unknown=14, NotChecked=0, Total=1406 [2018-12-02 21:06:59,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-02 21:06:59,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 95. [2018-12-02 21:06:59,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-12-02 21:06:59,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 98 transitions. [2018-12-02 21:06:59,762 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 98 transitions. Word has length 79 [2018-12-02 21:06:59,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:06:59,762 INFO L480 AbstractCegarLoop]: Abstraction has 95 states and 98 transitions. [2018-12-02 21:06:59,762 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-12-02 21:06:59,762 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 98 transitions. [2018-12-02 21:06:59,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-02 21:06:59,762 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:06:59,762 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:06:59,763 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:06:59,763 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:06:59,763 INFO L82 PathProgramCache]: Analyzing trace with hash -1289079286, now seen corresponding path program 1 times [2018-12-02 21:06:59,763 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:06:59,763 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 58 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:06:59,777 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:07:00,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:07:00,024 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:07:00,042 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 17 [2018-12-02 21:07:00,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:07:00,055 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 15 [2018-12-02 21:07:00,056 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-12-02 21:07:00,062 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-02 21:07:00,063 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 15 [2018-12-02 21:07:00,065 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 21:07:00,065 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2018-12-02 21:07:00,065 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 21:07:00,068 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 21:07:00,075 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-02 21:07:00,075 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:18, output treesize:19 [2018-12-02 21:07:05,451 WARN L180 SmtUtils]: Spent 1.39 s on a formula simplification that was a NOOP. DAG size: 20 [2018-12-02 21:07:19,258 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 21 [2018-12-02 21:07:21,263 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~fe~1.base (_ BitVec 32)) (entry_point_~c11~0.base (_ BitVec 32)) (entry_point_~cfg~1.base (_ BitVec 32))) (let ((.cse1 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (let ((.cse0 (store .cse1 entry_point_~cfg~1.base (_ bv1 1)))) (and (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= |c_#valid| (store (store (store .cse0 entry_point_~fe~1.base (_ bv0 1)) entry_point_~cfg~1.base (_ bv0 1)) entry_point_~c11~0.base (_ bv0 1))) (= (select .cse1 entry_point_~cfg~1.base) (_ bv0 1)) (= (_ bv0 1) (select .cse0 entry_point_~fe~1.base)))))) is different from true [2018-12-02 21:07:21,369 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 21:07:21,369 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:07:21,811 WARN L180 SmtUtils]: Spent 302.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 67 [2018-12-02 21:07:23,852 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_40 (_ BitVec 32)) (v_entry_point_~cfg~1.base_33 (_ BitVec 32)) (v_entry_point_~fe~1.base_32 (_ BitVec 32))) (let ((.cse1 (store |c_#valid| v_entry_point_~c11~0.base_40 (_ bv1 1)))) (let ((.cse0 (store .cse1 v_entry_point_~cfg~1.base_33 (_ bv1 1)))) (or (not (= (select |c_#valid| v_entry_point_~c11~0.base_40) (_ bv0 1))) (= (store (store (store .cse0 v_entry_point_~fe~1.base_32 (_ bv0 1)) v_entry_point_~cfg~1.base_33 (_ bv0 1)) v_entry_point_~c11~0.base_40 (_ bv0 1)) |c_old(#valid)|) (not (= (_ bv0 1) (select .cse1 v_entry_point_~cfg~1.base_33))) (not (= (_ bv0 1) (select .cse0 v_entry_point_~fe~1.base_32))))))) is different from false [2018-12-02 21:07:23,857 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 21:07:23,857 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/z3 Starting monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 21:07:23,863 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:07:23,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:07:23,915 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 21:07:23,935 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 21:07:23,936 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 21:07:24,183 WARN L180 SmtUtils]: Spent 127.00 ms on a formula simplification that was a NOOP. DAG size: 67 [2018-12-02 21:07:26,221 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_44 (_ BitVec 32)) (v_entry_point_~fe~1.base_35 (_ BitVec 32)) (v_entry_point_~cfg~1.base_36 (_ BitVec 32))) (let ((.cse0 (store |c_#valid| v_entry_point_~c11~0.base_44 (_ bv1 1)))) (let ((.cse1 (store .cse0 v_entry_point_~cfg~1.base_36 (_ bv1 1)))) (or (not (= (select .cse0 v_entry_point_~cfg~1.base_36) (_ bv0 1))) (not (= (_ bv0 1) (select .cse1 v_entry_point_~fe~1.base_35))) (not (= (select |c_#valid| v_entry_point_~c11~0.base_44) (_ bv0 1))) (= (store (store (store .cse1 v_entry_point_~fe~1.base_35 (_ bv0 1)) v_entry_point_~cfg~1.base_36 (_ bv0 1)) v_entry_point_~c11~0.base_44 (_ bv0 1)) |c_old(#valid)|))))) is different from false [2018-12-02 21:07:26,239 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 21:07:26,239 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 12] total 17 [2018-12-02 21:07:26,239 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-02 21:07:26,239 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-02 21:07:26,239 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=218, Unknown=12, NotChecked=96, Total=380 [2018-12-02 21:07:26,239 INFO L87 Difference]: Start difference. First operand 95 states and 98 transitions. Second operand 18 states. [2018-12-02 21:08:05,549 WARN L180 SmtUtils]: Spent 4.01 s on a formula simplification. DAG size of input: 23 DAG size of output: 21 [2018-12-02 21:08:09,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:08:09,076 INFO L93 Difference]: Finished difference Result 109 states and 112 transitions. [2018-12-02 21:08:09,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-02 21:08:09,076 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 81 [2018-12-02 21:08:09,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:08:09,077 INFO L225 Difference]: With dead ends: 109 [2018-12-02 21:08:09,077 INFO L226 Difference]: Without dead ends: 79 [2018-12-02 21:08:09,077 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 146 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 31.3s TimeCoverageRelationStatistics Valid=70, Invalid=310, Unknown=12, NotChecked=114, Total=506 [2018-12-02 21:08:09,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-12-02 21:08:09,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-12-02 21:08:09,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-12-02 21:08:09,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 79 transitions. [2018-12-02 21:08:09,078 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 79 transitions. Word has length 81 [2018-12-02 21:08:09,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:08:09,078 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 79 transitions. [2018-12-02 21:08:09,078 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-02 21:08:09,078 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 79 transitions. [2018-12-02 21:08:09,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-02 21:08:09,079 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:08:09,079 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:08:09,079 INFO L423 AbstractCegarLoop]: === Iteration 41 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-02 21:08:09,079 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:08:09,079 INFO L82 PathProgramCache]: Analyzing trace with hash 846770863, now seen corresponding path program 1 times [2018-12-02 21:08:09,079 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 21:08:09,079 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_ce44529c-54ff-480b-b930-470a2b97aff2/bin-2019/uautomizer/cvc4 Starting monitored process 60 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 21:08:09,100 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:08:09,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 21:08:09,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 21:08:09,782 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-02 21:08:09,794 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-02 21:08:09,798 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-02 21:08:09,798 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-02 21:08:09,807 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 09:08:09 BoogieIcfgContainer [2018-12-02 21:08:09,808 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-02 21:08:09,808 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-02 21:08:09,808 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-02 21:08:09,808 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-02 21:08:09,808 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:57:59" (3/4) ... [2018-12-02 21:08:09,811 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-02 21:08:09,811 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-02 21:08:09,812 INFO L168 Benchmark]: Toolchain (without parser) took 612079.28 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 166.2 MB). Free memory was 938.0 MB in the beginning and 921.5 MB in the end (delta: 16.5 MB). Peak memory consumption was 182.7 MB. Max. memory is 11.5 GB. [2018-12-02 21:08:09,812 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 21:08:09,812 INFO L168 Benchmark]: CACSL2BoogieTranslator took 349.85 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.6 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -171.2 MB). Peak memory consumption was 37.6 MB. Max. memory is 11.5 GB. [2018-12-02 21:08:09,812 INFO L168 Benchmark]: Boogie Preprocessor took 47.63 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2018-12-02 21:08:09,812 INFO L168 Benchmark]: RCFGBuilder took 876.56 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 982.9 MB in the end (delta: 119.7 MB). Peak memory consumption was 119.7 MB. Max. memory is 11.5 GB. [2018-12-02 21:08:09,813 INFO L168 Benchmark]: TraceAbstraction took 610798.67 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 24.6 MB). Free memory was 982.9 MB in the beginning and 921.5 MB in the end (delta: 61.5 MB). Peak memory consumption was 86.1 MB. Max. memory is 11.5 GB. [2018-12-02 21:08:09,813 INFO L168 Benchmark]: Witness Printer took 3.25 ms. Allocated memory is still 1.2 GB. Free memory is still 921.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 21:08:09,813 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 349.85 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.6 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -171.2 MB). Peak memory consumption was 37.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 47.63 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * RCFGBuilder took 876.56 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 982.9 MB in the end (delta: 119.7 MB). Peak memory consumption was 119.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 610798.67 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 24.6 MB). Free memory was 982.9 MB in the beginning and 921.5 MB in the end (delta: 61.5 MB). Peak memory consumption was 86.1 MB. Max. memory is 11.5 GB. * Witness Printer took 3.25 ms. Allocated memory is still 1.2 GB. Free memory is still 921.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1512]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1512. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={-2129561025:0}] [L1513] CALL entry_point() VAL [ldv_global_msg_list={-2129561025:0}] [L1490] CALL, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [\old(size)=20, ldv_global_msg_list={-2129561025:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=20, \result={1820205349:0}, ldv_global_msg_list={-2129561025:0}, malloc(size)={1820205349:0}, size=20] [L1490] RET, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [ldv_global_msg_list={-2129561025:0}, ldv_malloc(sizeof(struct ldv_i2c_client))={1820205349:0}] [L1490] struct ldv_i2c_client *c11 = (struct ldv_i2c_client *)ldv_malloc(sizeof(struct ldv_i2c_client)); [L1491] COND FALSE !(!c11) VAL [c11={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1493] CALL, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [\old(size)=4, ldv_global_msg_list={-2129561025:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={-1894694275:0}, ldv_global_msg_list={-2129561025:0}, malloc(size)={-1894694275:0}, size=4] [L1493] RET, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [c11={1820205349:0}, ldv_global_msg_list={-2129561025:0}, ldv_malloc(sizeof(struct ldv_m88ts2022_config))={-1894694275:0}] [L1492-L1493] struct ldv_m88ts2022_config *cfg = (struct ldv_m88ts2022_config *) ldv_malloc(sizeof(struct ldv_m88ts2022_config)); [L1494] COND FALSE !(!cfg) VAL [c11={1820205349:0}, cfg={-1894694275:0}, ldv_global_msg_list={-2129561025:0}] [L1495] c11->dev.platform_data = cfg VAL [c11={1820205349:0}, cfg={-1894694275:0}, ldv_global_msg_list={-2129561025:0}] [L1497] CALL, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [\old(size)=4, ldv_global_msg_list={-2129561025:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, malloc(size)={-1820205348:0}, size=4] [L1497] RET, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [c11={1820205349:0}, cfg={-1894694275:0}, ldv_global_msg_list={-2129561025:0}, ldv_malloc(sizeof(struct ldv_dvb_frontend))={-1820205348:0}] [L1496-L1497] struct ldv_dvb_frontend *fe = (struct ldv_dvb_frontend *) ldv_malloc(sizeof(struct ldv_dvb_frontend)); [L1498] COND FALSE !(!fe) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1499] cfg->fe = fe VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1500] CALL alloc_3_11(c11) VAL [client={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1470] EXPR client->dev.platform_data VAL [client={1820205349:0}, client={1820205349:0}, client->dev.platform_data={-1894694275:0}, ldv_global_msg_list={-2129561025:0}] [L1470] struct ldv_m88ts2022_config *cfg = client->dev.platform_data; [L1471] EXPR cfg->fe VAL [cfg={-1894694275:0}, cfg->fe={-1820205348:0}, client={1820205349:0}, client={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1471] struct ldv_dvb_frontend *fe = cfg->fe; [L1472] CALL, EXPR ldv_malloc(sizeof(struct Data11)) VAL [\old(size)=12, ldv_global_msg_list={-2129561025:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=12, \result={17922623:0}, ldv_global_msg_list={-2129561025:0}, malloc(size)={17922623:0}, size=12] [L1472] RET, EXPR ldv_malloc(sizeof(struct Data11)) VAL [cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, ldv_malloc(sizeof(struct Data11))={17922623:0}] [L1472] struct Data11 *priv = (struct Data11*)ldv_malloc(sizeof(struct Data11)); [L1473] COND FALSE !(!priv) VAL [cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, priv={17922623:0}] [L1474] fe->tuner_priv = priv VAL [cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, priv={17922623:0}] [L1475] CALL ldv_i2c_set_clientdata(client, 0) VAL [data={0:0}, dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1462] CALL ldv_dev_set_drvdata(&dev->dev, data) VAL [data={0:0}, dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1198] dev->driver_data = data VAL [data={0:0}, data={0:0}, dev={1820205349:0}, dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1462] RET ldv_dev_set_drvdata(&dev->dev, data) VAL [data={0:0}, data={0:0}, dev={1820205349:0}, dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1475] RET ldv_i2c_set_clientdata(client, 0) VAL [cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, priv={17922623:0}] [L1476] return 0; VAL [\result=0, cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, priv={17922623:0}] [L1500] RET alloc_3_11(c11) VAL [alloc_3_11(c11)=0, c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1501] CALL free_11(c11) VAL [client={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1483] CALL, EXPR ldv_i2c_get_clientdata(client) VAL [dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1457] CALL, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1193] EXPR dev->driver_data VAL [dev={1820205349:0}, dev={1820205349:0}, dev->driver_data={0:0}, ldv_global_msg_list={-2129561025:0}] [L1193] return dev->driver_data; [L1457] RET, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={1820205349:0}, dev={1820205349:0}, ldv_dev_get_drvdata(&dev->dev)={0:0}, ldv_global_msg_list={-2129561025:0}] [L1457] return ldv_dev_get_drvdata(&dev->dev); [L1483] RET, EXPR ldv_i2c_get_clientdata(client) VAL [client={1820205349:0}, client={1820205349:0}, ldv_global_msg_list={-2129561025:0}, ldv_i2c_get_clientdata(client)={0:0}] [L1483] void *priv = (struct Data11*)ldv_i2c_get_clientdata(client); [L1484] COND FALSE !(\read(*priv)) VAL [client={1820205349:0}, client={1820205349:0}, ldv_global_msg_list={-2129561025:0}, priv={0:0}] [L1501] RET free_11(c11) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1503] free(fe) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1503] free(fe) [L1505] free(cfg) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1505] free(cfg) [L1507] free(c11) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1507] free(c11) [L1513] RET entry_point() VAL [ldv_global_msg_list={-2129561025:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 47 procedures, 374 locations, 85 error locations. UNSAFE Result, 610.7s OverallTime, 41 OverallIterations, 4 TraceHistogramMax, 455.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3250 SDtfs, 2896 SDslu, 17233 SDs, 0 SdLazy, 22308 SolverSat, 1246 SolverUnsat, 444 SolverUnknown, 0 SolverNotchecked, 352.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3734 GetRequests, 2842 SyntacticMatches, 81 SemanticMatches, 811 ConstructedPredicates, 32 IntricatePredicates, 1 DeprecatedPredicates, 4515 ImplicationChecksByTransitivity, 236.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=170occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 40 MinimizatonAttempts, 677 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.4s SsaConstructionTime, 3.7s SatisfiabilityAnalysisTime, 148.5s InterpolantComputationTime, 2836 NumberOfCodeBlocks, 2836 NumberOfCodeBlocksAsserted, 59 NumberOfCheckSat, 3131 ConstructedInterpolants, 321 QuantifiedInterpolants, 1074511 SizeOfPredicates, 472 NumberOfNonLiveVariables, 10429 ConjunctsInSsa, 1384 ConjunctsInUnsatCore, 68 InterpolantComputations, 15 PerfectInterpolantSequences, 782/1144 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...