./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4867b1d8e60a05de2199d52aa990071fe8bd647c ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4867b1d8e60a05de2199d52aa990071fe8bd647c ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-02 03:56:58,267 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 03:56:58,268 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 03:56:58,274 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-02 03:56:58,274 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-02 03:56:58,275 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-02 03:56:58,275 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-02 03:56:58,276 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-02 03:56:58,277 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-02 03:56:58,277 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-02 03:56:58,278 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-02 03:56:58,278 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 03:56:58,278 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 03:56:58,279 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 03:56:58,280 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 03:56:58,280 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 03:56:58,280 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 03:56:58,281 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 03:56:58,282 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 03:56:58,283 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 03:56:58,283 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 03:56:58,284 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 03:56:58,285 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 03:56:58,285 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 03:56:58,285 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 03:56:58,286 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 03:56:58,286 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 03:56:58,287 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 03:56:58,287 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 03:56:58,288 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 03:56:58,288 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 03:56:58,288 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 03:56:58,288 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 03:56:58,289 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 03:56:58,289 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 03:56:58,289 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 03:56:58,290 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-12-02 03:56:58,297 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 03:56:58,297 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 03:56:58,297 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 03:56:58,298 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 03:56:58,298 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-02 03:56:58,298 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-02 03:56:58,298 INFO L133 SettingsManager]: * Use SBE=true [2018-12-02 03:56:58,298 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 03:56:58,298 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-02 03:56:58,299 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-02 03:56:58,299 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-02 03:56:58,299 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-02 03:56:58,299 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 03:56:58,299 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-02 03:56:58,299 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-02 03:56:58,299 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-02 03:56:58,299 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 03:56:58,300 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-02 03:56:58,300 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-02 03:56:58,300 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 03:56:58,300 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 03:56:58,300 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 03:56:58,300 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 03:56:58,300 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 03:56:58,301 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 03:56:58,301 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 03:56:58,301 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-02 03:56:58,301 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 03:56:58,301 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4867b1d8e60a05de2199d52aa990071fe8bd647c [2018-12-02 03:56:58,318 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 03:56:58,325 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 03:56:58,327 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 03:56:58,328 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 03:56:58,328 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 03:56:58,329 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-02 03:56:58,364 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/data/c88e9c36a/724b32223f994a35851dcac7b221eb57/FLAG7461a9645 [2018-12-02 03:56:58,786 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 03:56:58,787 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-02 03:56:58,794 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/data/c88e9c36a/724b32223f994a35851dcac7b221eb57/FLAG7461a9645 [2018-12-02 03:56:58,803 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/data/c88e9c36a/724b32223f994a35851dcac7b221eb57 [2018-12-02 03:56:58,805 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 03:56:58,806 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-02 03:56:58,806 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 03:56:58,806 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 03:56:58,809 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 03:56:58,809 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 03:56:58" (1/1) ... [2018-12-02 03:56:58,811 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@720ba8e3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:56:58, skipping insertion in model container [2018-12-02 03:56:58,811 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 03:56:58" (1/1) ... [2018-12-02 03:56:58,815 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 03:56:58,839 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 03:56:59,057 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 03:56:59,068 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 03:56:59,103 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 03:56:59,136 INFO L195 MainTranslator]: Completed translation [2018-12-02 03:56:59,137 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:56:59 WrapperNode [2018-12-02 03:56:59,137 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 03:56:59,137 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 03:56:59,137 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 03:56:59,137 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 03:56:59,145 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:56:59" (1/1) ... [2018-12-02 03:56:59,145 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:56:59" (1/1) ... [2018-12-02 03:56:59,157 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:56:59" (1/1) ... [2018-12-02 03:56:59,157 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:56:59" (1/1) ... [2018-12-02 03:56:59,173 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:56:59" (1/1) ... [2018-12-02 03:56:59,177 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:56:59" (1/1) ... [2018-12-02 03:56:59,179 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:56:59" (1/1) ... [2018-12-02 03:56:59,183 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 03:56:59,184 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 03:56:59,184 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 03:56:59,184 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 03:56:59,185 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:56:59" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 03:56:59,216 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-02 03:56:59,216 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 03:56:59,216 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-02 03:56:59,216 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-12-02 03:56:59,216 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-12-02 03:56:59,216 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-12-02 03:56:59,216 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-12-02 03:56:59,216 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-02 03:56:59,216 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-02 03:56:59,217 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-02 03:56:59,218 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-02 03:56:59,218 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-02 03:56:59,218 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-02 03:56:59,218 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-02 03:56:59,218 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-12-02 03:56:59,218 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-02 03:56:59,218 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-02 03:56:59,218 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-02 03:56:59,218 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-02 03:56:59,218 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-02 03:56:59,218 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-02 03:56:59,218 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-02 03:56:59,219 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-12-02 03:56:59,219 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-12-02 03:56:59,219 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-02 03:56:59,219 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-02 03:56:59,219 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-02 03:56:59,219 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-02 03:56:59,219 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-12-02 03:56:59,219 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-12-02 03:56:59,219 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-12-02 03:56:59,219 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-12-02 03:56:59,219 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-12-02 03:56:59,219 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-12-02 03:56:59,219 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-12-02 03:56:59,219 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-12-02 03:56:59,219 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-12-02 03:56:59,219 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-12-02 03:56:59,220 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-12-02 03:56:59,221 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-12-02 03:56:59,222 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-12-02 03:56:59,223 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-12-02 03:56:59,224 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-12-02 03:56:59,225 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-12-02 03:56:59,225 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-12-02 03:56:59,225 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-12-02 03:56:59,225 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-12-02 03:56:59,225 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-12-02 03:56:59,225 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-12-02 03:56:59,225 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-12-02 03:56:59,225 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-12-02 03:56:59,225 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-12-02 03:56:59,225 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-12-02 03:56:59,225 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-02 03:56:59,225 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-12-02 03:56:59,225 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-12-02 03:56:59,226 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-12-02 03:56:59,227 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-12-02 03:56:59,228 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2018-12-02 03:56:59,456 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-02 03:56:59,578 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-02 03:56:59,686 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 03:56:59,686 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-02 03:56:59,686 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 03:56:59 BoogieIcfgContainer [2018-12-02 03:56:59,686 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 03:56:59,687 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 03:56:59,687 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 03:56:59,689 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 03:56:59,689 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 03:56:58" (1/3) ... [2018-12-02 03:56:59,689 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a227511 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 03:56:59, skipping insertion in model container [2018-12-02 03:56:59,689 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:56:59" (2/3) ... [2018-12-02 03:56:59,689 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a227511 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 03:56:59, skipping insertion in model container [2018-12-02 03:56:59,690 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 03:56:59" (3/3) ... [2018-12-02 03:56:59,691 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-02 03:56:59,696 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 03:56:59,701 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 67 error locations. [2018-12-02 03:56:59,709 INFO L257 AbstractCegarLoop]: Starting to check reachability of 67 error locations. [2018-12-02 03:56:59,723 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-02 03:56:59,724 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 03:56:59,724 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-02 03:56:59,724 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 03:56:59,724 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 03:56:59,724 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 03:56:59,724 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 03:56:59,724 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 03:56:59,724 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 03:56:59,735 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states. [2018-12-02 03:56:59,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-02 03:56:59,741 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:56:59,741 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:56:59,743 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:56:59,746 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:56:59,746 INFO L82 PathProgramCache]: Analyzing trace with hash 280699124, now seen corresponding path program 1 times [2018-12-02 03:56:59,747 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:56:59,747 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:56:59,781 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:56:59,781 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:56:59,781 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:56:59,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:56:59,880 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:56:59,882 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:56:59,882 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 03:56:59,884 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 03:56:59,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 03:56:59,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:56:59,894 INFO L87 Difference]: Start difference. First operand 171 states. Second operand 5 states. [2018-12-02 03:57:00,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:00,009 INFO L93 Difference]: Finished difference Result 153 states and 164 transitions. [2018-12-02 03:57:00,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 03:57:00,010 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-02 03:57:00,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:00,019 INFO L225 Difference]: With dead ends: 153 [2018-12-02 03:57:00,019 INFO L226 Difference]: Without dead ends: 150 [2018-12-02 03:57:00,020 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:57:00,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-02 03:57:00,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 144. [2018-12-02 03:57:00,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-02 03:57:00,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 155 transitions. [2018-12-02 03:57:00,050 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 155 transitions. Word has length 17 [2018-12-02 03:57:00,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:00,050 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 155 transitions. [2018-12-02 03:57:00,050 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 03:57:00,050 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 155 transitions. [2018-12-02 03:57:00,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-02 03:57:00,051 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:00,051 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:00,051 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:00,051 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:00,051 INFO L82 PathProgramCache]: Analyzing trace with hash 280699125, now seen corresponding path program 1 times [2018-12-02 03:57:00,051 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:00,051 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:00,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,053 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:00,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:00,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:00,119 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:00,119 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 03:57:00,120 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 03:57:00,120 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 03:57:00,120 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-02 03:57:00,120 INFO L87 Difference]: Start difference. First operand 144 states and 155 transitions. Second operand 6 states. [2018-12-02 03:57:00,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:00,210 INFO L93 Difference]: Finished difference Result 149 states and 160 transitions. [2018-12-02 03:57:00,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 03:57:00,211 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-02 03:57:00,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:00,212 INFO L225 Difference]: With dead ends: 149 [2018-12-02 03:57:00,212 INFO L226 Difference]: Without dead ends: 149 [2018-12-02 03:57:00,212 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-02 03:57:00,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-02 03:57:00,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 144. [2018-12-02 03:57:00,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-02 03:57:00,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 154 transitions. [2018-12-02 03:57:00,219 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 154 transitions. Word has length 17 [2018-12-02 03:57:00,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:00,219 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 154 transitions. [2018-12-02 03:57:00,219 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 03:57:00,219 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 154 transitions. [2018-12-02 03:57:00,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-02 03:57:00,220 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:00,220 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:00,220 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:00,220 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:00,220 INFO L82 PathProgramCache]: Analyzing trace with hash 309328275, now seen corresponding path program 1 times [2018-12-02 03:57:00,220 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:00,220 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:00,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:00,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:00,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:00,253 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:00,253 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 03:57:00,253 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 03:57:00,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 03:57:00,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:57:00,254 INFO L87 Difference]: Start difference. First operand 144 states and 154 transitions. Second operand 5 states. [2018-12-02 03:57:00,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:00,267 INFO L93 Difference]: Finished difference Result 143 states and 151 transitions. [2018-12-02 03:57:00,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 03:57:00,267 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-02 03:57:00,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:00,268 INFO L225 Difference]: With dead ends: 143 [2018-12-02 03:57:00,268 INFO L226 Difference]: Without dead ends: 143 [2018-12-02 03:57:00,268 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:57:00,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-12-02 03:57:00,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 141. [2018-12-02 03:57:00,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-02 03:57:00,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 149 transitions. [2018-12-02 03:57:00,274 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 149 transitions. Word has length 17 [2018-12-02 03:57:00,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:00,274 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 149 transitions. [2018-12-02 03:57:00,274 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 03:57:00,274 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 149 transitions. [2018-12-02 03:57:00,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-02 03:57:00,275 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:00,275 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:00,275 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:00,276 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:00,276 INFO L82 PathProgramCache]: Analyzing trace with hash -1990609809, now seen corresponding path program 1 times [2018-12-02 03:57:00,276 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:00,276 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:00,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,277 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:00,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:00,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:00,305 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:00,306 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 03:57:00,306 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 03:57:00,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 03:57:00,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:57:00,306 INFO L87 Difference]: Start difference. First operand 141 states and 149 transitions. Second operand 5 states. [2018-12-02 03:57:00,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:00,318 INFO L93 Difference]: Finished difference Result 143 states and 150 transitions. [2018-12-02 03:57:00,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 03:57:00,319 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-12-02 03:57:00,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:00,320 INFO L225 Difference]: With dead ends: 143 [2018-12-02 03:57:00,320 INFO L226 Difference]: Without dead ends: 143 [2018-12-02 03:57:00,320 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:57:00,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-12-02 03:57:00,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 141. [2018-12-02 03:57:00,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-02 03:57:00,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 148 transitions. [2018-12-02 03:57:00,327 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 148 transitions. Word has length 27 [2018-12-02 03:57:00,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:00,328 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 148 transitions. [2018-12-02 03:57:00,328 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 03:57:00,328 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 148 transitions. [2018-12-02 03:57:00,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-02 03:57:00,329 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:00,329 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:00,329 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:00,329 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:00,329 INFO L82 PathProgramCache]: Analyzing trace with hash 1793823310, now seen corresponding path program 1 times [2018-12-02 03:57:00,330 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:00,330 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:00,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,331 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:00,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:00,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:00,387 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:00,387 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 03:57:00,387 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 03:57:00,387 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 03:57:00,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-02 03:57:00,388 INFO L87 Difference]: Start difference. First operand 141 states and 148 transitions. Second operand 7 states. [2018-12-02 03:57:00,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:00,414 INFO L93 Difference]: Finished difference Result 157 states and 165 transitions. [2018-12-02 03:57:00,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 03:57:00,414 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-12-02 03:57:00,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:00,415 INFO L225 Difference]: With dead ends: 157 [2018-12-02 03:57:00,416 INFO L226 Difference]: Without dead ends: 157 [2018-12-02 03:57:00,416 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-02 03:57:00,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-12-02 03:57:00,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 150. [2018-12-02 03:57:00,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-02 03:57:00,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-02 03:57:00,423 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 27 [2018-12-02 03:57:00,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:00,423 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-02 03:57:00,424 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 03:57:00,424 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-02 03:57:00,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 03:57:00,424 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:00,425 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:00,425 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:00,425 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:00,425 INFO L82 PathProgramCache]: Analyzing trace with hash 1482045916, now seen corresponding path program 1 times [2018-12-02 03:57:00,425 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:00,426 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:00,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,427 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:00,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:00,509 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:00,509 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:00,509 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 03:57:00,509 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 03:57:00,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 03:57:00,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-02 03:57:00,517 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 11 states. [2018-12-02 03:57:00,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:00,696 INFO L93 Difference]: Finished difference Result 149 states and 156 transitions. [2018-12-02 03:57:00,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-02 03:57:00,696 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-12-02 03:57:00,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:00,697 INFO L225 Difference]: With dead ends: 149 [2018-12-02 03:57:00,697 INFO L226 Difference]: Without dead ends: 149 [2018-12-02 03:57:00,697 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-02 03:57:00,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-02 03:57:00,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-12-02 03:57:00,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-02 03:57:00,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 156 transitions. [2018-12-02 03:57:00,702 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 156 transitions. Word has length 32 [2018-12-02 03:57:00,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:00,702 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 156 transitions. [2018-12-02 03:57:00,702 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 03:57:00,702 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 156 transitions. [2018-12-02 03:57:00,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 03:57:00,702 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:00,702 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:00,703 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:00,703 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:00,703 INFO L82 PathProgramCache]: Analyzing trace with hash 1482045917, now seen corresponding path program 1 times [2018-12-02 03:57:00,703 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:00,703 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:00,704 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,704 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:00,704 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:00,727 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:00,727 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:00,727 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 03:57:00,727 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 03:57:00,727 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 03:57:00,727 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 03:57:00,728 INFO L87 Difference]: Start difference. First operand 149 states and 156 transitions. Second operand 4 states. [2018-12-02 03:57:00,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:00,750 INFO L93 Difference]: Finished difference Result 152 states and 159 transitions. [2018-12-02 03:57:00,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 03:57:00,750 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-02 03:57:00,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:00,751 INFO L225 Difference]: With dead ends: 152 [2018-12-02 03:57:00,751 INFO L226 Difference]: Without dead ends: 150 [2018-12-02 03:57:00,751 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:57:00,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-02 03:57:00,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-02 03:57:00,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-02 03:57:00,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-02 03:57:00,755 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 32 [2018-12-02 03:57:00,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:00,756 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-02 03:57:00,756 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 03:57:00,756 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-02 03:57:00,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-02 03:57:00,756 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:00,757 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:00,757 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:00,757 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:00,757 INFO L82 PathProgramCache]: Analyzing trace with hash 426736712, now seen corresponding path program 1 times [2018-12-02 03:57:00,757 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:00,757 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:00,758 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,758 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:00,758 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:00,784 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:00,784 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:00,784 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:00,791 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:00,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:00,819 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:00,849 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:00,863 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 03:57:00,864 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-12-02 03:57:00,864 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 03:57:00,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 03:57:00,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 03:57:00,864 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 6 states. [2018-12-02 03:57:00,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:00,884 INFO L93 Difference]: Finished difference Result 153 states and 160 transitions. [2018-12-02 03:57:00,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 03:57:00,885 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2018-12-02 03:57:00,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:00,886 INFO L225 Difference]: With dead ends: 153 [2018-12-02 03:57:00,886 INFO L226 Difference]: Without dead ends: 151 [2018-12-02 03:57:00,886 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-02 03:57:00,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-02 03:57:00,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-12-02 03:57:00,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-02 03:57:00,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 158 transitions. [2018-12-02 03:57:00,891 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 158 transitions. Word has length 33 [2018-12-02 03:57:00,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:00,892 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 158 transitions. [2018-12-02 03:57:00,892 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 03:57:00,892 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 158 transitions. [2018-12-02 03:57:00,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-02 03:57:00,892 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:00,893 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:00,893 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:00,893 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:00,893 INFO L82 PathProgramCache]: Analyzing trace with hash 2071889725, now seen corresponding path program 2 times [2018-12-02 03:57:00,893 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:00,893 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:00,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,895 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:00,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:00,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:00,931 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:00,931 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:00,931 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:00,940 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 03:57:00,961 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 03:57:00,962 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 03:57:00,965 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:00,993 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:00,995 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:00,999 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:00,999 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-02 03:57:01,140 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-02 03:57:01,155 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 03:57:01,155 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [6] total 17 [2018-12-02 03:57:01,155 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-02 03:57:01,156 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-02 03:57:01,156 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=230, Unknown=0, NotChecked=0, Total=272 [2018-12-02 03:57:01,156 INFO L87 Difference]: Start difference. First operand 151 states and 158 transitions. Second operand 17 states. [2018-12-02 03:57:01,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:01,656 INFO L93 Difference]: Finished difference Result 213 states and 222 transitions. [2018-12-02 03:57:01,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-02 03:57:01,656 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 34 [2018-12-02 03:57:01,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:01,657 INFO L225 Difference]: With dead ends: 213 [2018-12-02 03:57:01,657 INFO L226 Difference]: Without dead ends: 211 [2018-12-02 03:57:01,658 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=85, Invalid=515, Unknown=0, NotChecked=0, Total=600 [2018-12-02 03:57:01,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-12-02 03:57:01,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 151. [2018-12-02 03:57:01,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-02 03:57:01,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 158 transitions. [2018-12-02 03:57:01,662 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 158 transitions. Word has length 34 [2018-12-02 03:57:01,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:01,662 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 158 transitions. [2018-12-02 03:57:01,662 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-02 03:57:01,662 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 158 transitions. [2018-12-02 03:57:01,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-02 03:57:01,663 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:01,663 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:01,663 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:01,663 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:01,664 INFO L82 PathProgramCache]: Analyzing trace with hash -1823867884, now seen corresponding path program 1 times [2018-12-02 03:57:01,664 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:01,664 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:01,664 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:01,665 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 03:57:01,665 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:01,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:01,709 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:01,710 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:01,710 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 03:57:01,710 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 03:57:01,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 03:57:01,710 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-02 03:57:01,711 INFO L87 Difference]: Start difference. First operand 151 states and 158 transitions. Second operand 7 states. [2018-12-02 03:57:01,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:01,739 INFO L93 Difference]: Finished difference Result 161 states and 168 transitions. [2018-12-02 03:57:01,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 03:57:01,739 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-12-02 03:57:01,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:01,740 INFO L225 Difference]: With dead ends: 161 [2018-12-02 03:57:01,740 INFO L226 Difference]: Without dead ends: 161 [2018-12-02 03:57:01,740 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-02 03:57:01,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-12-02 03:57:01,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 157. [2018-12-02 03:57:01,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-12-02 03:57:01,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 164 transitions. [2018-12-02 03:57:01,744 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 164 transitions. Word has length 36 [2018-12-02 03:57:01,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:01,745 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 164 transitions. [2018-12-02 03:57:01,745 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 03:57:01,745 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 164 transitions. [2018-12-02 03:57:01,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-02 03:57:01,746 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:01,746 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:01,746 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:01,746 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:01,746 INFO L82 PathProgramCache]: Analyzing trace with hash -1550558175, now seen corresponding path program 1 times [2018-12-02 03:57:01,746 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:01,746 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:01,747 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:01,747 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:01,747 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:01,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:01,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:01,773 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:01,773 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 03:57:01,773 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 03:57:01,774 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 03:57:01,774 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 03:57:01,774 INFO L87 Difference]: Start difference. First operand 157 states and 164 transitions. Second operand 3 states. [2018-12-02 03:57:01,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:01,827 INFO L93 Difference]: Finished difference Result 168 states and 174 transitions. [2018-12-02 03:57:01,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 03:57:01,827 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-12-02 03:57:01,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:01,827 INFO L225 Difference]: With dead ends: 168 [2018-12-02 03:57:01,828 INFO L226 Difference]: Without dead ends: 146 [2018-12-02 03:57:01,828 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 03:57:01,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-02 03:57:01,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 138. [2018-12-02 03:57:01,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-02 03:57:01,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 144 transitions. [2018-12-02 03:57:01,830 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 144 transitions. Word has length 34 [2018-12-02 03:57:01,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:01,830 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 144 transitions. [2018-12-02 03:57:01,830 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 03:57:01,830 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 144 transitions. [2018-12-02 03:57:01,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-02 03:57:01,831 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:01,831 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:01,831 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:01,831 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:01,831 INFO L82 PathProgramCache]: Analyzing trace with hash -1036104256, now seen corresponding path program 1 times [2018-12-02 03:57:01,831 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:01,831 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:01,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:01,832 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:01,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:01,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:01,899 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-02 03:57:01,899 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:01,899 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 03:57:01,899 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 03:57:01,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 03:57:01,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-02 03:57:01,900 INFO L87 Difference]: Start difference. First operand 138 states and 144 transitions. Second operand 11 states. [2018-12-02 03:57:02,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:02,068 INFO L93 Difference]: Finished difference Result 136 states and 142 transitions. [2018-12-02 03:57:02,068 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-02 03:57:02,068 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 40 [2018-12-02 03:57:02,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:02,069 INFO L225 Difference]: With dead ends: 136 [2018-12-02 03:57:02,069 INFO L226 Difference]: Without dead ends: 136 [2018-12-02 03:57:02,070 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-02 03:57:02,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-02 03:57:02,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-02 03:57:02,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-02 03:57:02,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions. [2018-12-02 03:57:02,073 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 40 [2018-12-02 03:57:02,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:02,073 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 142 transitions. [2018-12-02 03:57:02,073 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 03:57:02,073 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions. [2018-12-02 03:57:02,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-02 03:57:02,074 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:02,074 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:02,074 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:02,074 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:02,075 INFO L82 PathProgramCache]: Analyzing trace with hash -1036104255, now seen corresponding path program 1 times [2018-12-02 03:57:02,075 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:02,075 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:02,076 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:02,076 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:02,076 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:02,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:02,110 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:02,111 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:02,111 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:02,118 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:02,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:02,135 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:02,142 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:02,156 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 03:57:02,157 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-12-02 03:57:02,157 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-02 03:57:02,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-02 03:57:02,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-12-02 03:57:02,157 INFO L87 Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 8 states. [2018-12-02 03:57:02,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:02,174 INFO L93 Difference]: Finished difference Result 139 states and 145 transitions. [2018-12-02 03:57:02,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 03:57:02,174 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 40 [2018-12-02 03:57:02,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:02,175 INFO L225 Difference]: With dead ends: 139 [2018-12-02 03:57:02,175 INFO L226 Difference]: Without dead ends: 137 [2018-12-02 03:57:02,175 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-02 03:57:02,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-12-02 03:57:02,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-12-02 03:57:02,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-12-02 03:57:02,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 143 transitions. [2018-12-02 03:57:02,179 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 143 transitions. Word has length 40 [2018-12-02 03:57:02,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:02,179 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 143 transitions. [2018-12-02 03:57:02,179 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-02 03:57:02,179 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 143 transitions. [2018-12-02 03:57:02,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-12-02 03:57:02,180 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:02,180 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:02,180 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:02,180 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:02,180 INFO L82 PathProgramCache]: Analyzing trace with hash -141560532, now seen corresponding path program 2 times [2018-12-02 03:57:02,180 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:02,180 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:02,181 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:02,181 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:02,182 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:02,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:02,221 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:02,222 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:02,222 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:02,229 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 03:57:02,245 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 03:57:02,246 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 03:57:02,248 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:02,260 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:02,260 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:02,264 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:02,264 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-02 03:57:02,404 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-02 03:57:02,419 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 03:57:02,419 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [8] total 19 [2018-12-02 03:57:02,420 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-02 03:57:02,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-02 03:57:02,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=289, Unknown=0, NotChecked=0, Total=342 [2018-12-02 03:57:02,420 INFO L87 Difference]: Start difference. First operand 137 states and 143 transitions. Second operand 19 states. [2018-12-02 03:57:02,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:02,848 INFO L93 Difference]: Finished difference Result 138 states and 144 transitions. [2018-12-02 03:57:02,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-02 03:57:02,848 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 41 [2018-12-02 03:57:02,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:02,849 INFO L225 Difference]: With dead ends: 138 [2018-12-02 03:57:02,849 INFO L226 Difference]: Without dead ends: 136 [2018-12-02 03:57:02,849 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 28 SyntacticMatches, 3 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=118, Invalid=694, Unknown=0, NotChecked=0, Total=812 [2018-12-02 03:57:02,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-02 03:57:02,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-02 03:57:02,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-02 03:57:02,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions. [2018-12-02 03:57:02,851 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 41 [2018-12-02 03:57:02,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:02,852 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 142 transitions. [2018-12-02 03:57:02,852 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-02 03:57:02,852 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions. [2018-12-02 03:57:02,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-12-02 03:57:02,852 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:02,852 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:02,852 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:02,853 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:02,853 INFO L82 PathProgramCache]: Analyzing trace with hash -271503917, now seen corresponding path program 1 times [2018-12-02 03:57:02,853 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:02,853 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:02,854 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:02,854 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 03:57:02,854 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:02,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:02,886 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 03:57:02,886 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:02,886 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 03:57:02,886 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 03:57:02,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 03:57:02,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-02 03:57:02,887 INFO L87 Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 7 states. [2018-12-02 03:57:02,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:02,905 INFO L93 Difference]: Finished difference Result 138 states and 143 transitions. [2018-12-02 03:57:02,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 03:57:02,906 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 45 [2018-12-02 03:57:02,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:02,906 INFO L225 Difference]: With dead ends: 138 [2018-12-02 03:57:02,906 INFO L226 Difference]: Without dead ends: 136 [2018-12-02 03:57:02,907 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-02 03:57:02,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-02 03:57:02,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-02 03:57:02,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-02 03:57:02,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 141 transitions. [2018-12-02 03:57:02,910 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 141 transitions. Word has length 45 [2018-12-02 03:57:02,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:02,910 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 141 transitions. [2018-12-02 03:57:02,910 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 03:57:02,910 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 141 transitions. [2018-12-02 03:57:02,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-02 03:57:02,911 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:02,911 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:02,911 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:02,911 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:02,911 INFO L82 PathProgramCache]: Analyzing trace with hash 865251330, now seen corresponding path program 1 times [2018-12-02 03:57:02,911 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:02,912 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:02,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:02,912 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:02,913 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:02,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:02,965 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 03:57:02,965 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:02,965 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-02 03:57:02,965 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 03:57:02,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 03:57:02,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-02 03:57:02,966 INFO L87 Difference]: Start difference. First operand 136 states and 141 transitions. Second operand 9 states. [2018-12-02 03:57:03,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:03,003 INFO L93 Difference]: Finished difference Result 140 states and 144 transitions. [2018-12-02 03:57:03,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 03:57:03,004 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 50 [2018-12-02 03:57:03,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:03,004 INFO L225 Difference]: With dead ends: 140 [2018-12-02 03:57:03,004 INFO L226 Difference]: Without dead ends: 136 [2018-12-02 03:57:03,005 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-02 03:57:03,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-02 03:57:03,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-02 03:57:03,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-02 03:57:03,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 140 transitions. [2018-12-02 03:57:03,007 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 140 transitions. Word has length 50 [2018-12-02 03:57:03,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:03,007 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 140 transitions. [2018-12-02 03:57:03,007 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 03:57:03,007 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 140 transitions. [2018-12-02 03:57:03,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-02 03:57:03,008 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:03,008 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:03,008 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:03,008 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:03,008 INFO L82 PathProgramCache]: Analyzing trace with hash 1664444297, now seen corresponding path program 1 times [2018-12-02 03:57:03,008 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:03,008 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:03,009 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:03,009 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:03,009 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:03,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:03,106 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 03:57:03,106 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:03,106 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-12-02 03:57:03,106 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-02 03:57:03,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-02 03:57:03,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=157, Unknown=0, NotChecked=0, Total=182 [2018-12-02 03:57:03,106 INFO L87 Difference]: Start difference. First operand 136 states and 140 transitions. Second operand 14 states. [2018-12-02 03:57:03,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:03,304 INFO L93 Difference]: Finished difference Result 134 states and 138 transitions. [2018-12-02 03:57:03,305 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-02 03:57:03,305 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 61 [2018-12-02 03:57:03,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:03,305 INFO L225 Difference]: With dead ends: 134 [2018-12-02 03:57:03,305 INFO L226 Difference]: Without dead ends: 134 [2018-12-02 03:57:03,305 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2018-12-02 03:57:03,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-02 03:57:03,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-02 03:57:03,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-02 03:57:03,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 138 transitions. [2018-12-02 03:57:03,308 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 138 transitions. Word has length 61 [2018-12-02 03:57:03,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:03,308 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 138 transitions. [2018-12-02 03:57:03,309 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-02 03:57:03,309 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 138 transitions. [2018-12-02 03:57:03,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-02 03:57:03,309 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:03,309 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:03,310 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:03,310 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:03,310 INFO L82 PathProgramCache]: Analyzing trace with hash 1664444298, now seen corresponding path program 1 times [2018-12-02 03:57:03,310 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:03,310 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:03,311 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:03,311 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:03,311 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:03,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:03,358 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:03,358 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:03,358 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:03,365 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:03,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:03,389 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:03,396 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:03,411 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 03:57:03,411 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-12-02 03:57:03,411 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 03:57:03,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 03:57:03,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-12-02 03:57:03,412 INFO L87 Difference]: Start difference. First operand 134 states and 138 transitions. Second operand 10 states. [2018-12-02 03:57:03,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:03,427 INFO L93 Difference]: Finished difference Result 137 states and 141 transitions. [2018-12-02 03:57:03,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 03:57:03,427 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 61 [2018-12-02 03:57:03,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:03,428 INFO L225 Difference]: With dead ends: 137 [2018-12-02 03:57:03,428 INFO L226 Difference]: Without dead ends: 135 [2018-12-02 03:57:03,428 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-12-02 03:57:03,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-02 03:57:03,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-12-02 03:57:03,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-12-02 03:57:03,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 139 transitions. [2018-12-02 03:57:03,430 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 139 transitions. Word has length 61 [2018-12-02 03:57:03,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:03,431 INFO L480 AbstractCegarLoop]: Abstraction has 135 states and 139 transitions. [2018-12-02 03:57:03,431 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 03:57:03,431 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 139 transitions. [2018-12-02 03:57:03,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-02 03:57:03,431 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:03,432 INFO L402 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:03,432 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:03,432 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:03,432 INFO L82 PathProgramCache]: Analyzing trace with hash -785964801, now seen corresponding path program 2 times [2018-12-02 03:57:03,432 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:03,432 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:03,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:03,433 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:03,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:03,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:03,496 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:03,496 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:03,496 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:03,503 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 03:57:03,523 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 03:57:03,523 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 03:57:03,526 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:03,535 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:03,536 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:03,539 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:03,539 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-02 03:57:03,723 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-02 03:57:03,738 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 03:57:03,738 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [10] total 24 [2018-12-02 03:57:03,738 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-02 03:57:03,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-02 03:57:03,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=475, Unknown=0, NotChecked=0, Total=552 [2018-12-02 03:57:03,739 INFO L87 Difference]: Start difference. First operand 135 states and 139 transitions. Second operand 24 states. [2018-12-02 03:57:04,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:04,472 INFO L93 Difference]: Finished difference Result 136 states and 140 transitions. [2018-12-02 03:57:04,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-02 03:57:04,472 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 62 [2018-12-02 03:57:04,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:04,473 INFO L225 Difference]: With dead ends: 136 [2018-12-02 03:57:04,473 INFO L226 Difference]: Without dead ends: 134 [2018-12-02 03:57:04,474 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 46 SyntacticMatches, 3 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=177, Invalid=1155, Unknown=0, NotChecked=0, Total=1332 [2018-12-02 03:57:04,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-02 03:57:04,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-02 03:57:04,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-02 03:57:04,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 138 transitions. [2018-12-02 03:57:04,476 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 138 transitions. Word has length 62 [2018-12-02 03:57:04,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:04,477 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 138 transitions. [2018-12-02 03:57:04,477 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-02 03:57:04,477 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 138 transitions. [2018-12-02 03:57:04,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 03:57:04,477 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:04,478 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:04,478 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:04,478 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:04,478 INFO L82 PathProgramCache]: Analyzing trace with hash 1963990681, now seen corresponding path program 1 times [2018-12-02 03:57:04,478 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:04,478 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:04,479 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:04,479 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 03:57:04,479 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:04,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:04,526 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-02 03:57:04,526 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:04,526 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 03:57:04,526 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 03:57:04,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 03:57:04,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-02 03:57:04,526 INFO L87 Difference]: Start difference. First operand 134 states and 138 transitions. Second operand 10 states. [2018-12-02 03:57:04,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:04,559 INFO L93 Difference]: Finished difference Result 137 states and 140 transitions. [2018-12-02 03:57:04,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 03:57:04,559 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 72 [2018-12-02 03:57:04,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:04,559 INFO L225 Difference]: With dead ends: 137 [2018-12-02 03:57:04,559 INFO L226 Difference]: Without dead ends: 134 [2018-12-02 03:57:04,560 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-02 03:57:04,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-02 03:57:04,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-02 03:57:04,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-02 03:57:04,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 137 transitions. [2018-12-02 03:57:04,561 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 137 transitions. Word has length 72 [2018-12-02 03:57:04,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:04,562 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 137 transitions. [2018-12-02 03:57:04,562 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 03:57:04,562 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 137 transitions. [2018-12-02 03:57:04,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-02 03:57:04,562 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:04,562 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:04,562 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:04,563 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:04,563 INFO L82 PathProgramCache]: Analyzing trace with hash -1499600980, now seen corresponding path program 1 times [2018-12-02 03:57:04,563 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:04,563 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:04,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:04,563 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:04,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:04,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:04,668 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-02 03:57:04,668 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:04,668 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-12-02 03:57:04,669 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-02 03:57:04,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-02 03:57:04,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=211, Unknown=0, NotChecked=0, Total=240 [2018-12-02 03:57:04,669 INFO L87 Difference]: Start difference. First operand 134 states and 137 transitions. Second operand 16 states. [2018-12-02 03:57:04,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:04,933 INFO L93 Difference]: Finished difference Result 141 states and 144 transitions. [2018-12-02 03:57:04,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-02 03:57:04,934 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 85 [2018-12-02 03:57:04,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:04,934 INFO L225 Difference]: With dead ends: 141 [2018-12-02 03:57:04,934 INFO L226 Difference]: Without dead ends: 141 [2018-12-02 03:57:04,934 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2018-12-02 03:57:04,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-02 03:57:04,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 132. [2018-12-02 03:57:04,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-02 03:57:04,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 135 transitions. [2018-12-02 03:57:04,936 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 135 transitions. Word has length 85 [2018-12-02 03:57:04,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:04,936 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 135 transitions. [2018-12-02 03:57:04,936 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-02 03:57:04,936 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 135 transitions. [2018-12-02 03:57:04,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-02 03:57:04,937 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:04,937 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:04,937 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:04,937 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:04,937 INFO L82 PathProgramCache]: Analyzing trace with hash -1499600979, now seen corresponding path program 1 times [2018-12-02 03:57:04,937 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:04,937 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:04,938 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:04,938 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:04,938 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:04,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:05,009 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:05,009 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:05,009 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:05,018 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:05,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:05,059 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:05,071 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:05,095 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 03:57:05,095 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-12-02 03:57:05,095 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-02 03:57:05,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-02 03:57:05,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-12-02 03:57:05,096 INFO L87 Difference]: Start difference. First operand 132 states and 135 transitions. Second operand 12 states. [2018-12-02 03:57:05,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:05,118 INFO L93 Difference]: Finished difference Result 135 states and 138 transitions. [2018-12-02 03:57:05,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-02 03:57:05,118 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 85 [2018-12-02 03:57:05,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:05,119 INFO L225 Difference]: With dead ends: 135 [2018-12-02 03:57:05,119 INFO L226 Difference]: Without dead ends: 133 [2018-12-02 03:57:05,119 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 85 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-12-02 03:57:05,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-12-02 03:57:05,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-12-02 03:57:05,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-12-02 03:57:05,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 136 transitions. [2018-12-02 03:57:05,122 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 136 transitions. Word has length 85 [2018-12-02 03:57:05,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:05,122 INFO L480 AbstractCegarLoop]: Abstraction has 133 states and 136 transitions. [2018-12-02 03:57:05,122 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-02 03:57:05,122 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 136 transitions. [2018-12-02 03:57:05,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-02 03:57:05,123 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:05,123 INFO L402 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:05,123 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:05,123 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:05,123 INFO L82 PathProgramCache]: Analyzing trace with hash -481832414, now seen corresponding path program 2 times [2018-12-02 03:57:05,123 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:05,123 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:05,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:05,124 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:05,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:05,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:05,192 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:05,192 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:05,192 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:05,201 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 03:57:05,237 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 03:57:05,237 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 03:57:05,240 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:05,251 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:05,251 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:05,255 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:05,255 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-02 03:57:05,560 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-02 03:57:05,576 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 03:57:05,576 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [12] total 29 [2018-12-02 03:57:05,576 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-12-02 03:57:05,576 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-12-02 03:57:05,576 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=707, Unknown=0, NotChecked=0, Total=812 [2018-12-02 03:57:05,576 INFO L87 Difference]: Start difference. First operand 133 states and 136 transitions. Second operand 29 states. [2018-12-02 03:57:06,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:06,259 INFO L93 Difference]: Finished difference Result 134 states and 137 transitions. [2018-12-02 03:57:06,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-12-02 03:57:06,259 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 86 [2018-12-02 03:57:06,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:06,259 INFO L225 Difference]: With dead ends: 134 [2018-12-02 03:57:06,259 INFO L226 Difference]: Without dead ends: 132 [2018-12-02 03:57:06,260 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 65 SyntacticMatches, 5 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 337 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=258, Invalid=1722, Unknown=0, NotChecked=0, Total=1980 [2018-12-02 03:57:06,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-12-02 03:57:06,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-12-02 03:57:06,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-02 03:57:06,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 135 transitions. [2018-12-02 03:57:06,261 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 135 transitions. Word has length 86 [2018-12-02 03:57:06,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:06,261 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 135 transitions. [2018-12-02 03:57:06,261 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-12-02 03:57:06,262 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 135 transitions. [2018-12-02 03:57:06,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-02 03:57:06,262 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:06,262 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:06,262 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:06,262 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:06,262 INFO L82 PathProgramCache]: Analyzing trace with hash -2061581223, now seen corresponding path program 1 times [2018-12-02 03:57:06,262 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:06,262 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:06,263 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:06,263 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 03:57:06,263 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:06,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:06,310 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-02 03:57:06,310 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:06,310 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 03:57:06,310 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 03:57:06,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 03:57:06,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-02 03:57:06,310 INFO L87 Difference]: Start difference. First operand 132 states and 135 transitions. Second operand 10 states. [2018-12-02 03:57:06,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:06,341 INFO L93 Difference]: Finished difference Result 134 states and 136 transitions. [2018-12-02 03:57:06,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 03:57:06,341 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 85 [2018-12-02 03:57:06,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:06,342 INFO L225 Difference]: With dead ends: 134 [2018-12-02 03:57:06,342 INFO L226 Difference]: Without dead ends: 132 [2018-12-02 03:57:06,342 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-02 03:57:06,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-12-02 03:57:06,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-12-02 03:57:06,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-02 03:57:06,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 134 transitions. [2018-12-02 03:57:06,345 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 134 transitions. Word has length 85 [2018-12-02 03:57:06,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:06,345 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 134 transitions. [2018-12-02 03:57:06,345 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 03:57:06,345 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 134 transitions. [2018-12-02 03:57:06,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-12-02 03:57:06,346 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:06,346 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:06,346 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:06,346 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:06,347 INFO L82 PathProgramCache]: Analyzing trace with hash -1177100084, now seen corresponding path program 1 times [2018-12-02 03:57:06,347 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:06,347 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:06,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:06,347 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:06,348 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:06,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:06,494 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-02 03:57:06,494 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:06,494 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-02 03:57:06,495 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-02 03:57:06,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-02 03:57:06,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=343, Unknown=0, NotChecked=0, Total=380 [2018-12-02 03:57:06,495 INFO L87 Difference]: Start difference. First operand 132 states and 134 transitions. Second operand 20 states. [2018-12-02 03:57:06,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:06,853 INFO L93 Difference]: Finished difference Result 135 states and 137 transitions. [2018-12-02 03:57:06,854 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-02 03:57:06,854 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 101 [2018-12-02 03:57:06,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:06,854 INFO L225 Difference]: With dead ends: 135 [2018-12-02 03:57:06,854 INFO L226 Difference]: Without dead ends: 135 [2018-12-02 03:57:06,854 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=637, Unknown=0, NotChecked=0, Total=702 [2018-12-02 03:57:06,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-02 03:57:06,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 130. [2018-12-02 03:57:06,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-12-02 03:57:06,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions. [2018-12-02 03:57:06,857 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 101 [2018-12-02 03:57:06,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:06,857 INFO L480 AbstractCegarLoop]: Abstraction has 130 states and 132 transitions. [2018-12-02 03:57:06,857 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-02 03:57:06,857 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions. [2018-12-02 03:57:06,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-12-02 03:57:06,857 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:06,857 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:06,858 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:06,858 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:06,858 INFO L82 PathProgramCache]: Analyzing trace with hash -1177100083, now seen corresponding path program 1 times [2018-12-02 03:57:06,858 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:06,858 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:06,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:06,859 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:06,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:06,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:06,948 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:06,949 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:06,949 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:06,957 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:07,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:07,007 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:07,033 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:07,049 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 03:57:07,049 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-12-02 03:57:07,049 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-02 03:57:07,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-02 03:57:07,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-12-02 03:57:07,050 INFO L87 Difference]: Start difference. First operand 130 states and 132 transitions. Second operand 14 states. [2018-12-02 03:57:07,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:07,075 INFO L93 Difference]: Finished difference Result 133 states and 135 transitions. [2018-12-02 03:57:07,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 03:57:07,075 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 101 [2018-12-02 03:57:07,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:07,076 INFO L225 Difference]: With dead ends: 133 [2018-12-02 03:57:07,076 INFO L226 Difference]: Without dead ends: 131 [2018-12-02 03:57:07,076 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 101 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-12-02 03:57:07,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-12-02 03:57:07,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-12-02 03:57:07,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-12-02 03:57:07,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 133 transitions. [2018-12-02 03:57:07,079 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 133 transitions. Word has length 101 [2018-12-02 03:57:07,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:07,079 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 133 transitions. [2018-12-02 03:57:07,079 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-02 03:57:07,080 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions. [2018-12-02 03:57:07,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-02 03:57:07,080 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:07,080 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:07,080 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:07,081 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:07,081 INFO L82 PathProgramCache]: Analyzing trace with hash -1492172478, now seen corresponding path program 2 times [2018-12-02 03:57:07,081 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:07,081 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:07,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:07,082 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:07,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:07,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:07,168 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:07,168 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:07,168 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:07,176 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 03:57:07,212 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 03:57:07,212 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 03:57:07,215 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:07,226 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:07,226 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:07,229 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:07,229 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-02 03:57:07,622 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-12-02 03:57:07,637 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 03:57:07,637 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [14] total 35 [2018-12-02 03:57:07,637 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-12-02 03:57:07,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-12-02 03:57:07,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=1050, Unknown=0, NotChecked=0, Total=1190 [2018-12-02 03:57:07,638 INFO L87 Difference]: Start difference. First operand 131 states and 133 transitions. Second operand 35 states. [2018-12-02 03:57:08,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:08,749 INFO L93 Difference]: Finished difference Result 132 states and 134 transitions. [2018-12-02 03:57:08,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-12-02 03:57:08,749 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 102 [2018-12-02 03:57:08,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:08,749 INFO L225 Difference]: With dead ends: 132 [2018-12-02 03:57:08,749 INFO L226 Difference]: Without dead ends: 130 [2018-12-02 03:57:08,750 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 75 SyntacticMatches, 7 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 532 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=351, Invalid=2619, Unknown=0, NotChecked=0, Total=2970 [2018-12-02 03:57:08,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-12-02 03:57:08,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2018-12-02 03:57:08,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-12-02 03:57:08,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions. [2018-12-02 03:57:08,751 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 102 [2018-12-02 03:57:08,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:08,751 INFO L480 AbstractCegarLoop]: Abstraction has 130 states and 132 transitions. [2018-12-02 03:57:08,752 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-12-02 03:57:08,752 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions. [2018-12-02 03:57:08,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-12-02 03:57:08,752 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:08,752 INFO L402 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:08,752 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:08,752 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:08,752 INFO L82 PathProgramCache]: Analyzing trace with hash 2022543782, now seen corresponding path program 1 times [2018-12-02 03:57:08,752 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:08,753 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:08,753 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:08,753 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 03:57:08,753 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:08,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:08,834 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:08,835 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:08,835 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:08,841 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:08,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:08,881 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:08,894 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:08,909 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 03:57:08,910 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-12-02 03:57:08,910 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-02 03:57:08,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-02 03:57:08,910 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-12-02 03:57:08,910 INFO L87 Difference]: Start difference. First operand 130 states and 132 transitions. Second operand 16 states. [2018-12-02 03:57:08,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:08,940 INFO L93 Difference]: Finished difference Result 133 states and 135 transitions. [2018-12-02 03:57:08,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-02 03:57:08,940 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 108 [2018-12-02 03:57:08,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:08,941 INFO L225 Difference]: With dead ends: 133 [2018-12-02 03:57:08,941 INFO L226 Difference]: Without dead ends: 131 [2018-12-02 03:57:08,941 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-12-02 03:57:08,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-12-02 03:57:08,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-12-02 03:57:08,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-12-02 03:57:08,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 133 transitions. [2018-12-02 03:57:08,942 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 133 transitions. Word has length 108 [2018-12-02 03:57:08,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:08,942 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 133 transitions. [2018-12-02 03:57:08,943 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-02 03:57:08,943 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions. [2018-12-02 03:57:08,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-12-02 03:57:08,943 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:08,943 INFO L402 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:08,943 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:08,943 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:08,943 INFO L82 PathProgramCache]: Analyzing trace with hash -1491946607, now seen corresponding path program 2 times [2018-12-02 03:57:08,943 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:08,943 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:08,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:08,944 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:08,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:08,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:09,022 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:09,022 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:09,022 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:09,030 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 03:57:09,081 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 03:57:09,081 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 03:57:09,088 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:09,163 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 03:57:09,164 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 03:57:09,165 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:09,166 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:09,167 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:09,168 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-12-02 03:57:09,236 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 03:57:09,238 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 03:57:09,241 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 03:57:09,241 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-12-02 03:57:09,840 WARN L854 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-12-02 03:57:09,846 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-12-02 03:57:09,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:09,849 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-12-02 03:57:09,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:09,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:09,854 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-12-02 03:57:09,855 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:09,859 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:09,862 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:09,865 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:09,865 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-12-02 03:57:10,135 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:10,135 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-12-02 03:57:10,137 INFO L683 Elim1Store]: detected equality via solver [2018-12-02 03:57:10,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:10,138 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-12-02 03:57:10,138 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:10,144 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:10,147 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:10,147 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-12-02 03:57:10,453 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-12-02 03:57:10,454 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-02 03:57:10,454 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:10,455 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:10,456 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:10,456 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-12-02 03:57:10,497 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-12-02 03:57:10,512 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 03:57:10,512 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [41] imperfect sequences [16] total 55 [2018-12-02 03:57:10,512 INFO L459 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-12-02 03:57:10,512 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-12-02 03:57:10,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=2668, Unknown=1, NotChecked=104, Total=2970 [2018-12-02 03:57:10,513 INFO L87 Difference]: Start difference. First operand 131 states and 133 transitions. Second operand 55 states. [2018-12-02 03:57:12,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:12,386 INFO L93 Difference]: Finished difference Result 112 states and 112 transitions. [2018-12-02 03:57:12,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-12-02 03:57:12,387 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 109 [2018-12-02 03:57:12,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:12,387 INFO L225 Difference]: With dead ends: 112 [2018-12-02 03:57:12,387 INFO L226 Difference]: Without dead ends: 110 [2018-12-02 03:57:12,389 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 70 SyntacticMatches, 1 SemanticMatches, 87 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1436 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=503, Invalid=7156, Unknown=1, NotChecked=172, Total=7832 [2018-12-02 03:57:12,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-12-02 03:57:12,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-12-02 03:57:12,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-12-02 03:57:12,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 110 transitions. [2018-12-02 03:57:12,392 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 110 transitions. Word has length 109 [2018-12-02 03:57:12,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:12,392 INFO L480 AbstractCegarLoop]: Abstraction has 110 states and 110 transitions. [2018-12-02 03:57:12,392 INFO L481 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-12-02 03:57:12,392 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 110 transitions. [2018-12-02 03:57:12,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-12-02 03:57:12,393 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:12,393 INFO L402 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:12,393 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:12,394 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:12,394 INFO L82 PathProgramCache]: Analyzing trace with hash 281292969, now seen corresponding path program 1 times [2018-12-02 03:57:12,394 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:12,394 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:12,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:12,395 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 03:57:12,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:12,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:12,510 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:12,510 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:12,510 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:12,519 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:12,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:12,564 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:12,575 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:12,599 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 03:57:12,600 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-12-02 03:57:12,600 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-02 03:57:12,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-02 03:57:12,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-12-02 03:57:12,600 INFO L87 Difference]: Start difference. First operand 110 states and 110 transitions. Second operand 18 states. [2018-12-02 03:57:12,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:12,631 INFO L93 Difference]: Finished difference Result 113 states and 113 transitions. [2018-12-02 03:57:12,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-02 03:57:12,631 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 109 [2018-12-02 03:57:12,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:12,631 INFO L225 Difference]: With dead ends: 113 [2018-12-02 03:57:12,631 INFO L226 Difference]: Without dead ends: 111 [2018-12-02 03:57:12,632 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-12-02 03:57:12,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-12-02 03:57:12,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-12-02 03:57:12,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-12-02 03:57:12,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 111 transitions. [2018-12-02 03:57:12,633 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 111 transitions. Word has length 109 [2018-12-02 03:57:12,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:12,633 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 111 transitions. [2018-12-02 03:57:12,634 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-02 03:57:12,634 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 111 transitions. [2018-12-02 03:57:12,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-12-02 03:57:12,634 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:12,634 INFO L402 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:12,634 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:12,634 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:12,634 INFO L82 PathProgramCache]: Analyzing trace with hash -1293726690, now seen corresponding path program 2 times [2018-12-02 03:57:12,634 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:12,635 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:12,635 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:12,635 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:12,635 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:12,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:12,746 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:12,746 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:12,746 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:12,752 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 03:57:12,805 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-02 03:57:12,805 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 03:57:12,808 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:12,818 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:12,841 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 03:57:12,841 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-12-02 03:57:12,842 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-02 03:57:12,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-02 03:57:12,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-12-02 03:57:12,842 INFO L87 Difference]: Start difference. First operand 111 states and 111 transitions. Second operand 19 states. [2018-12-02 03:57:12,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:12,868 INFO L93 Difference]: Finished difference Result 114 states and 114 transitions. [2018-12-02 03:57:12,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-02 03:57:12,869 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 110 [2018-12-02 03:57:12,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:12,869 INFO L225 Difference]: With dead ends: 114 [2018-12-02 03:57:12,869 INFO L226 Difference]: Without dead ends: 112 [2018-12-02 03:57:12,869 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 110 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-12-02 03:57:12,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-12-02 03:57:12,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-12-02 03:57:12,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-12-02 03:57:12,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 112 transitions. [2018-12-02 03:57:12,871 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 112 transitions. Word has length 110 [2018-12-02 03:57:12,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:12,871 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 112 transitions. [2018-12-02 03:57:12,871 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-02 03:57:12,871 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 112 transitions. [2018-12-02 03:57:12,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-02 03:57:12,871 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:12,871 INFO L402 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:12,872 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:12,872 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:12,872 INFO L82 PathProgramCache]: Analyzing trace with hash 1420271433, now seen corresponding path program 3 times [2018-12-02 03:57:12,872 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:12,872 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:12,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:12,873 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 03:57:12,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:12,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:13,013 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:13,013 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:57:13,013 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:57:13,019 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 03:57:28,641 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-12-02 03:57:28,642 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 03:57:28,649 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:28,851 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:28,869 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 03:57:28,869 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 23] total 40 [2018-12-02 03:57:28,869 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-12-02 03:57:28,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-12-02 03:57:28,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=470, Invalid=1090, Unknown=0, NotChecked=0, Total=1560 [2018-12-02 03:57:28,870 INFO L87 Difference]: Start difference. First operand 112 states and 112 transitions. Second operand 40 states. [2018-12-02 03:57:28,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:28,972 INFO L93 Difference]: Finished difference Result 115 states and 115 transitions. [2018-12-02 03:57:28,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-02 03:57:28,972 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 111 [2018-12-02 03:57:28,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:28,973 INFO L225 Difference]: With dead ends: 115 [2018-12-02 03:57:28,973 INFO L226 Difference]: Without dead ends: 113 [2018-12-02 03:57:28,973 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 616 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=512, Invalid=1210, Unknown=0, NotChecked=0, Total=1722 [2018-12-02 03:57:28,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-12-02 03:57:28,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-12-02 03:57:28,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-12-02 03:57:28,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 113 transitions. [2018-12-02 03:57:28,975 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 113 transitions. Word has length 111 [2018-12-02 03:57:28,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:28,975 INFO L480 AbstractCegarLoop]: Abstraction has 113 states and 113 transitions. [2018-12-02 03:57:28,975 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-12-02 03:57:28,975 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 113 transitions. [2018-12-02 03:57:28,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-02 03:57:28,976 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:28,976 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:28,976 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-02 03:57:28,976 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:28,977 INFO L82 PathProgramCache]: Analyzing trace with hash -345132674, now seen corresponding path program 4 times [2018-12-02 03:57:28,977 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 03:57:28,977 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 03:57:28,977 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:28,977 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 03:57:28,978 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 03:57:29,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 03:57:29,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 03:57:29,085 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-02 03:57:29,094 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-12-02 03:57:29,098 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-02 03:57:29,102 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 17 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-02 03:57:29,102 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 18 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-02 03:57:29,112 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 03:57:29 BoogieIcfgContainer [2018-12-02 03:57:29,112 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-02 03:57:29,112 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-02 03:57:29,112 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-02 03:57:29,112 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-02 03:57:29,112 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 03:56:59" (3/4) ... [2018-12-02 03:57:29,115 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-02 03:57:29,115 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-02 03:57:29,115 INFO L168 Benchmark]: Toolchain (without parser) took 30310.17 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 302.0 MB). Free memory was 949.5 MB in the beginning and 823.5 MB in the end (delta: 126.0 MB). Peak memory consumption was 428.0 MB. Max. memory is 11.5 GB. [2018-12-02 03:57:29,116 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 03:57:29,117 INFO L168 Benchmark]: CACSL2BoogieTranslator took 330.55 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 949.5 MB in the beginning and 1.1 GB in the end (delta: -124.2 MB). Peak memory consumption was 33.6 MB. Max. memory is 11.5 GB. [2018-12-02 03:57:29,117 INFO L168 Benchmark]: Boogie Preprocessor took 46.40 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-02 03:57:29,117 INFO L168 Benchmark]: RCFGBuilder took 502.64 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 969.2 MB in the end (delta: 101.7 MB). Peak memory consumption was 101.7 MB. Max. memory is 11.5 GB. [2018-12-02 03:57:29,117 INFO L168 Benchmark]: TraceAbstraction took 29424.88 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 203.9 MB). Free memory was 969.2 MB in the beginning and 823.5 MB in the end (delta: 145.7 MB). Peak memory consumption was 349.6 MB. Max. memory is 11.5 GB. [2018-12-02 03:57:29,117 INFO L168 Benchmark]: Witness Printer took 3.16 ms. Allocated memory is still 1.3 GB. Free memory is still 823.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 03:57:29,118 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 330.55 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 949.5 MB in the beginning and 1.1 GB in the end (delta: -124.2 MB). Peak memory consumption was 33.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 46.40 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 502.64 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 969.2 MB in the end (delta: 101.7 MB). Peak memory consumption was 101.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 29424.88 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 203.9 MB). Free memory was 969.2 MB in the beginning and 823.5 MB in the end (delta: 145.7 MB). Peak memory consumption was 349.6 MB. Max. memory is 11.5 GB. * Witness Printer took 3.16 ms. Allocated memory is still 1.3 GB. Free memory is still 823.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 17 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 18 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1443]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1443. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={30:0}] [L1444] CALL entry_point() VAL [ldv_global_msg_list={30:0}] [L1436] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={30:0}] [L1437] CALL, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={30:0}] [L1406] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={30:0}] [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16, ldv_global_msg_list={30:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=16, \result={26:0}, ldv_global_msg_list={30:0}, malloc(size)={26:0}, size=16] [L1408] RET, EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_global_msg_list={30:0}, ldv_malloc(sizeof(*kobj))={26:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={26:0}, ldv_global_msg_list={30:0}, memset(kobj, 0, sizeof(*kobj))={26:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={26:12}, ldv_global_msg_list={30:0}] [L1294] ((&kref->refcount)->counter) = (1) VAL [kref={26:12}, kref={26:12}, ldv_global_msg_list={30:0}] [L1382] RET ldv_kref_init(&kobj->kref) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [ldv_global_msg_list={30:0}, list={26:4}] [L1099] list->next = list VAL [ldv_global_msg_list={30:0}, list={26:4}, list={26:4}] [L1100] list->prev = list VAL [ldv_global_msg_list={30:0}, list={26:4}, list={26:4}] [L1383] RET LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1398] RET ldv_kobject_init_internal(kobj) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1413] RET ldv_kobject_init(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1414] return kobj; VAL [\result={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1437] RET, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={30:0}, ldv_kobject_create()={26:0}] [L1437] kobj = ldv_kobject_create() [L1438] CALL ldv_kobject_get(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={26:12}, ldv_global_msg_list={30:0}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={30:0}, v={26:12}] [L1255] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={26:12}, v={26:12}] [L1256] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={26:12}, v={26:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=2, v={26:12}, v={26:12}] [L1258] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=2, v={26:12}, v={26:12}] [L1259] return temp; VAL [\old(i)=1, \result=2, i=1, ldv_global_msg_list={30:0}, temp=2, v={26:12}, v={26:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={26:12}, kref={26:12}, ldv_atomic_add_return(1, (&kref->refcount))=2, ldv_global_msg_list={30:0}] [L1374] RET ldv_kref_get(&kobj->kref) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1375] return kobj; VAL [\result={26:0}, kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1438] RET ldv_kobject_get(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}, ldv_kobject_get(kobj)={26:0}] [L1440] CALL ldv_kobject_put(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={26:12}, ldv_global_msg_list={30:0}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={26:12}, ldv_global_msg_list={30:0}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={30:0}, v={26:12}] [L1264] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={26:12}, v={26:12}] [L1265] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={26:12}, v={26:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=1, v={26:12}, v={26:12}] [L1267] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=1, v={26:12}, v={26:12}] [L1268] return temp; VAL [\old(i)=1, \result=1, i=1, ldv_global_msg_list={30:0}, temp=1, v={26:12}, v={26:12}] [L1281] RET, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={26:12}, kref={26:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, ldv_global_msg_list={30:0}, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] return 0; VAL [\old(count)=1, \result=0, count=1, kref={26:12}, kref={26:12}, ldv_global_msg_list={30:0}, release={-1:0}, release={-1:0}] [L1313] RET, EXPR ldv_kref_sub(kref, 1, release) VAL [kref={26:12}, kref={26:12}, ldv_global_msg_list={30:0}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] return ldv_kref_sub(kref, 1, release); [L1363] RET ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1440] RET ldv_kobject_put(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1444] RET entry_point() VAL [ldv_global_msg_list={30:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 43 procedures, 311 locations, 67 error locations. UNSAFE Result, 29.3s OverallTime, 33 OverallIterations, 16 TraceHistogramMax, 7.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3887 SDtfs, 878 SDslu, 33527 SDs, 0 SdLazy, 11483 SolverSat, 218 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1652 GetRequests, 1080 SyntacticMatches, 20 SemanticMatches, 552 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3544 ImplicationChecksByTransitivity, 5.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=171occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 32 MinimizatonAttempts, 108 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 16.2s SatisfiabilityAnalysisTime, 4.8s InterpolantComputationTime, 3274 NumberOfCodeBlocks, 3232 NumberOfCodeBlocksAsserted, 57 NumberOfCheckSat, 3115 ConstructedInterpolants, 164 QuantifiedInterpolants, 566107 SizeOfPredicates, 110 NumberOfNonLiveVariables, 5947 ConjunctsInSsa, 568 ConjunctsInUnsatCore, 47 InterpolantComputations, 23 PerfectInterpolantSequences, 400/1557 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-02 03:57:30,313 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 03:57:30,314 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 03:57:30,321 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-02 03:57:30,321 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-02 03:57:30,322 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-02 03:57:30,323 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-02 03:57:30,324 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-02 03:57:30,325 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-02 03:57:30,325 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-02 03:57:30,326 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-02 03:57:30,326 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 03:57:30,327 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 03:57:30,327 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 03:57:30,328 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 03:57:30,328 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 03:57:30,329 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 03:57:30,330 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 03:57:30,332 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 03:57:30,333 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 03:57:30,333 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 03:57:30,334 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 03:57:30,336 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 03:57:30,336 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 03:57:30,336 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 03:57:30,337 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 03:57:30,337 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 03:57:30,338 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 03:57:30,339 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 03:57:30,339 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 03:57:30,340 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 03:57:30,340 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 03:57:30,340 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 03:57:30,340 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 03:57:30,341 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 03:57:30,341 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 03:57:30,341 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf [2018-12-02 03:57:30,351 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 03:57:30,351 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 03:57:30,352 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 03:57:30,352 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 03:57:30,352 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-02 03:57:30,353 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-02 03:57:30,353 INFO L133 SettingsManager]: * Use SBE=true [2018-12-02 03:57:30,353 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 03:57:30,353 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-02 03:57:30,353 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-02 03:57:30,353 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-02 03:57:30,353 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-02 03:57:30,353 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 03:57:30,353 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-02 03:57:30,353 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-02 03:57:30,354 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-02 03:57:30,354 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 03:57:30,354 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-02 03:57:30,354 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-02 03:57:30,354 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-02 03:57:30,354 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-02 03:57:30,354 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 03:57:30,354 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 03:57:30,355 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 03:57:30,355 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 03:57:30,355 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 03:57:30,355 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 03:57:30,355 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 03:57:30,355 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-12-02 03:57:30,355 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 03:57:30,355 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-02 03:57:30,355 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4867b1d8e60a05de2199d52aa990071fe8bd647c [2018-12-02 03:57:30,380 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 03:57:30,390 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 03:57:30,393 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 03:57:30,394 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 03:57:30,394 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 03:57:30,395 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-02 03:57:30,437 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/data/02692f880/d75be7bb607d4365847d31fa84557b50/FLAGb18c4ca7c [2018-12-02 03:57:30,753 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 03:57:30,753 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-02 03:57:30,762 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/data/02692f880/d75be7bb607d4365847d31fa84557b50/FLAGb18c4ca7c [2018-12-02 03:57:30,770 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/data/02692f880/d75be7bb607d4365847d31fa84557b50 [2018-12-02 03:57:30,772 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 03:57:30,773 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-02 03:57:30,773 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 03:57:30,774 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 03:57:30,775 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 03:57:30,776 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 03:57:30" (1/1) ... [2018-12-02 03:57:30,777 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4096dacc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:57:30, skipping insertion in model container [2018-12-02 03:57:30,778 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 03:57:30" (1/1) ... [2018-12-02 03:57:30,782 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 03:57:30,803 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 03:57:30,998 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 03:57:31,047 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 03:57:31,081 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 03:57:31,114 INFO L195 MainTranslator]: Completed translation [2018-12-02 03:57:31,114 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:57:31 WrapperNode [2018-12-02 03:57:31,115 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 03:57:31,115 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 03:57:31,115 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 03:57:31,115 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 03:57:31,123 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:57:31" (1/1) ... [2018-12-02 03:57:31,123 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:57:31" (1/1) ... [2018-12-02 03:57:31,134 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:57:31" (1/1) ... [2018-12-02 03:57:31,135 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:57:31" (1/1) ... [2018-12-02 03:57:31,150 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:57:31" (1/1) ... [2018-12-02 03:57:31,153 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:57:31" (1/1) ... [2018-12-02 03:57:31,155 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:57:31" (1/1) ... [2018-12-02 03:57:31,159 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 03:57:31,160 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 03:57:31,160 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 03:57:31,160 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 03:57:31,160 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:57:31" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 03:57:31,190 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-02 03:57:31,190 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 03:57:31,190 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-02 03:57:31,190 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-12-02 03:57:31,190 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-12-02 03:57:31,190 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-12-02 03:57:31,190 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-12-02 03:57:31,190 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-02 03:57:31,190 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-02 03:57:31,191 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-02 03:57:31,191 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-12-02 03:57:31,191 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-12-02 03:57:31,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-12-02 03:57:31,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-12-02 03:57:31,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-12-02 03:57:31,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-12-02 03:57:31,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-12-02 03:57:31,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-12-02 03:57:31,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-12-02 03:57:31,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-12-02 03:57:31,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-02 03:57:31,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-12-02 03:57:31,192 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-12-02 03:57:31,193 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-02 03:57:31,193 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-02 03:57:31,193 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-02 03:57:31,193 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-02 03:57:31,193 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-12-02 03:57:31,193 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-12-02 03:57:31,193 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-12-02 03:57:31,193 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-12-02 03:57:31,193 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-12-02 03:57:31,193 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-12-02 03:57:31,193 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-12-02 03:57:31,193 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-12-02 03:57:31,193 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-12-02 03:57:31,194 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-12-02 03:57:31,194 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-12-02 03:57:31,194 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-12-02 03:57:31,194 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-12-02 03:57:31,194 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-12-02 03:57:31,194 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-12-02 03:57:31,194 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-12-02 03:57:31,194 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-12-02 03:57:31,194 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-12-02 03:57:31,194 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-12-02 03:57:31,194 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-12-02 03:57:31,194 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-12-02 03:57:31,195 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-12-02 03:57:31,195 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-12-02 03:57:31,195 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-12-02 03:57:31,195 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-12-02 03:57:31,195 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-12-02 03:57:31,195 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-12-02 03:57:31,195 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-12-02 03:57:31,195 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-12-02 03:57:31,195 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-12-02 03:57:31,195 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-12-02 03:57:31,195 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-12-02 03:57:31,195 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-12-02 03:57:31,195 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-12-02 03:57:31,196 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-12-02 03:57:31,196 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-12-02 03:57:31,196 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-12-02 03:57:31,196 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-12-02 03:57:31,196 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-12-02 03:57:31,196 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-12-02 03:57:31,196 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-12-02 03:57:31,196 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-12-02 03:57:31,196 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-12-02 03:57:31,196 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-12-02 03:57:31,196 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-12-02 03:57:31,196 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-12-02 03:57:31,197 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-12-02 03:57:31,198 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-12-02 03:57:31,199 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-02 03:57:31,200 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-02 03:57:31,201 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-02 03:57:31,202 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-12-02 03:57:31,203 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-12-02 03:57:31,203 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-02 03:57:31,203 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-02 03:57:31,203 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-02 03:57:31,203 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-02 03:57:31,203 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 03:57:31,203 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-12-02 03:57:31,203 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-12-02 03:57:31,203 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-12-02 03:57:31,203 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE4 [2018-12-02 03:57:31,456 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-02 03:57:31,673 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-02 03:57:31,878 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 03:57:31,878 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-02 03:57:31,878 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 03:57:31 BoogieIcfgContainer [2018-12-02 03:57:31,879 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 03:57:31,879 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 03:57:31,879 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 03:57:31,881 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 03:57:31,881 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 03:57:30" (1/3) ... [2018-12-02 03:57:31,882 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@43cd542b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 03:57:31, skipping insertion in model container [2018-12-02 03:57:31,882 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:57:31" (2/3) ... [2018-12-02 03:57:31,882 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@43cd542b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 03:57:31, skipping insertion in model container [2018-12-02 03:57:31,882 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 03:57:31" (3/3) ... [2018-12-02 03:57:31,883 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-02 03:57:31,889 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 03:57:31,894 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 67 error locations. [2018-12-02 03:57:31,904 INFO L257 AbstractCegarLoop]: Starting to check reachability of 67 error locations. [2018-12-02 03:57:31,918 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-02 03:57:31,919 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 03:57:31,919 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-02 03:57:31,919 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 03:57:31,919 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 03:57:31,919 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 03:57:31,919 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 03:57:31,919 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 03:57:31,919 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 03:57:31,929 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states. [2018-12-02 03:57:31,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-02 03:57:31,935 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:31,935 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:31,937 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:31,940 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:31,940 INFO L82 PathProgramCache]: Analyzing trace with hash 1655346548, now seen corresponding path program 1 times [2018-12-02 03:57:31,942 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:31,942 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:31,959 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:32,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:32,018 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:32,050 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:32,052 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:32,057 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:32,058 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 03:57:32,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:32,082 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:32,085 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:32,085 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 03:57:32,087 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 03:57:32,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 03:57:32,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:57:32,097 INFO L87 Difference]: Start difference. First operand 170 states. Second operand 5 states. [2018-12-02 03:57:32,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:32,316 INFO L93 Difference]: Finished difference Result 152 states and 163 transitions. [2018-12-02 03:57:32,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 03:57:32,317 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-02 03:57:32,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:32,327 INFO L225 Difference]: With dead ends: 152 [2018-12-02 03:57:32,327 INFO L226 Difference]: Without dead ends: 149 [2018-12-02 03:57:32,328 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:57:32,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-02 03:57:32,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 143. [2018-12-02 03:57:32,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-12-02 03:57:32,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 154 transitions. [2018-12-02 03:57:32,357 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 154 transitions. Word has length 17 [2018-12-02 03:57:32,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:32,357 INFO L480 AbstractCegarLoop]: Abstraction has 143 states and 154 transitions. [2018-12-02 03:57:32,357 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 03:57:32,357 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 154 transitions. [2018-12-02 03:57:32,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-02 03:57:32,358 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:32,358 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:32,358 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:32,358 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:32,358 INFO L82 PathProgramCache]: Analyzing trace with hash 1655346549, now seen corresponding path program 1 times [2018-12-02 03:57:32,359 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:32,359 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:32,373 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:32,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:32,407 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:32,416 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:32,416 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:32,420 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:32,420 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 03:57:32,448 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:32,448 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:32,449 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:32,449 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 03:57:32,450 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 03:57:32,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 03:57:32,451 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-02 03:57:32,451 INFO L87 Difference]: Start difference. First operand 143 states and 154 transitions. Second operand 6 states. [2018-12-02 03:57:32,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:32,697 INFO L93 Difference]: Finished difference Result 148 states and 159 transitions. [2018-12-02 03:57:32,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 03:57:32,698 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-02 03:57:32,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:32,699 INFO L225 Difference]: With dead ends: 148 [2018-12-02 03:57:32,699 INFO L226 Difference]: Without dead ends: 148 [2018-12-02 03:57:32,699 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-02 03:57:32,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-12-02 03:57:32,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 143. [2018-12-02 03:57:32,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-12-02 03:57:32,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 153 transitions. [2018-12-02 03:57:32,706 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 153 transitions. Word has length 17 [2018-12-02 03:57:32,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:32,706 INFO L480 AbstractCegarLoop]: Abstraction has 143 states and 153 transitions. [2018-12-02 03:57:32,706 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 03:57:32,706 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 153 transitions. [2018-12-02 03:57:32,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-02 03:57:32,706 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:32,706 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:32,707 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:32,707 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:32,707 INFO L82 PathProgramCache]: Analyzing trace with hash 1683975699, now seen corresponding path program 1 times [2018-12-02 03:57:32,707 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:32,707 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:32,722 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:32,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:32,750 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:32,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:32,770 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:32,771 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:32,771 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 03:57:32,771 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 03:57:32,772 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 03:57:32,772 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:57:32,772 INFO L87 Difference]: Start difference. First operand 143 states and 153 transitions. Second operand 5 states. [2018-12-02 03:57:32,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:32,788 INFO L93 Difference]: Finished difference Result 142 states and 150 transitions. [2018-12-02 03:57:32,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 03:57:32,788 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-02 03:57:32,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:32,789 INFO L225 Difference]: With dead ends: 142 [2018-12-02 03:57:32,789 INFO L226 Difference]: Without dead ends: 142 [2018-12-02 03:57:32,789 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:57:32,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-02 03:57:32,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 140. [2018-12-02 03:57:32,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-02 03:57:32,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 148 transitions. [2018-12-02 03:57:32,795 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 148 transitions. Word has length 17 [2018-12-02 03:57:32,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:32,795 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 148 transitions. [2018-12-02 03:57:32,795 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 03:57:32,795 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 148 transitions. [2018-12-02 03:57:32,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-02 03:57:32,796 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:32,796 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:32,796 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:32,796 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:32,797 INFO L82 PathProgramCache]: Analyzing trace with hash 1758022862, now seen corresponding path program 1 times [2018-12-02 03:57:32,797 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:32,797 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:32,818 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:32,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:32,856 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:32,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:32,875 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:32,876 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:32,876 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 03:57:32,876 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 03:57:32,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 03:57:32,876 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:57:32,876 INFO L87 Difference]: Start difference. First operand 140 states and 148 transitions. Second operand 5 states. [2018-12-02 03:57:32,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:32,897 INFO L93 Difference]: Finished difference Result 142 states and 149 transitions. [2018-12-02 03:57:32,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 03:57:32,897 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-12-02 03:57:32,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:32,899 INFO L225 Difference]: With dead ends: 142 [2018-12-02 03:57:32,899 INFO L226 Difference]: Without dead ends: 142 [2018-12-02 03:57:32,899 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:57:32,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-02 03:57:32,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 140. [2018-12-02 03:57:32,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-02 03:57:32,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 147 transitions. [2018-12-02 03:57:32,906 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 147 transitions. Word has length 27 [2018-12-02 03:57:32,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:32,906 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 147 transitions. [2018-12-02 03:57:32,906 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 03:57:32,906 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 147 transitions. [2018-12-02 03:57:32,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-02 03:57:32,907 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:32,907 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:32,907 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:32,908 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:32,908 INFO L82 PathProgramCache]: Analyzing trace with hash 1247488685, now seen corresponding path program 1 times [2018-12-02 03:57:32,908 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:32,908 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:32,922 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:32,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:32,970 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:33,009 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:33,009 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:33,011 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:33,011 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 03:57:33,011 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 03:57:33,011 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 03:57:33,011 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-02 03:57:33,011 INFO L87 Difference]: Start difference. First operand 140 states and 147 transitions. Second operand 7 states. [2018-12-02 03:57:33,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:33,055 INFO L93 Difference]: Finished difference Result 156 states and 164 transitions. [2018-12-02 03:57:33,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 03:57:33,055 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-12-02 03:57:33,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:33,056 INFO L225 Difference]: With dead ends: 156 [2018-12-02 03:57:33,056 INFO L226 Difference]: Without dead ends: 156 [2018-12-02 03:57:33,057 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-02 03:57:33,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-02 03:57:33,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 149. [2018-12-02 03:57:33,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-02 03:57:33,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 156 transitions. [2018-12-02 03:57:33,064 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 156 transitions. Word has length 27 [2018-12-02 03:57:33,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:33,065 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 156 transitions. [2018-12-02 03:57:33,065 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 03:57:33,065 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 156 transitions. [2018-12-02 03:57:33,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 03:57:33,065 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:33,066 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:33,066 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:33,066 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:33,066 INFO L82 PathProgramCache]: Analyzing trace with hash -858274277, now seen corresponding path program 1 times [2018-12-02 03:57:33,067 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:33,067 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:33,081 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:33,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:33,133 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:33,145 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:33,145 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:33,147 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:33,147 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 03:57:33,147 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 03:57:33,147 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 03:57:33,147 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 03:57:33,147 INFO L87 Difference]: Start difference. First operand 149 states and 156 transitions. Second operand 4 states. [2018-12-02 03:57:33,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:33,175 INFO L93 Difference]: Finished difference Result 152 states and 159 transitions. [2018-12-02 03:57:33,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 03:57:33,176 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-02 03:57:33,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:33,177 INFO L225 Difference]: With dead ends: 152 [2018-12-02 03:57:33,177 INFO L226 Difference]: Without dead ends: 150 [2018-12-02 03:57:33,177 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 03:57:33,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-02 03:57:33,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-02 03:57:33,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-02 03:57:33,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-02 03:57:33,183 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 32 [2018-12-02 03:57:33,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:33,184 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-02 03:57:33,184 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 03:57:33,184 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-02 03:57:33,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-02 03:57:33,185 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:33,185 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:33,185 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:33,185 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:33,186 INFO L82 PathProgramCache]: Analyzing trace with hash -608271994, now seen corresponding path program 1 times [2018-12-02 03:57:33,186 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:33,186 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:33,201 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:33,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:33,262 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:33,276 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:33,276 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 03:57:33,330 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:33,331 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 03:57:33,331 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-12-02 03:57:33,332 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-02 03:57:33,332 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-02 03:57:33,332 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-02 03:57:33,332 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 8 states. [2018-12-02 03:57:33,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:33,416 INFO L93 Difference]: Finished difference Result 157 states and 165 transitions. [2018-12-02 03:57:33,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 03:57:33,417 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2018-12-02 03:57:33,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:33,417 INFO L225 Difference]: With dead ends: 157 [2018-12-02 03:57:33,417 INFO L226 Difference]: Without dead ends: 153 [2018-12-02 03:57:33,418 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 58 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-12-02 03:57:33,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-12-02 03:57:33,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 153. [2018-12-02 03:57:33,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-12-02 03:57:33,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 160 transitions. [2018-12-02 03:57:33,421 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 160 transitions. Word has length 33 [2018-12-02 03:57:33,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:33,421 INFO L480 AbstractCegarLoop]: Abstraction has 153 states and 160 transitions. [2018-12-02 03:57:33,421 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-02 03:57:33,421 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 160 transitions. [2018-12-02 03:57:33,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-02 03:57:33,422 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:33,422 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:33,422 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:33,422 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:33,422 INFO L82 PathProgramCache]: Analyzing trace with hash 885785874, now seen corresponding path program 1 times [2018-12-02 03:57:33,423 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:33,423 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:33,438 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:33,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:33,494 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:33,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:33,532 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:33,534 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:33,534 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 03:57:33,534 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 03:57:33,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 03:57:33,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-02 03:57:33,534 INFO L87 Difference]: Start difference. First operand 153 states and 160 transitions. Second operand 7 states. [2018-12-02 03:57:33,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:33,564 INFO L93 Difference]: Finished difference Result 163 states and 170 transitions. [2018-12-02 03:57:33,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 03:57:33,564 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-12-02 03:57:33,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:33,565 INFO L225 Difference]: With dead ends: 163 [2018-12-02 03:57:33,565 INFO L226 Difference]: Without dead ends: 163 [2018-12-02 03:57:33,566 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-02 03:57:33,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-12-02 03:57:33,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 159. [2018-12-02 03:57:33,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-02 03:57:33,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 166 transitions. [2018-12-02 03:57:33,569 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 166 transitions. Word has length 36 [2018-12-02 03:57:33,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:33,569 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 166 transitions. [2018-12-02 03:57:33,569 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 03:57:33,569 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 166 transitions. [2018-12-02 03:57:33,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-02 03:57:33,570 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:33,570 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:33,570 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:33,570 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:33,571 INFO L82 PathProgramCache]: Analyzing trace with hash -1369388837, now seen corresponding path program 2 times [2018-12-02 03:57:33,571 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:33,571 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:33,585 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-02 03:57:33,640 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 03:57:33,640 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 03:57:33,642 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:33,645 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:33,645 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:33,646 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:33,646 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 03:57:33,737 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-02 03:57:33,737 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:33,739 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:33,739 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-02 03:57:33,739 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 03:57:33,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 03:57:33,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-12-02 03:57:33,739 INFO L87 Difference]: Start difference. First operand 159 states and 166 transitions. Second operand 13 states. [2018-12-02 03:57:34,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:34,762 INFO L93 Difference]: Finished difference Result 170 states and 176 transitions. [2018-12-02 03:57:34,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 03:57:34,763 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 36 [2018-12-02 03:57:34,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:34,764 INFO L225 Difference]: With dead ends: 170 [2018-12-02 03:57:34,764 INFO L226 Difference]: Without dead ends: 170 [2018-12-02 03:57:34,764 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-12-02 03:57:34,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-12-02 03:57:34,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 158. [2018-12-02 03:57:34,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-12-02 03:57:34,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 165 transitions. [2018-12-02 03:57:34,771 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 165 transitions. Word has length 36 [2018-12-02 03:57:34,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:34,771 INFO L480 AbstractCegarLoop]: Abstraction has 158 states and 165 transitions. [2018-12-02 03:57:34,771 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 03:57:34,772 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 165 transitions. [2018-12-02 03:57:34,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-02 03:57:34,773 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:34,773 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:34,773 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:34,773 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:34,774 INFO L82 PathProgramCache]: Analyzing trace with hash -1369388836, now seen corresponding path program 1 times [2018-12-02 03:57:34,774 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:34,774 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:34,796 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 03:57:34,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:34,883 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:34,910 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:34,910 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 03:57:35,048 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:35,050 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 03:57:35,050 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2018-12-02 03:57:35,050 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-02 03:57:35,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-02 03:57:35,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-12-02 03:57:35,051 INFO L87 Difference]: Start difference. First operand 158 states and 165 transitions. Second operand 14 states. [2018-12-02 03:57:35,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:35,539 INFO L93 Difference]: Finished difference Result 168 states and 179 transitions. [2018-12-02 03:57:35,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-02 03:57:35,540 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 36 [2018-12-02 03:57:35,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:35,541 INFO L225 Difference]: With dead ends: 168 [2018-12-02 03:57:35,541 INFO L226 Difference]: Without dead ends: 164 [2018-12-02 03:57:35,541 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 58 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=131, Invalid=211, Unknown=0, NotChecked=0, Total=342 [2018-12-02 03:57:35,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-12-02 03:57:35,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-12-02 03:57:35,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-12-02 03:57:35,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 171 transitions. [2018-12-02 03:57:35,548 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 171 transitions. Word has length 36 [2018-12-02 03:57:35,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:35,548 INFO L480 AbstractCegarLoop]: Abstraction has 164 states and 171 transitions. [2018-12-02 03:57:35,549 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-02 03:57:35,549 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 171 transitions. [2018-12-02 03:57:35,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-02 03:57:35,550 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:35,550 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:35,550 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:35,550 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:35,550 INFO L82 PathProgramCache]: Analyzing trace with hash 124691458, now seen corresponding path program 1 times [2018-12-02 03:57:35,551 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:35,551 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:35,572 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:35,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:35,592 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:35,598 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:35,598 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:35,599 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:35,599 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 03:57:35,599 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 03:57:35,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 03:57:35,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 03:57:35,600 INFO L87 Difference]: Start difference. First operand 164 states and 171 transitions. Second operand 3 states. [2018-12-02 03:57:35,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:35,697 INFO L93 Difference]: Finished difference Result 175 states and 181 transitions. [2018-12-02 03:57:35,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 03:57:35,698 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-12-02 03:57:35,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:35,698 INFO L225 Difference]: With dead ends: 175 [2018-12-02 03:57:35,699 INFO L226 Difference]: Without dead ends: 153 [2018-12-02 03:57:35,699 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 03:57:35,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-12-02 03:57:35,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 145. [2018-12-02 03:57:35,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-12-02 03:57:35,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 151 transitions. [2018-12-02 03:57:35,701 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 151 transitions. Word has length 34 [2018-12-02 03:57:35,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:35,701 INFO L480 AbstractCegarLoop]: Abstraction has 145 states and 151 transitions. [2018-12-02 03:57:35,701 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 03:57:35,701 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 151 transitions. [2018-12-02 03:57:35,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-02 03:57:35,702 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:35,702 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:35,702 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:35,702 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:35,702 INFO L82 PathProgramCache]: Analyzing trace with hash -1662093060, now seen corresponding path program 2 times [2018-12-02 03:57:35,703 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:35,703 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:35,716 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-02 03:57:35,766 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 03:57:35,766 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 03:57:35,768 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:35,774 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:35,775 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:35,779 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:35,779 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 03:57:35,924 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-12-02 03:57:35,924 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:35,926 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:35,926 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-02 03:57:35,926 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 03:57:35,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 03:57:35,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-12-02 03:57:35,927 INFO L87 Difference]: Start difference. First operand 145 states and 151 transitions. Second operand 13 states. [2018-12-02 03:57:37,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:37,023 INFO L93 Difference]: Finished difference Result 144 states and 150 transitions. [2018-12-02 03:57:37,024 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 03:57:37,024 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 42 [2018-12-02 03:57:37,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:37,025 INFO L225 Difference]: With dead ends: 144 [2018-12-02 03:57:37,026 INFO L226 Difference]: Without dead ends: 144 [2018-12-02 03:57:37,026 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2018-12-02 03:57:37,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-12-02 03:57:37,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-12-02 03:57:37,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-02 03:57:37,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 150 transitions. [2018-12-02 03:57:37,033 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 150 transitions. Word has length 42 [2018-12-02 03:57:37,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:37,034 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 150 transitions. [2018-12-02 03:57:37,043 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 03:57:37,044 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 150 transitions. [2018-12-02 03:57:37,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 03:57:37,044 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:37,045 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:37,045 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:37,046 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:37,046 INFO L82 PathProgramCache]: Analyzing trace with hash -1164712948, now seen corresponding path program 1 times [2018-12-02 03:57:37,046 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:37,047 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:37,063 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 03:57:37,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:37,157 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:37,226 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:37,226 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 03:57:37,614 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:57:37,616 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 03:57:37,616 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 26 [2018-12-02 03:57:37,616 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-02 03:57:37,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-02 03:57:37,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=178, Invalid=472, Unknown=0, NotChecked=0, Total=650 [2018-12-02 03:57:37,617 INFO L87 Difference]: Start difference. First operand 144 states and 150 transitions. Second operand 26 states. [2018-12-02 03:57:38,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:38,658 INFO L93 Difference]: Finished difference Result 154 states and 164 transitions. [2018-12-02 03:57:38,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-02 03:57:38,659 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 47 [2018-12-02 03:57:38,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:38,659 INFO L225 Difference]: With dead ends: 154 [2018-12-02 03:57:38,659 INFO L226 Difference]: Without dead ends: 150 [2018-12-02 03:57:38,660 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 68 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=278, Invalid=652, Unknown=0, NotChecked=0, Total=930 [2018-12-02 03:57:38,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-02 03:57:38,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-02 03:57:38,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-02 03:57:38,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 156 transitions. [2018-12-02 03:57:38,662 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 156 transitions. Word has length 47 [2018-12-02 03:57:38,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:38,662 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 156 transitions. [2018-12-02 03:57:38,662 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-02 03:57:38,662 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 156 transitions. [2018-12-02 03:57:38,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-02 03:57:38,662 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:38,663 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:38,663 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:38,663 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:38,663 INFO L82 PathProgramCache]: Analyzing trace with hash 969727980, now seen corresponding path program 2 times [2018-12-02 03:57:38,663 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:38,663 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:38,681 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-02 03:57:38,738 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 03:57:38,739 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 03:57:38,741 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:38,744 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:38,744 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:38,746 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:38,746 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 03:57:38,865 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 03:57:38,865 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:38,867 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:38,867 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-02 03:57:38,867 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 03:57:38,867 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 03:57:38,867 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-12-02 03:57:38,867 INFO L87 Difference]: Start difference. First operand 150 states and 156 transitions. Second operand 13 states. [2018-12-02 03:57:39,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:39,697 INFO L93 Difference]: Finished difference Result 160 states and 165 transitions. [2018-12-02 03:57:39,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 03:57:39,697 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 53 [2018-12-02 03:57:39,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:39,698 INFO L225 Difference]: With dead ends: 160 [2018-12-02 03:57:39,698 INFO L226 Difference]: Without dead ends: 160 [2018-12-02 03:57:39,698 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-12-02 03:57:39,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-02 03:57:39,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 148. [2018-12-02 03:57:39,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-02 03:57:39,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 154 transitions. [2018-12-02 03:57:39,701 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 154 transitions. Word has length 53 [2018-12-02 03:57:39,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:39,701 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 154 transitions. [2018-12-02 03:57:39,701 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 03:57:39,702 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 154 transitions. [2018-12-02 03:57:39,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-02 03:57:39,702 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:39,702 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:39,702 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:39,703 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:39,703 INFO L82 PathProgramCache]: Analyzing trace with hash 969727981, now seen corresponding path program 1 times [2018-12-02 03:57:39,703 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:39,703 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:39,718 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 03:57:39,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:39,876 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:39,883 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:39,883 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:39,889 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:39,889 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 03:57:40,049 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 03:57:40,050 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:40,052 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:40,052 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-02 03:57:40,052 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 03:57:40,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 03:57:40,052 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-12-02 03:57:40,053 INFO L87 Difference]: Start difference. First operand 148 states and 154 transitions. Second operand 13 states. [2018-12-02 03:57:40,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:40,850 INFO L93 Difference]: Finished difference Result 146 states and 152 transitions. [2018-12-02 03:57:40,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 03:57:40,851 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 53 [2018-12-02 03:57:40,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:40,851 INFO L225 Difference]: With dead ends: 146 [2018-12-02 03:57:40,851 INFO L226 Difference]: Without dead ends: 146 [2018-12-02 03:57:40,852 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2018-12-02 03:57:40,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-02 03:57:40,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-02 03:57:40,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-02 03:57:40,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 152 transitions. [2018-12-02 03:57:40,854 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 152 transitions. Word has length 53 [2018-12-02 03:57:40,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:40,854 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 152 transitions. [2018-12-02 03:57:40,854 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 03:57:40,854 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 152 transitions. [2018-12-02 03:57:40,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-12-02 03:57:40,855 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:40,855 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:40,855 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:40,855 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:40,855 INFO L82 PathProgramCache]: Analyzing trace with hash -1108493563, now seen corresponding path program 1 times [2018-12-02 03:57:40,856 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:40,856 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:40,873 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:40,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:40,926 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:40,957 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 03:57:40,957 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:40,959 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:40,959 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 03:57:40,959 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 03:57:40,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 03:57:40,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-02 03:57:40,960 INFO L87 Difference]: Start difference. First operand 146 states and 152 transitions. Second operand 7 states. [2018-12-02 03:57:40,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:40,991 INFO L93 Difference]: Finished difference Result 148 states and 153 transitions. [2018-12-02 03:57:40,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 03:57:40,992 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 56 [2018-12-02 03:57:40,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:40,992 INFO L225 Difference]: With dead ends: 148 [2018-12-02 03:57:40,992 INFO L226 Difference]: Without dead ends: 146 [2018-12-02 03:57:40,993 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-02 03:57:40,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-02 03:57:40,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-02 03:57:40,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-02 03:57:40,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 151 transitions. [2018-12-02 03:57:40,995 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 151 transitions. Word has length 56 [2018-12-02 03:57:40,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:40,995 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 151 transitions. [2018-12-02 03:57:40,995 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 03:57:40,995 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 151 transitions. [2018-12-02 03:57:40,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-02 03:57:40,996 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:40,996 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:40,996 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:40,996 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:40,996 INFO L82 PathProgramCache]: Analyzing trace with hash 128711114, now seen corresponding path program 1 times [2018-12-02 03:57:40,997 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:40,997 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:41,012 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:41,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:41,064 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:41,110 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 03:57:41,110 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:41,112 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:41,112 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-02 03:57:41,112 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 03:57:41,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 03:57:41,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-02 03:57:41,112 INFO L87 Difference]: Start difference. First operand 146 states and 151 transitions. Second operand 9 states. [2018-12-02 03:57:41,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:41,168 INFO L93 Difference]: Finished difference Result 150 states and 154 transitions. [2018-12-02 03:57:41,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 03:57:41,169 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 61 [2018-12-02 03:57:41,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:41,170 INFO L225 Difference]: With dead ends: 150 [2018-12-02 03:57:41,170 INFO L226 Difference]: Without dead ends: 146 [2018-12-02 03:57:41,170 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-02 03:57:41,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-02 03:57:41,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-02 03:57:41,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-02 03:57:41,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 150 transitions. [2018-12-02 03:57:41,172 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 150 transitions. Word has length 61 [2018-12-02 03:57:41,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:41,172 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 150 transitions. [2018-12-02 03:57:41,172 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 03:57:41,172 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 150 transitions. [2018-12-02 03:57:41,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 03:57:41,172 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:41,173 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:41,173 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:41,173 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:41,173 INFO L82 PathProgramCache]: Analyzing trace with hash -489606087, now seen corresponding path program 1 times [2018-12-02 03:57:41,173 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:41,173 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:41,187 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:41,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:41,339 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:41,341 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:41,341 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:41,342 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:41,342 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 03:57:41,553 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 03:57:41,553 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:41,555 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:41,556 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-12-02 03:57:41,556 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-02 03:57:41,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-02 03:57:41,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2018-12-02 03:57:41,556 INFO L87 Difference]: Start difference. First operand 146 states and 150 transitions. Second operand 18 states. [2018-12-02 03:57:42,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:42,910 INFO L93 Difference]: Finished difference Result 156 states and 159 transitions. [2018-12-02 03:57:42,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-02 03:57:42,911 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2018-12-02 03:57:42,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:42,911 INFO L225 Difference]: With dead ends: 156 [2018-12-02 03:57:42,911 INFO L226 Difference]: Without dead ends: 156 [2018-12-02 03:57:42,911 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=68, Invalid=394, Unknown=0, NotChecked=0, Total=462 [2018-12-02 03:57:42,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-02 03:57:42,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 144. [2018-12-02 03:57:42,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-02 03:57:42,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 148 transitions. [2018-12-02 03:57:42,914 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 148 transitions. Word has length 72 [2018-12-02 03:57:42,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:42,914 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 148 transitions. [2018-12-02 03:57:42,914 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-02 03:57:42,914 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 148 transitions. [2018-12-02 03:57:42,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 03:57:42,914 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:42,914 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:42,915 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:42,915 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:42,915 INFO L82 PathProgramCache]: Analyzing trace with hash -489606086, now seen corresponding path program 1 times [2018-12-02 03:57:42,915 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:42,915 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:42,929 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:43,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:43,135 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:43,143 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:43,143 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:43,146 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:43,147 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 03:57:43,431 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 03:57:43,431 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:43,434 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:43,434 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-12-02 03:57:43,434 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-02 03:57:43,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-02 03:57:43,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=260, Unknown=0, NotChecked=0, Total=306 [2018-12-02 03:57:43,434 INFO L87 Difference]: Start difference. First operand 144 states and 148 transitions. Second operand 18 states. [2018-12-02 03:57:44,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:44,685 INFO L93 Difference]: Finished difference Result 142 states and 146 transitions. [2018-12-02 03:57:44,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-02 03:57:44,686 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2018-12-02 03:57:44,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:44,686 INFO L225 Difference]: With dead ends: 142 [2018-12-02 03:57:44,686 INFO L226 Difference]: Without dead ends: 142 [2018-12-02 03:57:44,687 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=70, Invalid=436, Unknown=0, NotChecked=0, Total=506 [2018-12-02 03:57:44,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-02 03:57:44,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-02 03:57:44,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-02 03:57:44,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 146 transitions. [2018-12-02 03:57:44,689 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 146 transitions. Word has length 72 [2018-12-02 03:57:44,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:44,689 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 146 transitions. [2018-12-02 03:57:44,689 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-02 03:57:44,689 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 146 transitions. [2018-12-02 03:57:44,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-02 03:57:44,690 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:44,690 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:44,690 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:44,690 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:44,690 INFO L82 PathProgramCache]: Analyzing trace with hash -298190586, now seen corresponding path program 1 times [2018-12-02 03:57:44,690 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:44,690 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:44,706 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:44,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:44,774 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:44,827 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 03:57:44,827 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:44,828 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:44,828 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 03:57:44,829 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 03:57:44,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 03:57:44,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-02 03:57:44,829 INFO L87 Difference]: Start difference. First operand 142 states and 146 transitions. Second operand 10 states. [2018-12-02 03:57:44,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:44,910 INFO L93 Difference]: Finished difference Result 145 states and 148 transitions. [2018-12-02 03:57:44,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 03:57:44,911 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 81 [2018-12-02 03:57:44,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:44,911 INFO L225 Difference]: With dead ends: 145 [2018-12-02 03:57:44,911 INFO L226 Difference]: Without dead ends: 142 [2018-12-02 03:57:44,912 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-02 03:57:44,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-02 03:57:44,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-02 03:57:44,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-02 03:57:44,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 145 transitions. [2018-12-02 03:57:44,914 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 145 transitions. Word has length 81 [2018-12-02 03:57:44,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:44,914 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 145 transitions. [2018-12-02 03:57:44,914 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 03:57:44,914 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 145 transitions. [2018-12-02 03:57:44,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-02 03:57:44,915 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:44,915 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:44,916 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:44,916 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:44,916 INFO L82 PathProgramCache]: Analyzing trace with hash 240813275, now seen corresponding path program 1 times [2018-12-02 03:57:44,916 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:44,916 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:44,930 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:45,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:45,118 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:45,129 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:45,129 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:45,130 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:45,131 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 03:57:45,394 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 03:57:45,394 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:45,396 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:45,397 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-02 03:57:45,397 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-02 03:57:45,397 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-02 03:57:45,397 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-12-02 03:57:45,397 INFO L87 Difference]: Start difference. First operand 142 states and 145 transitions. Second operand 20 states. [2018-12-02 03:57:46,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:46,899 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2018-12-02 03:57:46,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-02 03:57:46,900 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 94 [2018-12-02 03:57:46,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:46,900 INFO L225 Difference]: With dead ends: 156 [2018-12-02 03:57:46,900 INFO L226 Difference]: Without dead ends: 156 [2018-12-02 03:57:46,900 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 70 SyntacticMatches, 5 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=79, Invalid=521, Unknown=0, NotChecked=0, Total=600 [2018-12-02 03:57:46,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-02 03:57:46,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 140. [2018-12-02 03:57:46,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-02 03:57:46,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 143 transitions. [2018-12-02 03:57:46,902 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 143 transitions. Word has length 94 [2018-12-02 03:57:46,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:46,902 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 143 transitions. [2018-12-02 03:57:46,902 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-02 03:57:46,902 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 143 transitions. [2018-12-02 03:57:46,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-02 03:57:46,903 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:46,903 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:46,903 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:46,904 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:46,904 INFO L82 PathProgramCache]: Analyzing trace with hash 240813276, now seen corresponding path program 1 times [2018-12-02 03:57:46,904 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:46,904 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:46,921 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:47,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:47,157 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:47,163 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:47,164 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:47,168 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:47,168 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 03:57:47,622 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 03:57:47,622 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:47,626 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:47,627 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-02 03:57:47,627 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-02 03:57:47,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-02 03:57:47,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2018-12-02 03:57:47,627 INFO L87 Difference]: Start difference. First operand 140 states and 143 transitions. Second operand 20 states. [2018-12-02 03:57:49,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:49,073 INFO L93 Difference]: Finished difference Result 138 states and 141 transitions. [2018-12-02 03:57:49,073 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-02 03:57:49,074 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 94 [2018-12-02 03:57:49,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:49,074 INFO L225 Difference]: With dead ends: 138 [2018-12-02 03:57:49,074 INFO L226 Difference]: Without dead ends: 138 [2018-12-02 03:57:49,074 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 70 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=81, Invalid=569, Unknown=0, NotChecked=0, Total=650 [2018-12-02 03:57:49,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-02 03:57:49,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-02 03:57:49,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-02 03:57:49,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 141 transitions. [2018-12-02 03:57:49,076 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 141 transitions. Word has length 94 [2018-12-02 03:57:49,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:49,076 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 141 transitions. [2018-12-02 03:57:49,076 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-02 03:57:49,076 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 141 transitions. [2018-12-02 03:57:49,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-02 03:57:49,077 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:49,077 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:49,077 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:49,077 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:49,077 INFO L82 PathProgramCache]: Analyzing trace with hash 217874955, now seen corresponding path program 1 times [2018-12-02 03:57:49,077 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:49,077 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:49,091 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:49,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:49,151 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:49,199 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 03:57:49,199 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:49,200 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:49,200 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 03:57:49,200 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 03:57:49,200 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 03:57:49,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-02 03:57:49,201 INFO L87 Difference]: Start difference. First operand 138 states and 141 transitions. Second operand 10 states. [2018-12-02 03:57:49,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:49,252 INFO L93 Difference]: Finished difference Result 140 states and 142 transitions. [2018-12-02 03:57:49,252 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 03:57:49,253 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 92 [2018-12-02 03:57:49,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:49,253 INFO L225 Difference]: With dead ends: 140 [2018-12-02 03:57:49,253 INFO L226 Difference]: Without dead ends: 138 [2018-12-02 03:57:49,253 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-02 03:57:49,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-02 03:57:49,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-02 03:57:49,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-02 03:57:49,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 140 transitions. [2018-12-02 03:57:49,255 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 140 transitions. Word has length 92 [2018-12-02 03:57:49,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:49,256 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 140 transitions. [2018-12-02 03:57:49,256 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 03:57:49,256 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 140 transitions. [2018-12-02 03:57:49,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-12-02 03:57:49,256 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:49,256 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:49,257 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:49,257 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:49,257 INFO L82 PathProgramCache]: Analyzing trace with hash -220146983, now seen corresponding path program 1 times [2018-12-02 03:57:49,257 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:49,257 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:49,271 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:49,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:49,491 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:49,494 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:49,494 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:49,496 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:49,496 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-02 03:57:49,899 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 03:57:49,900 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:49,902 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:49,903 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-02 03:57:49,903 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-02 03:57:49,903 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-02 03:57:49,903 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=486, Unknown=0, NotChecked=0, Total=552 [2018-12-02 03:57:49,903 INFO L87 Difference]: Start difference. First operand 138 states and 140 transitions. Second operand 24 states. [2018-12-02 03:57:51,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:51,996 INFO L93 Difference]: Finished difference Result 148 states and 149 transitions. [2018-12-02 03:57:51,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-02 03:57:51,997 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-12-02 03:57:51,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:51,998 INFO L225 Difference]: With dead ends: 148 [2018-12-02 03:57:51,998 INFO L226 Difference]: Without dead ends: 148 [2018-12-02 03:57:51,998 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 77 SyntacticMatches, 7 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=101, Invalid=829, Unknown=0, NotChecked=0, Total=930 [2018-12-02 03:57:51,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-12-02 03:57:52,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 136. [2018-12-02 03:57:52,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-02 03:57:52,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 138 transitions. [2018-12-02 03:57:52,001 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 138 transitions. Word has length 107 [2018-12-02 03:57:52,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:52,002 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 138 transitions. [2018-12-02 03:57:52,002 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-02 03:57:52,002 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 138 transitions. [2018-12-02 03:57:52,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-12-02 03:57:52,003 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:52,003 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:52,004 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:52,004 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:52,004 INFO L82 PathProgramCache]: Analyzing trace with hash -220146982, now seen corresponding path program 1 times [2018-12-02 03:57:52,004 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:52,005 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:52,029 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:52,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:52,347 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:52,353 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 03:57:52,353 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:52,362 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:52,362 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-02 03:57:52,905 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 03:57:52,905 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:57:52,908 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 03:57:52,908 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-02 03:57:52,908 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-02 03:57:52,909 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-02 03:57:52,909 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=488, Unknown=0, NotChecked=0, Total=552 [2018-12-02 03:57:52,909 INFO L87 Difference]: Start difference. First operand 136 states and 138 transitions. Second operand 24 states. [2018-12-02 03:57:54,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 03:57:54,855 INFO L93 Difference]: Finished difference Result 134 states and 136 transitions. [2018-12-02 03:57:54,855 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-02 03:57:54,855 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-12-02 03:57:54,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 03:57:54,856 INFO L225 Difference]: With dead ends: 134 [2018-12-02 03:57:54,856 INFO L226 Difference]: Without dead ends: 134 [2018-12-02 03:57:54,857 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 77 SyntacticMatches, 7 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=103, Invalid=889, Unknown=0, NotChecked=0, Total=992 [2018-12-02 03:57:54,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-02 03:57:54,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-02 03:57:54,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-02 03:57:54,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-12-02 03:57:54,859 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 107 [2018-12-02 03:57:54,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 03:57:54,859 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-12-02 03:57:54,859 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-02 03:57:54,859 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-12-02 03:57:54,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-02 03:57:54,860 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 03:57:54,860 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 03:57:54,861 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 03:57:54,861 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 03:57:54,861 INFO L82 PathProgramCache]: Analyzing trace with hash -1296614760, now seen corresponding path program 1 times [2018-12-02 03:57:54,861 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 03:57:54,861 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 03:57:54,878 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:57:55,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:57:55,242 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:57:55,273 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-02 03:57:55,275 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-02 03:57:55,275 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,277 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,282 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,283 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-12-02 03:57:55,299 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-12-02 03:57:55,303 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,303 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-12-02 03:57:55,304 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,313 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,322 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,322 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-12-02 03:57:55,350 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-12-02 03:57:55,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,357 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-12-02 03:57:55,358 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,375 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,390 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,390 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:35 [2018-12-02 03:57:55,433 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-12-02 03:57:55,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,446 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,447 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-12-02 03:57:55,448 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,475 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,497 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,498 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:46 [2018-12-02 03:57:55,557 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-12-02 03:57:55,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,566 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,568 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,570 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,575 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,579 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-12-02 03:57:55,579 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,626 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,654 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,654 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:57 [2018-12-02 03:57:55,731 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-12-02 03:57:55,737 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,739 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,743 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,747 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,749 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,750 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,752 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,757 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,759 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,762 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,763 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-12-02 03:57:55,764 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,838 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,875 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:55,875 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:68 [2018-12-02 03:57:55,974 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-12-02 03:57:55,980 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,991 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:55,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,009 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,011 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,012 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,014 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,018 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,022 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,024 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-12-02 03:57:56,024 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:56,136 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:56,187 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:56,187 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:83, output treesize:79 [2018-12-02 03:57:56,306 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-12-02 03:57:56,314 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,320 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,322 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,329 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,331 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,336 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,338 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,340 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,347 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,352 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,363 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,370 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,375 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-12-02 03:57:56,376 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:56,532 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:56,586 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:56,586 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:94, output treesize:90 [2018-12-02 03:57:56,740 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-12-02 03:57:56,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,751 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,757 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,760 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,762 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,768 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,770 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,775 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,778 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,783 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,786 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,795 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,803 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,808 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,810 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,812 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,815 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,824 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:56,828 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-12-02 03:57:56,828 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:57,052 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:57,125 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:57,125 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:105, output treesize:101 [2018-12-02 03:57:57,297 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-12-02 03:57:57,305 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,310 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,315 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,320 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,323 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,326 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,331 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,347 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,349 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,352 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,369 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,377 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,380 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,417 INFO L303 Elim1Store]: Index analysis took 119 ms [2018-12-02 03:57:57,418 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-12-02 03:57:57,419 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:57,692 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:57,769 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:57,769 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:116, output treesize:112 [2018-12-02 03:57:57,974 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 101 [2018-12-02 03:57:57,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,987 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:57,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,008 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,011 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,015 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,018 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,024 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,027 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,030 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,033 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,036 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,039 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,042 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,045 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,054 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,057 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,060 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,063 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,067 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,071 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,074 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,079 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,085 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,089 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,091 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,094 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,100 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,103 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,112 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,114 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,117 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,123 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,126 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,135 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,147 INFO L303 Elim1Store]: Index analysis took 171 ms [2018-12-02 03:57:58,148 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 540 [2018-12-02 03:57:58,149 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:58,511 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:58,598 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:58,598 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:127, output treesize:123 [2018-12-02 03:57:58,821 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 110 [2018-12-02 03:57:58,831 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,834 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,837 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,840 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,866 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,884 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,887 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,890 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,902 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,928 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,948 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,954 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,957 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,960 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,971 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,977 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,980 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,992 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:58,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,004 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,012 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,015 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,018 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,022 INFO L303 Elim1Store]: Index analysis took 200 ms [2018-12-02 03:57:59,023 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 66 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 637 [2018-12-02 03:57:59,024 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:57:59,468 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:59,568 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:57:59,568 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:138, output treesize:134 [2018-12-02 03:57:59,813 WARN L180 SmtUtils]: Spent 112.00 ms on a formula simplification that was a NOOP. DAG size: 57 [2018-12-02 03:57:59,834 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-12-02 03:57:59,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,859 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,866 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,882 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,930 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,938 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,942 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,954 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,978 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,982 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:57:59,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,002 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,009 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,012 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,019 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,022 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,026 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,030 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,034 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,038 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,047 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,055 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,062 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,065 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,075 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,078 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,081 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,084 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,087 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,090 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,093 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,100 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,103 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,107 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,110 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,114 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,118 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:00,126 INFO L303 Elim1Store]: Index analysis took 290 ms [2018-12-02 03:58:00,127 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 78 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 742 [2018-12-02 03:58:00,128 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:58:00,714 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:00,845 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:00,845 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:149, output treesize:145 [2018-12-02 03:58:01,123 WARN L180 SmtUtils]: Spent 121.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2018-12-02 03:58:01,159 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 128 [2018-12-02 03:58:01,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,224 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,236 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,248 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,266 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,281 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,309 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,324 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,329 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,370 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,455 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,493 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,506 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,516 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,529 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,541 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,551 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,564 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,588 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,597 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,633 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,682 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,706 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,715 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,756 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,768 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,774 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,786 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,793 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,814 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,859 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,968 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,976 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:01,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,027 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,040 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,052 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,060 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,075 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,098 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,111 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,123 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,137 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,160 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,170 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,207 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:02,208 INFO L303 Elim1Store]: Index analysis took 1047 ms [2018-12-02 03:58:02,209 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 91 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 855 [2018-12-02 03:58:02,210 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:58:02,860 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:03,005 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:03,006 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:160, output treesize:156 [2018-12-02 03:58:03,307 WARN L180 SmtUtils]: Spent 131.00 ms on a formula simplification that was a NOOP. DAG size: 65 [2018-12-02 03:58:03,331 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 137 [2018-12-02 03:58:03,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,349 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,352 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,356 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,365 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,369 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,379 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,383 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,407 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,428 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,446 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,481 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,484 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,487 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,491 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,498 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,512 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,516 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,522 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,529 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,533 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,540 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,543 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,547 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,550 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,554 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,561 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,568 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,572 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,575 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,579 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,582 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,586 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,597 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,614 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,666 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,677 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,692 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,699 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,702 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,706 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:03,707 INFO L303 Elim1Store]: Index analysis took 374 ms [2018-12-02 03:58:03,708 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 105 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 976 [2018-12-02 03:58:03,710 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:58:04,561 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:04,726 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:04,726 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:171, output treesize:167 [2018-12-02 03:58:05,067 WARN L180 SmtUtils]: Spent 145.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2018-12-02 03:58:05,113 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 179 treesize of output 146 [2018-12-02 03:58:05,139 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,217 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,231 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,245 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,259 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,273 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,286 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,320 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,332 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,349 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,358 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,398 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,500 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,516 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,522 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,532 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,546 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,577 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,599 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,629 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,645 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,702 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,716 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,794 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,810 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,821 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,938 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,954 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:05,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,011 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,039 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,054 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,066 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,080 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,096 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,111 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,135 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,221 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,236 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,251 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,265 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,280 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,297 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,310 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,370 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,437 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,462 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,495 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,507 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,532 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,546 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,560 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,581 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,598 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,624 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,647 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,690 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,702 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,714 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,727 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:06,728 INFO L303 Elim1Store]: Index analysis took 1613 ms [2018-12-02 03:58:06,729 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 1105 [2018-12-02 03:58:06,731 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:58:07,720 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:07,874 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:07,874 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:179, output treesize:175 [2018-12-02 03:58:08,275 WARN L180 SmtUtils]: Spent 155.00 ms on a formula simplification that was a NOOP. DAG size: 70 [2018-12-02 03:58:10,149 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 03:58:10,156 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 03:58:10,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 03:58:10,164 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:27 [2018-12-02 03:58:12,169 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= |c_#memory_$Pointer$.offset| (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base|) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv8 32)) .cse0))))) is different from true [2018-12-02 03:58:14,176 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base|) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv8 32)) .cse0))) |c_#memory_$Pointer$.offset|)) is different from true [2018-12-02 03:58:14,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:14,328 INFO L303 Elim1Store]: Index analysis took 150 ms [2018-12-02 03:58:14,329 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 170 treesize of output 158 [2018-12-02 03:58:14,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:14,492 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:14,547 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:14,598 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:14,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:14,700 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:14,757 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:14,808 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:14,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:14,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:14,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,056 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,103 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,247 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,341 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,540 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,638 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:15,948 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,004 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,057 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,113 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,216 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,264 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,312 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,365 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,525 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,636 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,729 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,831 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,879 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:16,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,073 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,123 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,221 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,270 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,315 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,716 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,815 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,920 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:17,972 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,068 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,225 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,276 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,485 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,539 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,679 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,731 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,786 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,884 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:18,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,043 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,150 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,430 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,481 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,694 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:19,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,019 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,168 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,317 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,552 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,615 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,666 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,716 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,763 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,812 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:20,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:21,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:21,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:21,123 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:21,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:21,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:21,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:21,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:21,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:21,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:21,485 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:21,539 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:21,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:21,592 INFO L683 Elim1Store]: detected equality via solver [2018-12-02 03:58:23,314 INFO L303 Elim1Store]: Index analysis took 8982 ms [2018-12-02 03:58:23,515 INFO L478 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 158 treesize of output 1177 [2018-12-02 03:58:23,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,699 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,723 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,750 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,777 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,804 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,891 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,960 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:23,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,011 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,037 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,061 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,085 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,112 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,137 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,161 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,188 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,269 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,296 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,322 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,338 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,360 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,407 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,498 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,523 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,547 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,570 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,638 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,709 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,798 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,821 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:24,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,022 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,045 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,070 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,094 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,118 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,139 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,225 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,273 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,369 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,489 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,512 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,534 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,559 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,583 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,605 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,677 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,702 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,749 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,770 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,794 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,910 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,957 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,980 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:25,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,040 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,064 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,089 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,110 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,226 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,250 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,271 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,340 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,363 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:26,453 INFO L303 Elim1Store]: Index analysis took 2907 ms [2018-12-02 03:58:26,454 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1092 treesize of output 1092 [2018-12-02 03:58:27,193 WARN L180 SmtUtils]: Spent 736.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 77 [2018-12-02 03:58:27,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,222 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,242 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,251 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,267 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,298 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,317 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,323 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,471 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,479 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,485 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,510 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,533 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,541 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,548 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,570 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,577 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,608 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,615 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,679 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,703 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,716 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,723 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,731 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,739 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,746 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,762 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,769 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,778 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,785 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,794 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,809 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,825 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,840 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,864 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,902 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,948 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,978 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:27,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:28,002 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:28,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:28,017 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:28,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:28,053 INFO L303 Elim1Store]: Index analysis took 857 ms [2018-12-02 03:58:28,054 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 1096 [2018-12-02 03:58:28,055 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 03:58:28,451 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:29,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:29,964 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:29,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,017 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,045 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,073 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,127 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,207 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,236 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,265 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,314 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,531 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,561 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,586 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,615 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,698 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,859 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:30,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,022 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,101 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,130 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,236 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,265 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,345 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,493 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,548 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,679 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,705 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,759 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,777 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,832 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,910 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,965 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:31,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,022 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,049 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,104 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,131 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,157 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,211 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,236 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,265 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,498 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,553 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,581 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,686 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,714 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,743 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,771 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,794 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,818 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,968 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:32,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,023 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,102 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,126 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,179 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,286 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,309 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,492 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,548 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,574 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:33,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:34,439 INFO L303 Elim1Store]: Index analysis took 4560 ms [2018-12-02 03:58:34,512 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 155 treesize of output 1164 [2018-12-02 03:58:36,267 WARN L180 SmtUtils]: Spent 1.75 s on a formula simplification. DAG size of input: 166 DAG size of output: 119 [2018-12-02 03:58:36,286 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,293 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,322 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,338 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,348 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,433 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,484 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,493 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,516 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,525 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,533 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,542 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,549 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,559 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,567 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,577 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,584 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,612 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,622 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,665 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,683 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,700 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,709 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,718 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,727 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,737 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,747 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,816 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,864 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,882 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,890 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,917 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,953 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,971 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:36,996 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,012 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,029 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,038 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,046 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,056 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,066 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,075 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,085 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,094 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,102 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,111 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,119 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,124 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,134 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,142 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,190 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,233 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,242 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,251 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,270 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,280 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,298 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,324 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:37,551 INFO L303 Elim1Store]: Index analysis took 1282 ms [2018-12-02 03:58:37,553 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 133 treesize of output 1092 [2018-12-02 03:58:37,554 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-02 03:58:38,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,219 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,228 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,236 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,245 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,255 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,263 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,272 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,281 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,309 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,317 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,326 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,370 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,380 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,437 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,455 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,473 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,479 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,498 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,508 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,517 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,545 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,554 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,582 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,627 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,680 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,698 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,708 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,728 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,737 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,747 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,765 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,774 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,810 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,828 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,838 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,865 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,901 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,910 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,953 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,971 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:38,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,004 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,023 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,032 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,056 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,066 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,075 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,083 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,092 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,101 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,119 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,127 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,137 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,147 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,211 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,220 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,229 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,237 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,247 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:39,500 INFO L303 Elim1Store]: Index analysis took 1325 ms [2018-12-02 03:58:39,502 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 1062 [2018-12-02 03:58:39,503 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-02 03:58:39,955 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-02 03:58:40,114 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-02 03:58:40,213 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:40,299 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:40,299 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 2 variables, input treesize:173, output treesize:141 [2018-12-02 03:58:43,406 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 124 [2018-12-02 03:58:43,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,413 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,426 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,428 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,430 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,430 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,433 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,437 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,446 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,448 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,455 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,462 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,462 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,466 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,468 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,471 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,473 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,479 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,480 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,481 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,482 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,483 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,483 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,484 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,485 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,486 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,486 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,487 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,489 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,491 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,491 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,492 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,493 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,495 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,496 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,497 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,497 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,498 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,499 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,499 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,500 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,503 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,504 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,506 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:43,522 INFO L303 Elim1Store]: Index analysis took 114 ms [2018-12-02 03:58:43,524 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 1068 [2018-12-02 03:58:43,526 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:58:43,878 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:43,933 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:43,933 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:160, output treesize:141 [2018-12-02 03:58:46,485 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 125 treesize of output 92 [2018-12-02 03:58:46,714 INFO L303 Elim1Store]: Index analysis took 227 ms [2018-12-02 03:58:46,716 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 110 [2018-12-02 03:58:46,716 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:58:46,744 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:46,771 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:46,771 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:125, output treesize:110 [2018-12-02 03:58:48,890 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 81 [2018-12-02 03:58:48,967 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 16 select indices, 16 select index equivalence classes, 105 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 15 case distinctions, treesize of input 81 treesize of output 121 [2018-12-02 03:58:48,967 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-12-02 03:58:48,969 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-12-02 03:58:49,022 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-02 03:58:49,074 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-02 03:58:49,075 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:113, output treesize:130 [2018-12-02 03:58:50,015 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 03:58:50,016 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 03:58:52,183 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 03:58:52,185 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 03:58:52,187 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 03:58:52,187 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:10 [2018-12-02 03:58:52,479 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 03:58:52,480 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 03:58:52,486 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 03:58:52,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 03:58:52,555 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 03:58:53,325 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-02 03:58:53,327 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-02 03:58:53,327 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:58:53,329 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:53,332 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:53,332 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-12-02 03:58:54,720 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 03:58:54,726 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 03:58:54,744 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-02 03:58:54,744 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:38 [2018-12-02 03:58:57,226 WARN L180 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 22 [2018-12-02 03:58:57,238 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 31 [2018-12-02 03:58:57,243 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:57,245 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 41 [2018-12-02 03:58:57,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:57,250 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:57,251 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:58:57,256 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 45 [2018-12-02 03:58:57,257 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 03:58:57,267 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:57,272 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:57,291 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:58:57,291 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:58, output treesize:22 [2018-12-02 03:59:01,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:59:01,987 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 38 [2018-12-02 03:59:01,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 03:59:01,990 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 9 [2018-12-02 03:59:01,991 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:59:01,992 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:59:01,996 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:59:01,997 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:13 [2018-12-02 03:59:05,718 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-12-02 03:59:05,720 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 5 [2018-12-02 03:59:05,720 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 03:59:05,721 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:59:05,722 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 03:59:05,722 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:5 [2018-12-02 03:59:06,011 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-02 03:59:06,011 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-02 03:59:06,028 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 03:59:06,028 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [40] imperfect sequences [61] total 97 [2018-12-02 03:59:06,029 INFO L459 AbstractCegarLoop]: Interpolant automaton has 97 states [2018-12-02 03:59:06,029 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2018-12-02 03:59:06,030 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=295, Invalid=10631, Unknown=2, NotChecked=414, Total=11342 [2018-12-02 03:59:06,030 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 97 states. [2018-12-02 04:00:02,559 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 29 [2018-12-02 04:00:08,526 WARN L180 SmtUtils]: Spent 4.12 s on a formula simplification. DAG size of input: 38 DAG size of output: 31 [2018-12-02 04:00:13,775 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 32 [2018-12-02 04:00:20,455 WARN L180 SmtUtils]: Spent 120.00 ms on a formula simplification that was a NOOP. DAG size: 128 [2018-12-02 04:00:33,891 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 103 [2018-12-02 04:00:36,534 WARN L180 SmtUtils]: Spent 112.00 ms on a formula simplification that was a NOOP. DAG size: 108 [2018-12-02 04:00:45,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:00:45,136 INFO L93 Difference]: Finished difference Result 112 states and 112 transitions. [2018-12-02 04:00:45,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-12-02 04:00:45,137 INFO L78 Accepts]: Start accepts. Automaton has 97 states. Word has length 112 [2018-12-02 04:00:45,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:00:45,137 INFO L225 Difference]: With dead ends: 112 [2018-12-02 04:00:45,138 INFO L226 Difference]: Without dead ends: 112 [2018-12-02 04:00:45,140 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 278 GetRequests, 131 SyntacticMatches, 1 SemanticMatches, 146 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 3132 ImplicationChecksByTransitivity, 55.8s TimeCoverageRelationStatistics Valid=677, Invalid=20498, Unknown=3, NotChecked=578, Total=21756 [2018-12-02 04:00:45,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-12-02 04:00:45,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-12-02 04:00:45,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-12-02 04:00:45,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 112 transitions. [2018-12-02 04:00:45,142 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 112 transitions. Word has length 112 [2018-12-02 04:00:45,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:00:45,143 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 112 transitions. [2018-12-02 04:00:45,143 INFO L481 AbstractCegarLoop]: Interpolant automaton has 97 states. [2018-12-02 04:00:45,143 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 112 transitions. [2018-12-02 04:00:45,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-02 04:00:45,144 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:00:45,144 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:00:45,144 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-02 04:00:45,144 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:00:45,144 INFO L82 PathProgramCache]: Analyzing trace with hash 425919928, now seen corresponding path program 1 times [2018-12-02 04:00:45,145 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-02 04:00:45,145 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e025baab-ebcf-41ee-adbe-46ae5230168b/bin-2019/uautomizer/cvc4 Starting monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-02 04:00:45,165 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:00:49,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 04:00:53,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 04:00:53,949 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-02 04:00:53,963 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-12-02 04:00:53,971 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-02 04:00:53,975 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-02 04:00:53,975 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-02 04:00:53,985 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 04:00:53 BoogieIcfgContainer [2018-12-02 04:00:53,985 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-02 04:00:53,985 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-02 04:00:53,985 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-02 04:00:53,985 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-02 04:00:53,985 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 03:57:31" (3/4) ... [2018-12-02 04:00:53,988 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-02 04:00:53,988 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-02 04:00:53,988 INFO L168 Benchmark]: Toolchain (without parser) took 203215.65 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 272.6 MB). Free memory was 938.0 MB in the beginning and 1.0 GB in the end (delta: -99.8 MB). Peak memory consumption was 172.8 MB. Max. memory is 11.5 GB. [2018-12-02 04:00:53,988 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 04:00:53,988 INFO L168 Benchmark]: CACSL2BoogieTranslator took 341.29 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 155.2 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -184.7 MB). Peak memory consumption was 31.9 MB. Max. memory is 11.5 GB. [2018-12-02 04:00:53,989 INFO L168 Benchmark]: Boogie Preprocessor took 44.39 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 04:00:53,989 INFO L168 Benchmark]: RCFGBuilder took 719.06 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 111.3 MB). Peak memory consumption was 111.3 MB. Max. memory is 11.5 GB. [2018-12-02 04:00:53,989 INFO L168 Benchmark]: TraceAbstraction took 202105.43 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 117.4 MB). Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: -26.4 MB). Peak memory consumption was 91.1 MB. Max. memory is 11.5 GB. [2018-12-02 04:00:53,989 INFO L168 Benchmark]: Witness Printer took 2.70 ms. Allocated memory is still 1.3 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 04:00:53,990 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 341.29 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 155.2 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -184.7 MB). Peak memory consumption was 31.9 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 44.39 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 719.06 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 111.3 MB). Peak memory consumption was 111.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 202105.43 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 117.4 MB). Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: -26.4 MB). Peak memory consumption was 91.1 MB. Max. memory is 11.5 GB. * Witness Printer took 2.70 ms. Allocated memory is still 1.3 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1443]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1443. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={-1:0}] [L1444] CALL entry_point() VAL [ldv_global_msg_list={-1:0}] [L1436] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1437] CALL, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}] [L1406] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16, ldv_global_msg_list={-1:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=16, \result={1082401:0}, ldv_global_msg_list={-1:0}, malloc(size)={1082401:0}, size=16] [L1408] RET, EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_global_msg_list={-1:0}, ldv_malloc(sizeof(*kobj))={1082401:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}, memset(kobj, 0, sizeof(*kobj))={1082401:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1294] ((&kref->refcount)->counter) = (1) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1382] RET ldv_kref_init(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [ldv_global_msg_list={-1:0}, list={1082401:4}] [L1099] list->next = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1100] list->prev = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1383] RET LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] RET ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1413] RET ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1414] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1437] RET, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}, ldv_kobject_create()={1082401:0}] [L1437] kobj = ldv_kobject_create() [L1438] CALL ldv_kobject_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1255] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1256] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1258] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1259] return temp; VAL [\old(i)=1, \result=2, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={1082401:12}, kref={1082401:12}, ldv_atomic_add_return(1, (&kref->refcount))=2, ldv_global_msg_list={-1:0}] [L1374] RET ldv_kref_get(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1375] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1438] RET ldv_kobject_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kobject_get(kobj)={1082401:0}] [L1440] CALL ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1264] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1265] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1267] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1268] return temp; VAL [\old(i)=1, \result=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1281] RET, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={1082401:12}, kref={1082401:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] return 0; VAL [\old(count)=1, \result=0, count=1, kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1313] RET, EXPR ldv_kref_sub(kref, 1, release) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] return ldv_kref_sub(kref, 1, release); [L1363] RET ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1440] RET ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1444] RET entry_point() VAL [ldv_global_msg_list={-1:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 43 procedures, 310 locations, 67 error locations. UNSAFE Result, 202.0s OverallTime, 27 OverallIterations, 16 TraceHistogramMax, 115.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3053 SDtfs, 1375 SDslu, 22161 SDs, 0 SdLazy, 15666 SolverSat, 405 SolverUnsat, 8 SolverUnknown, 0 SolverNotchecked, 84.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1784 GetRequests, 1272 SyntacticMatches, 42 SemanticMatches, 470 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 3568 ImplicationChecksByTransitivity, 60.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=170occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 26 MinimizatonAttempts, 98 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 6.6s SatisfiabilityAnalysisTime, 74.6s InterpolantComputationTime, 1678 NumberOfCodeBlocks, 1648 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 1653 ConstructedInterpolants, 324 QuantifiedInterpolants, 1218241 SizeOfPredicates, 226 NumberOfNonLiveVariables, 6317 ConjunctsInSsa, 645 ConjunctsInUnsatCore, 30 InterpolantComputations, 23 PerfectInterpolantSequences, 1833/2101 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...