./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bc6894f63179c5a0c3641b97a75e8f614c456bea ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bc6894f63179c5a0c3641b97a75e8f614c456bea ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-01 14:08:39,721 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-01 14:08:39,722 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-01 14:08:39,729 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-01 14:08:39,730 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-01 14:08:39,730 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-01 14:08:39,731 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-01 14:08:39,731 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-01 14:08:39,732 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-01 14:08:39,733 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-01 14:08:39,733 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-01 14:08:39,734 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-01 14:08:39,734 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-01 14:08:39,735 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-01 14:08:39,736 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-01 14:08:39,736 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-01 14:08:39,737 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-01 14:08:39,738 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-01 14:08:39,739 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-01 14:08:39,740 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-01 14:08:39,741 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-01 14:08:39,742 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-01 14:08:39,743 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-01 14:08:39,744 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-01 14:08:39,744 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-01 14:08:39,744 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-01 14:08:39,745 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-01 14:08:39,745 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-01 14:08:39,746 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-01 14:08:39,747 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-01 14:08:39,747 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-01 14:08:39,747 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-01 14:08:39,747 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-01 14:08:39,748 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-01 14:08:39,748 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-01 14:08:39,749 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-01 14:08:39,749 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-12-01 14:08:39,756 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-01 14:08:39,756 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-01 14:08:39,756 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-01 14:08:39,756 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-01 14:08:39,757 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-01 14:08:39,757 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-01 14:08:39,757 INFO L133 SettingsManager]: * Use SBE=true [2018-12-01 14:08:39,757 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-01 14:08:39,757 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-01 14:08:39,757 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-01 14:08:39,758 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-01 14:08:39,758 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-01 14:08:39,758 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-01 14:08:39,758 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-01 14:08:39,758 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-01 14:08:39,758 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-01 14:08:39,758 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-01 14:08:39,758 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-01 14:08:39,759 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-01 14:08:39,759 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-01 14:08:39,759 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-01 14:08:39,759 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-01 14:08:39,759 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-01 14:08:39,759 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-01 14:08:39,759 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-01 14:08:39,760 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-01 14:08:39,760 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-01 14:08:39,760 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-01 14:08:39,760 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bc6894f63179c5a0c3641b97a75e8f614c456bea [2018-12-01 14:08:39,782 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-01 14:08:39,789 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-01 14:08:39,791 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-01 14:08:39,791 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-01 14:08:39,792 INFO L276 PluginConnector]: CDTParser initialized [2018-12-01 14:08:39,792 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-01 14:08:39,827 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/data/cfe9aa604/1c37c526c6f64d82b7cf67b9529371ee/FLAGd96b1bf15 [2018-12-01 14:08:40,231 INFO L307 CDTParser]: Found 1 translation units. [2018-12-01 14:08:40,232 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-01 14:08:40,239 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/data/cfe9aa604/1c37c526c6f64d82b7cf67b9529371ee/FLAGd96b1bf15 [2018-12-01 14:08:40,247 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/data/cfe9aa604/1c37c526c6f64d82b7cf67b9529371ee [2018-12-01 14:08:40,249 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-01 14:08:40,250 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-01 14:08:40,251 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-01 14:08:40,251 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-01 14:08:40,253 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-01 14:08:40,253 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 01.12 02:08:40" (1/1) ... [2018-12-01 14:08:40,255 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@142c46d6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:08:40, skipping insertion in model container [2018-12-01 14:08:40,255 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 01.12 02:08:40" (1/1) ... [2018-12-01 14:08:40,259 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-01 14:08:40,281 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-01 14:08:40,486 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-01 14:08:40,497 INFO L191 MainTranslator]: Completed pre-run [2018-12-01 14:08:40,530 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-01 14:08:40,568 INFO L195 MainTranslator]: Completed translation [2018-12-01 14:08:40,568 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:08:40 WrapperNode [2018-12-01 14:08:40,568 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-01 14:08:40,569 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-01 14:08:40,569 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-01 14:08:40,569 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-01 14:08:40,579 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:08:40" (1/1) ... [2018-12-01 14:08:40,579 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:08:40" (1/1) ... [2018-12-01 14:08:40,590 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:08:40" (1/1) ... [2018-12-01 14:08:40,590 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:08:40" (1/1) ... [2018-12-01 14:08:40,605 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:08:40" (1/1) ... [2018-12-01 14:08:40,608 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:08:40" (1/1) ... [2018-12-01 14:08:40,611 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:08:40" (1/1) ... [2018-12-01 14:08:40,615 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-01 14:08:40,616 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-01 14:08:40,616 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-01 14:08:40,616 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-01 14:08:40,616 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:08:40" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-01 14:08:40,650 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-01 14:08:40,651 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-01 14:08:40,651 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-01 14:08:40,651 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-12-01 14:08:40,651 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-12-01 14:08:40,651 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-12-01 14:08:40,651 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-12-01 14:08:40,651 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-01 14:08:40,651 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-01 14:08:40,651 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-01 14:08:40,652 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-12-01 14:08:40,652 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-12-01 14:08:40,652 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-12-01 14:08:40,652 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-12-01 14:08:40,652 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-12-01 14:08:40,652 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-12-01 14:08:40,652 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-12-01 14:08:40,652 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-12-01 14:08:40,652 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-12-01 14:08:40,653 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-12-01 14:08:40,653 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-01 14:08:40,653 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-01 14:08:40,653 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-01 14:08:40,653 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-01 14:08:40,653 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-01 14:08:40,653 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-01 14:08:40,653 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-01 14:08:40,653 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-01 14:08:40,653 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-12-01 14:08:40,654 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-01 14:08:40,654 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-01 14:08:40,654 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-01 14:08:40,654 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-01 14:08:40,654 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-01 14:08:40,654 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-01 14:08:40,654 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-01 14:08:40,654 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-12-01 14:08:40,654 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-12-01 14:08:40,654 INFO L138 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-12-01 14:08:40,655 INFO L138 BoogieDeclarations]: Found implementation of procedure f_22_put [2018-12-01 14:08:40,655 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-01 14:08:40,655 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-01 14:08:40,655 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-01 14:08:40,655 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-01 14:08:40,655 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-12-01 14:08:40,655 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-12-01 14:08:40,655 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-12-01 14:08:40,655 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-12-01 14:08:40,655 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-12-01 14:08:40,655 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-12-01 14:08:40,656 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-12-01 14:08:40,656 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-12-01 14:08:40,656 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-12-01 14:08:40,656 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-12-01 14:08:40,656 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-12-01 14:08:40,656 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-12-01 14:08:40,656 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-12-01 14:08:40,656 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-12-01 14:08:40,656 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-12-01 14:08:40,656 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-12-01 14:08:40,657 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-12-01 14:08:40,657 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-12-01 14:08:40,657 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-12-01 14:08:40,657 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-12-01 14:08:40,657 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-12-01 14:08:40,657 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-12-01 14:08:40,657 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-12-01 14:08:40,657 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-12-01 14:08:40,657 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-12-01 14:08:40,657 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-12-01 14:08:40,658 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-12-01 14:08:40,658 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-12-01 14:08:40,658 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-12-01 14:08:40,658 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-12-01 14:08:40,658 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-12-01 14:08:40,658 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-12-01 14:08:40,658 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-12-01 14:08:40,658 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-12-01 14:08:40,658 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-12-01 14:08:40,658 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-12-01 14:08:40,659 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-12-01 14:08:40,659 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-12-01 14:08:40,659 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-12-01 14:08:40,659 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-12-01 14:08:40,659 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-12-01 14:08:40,659 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-12-01 14:08:40,659 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-12-01 14:08:40,659 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-12-01 14:08:40,660 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-12-01 14:08:40,660 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-12-01 14:08:40,660 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-12-01 14:08:40,660 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-12-01 14:08:40,660 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-12-01 14:08:40,660 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-12-01 14:08:40,660 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-12-01 14:08:40,660 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-12-01 14:08:40,660 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-12-01 14:08:40,660 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-12-01 14:08:40,660 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-12-01 14:08:40,661 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-12-01 14:08:40,661 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-12-01 14:08:40,661 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-12-01 14:08:40,661 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-12-01 14:08:40,661 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-12-01 14:08:40,661 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-12-01 14:08:40,661 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-12-01 14:08:40,661 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-12-01 14:08:40,661 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-12-01 14:08:40,661 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-12-01 14:08:40,661 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-12-01 14:08:40,662 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-12-01 14:08:40,662 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-12-01 14:08:40,662 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-12-01 14:08:40,662 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-12-01 14:08:40,662 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-12-01 14:08:40,662 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-12-01 14:08:40,662 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-12-01 14:08:40,662 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-12-01 14:08:40,662 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-12-01 14:08:40,662 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-12-01 14:08:40,663 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-12-01 14:08:40,663 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-12-01 14:08:40,663 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-12-01 14:08:40,663 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-12-01 14:08:40,663 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-12-01 14:08:40,663 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-12-01 14:08:40,663 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-12-01 14:08:40,663 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-12-01 14:08:40,663 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-12-01 14:08:40,663 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-12-01 14:08:40,663 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-12-01 14:08:40,664 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-12-01 14:08:40,664 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-12-01 14:08:40,664 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-12-01 14:08:40,664 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-12-01 14:08:40,664 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-12-01 14:08:40,664 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-12-01 14:08:40,664 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-12-01 14:08:40,664 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-12-01 14:08:40,664 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-12-01 14:08:40,664 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-12-01 14:08:40,664 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-12-01 14:08:40,665 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-12-01 14:08:40,665 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-12-01 14:08:40,665 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-12-01 14:08:40,665 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-12-01 14:08:40,665 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-12-01 14:08:40,665 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-01 14:08:40,665 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-12-01 14:08:40,665 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-12-01 14:08:40,665 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-12-01 14:08:40,665 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-12-01 14:08:40,665 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-12-01 14:08:40,666 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-12-01 14:08:40,666 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-01 14:08:40,666 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-01 14:08:40,666 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-01 14:08:40,666 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-01 14:08:40,666 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-01 14:08:40,666 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-01 14:08:40,666 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-12-01 14:08:40,666 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-12-01 14:08:40,666 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-12-01 14:08:40,666 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-01 14:08:40,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-12-01 14:08:40,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-12-01 14:08:40,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-12-01 14:08:40,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-12-01 14:08:40,667 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-12-01 14:08:40,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-12-01 14:08:40,667 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-01 14:08:40,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-12-01 14:08:40,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-12-01 14:08:40,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-01 14:08:40,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-01 14:08:40,668 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-01 14:08:40,668 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-01 14:08:40,668 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-01 14:08:40,668 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-01 14:08:40,668 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-01 14:08:40,668 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-01 14:08:40,668 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-01 14:08:40,668 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-01 14:08:40,668 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-01 14:08:40,668 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-12-01 14:08:40,668 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-01 14:08:40,668 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-01 14:08:40,669 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-01 14:08:40,669 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-01 14:08:40,669 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-01 14:08:40,669 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-01 14:08:40,669 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-01 14:08:40,669 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-01 14:08:40,669 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-12-01 14:08:40,669 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-12-01 14:08:40,669 INFO L130 BoogieDeclarations]: Found specification of procedure f_22_get [2018-12-01 14:08:40,669 INFO L130 BoogieDeclarations]: Found specification of procedure f_22_put [2018-12-01 14:08:40,669 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-01 14:08:40,670 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-01 14:08:40,670 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-01 14:08:40,670 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-01 14:08:40,670 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-01 14:08:40,670 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-12-01 14:08:40,670 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-12-01 14:08:40,670 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-12-01 14:08:40,670 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2018-12-01 14:08:40,882 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-01 14:08:41,009 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-01 14:08:41,128 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-01 14:08:41,128 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-01 14:08:41,128 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 01.12 02:08:41 BoogieIcfgContainer [2018-12-01 14:08:41,129 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-01 14:08:41,129 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-01 14:08:41,129 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-01 14:08:41,132 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-01 14:08:41,132 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 01.12 02:08:40" (1/3) ... [2018-12-01 14:08:41,132 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1025ae74 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 01.12 02:08:41, skipping insertion in model container [2018-12-01 14:08:41,132 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:08:40" (2/3) ... [2018-12-01 14:08:41,133 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1025ae74 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 01.12 02:08:41, skipping insertion in model container [2018-12-01 14:08:41,133 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 01.12 02:08:41" (3/3) ... [2018-12-01 14:08:41,134 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-01 14:08:41,142 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-01 14:08:41,148 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 67 error locations. [2018-12-01 14:08:41,157 INFO L257 AbstractCegarLoop]: Starting to check reachability of 67 error locations. [2018-12-01 14:08:41,172 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-01 14:08:41,172 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-01 14:08:41,172 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-01 14:08:41,172 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-01 14:08:41,172 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-01 14:08:41,173 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-01 14:08:41,173 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-01 14:08:41,173 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-01 14:08:41,173 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-01 14:08:41,184 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states. [2018-12-01 14:08:41,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-01 14:08:41,190 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:41,191 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:41,192 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:41,195 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:41,196 INFO L82 PathProgramCache]: Analyzing trace with hash 256702444, now seen corresponding path program 1 times [2018-12-01 14:08:41,197 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:41,197 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:41,231 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:41,231 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:41,231 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:41,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:41,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:41,334 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:41,335 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-01 14:08:41,338 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-01 14:08:41,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-01 14:08:41,350 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:08:41,352 INFO L87 Difference]: Start difference. First operand 177 states. Second operand 5 states. [2018-12-01 14:08:41,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:41,483 INFO L93 Difference]: Finished difference Result 157 states and 168 transitions. [2018-12-01 14:08:41,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-01 14:08:41,484 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-01 14:08:41,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:41,493 INFO L225 Difference]: With dead ends: 157 [2018-12-01 14:08:41,493 INFO L226 Difference]: Without dead ends: 154 [2018-12-01 14:08:41,494 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:08:41,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-12-01 14:08:41,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 148. [2018-12-01 14:08:41,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-01 14:08:41,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 159 transitions. [2018-12-01 14:08:41,526 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 159 transitions. Word has length 17 [2018-12-01 14:08:41,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:41,526 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 159 transitions. [2018-12-01 14:08:41,527 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-01 14:08:41,527 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 159 transitions. [2018-12-01 14:08:41,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-01 14:08:41,527 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:41,527 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:41,527 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:41,528 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:41,528 INFO L82 PathProgramCache]: Analyzing trace with hash 256702445, now seen corresponding path program 1 times [2018-12-01 14:08:41,528 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:41,528 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:41,529 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:41,529 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:41,529 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:41,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:41,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:41,593 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:41,593 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-01 14:08:41,594 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-01 14:08:41,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-01 14:08:41,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-01 14:08:41,595 INFO L87 Difference]: Start difference. First operand 148 states and 159 transitions. Second operand 6 states. [2018-12-01 14:08:41,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:41,679 INFO L93 Difference]: Finished difference Result 153 states and 164 transitions. [2018-12-01 14:08:41,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-01 14:08:41,679 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-01 14:08:41,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:41,680 INFO L225 Difference]: With dead ends: 153 [2018-12-01 14:08:41,680 INFO L226 Difference]: Without dead ends: 153 [2018-12-01 14:08:41,680 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-01 14:08:41,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-12-01 14:08:41,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 148. [2018-12-01 14:08:41,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-01 14:08:41,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 158 transitions. [2018-12-01 14:08:41,686 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 158 transitions. Word has length 17 [2018-12-01 14:08:41,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:41,687 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 158 transitions. [2018-12-01 14:08:41,687 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-01 14:08:41,687 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 158 transitions. [2018-12-01 14:08:41,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-01 14:08:41,687 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:41,687 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:41,688 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:41,688 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:41,688 INFO L82 PathProgramCache]: Analyzing trace with hash 285331595, now seen corresponding path program 1 times [2018-12-01 14:08:41,688 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:41,688 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:41,689 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:41,689 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:41,689 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:41,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:41,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:41,719 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:41,719 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-01 14:08:41,720 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-01 14:08:41,720 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-01 14:08:41,720 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:08:41,720 INFO L87 Difference]: Start difference. First operand 148 states and 158 transitions. Second operand 5 states. [2018-12-01 14:08:41,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:41,731 INFO L93 Difference]: Finished difference Result 147 states and 155 transitions. [2018-12-01 14:08:41,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-01 14:08:41,732 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-01 14:08:41,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:41,733 INFO L225 Difference]: With dead ends: 147 [2018-12-01 14:08:41,733 INFO L226 Difference]: Without dead ends: 147 [2018-12-01 14:08:41,733 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:08:41,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-01 14:08:41,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-12-01 14:08:41,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-12-01 14:08:41,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 153 transitions. [2018-12-01 14:08:41,738 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 153 transitions. Word has length 17 [2018-12-01 14:08:41,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:41,738 INFO L480 AbstractCegarLoop]: Abstraction has 145 states and 153 transitions. [2018-12-01 14:08:41,738 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-01 14:08:41,738 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 153 transitions. [2018-12-01 14:08:41,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-01 14:08:41,739 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:41,739 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:41,739 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:41,739 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:41,740 INFO L82 PathProgramCache]: Analyzing trace with hash 1651811587, now seen corresponding path program 1 times [2018-12-01 14:08:41,740 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:41,740 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:41,741 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:41,741 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:41,741 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:41,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:41,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:41,768 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:41,768 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-01 14:08:41,768 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-01 14:08:41,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-01 14:08:41,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:08:41,769 INFO L87 Difference]: Start difference. First operand 145 states and 153 transitions. Second operand 5 states. [2018-12-01 14:08:41,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:41,779 INFO L93 Difference]: Finished difference Result 147 states and 154 transitions. [2018-12-01 14:08:41,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-01 14:08:41,780 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-01 14:08:41,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:41,781 INFO L225 Difference]: With dead ends: 147 [2018-12-01 14:08:41,781 INFO L226 Difference]: Without dead ends: 147 [2018-12-01 14:08:41,781 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:08:41,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-01 14:08:41,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-12-01 14:08:41,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-12-01 14:08:41,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 152 transitions. [2018-12-01 14:08:41,786 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 152 transitions. Word has length 29 [2018-12-01 14:08:41,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:41,786 INFO L480 AbstractCegarLoop]: Abstraction has 145 states and 152 transitions. [2018-12-01 14:08:41,786 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-01 14:08:41,786 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 152 transitions. [2018-12-01 14:08:41,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-01 14:08:41,787 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:41,787 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:41,787 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:41,787 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:41,787 INFO L82 PathProgramCache]: Analyzing trace with hash 654739234, now seen corresponding path program 1 times [2018-12-01 14:08:41,787 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:41,787 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:41,788 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:41,788 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:41,788 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:41,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:41,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:41,858 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:41,858 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-01 14:08:41,858 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-01 14:08:41,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-01 14:08:41,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-01 14:08:41,859 INFO L87 Difference]: Start difference. First operand 145 states and 152 transitions. Second operand 9 states. [2018-12-01 14:08:41,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:41,908 INFO L93 Difference]: Finished difference Result 165 states and 173 transitions. [2018-12-01 14:08:41,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-01 14:08:41,908 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-12-01 14:08:41,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:41,909 INFO L225 Difference]: With dead ends: 165 [2018-12-01 14:08:41,909 INFO L226 Difference]: Without dead ends: 165 [2018-12-01 14:08:41,909 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-01 14:08:41,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-12-01 14:08:41,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 159. [2018-12-01 14:08:41,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-01 14:08:41,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 166 transitions. [2018-12-01 14:08:41,914 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 166 transitions. Word has length 29 [2018-12-01 14:08:41,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:41,915 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 166 transitions. [2018-12-01 14:08:41,915 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-01 14:08:41,915 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 166 transitions. [2018-12-01 14:08:41,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-01 14:08:41,915 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:41,915 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:41,916 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:41,916 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:41,916 INFO L82 PathProgramCache]: Analyzing trace with hash 1700792364, now seen corresponding path program 1 times [2018-12-01 14:08:41,916 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:41,916 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:41,917 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:41,917 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:41,917 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:41,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:41,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:41,978 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:41,978 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-01 14:08:41,978 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-01 14:08:41,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-01 14:08:41,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-01 14:08:41,979 INFO L87 Difference]: Start difference. First operand 159 states and 166 transitions. Second operand 11 states. [2018-12-01 14:08:42,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:42,167 INFO L93 Difference]: Finished difference Result 158 states and 165 transitions. [2018-12-01 14:08:42,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-01 14:08:42,167 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-12-01 14:08:42,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:42,168 INFO L225 Difference]: With dead ends: 158 [2018-12-01 14:08:42,168 INFO L226 Difference]: Without dead ends: 158 [2018-12-01 14:08:42,168 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-01 14:08:42,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-12-01 14:08:42,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2018-12-01 14:08:42,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-12-01 14:08:42,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 165 transitions. [2018-12-01 14:08:42,172 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 165 transitions. Word has length 32 [2018-12-01 14:08:42,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:42,173 INFO L480 AbstractCegarLoop]: Abstraction has 158 states and 165 transitions. [2018-12-01 14:08:42,173 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-01 14:08:42,173 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 165 transitions. [2018-12-01 14:08:42,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-01 14:08:42,173 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:42,173 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:42,173 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:42,174 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:42,174 INFO L82 PathProgramCache]: Analyzing trace with hash 1700792365, now seen corresponding path program 1 times [2018-12-01 14:08:42,174 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:42,174 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:42,175 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:42,175 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:42,175 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:42,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:42,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:42,194 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:42,194 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-01 14:08:42,194 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-01 14:08:42,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-01 14:08:42,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-01 14:08:42,194 INFO L87 Difference]: Start difference. First operand 158 states and 165 transitions. Second operand 4 states. [2018-12-01 14:08:42,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:42,209 INFO L93 Difference]: Finished difference Result 161 states and 168 transitions. [2018-12-01 14:08:42,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-01 14:08:42,210 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-01 14:08:42,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:42,211 INFO L225 Difference]: With dead ends: 161 [2018-12-01 14:08:42,211 INFO L226 Difference]: Without dead ends: 159 [2018-12-01 14:08:42,211 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:08:42,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-12-01 14:08:42,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-12-01 14:08:42,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-01 14:08:42,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 166 transitions. [2018-12-01 14:08:42,217 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 166 transitions. Word has length 32 [2018-12-01 14:08:42,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:42,217 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 166 transitions. [2018-12-01 14:08:42,217 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-01 14:08:42,217 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 166 transitions. [2018-12-01 14:08:42,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-01 14:08:42,218 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:42,218 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:42,219 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:42,219 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:42,219 INFO L82 PathProgramCache]: Analyzing trace with hash 1635244048, now seen corresponding path program 1 times [2018-12-01 14:08:42,219 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:42,219 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:42,220 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:42,220 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:42,220 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:42,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:42,264 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:42,264 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:42,264 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:42,287 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:42,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:42,320 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:42,345 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:42,369 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-01 14:08:42,369 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-12-01 14:08:42,369 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-01 14:08:42,369 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-01 14:08:42,369 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-01 14:08:42,369 INFO L87 Difference]: Start difference. First operand 159 states and 166 transitions. Second operand 6 states. [2018-12-01 14:08:42,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:42,385 INFO L93 Difference]: Finished difference Result 162 states and 169 transitions. [2018-12-01 14:08:42,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-01 14:08:42,385 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2018-12-01 14:08:42,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:42,386 INFO L225 Difference]: With dead ends: 162 [2018-12-01 14:08:42,386 INFO L226 Difference]: Without dead ends: 160 [2018-12-01 14:08:42,386 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-01 14:08:42,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-01 14:08:42,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 160. [2018-12-01 14:08:42,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-12-01 14:08:42,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 167 transitions. [2018-12-01 14:08:42,391 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 167 transitions. Word has length 33 [2018-12-01 14:08:42,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:42,391 INFO L480 AbstractCegarLoop]: Abstraction has 160 states and 167 transitions. [2018-12-01 14:08:42,391 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-01 14:08:42,392 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 167 transitions. [2018-12-01 14:08:42,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-01 14:08:42,392 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:42,392 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:42,393 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:42,393 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:42,393 INFO L82 PathProgramCache]: Analyzing trace with hash -396753779, now seen corresponding path program 2 times [2018-12-01 14:08:42,393 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:42,393 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:42,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:42,394 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:42,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:42,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:42,434 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:42,434 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:42,434 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:42,441 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-01 14:08:42,459 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-01 14:08:42,459 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-01 14:08:42,461 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:42,483 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:08:42,485 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:08:42,488 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:42,489 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-01 14:08:42,629 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-01 14:08:42,653 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-01 14:08:42,653 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [6] total 17 [2018-12-01 14:08:42,654 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-01 14:08:42,654 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-01 14:08:42,654 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=230, Unknown=0, NotChecked=0, Total=272 [2018-12-01 14:08:42,654 INFO L87 Difference]: Start difference. First operand 160 states and 167 transitions. Second operand 17 states. [2018-12-01 14:08:43,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:43,094 INFO L93 Difference]: Finished difference Result 221 states and 230 transitions. [2018-12-01 14:08:43,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-01 14:08:43,094 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 34 [2018-12-01 14:08:43,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:43,095 INFO L225 Difference]: With dead ends: 221 [2018-12-01 14:08:43,095 INFO L226 Difference]: Without dead ends: 219 [2018-12-01 14:08:43,095 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=85, Invalid=515, Unknown=0, NotChecked=0, Total=600 [2018-12-01 14:08:43,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-12-01 14:08:43,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 160. [2018-12-01 14:08:43,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-12-01 14:08:43,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 167 transitions. [2018-12-01 14:08:43,100 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 167 transitions. Word has length 34 [2018-12-01 14:08:43,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:43,101 INFO L480 AbstractCegarLoop]: Abstraction has 160 states and 167 transitions. [2018-12-01 14:08:43,101 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-01 14:08:43,101 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 167 transitions. [2018-12-01 14:08:43,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-01 14:08:43,102 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:43,102 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:43,102 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:43,103 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:43,103 INFO L82 PathProgramCache]: Analyzing trace with hash -1603043185, now seen corresponding path program 1 times [2018-12-01 14:08:43,103 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:43,103 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:43,104 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:43,104 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-01 14:08:43,104 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:43,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:43,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:43,153 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:43,153 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-01 14:08:43,154 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-01 14:08:43,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-01 14:08:43,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-01 14:08:43,155 INFO L87 Difference]: Start difference. First operand 160 states and 167 transitions. Second operand 7 states. [2018-12-01 14:08:43,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:43,176 INFO L93 Difference]: Finished difference Result 169 states and 176 transitions. [2018-12-01 14:08:43,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-01 14:08:43,176 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2018-12-01 14:08:43,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:43,176 INFO L225 Difference]: With dead ends: 169 [2018-12-01 14:08:43,176 INFO L226 Difference]: Without dead ends: 169 [2018-12-01 14:08:43,177 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-01 14:08:43,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-12-01 14:08:43,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 165. [2018-12-01 14:08:43,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-12-01 14:08:43,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 172 transitions. [2018-12-01 14:08:43,180 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 172 transitions. Word has length 40 [2018-12-01 14:08:43,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:43,180 INFO L480 AbstractCegarLoop]: Abstraction has 165 states and 172 transitions. [2018-12-01 14:08:43,180 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-01 14:08:43,180 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 172 transitions. [2018-12-01 14:08:43,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-01 14:08:43,180 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:43,180 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:43,181 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:43,181 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:43,181 INFO L82 PathProgramCache]: Analyzing trace with hash -1089122632, now seen corresponding path program 1 times [2018-12-01 14:08:43,181 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:43,181 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:43,182 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:43,182 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:43,182 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:43,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:43,255 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-01 14:08:43,255 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:43,255 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-01 14:08:43,255 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-01 14:08:43,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-01 14:08:43,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-01 14:08:43,255 INFO L87 Difference]: Start difference. First operand 165 states and 172 transitions. Second operand 11 states. [2018-12-01 14:08:43,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:43,432 INFO L93 Difference]: Finished difference Result 163 states and 170 transitions. [2018-12-01 14:08:43,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-01 14:08:43,433 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 40 [2018-12-01 14:08:43,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:43,433 INFO L225 Difference]: With dead ends: 163 [2018-12-01 14:08:43,433 INFO L226 Difference]: Without dead ends: 163 [2018-12-01 14:08:43,434 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-01 14:08:43,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-12-01 14:08:43,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-12-01 14:08:43,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-12-01 14:08:43,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 170 transitions. [2018-12-01 14:08:43,438 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 170 transitions. Word has length 40 [2018-12-01 14:08:43,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:43,438 INFO L480 AbstractCegarLoop]: Abstraction has 163 states and 170 transitions. [2018-12-01 14:08:43,439 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-01 14:08:43,439 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 170 transitions. [2018-12-01 14:08:43,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-01 14:08:43,439 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:43,439 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:43,440 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:43,440 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:43,440 INFO L82 PathProgramCache]: Analyzing trace with hash -1089122631, now seen corresponding path program 1 times [2018-12-01 14:08:43,440 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:43,440 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:43,441 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:43,441 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:43,441 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:43,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:43,479 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:43,479 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:43,479 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:43,488 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:43,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:43,511 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:43,520 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:43,535 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-01 14:08:43,535 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-12-01 14:08:43,535 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-01 14:08:43,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-01 14:08:43,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-12-01 14:08:43,535 INFO L87 Difference]: Start difference. First operand 163 states and 170 transitions. Second operand 8 states. [2018-12-01 14:08:43,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:43,548 INFO L93 Difference]: Finished difference Result 166 states and 173 transitions. [2018-12-01 14:08:43,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-01 14:08:43,549 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 40 [2018-12-01 14:08:43,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:43,549 INFO L225 Difference]: With dead ends: 166 [2018-12-01 14:08:43,549 INFO L226 Difference]: Without dead ends: 164 [2018-12-01 14:08:43,550 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-01 14:08:43,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-12-01 14:08:43,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-12-01 14:08:43,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-12-01 14:08:43,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 171 transitions. [2018-12-01 14:08:43,552 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 171 transitions. Word has length 40 [2018-12-01 14:08:43,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:43,553 INFO L480 AbstractCegarLoop]: Abstraction has 164 states and 171 transitions. [2018-12-01 14:08:43,553 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-01 14:08:43,553 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 171 transitions. [2018-12-01 14:08:43,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-01 14:08:43,553 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:43,553 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:43,553 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:43,553 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:43,553 INFO L82 PathProgramCache]: Analyzing trace with hash 1617364353, now seen corresponding path program 1 times [2018-12-01 14:08:43,554 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:43,554 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:43,554 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:43,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:43,554 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:43,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:43,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:43,569 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:43,570 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-01 14:08:43,570 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-01 14:08:43,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-01 14:08:43,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-01 14:08:43,570 INFO L87 Difference]: Start difference. First operand 164 states and 171 transitions. Second operand 3 states. [2018-12-01 14:08:43,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:43,640 INFO L93 Difference]: Finished difference Result 175 states and 181 transitions. [2018-12-01 14:08:43,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-01 14:08:43,641 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 38 [2018-12-01 14:08:43,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:43,641 INFO L225 Difference]: With dead ends: 175 [2018-12-01 14:08:43,641 INFO L226 Difference]: Without dead ends: 149 [2018-12-01 14:08:43,642 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-01 14:08:43,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-01 14:08:43,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 141. [2018-12-01 14:08:43,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-01 14:08:43,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 147 transitions. [2018-12-01 14:08:43,644 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 147 transitions. Word has length 38 [2018-12-01 14:08:43,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:43,645 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 147 transitions. [2018-12-01 14:08:43,645 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-01 14:08:43,645 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 147 transitions. [2018-12-01 14:08:43,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-12-01 14:08:43,645 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:43,645 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:43,646 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:43,646 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:43,646 INFO L82 PathProgramCache]: Analyzing trace with hash -2103669860, now seen corresponding path program 2 times [2018-12-01 14:08:43,646 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:43,646 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:43,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:43,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:43,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:43,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:43,683 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:43,683 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:43,684 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:43,691 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-01 14:08:43,709 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-01 14:08:43,709 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-01 14:08:43,711 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:43,719 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:08:43,719 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:08:43,724 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:43,724 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-01 14:08:43,869 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-01 14:08:43,884 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-01 14:08:43,884 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [8] total 19 [2018-12-01 14:08:43,884 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-01 14:08:43,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-01 14:08:43,884 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=289, Unknown=0, NotChecked=0, Total=342 [2018-12-01 14:08:43,885 INFO L87 Difference]: Start difference. First operand 141 states and 147 transitions. Second operand 19 states. [2018-12-01 14:08:44,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:44,346 INFO L93 Difference]: Finished difference Result 142 states and 148 transitions. [2018-12-01 14:08:44,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-01 14:08:44,346 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 41 [2018-12-01 14:08:44,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:44,346 INFO L225 Difference]: With dead ends: 142 [2018-12-01 14:08:44,346 INFO L226 Difference]: Without dead ends: 140 [2018-12-01 14:08:44,347 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 28 SyntacticMatches, 3 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=118, Invalid=694, Unknown=0, NotChecked=0, Total=812 [2018-12-01 14:08:44,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-01 14:08:44,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-12-01 14:08:44,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-01 14:08:44,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 146 transitions. [2018-12-01 14:08:44,349 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 146 transitions. Word has length 41 [2018-12-01 14:08:44,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:44,349 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 146 transitions. [2018-12-01 14:08:44,349 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-01 14:08:44,349 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 146 transitions. [2018-12-01 14:08:44,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-01 14:08:44,349 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:44,349 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:44,350 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:44,350 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:44,350 INFO L82 PathProgramCache]: Analyzing trace with hash 1575046783, now seen corresponding path program 1 times [2018-12-01 14:08:44,350 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:44,350 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:44,351 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:44,351 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-01 14:08:44,351 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:44,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:44,385 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-01 14:08:44,385 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:44,385 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-01 14:08:44,385 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-01 14:08:44,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-01 14:08:44,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-01 14:08:44,385 INFO L87 Difference]: Start difference. First operand 140 states and 146 transitions. Second operand 7 states. [2018-12-01 14:08:44,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:44,405 INFO L93 Difference]: Finished difference Result 142 states and 147 transitions. [2018-12-01 14:08:44,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-01 14:08:44,406 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 47 [2018-12-01 14:08:44,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:44,406 INFO L225 Difference]: With dead ends: 142 [2018-12-01 14:08:44,406 INFO L226 Difference]: Without dead ends: 140 [2018-12-01 14:08:44,407 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-01 14:08:44,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-01 14:08:44,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-12-01 14:08:44,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-01 14:08:44,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 145 transitions. [2018-12-01 14:08:44,410 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 145 transitions. Word has length 47 [2018-12-01 14:08:44,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:44,410 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 145 transitions. [2018-12-01 14:08:44,410 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-01 14:08:44,410 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 145 transitions. [2018-12-01 14:08:44,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-12-01 14:08:44,411 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:44,411 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:44,411 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:44,411 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:44,412 INFO L82 PathProgramCache]: Analyzing trace with hash -710961174, now seen corresponding path program 1 times [2018-12-01 14:08:44,412 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:44,412 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:44,412 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:44,413 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:44,413 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:44,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:44,459 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-01 14:08:44,459 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:44,459 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-01 14:08:44,459 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-01 14:08:44,460 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-01 14:08:44,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-01 14:08:44,460 INFO L87 Difference]: Start difference. First operand 140 states and 145 transitions. Second operand 9 states. [2018-12-01 14:08:44,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:44,498 INFO L93 Difference]: Finished difference Result 144 states and 148 transitions. [2018-12-01 14:08:44,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-01 14:08:44,498 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 52 [2018-12-01 14:08:44,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:44,499 INFO L225 Difference]: With dead ends: 144 [2018-12-01 14:08:44,499 INFO L226 Difference]: Without dead ends: 140 [2018-12-01 14:08:44,499 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-01 14:08:44,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-01 14:08:44,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-12-01 14:08:44,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-01 14:08:44,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 144 transitions. [2018-12-01 14:08:44,501 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 144 transitions. Word has length 52 [2018-12-01 14:08:44,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:44,502 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 144 transitions. [2018-12-01 14:08:44,502 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-01 14:08:44,502 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 144 transitions. [2018-12-01 14:08:44,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-12-01 14:08:44,502 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:44,502 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:44,503 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:44,503 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:44,503 INFO L82 PathProgramCache]: Analyzing trace with hash 1867473601, now seen corresponding path program 1 times [2018-12-01 14:08:44,503 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:44,503 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:44,504 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:44,504 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:44,504 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:44,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:44,605 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-01 14:08:44,605 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:44,605 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-12-01 14:08:44,606 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-01 14:08:44,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-01 14:08:44,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=211, Unknown=0, NotChecked=0, Total=240 [2018-12-01 14:08:44,606 INFO L87 Difference]: Start difference. First operand 140 states and 144 transitions. Second operand 16 states. [2018-12-01 14:08:44,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:44,858 INFO L93 Difference]: Finished difference Result 138 states and 142 transitions. [2018-12-01 14:08:44,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-01 14:08:44,858 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 63 [2018-12-01 14:08:44,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:44,859 INFO L225 Difference]: With dead ends: 138 [2018-12-01 14:08:44,859 INFO L226 Difference]: Without dead ends: 138 [2018-12-01 14:08:44,859 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2018-12-01 14:08:44,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-01 14:08:44,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-01 14:08:44,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-01 14:08:44,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 142 transitions. [2018-12-01 14:08:44,862 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 142 transitions. Word has length 63 [2018-12-01 14:08:44,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:44,863 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 142 transitions. [2018-12-01 14:08:44,863 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-01 14:08:44,863 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 142 transitions. [2018-12-01 14:08:44,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-12-01 14:08:44,863 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:44,863 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:44,864 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:44,864 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:44,864 INFO L82 PathProgramCache]: Analyzing trace with hash 1867473602, now seen corresponding path program 1 times [2018-12-01 14:08:44,864 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:44,864 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:44,865 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:44,865 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:44,865 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:44,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:44,908 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:44,908 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:44,908 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:44,916 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:44,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:44,950 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:44,966 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:44,992 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-01 14:08:44,992 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-12-01 14:08:44,992 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-01 14:08:44,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-01 14:08:44,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-12-01 14:08:44,993 INFO L87 Difference]: Start difference. First operand 138 states and 142 transitions. Second operand 10 states. [2018-12-01 14:08:45,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:45,016 INFO L93 Difference]: Finished difference Result 141 states and 145 transitions. [2018-12-01 14:08:45,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-01 14:08:45,016 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 63 [2018-12-01 14:08:45,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:45,017 INFO L225 Difference]: With dead ends: 141 [2018-12-01 14:08:45,017 INFO L226 Difference]: Without dead ends: 139 [2018-12-01 14:08:45,017 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-12-01 14:08:45,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-12-01 14:08:45,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-12-01 14:08:45,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-12-01 14:08:45,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 143 transitions. [2018-12-01 14:08:45,020 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 143 transitions. Word has length 63 [2018-12-01 14:08:45,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:45,020 INFO L480 AbstractCegarLoop]: Abstraction has 139 states and 143 transitions. [2018-12-01 14:08:45,021 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-01 14:08:45,021 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 143 transitions. [2018-12-01 14:08:45,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-01 14:08:45,021 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:45,021 INFO L402 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:45,021 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:45,022 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:45,022 INFO L82 PathProgramCache]: Analyzing trace with hash 1992709759, now seen corresponding path program 2 times [2018-12-01 14:08:45,022 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:45,022 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:45,023 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:45,023 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:45,023 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:45,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:45,106 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:45,107 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:45,107 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:45,117 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-01 14:08:45,143 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-01 14:08:45,143 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-01 14:08:45,146 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:45,157 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:08:45,157 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:08:45,160 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:45,161 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-01 14:08:45,381 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-01 14:08:45,396 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-01 14:08:45,396 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [10] total 26 [2018-12-01 14:08:45,396 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-01 14:08:45,396 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-01 14:08:45,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=567, Unknown=0, NotChecked=0, Total=650 [2018-12-01 14:08:45,397 INFO L87 Difference]: Start difference. First operand 139 states and 143 transitions. Second operand 26 states. [2018-12-01 14:08:46,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:46,243 INFO L93 Difference]: Finished difference Result 140 states and 144 transitions. [2018-12-01 14:08:46,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-12-01 14:08:46,243 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 64 [2018-12-01 14:08:46,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:46,244 INFO L225 Difference]: With dead ends: 140 [2018-12-01 14:08:46,244 INFO L226 Difference]: Without dead ends: 138 [2018-12-01 14:08:46,244 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 46 SyntacticMatches, 3 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=188, Invalid=1372, Unknown=0, NotChecked=0, Total=1560 [2018-12-01 14:08:46,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-01 14:08:46,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-01 14:08:46,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-01 14:08:46,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 142 transitions. [2018-12-01 14:08:46,247 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 142 transitions. Word has length 64 [2018-12-01 14:08:46,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:46,247 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 142 transitions. [2018-12-01 14:08:46,247 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-01 14:08:46,247 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 142 transitions. [2018-12-01 14:08:46,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-01 14:08:46,248 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:46,248 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:46,248 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:46,248 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:46,248 INFO L82 PathProgramCache]: Analyzing trace with hash -1203634192, now seen corresponding path program 1 times [2018-12-01 14:08:46,249 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:46,249 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:46,250 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:46,250 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-01 14:08:46,250 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:46,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:46,329 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-01 14:08:46,329 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:46,329 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-01 14:08:46,329 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-01 14:08:46,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-01 14:08:46,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-12-01 14:08:46,330 INFO L87 Difference]: Start difference. First operand 138 states and 142 transitions. Second operand 12 states. [2018-12-01 14:08:46,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:46,382 INFO L93 Difference]: Finished difference Result 144 states and 147 transitions. [2018-12-01 14:08:46,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-01 14:08:46,383 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 76 [2018-12-01 14:08:46,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:46,383 INFO L225 Difference]: With dead ends: 144 [2018-12-01 14:08:46,383 INFO L226 Difference]: Without dead ends: 138 [2018-12-01 14:08:46,383 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2018-12-01 14:08:46,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-01 14:08:46,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-01 14:08:46,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-01 14:08:46,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 141 transitions. [2018-12-01 14:08:46,385 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 141 transitions. Word has length 76 [2018-12-01 14:08:46,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:46,385 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 141 transitions. [2018-12-01 14:08:46,385 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-01 14:08:46,385 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 141 transitions. [2018-12-01 14:08:46,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-12-01 14:08:46,386 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:46,386 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:46,386 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:46,386 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:46,386 INFO L82 PathProgramCache]: Analyzing trace with hash -1506633113, now seen corresponding path program 1 times [2018-12-01 14:08:46,386 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:46,386 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:46,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:46,387 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:46,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:46,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:46,502 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-01 14:08:46,502 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:46,502 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-12-01 14:08:46,502 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-01 14:08:46,502 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-01 14:08:46,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=211, Unknown=0, NotChecked=0, Total=240 [2018-12-01 14:08:46,503 INFO L87 Difference]: Start difference. First operand 138 states and 141 transitions. Second operand 16 states. [2018-12-01 14:08:46,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:46,780 INFO L93 Difference]: Finished difference Result 145 states and 148 transitions. [2018-12-01 14:08:46,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-01 14:08:46,780 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 89 [2018-12-01 14:08:46,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:46,781 INFO L225 Difference]: With dead ends: 145 [2018-12-01 14:08:46,781 INFO L226 Difference]: Without dead ends: 145 [2018-12-01 14:08:46,781 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2018-12-01 14:08:46,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-12-01 14:08:46,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 136. [2018-12-01 14:08:46,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-01 14:08:46,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 139 transitions. [2018-12-01 14:08:46,783 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 139 transitions. Word has length 89 [2018-12-01 14:08:46,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:46,783 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 139 transitions. [2018-12-01 14:08:46,783 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-01 14:08:46,783 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 139 transitions. [2018-12-01 14:08:46,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-12-01 14:08:46,784 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:46,784 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:46,784 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:46,784 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:46,784 INFO L82 PathProgramCache]: Analyzing trace with hash -1506633112, now seen corresponding path program 1 times [2018-12-01 14:08:46,784 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:46,784 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:46,785 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:46,785 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:46,785 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:46,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:46,843 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:46,843 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:46,843 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:46,850 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:46,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:46,896 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:46,905 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:46,920 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-01 14:08:46,921 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-12-01 14:08:46,921 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-01 14:08:46,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-01 14:08:46,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-12-01 14:08:46,921 INFO L87 Difference]: Start difference. First operand 136 states and 139 transitions. Second operand 12 states. [2018-12-01 14:08:46,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:46,957 INFO L93 Difference]: Finished difference Result 139 states and 142 transitions. [2018-12-01 14:08:46,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-01 14:08:46,958 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 89 [2018-12-01 14:08:46,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:46,958 INFO L225 Difference]: With dead ends: 139 [2018-12-01 14:08:46,959 INFO L226 Difference]: Without dead ends: 137 [2018-12-01 14:08:46,959 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-12-01 14:08:46,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-12-01 14:08:46,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-12-01 14:08:46,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-12-01 14:08:46,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 140 transitions. [2018-12-01 14:08:46,961 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 140 transitions. Word has length 89 [2018-12-01 14:08:46,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:46,961 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 140 transitions. [2018-12-01 14:08:46,961 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-01 14:08:46,961 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 140 transitions. [2018-12-01 14:08:46,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-12-01 14:08:46,961 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:46,962 INFO L402 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:46,962 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:46,962 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:46,962 INFO L82 PathProgramCache]: Analyzing trace with hash -370594843, now seen corresponding path program 2 times [2018-12-01 14:08:46,962 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:46,962 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:46,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:46,963 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:46,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:46,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:47,025 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:47,025 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:47,025 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:47,035 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-01 14:08:47,073 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-01 14:08:47,073 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-01 14:08:47,076 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:47,085 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:08:47,085 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:08:47,089 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:47,089 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-01 14:08:47,344 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-01 14:08:47,359 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-01 14:08:47,359 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [12] total 29 [2018-12-01 14:08:47,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-12-01 14:08:47,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-12-01 14:08:47,360 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=707, Unknown=0, NotChecked=0, Total=812 [2018-12-01 14:08:47,360 INFO L87 Difference]: Start difference. First operand 137 states and 140 transitions. Second operand 29 states. [2018-12-01 14:08:48,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:48,054 INFO L93 Difference]: Finished difference Result 138 states and 141 transitions. [2018-12-01 14:08:48,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-12-01 14:08:48,054 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 90 [2018-12-01 14:08:48,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:48,055 INFO L225 Difference]: With dead ends: 138 [2018-12-01 14:08:48,055 INFO L226 Difference]: Without dead ends: 136 [2018-12-01 14:08:48,055 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 69 SyntacticMatches, 5 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 337 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=258, Invalid=1722, Unknown=0, NotChecked=0, Total=1980 [2018-12-01 14:08:48,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-01 14:08:48,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-01 14:08:48,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-01 14:08:48,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 139 transitions. [2018-12-01 14:08:48,058 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 139 transitions. Word has length 90 [2018-12-01 14:08:48,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:48,058 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 139 transitions. [2018-12-01 14:08:48,058 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-12-01 14:08:48,058 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 139 transitions. [2018-12-01 14:08:48,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-12-01 14:08:48,059 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:48,059 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:48,059 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:48,059 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:48,059 INFO L82 PathProgramCache]: Analyzing trace with hash -114537223, now seen corresponding path program 1 times [2018-12-01 14:08:48,060 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:48,060 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:48,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:48,060 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-01 14:08:48,061 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:48,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:48,110 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-01 14:08:48,110 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:48,110 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-01 14:08:48,111 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-01 14:08:48,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-01 14:08:48,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-01 14:08:48,111 INFO L87 Difference]: Start difference. First operand 136 states and 139 transitions. Second operand 10 states. [2018-12-01 14:08:48,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:48,141 INFO L93 Difference]: Finished difference Result 138 states and 140 transitions. [2018-12-01 14:08:48,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-01 14:08:48,141 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 89 [2018-12-01 14:08:48,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:48,142 INFO L225 Difference]: With dead ends: 138 [2018-12-01 14:08:48,142 INFO L226 Difference]: Without dead ends: 136 [2018-12-01 14:08:48,142 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-01 14:08:48,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-01 14:08:48,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-01 14:08:48,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-01 14:08:48,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 138 transitions. [2018-12-01 14:08:48,144 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 138 transitions. Word has length 89 [2018-12-01 14:08:48,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:48,144 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 138 transitions. [2018-12-01 14:08:48,144 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-01 14:08:48,144 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 138 transitions. [2018-12-01 14:08:48,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-01 14:08:48,145 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:48,145 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:48,145 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:48,145 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:48,145 INFO L82 PathProgramCache]: Analyzing trace with hash 2013127602, now seen corresponding path program 1 times [2018-12-01 14:08:48,145 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:48,145 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:48,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:48,146 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:48,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:48,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:48,308 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-01 14:08:48,308 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:08:48,308 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-01 14:08:48,309 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-01 14:08:48,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-01 14:08:48,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=343, Unknown=0, NotChecked=0, Total=380 [2018-12-01 14:08:48,309 INFO L87 Difference]: Start difference. First operand 136 states and 138 transitions. Second operand 20 states. [2018-12-01 14:08:48,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:48,638 INFO L93 Difference]: Finished difference Result 139 states and 141 transitions. [2018-12-01 14:08:48,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-01 14:08:48,638 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 105 [2018-12-01 14:08:48,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:48,639 INFO L225 Difference]: With dead ends: 139 [2018-12-01 14:08:48,639 INFO L226 Difference]: Without dead ends: 139 [2018-12-01 14:08:48,639 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=637, Unknown=0, NotChecked=0, Total=702 [2018-12-01 14:08:48,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-12-01 14:08:48,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 134. [2018-12-01 14:08:48,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-01 14:08:48,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-12-01 14:08:48,641 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 105 [2018-12-01 14:08:48,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:48,641 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-12-01 14:08:48,641 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-01 14:08:48,641 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-12-01 14:08:48,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-01 14:08:48,641 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:48,642 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:48,642 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:48,642 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:48,642 INFO L82 PathProgramCache]: Analyzing trace with hash 2013127603, now seen corresponding path program 1 times [2018-12-01 14:08:48,642 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:48,642 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:48,642 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:48,643 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:48,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:48,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:48,707 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:48,707 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:48,708 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:48,715 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:48,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:48,763 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:48,775 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:48,790 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-01 14:08:48,791 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-12-01 14:08:48,791 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-01 14:08:48,791 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-01 14:08:48,791 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-12-01 14:08:48,791 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 14 states. [2018-12-01 14:08:48,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:48,810 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2018-12-01 14:08:48,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-01 14:08:48,810 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 105 [2018-12-01 14:08:48,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:48,811 INFO L225 Difference]: With dead ends: 137 [2018-12-01 14:08:48,811 INFO L226 Difference]: Without dead ends: 135 [2018-12-01 14:08:48,811 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 105 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-12-01 14:08:48,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-01 14:08:48,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-12-01 14:08:48,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-12-01 14:08:48,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 137 transitions. [2018-12-01 14:08:48,813 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 137 transitions. Word has length 105 [2018-12-01 14:08:48,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:48,814 INFO L480 AbstractCegarLoop]: Abstraction has 135 states and 137 transitions. [2018-12-01 14:08:48,814 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-01 14:08:48,814 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 137 transitions. [2018-12-01 14:08:48,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-12-01 14:08:48,814 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:48,814 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:48,815 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:48,815 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:48,815 INFO L82 PathProgramCache]: Analyzing trace with hash 694410032, now seen corresponding path program 2 times [2018-12-01 14:08:48,815 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:48,815 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:48,816 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:48,816 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:48,816 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:48,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:48,898 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:48,898 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:48,898 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:48,905 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-01 14:08:48,945 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-01 14:08:48,946 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-01 14:08:48,951 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:48,959 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:08:48,960 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:08:48,963 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:48,963 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-01 14:08:49,402 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-12-01 14:08:49,427 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-01 14:08:49,427 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [14] total 35 [2018-12-01 14:08:49,427 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-12-01 14:08:49,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-12-01 14:08:49,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=1050, Unknown=0, NotChecked=0, Total=1190 [2018-12-01 14:08:49,428 INFO L87 Difference]: Start difference. First operand 135 states and 137 transitions. Second operand 35 states. [2018-12-01 14:08:50,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:50,962 INFO L93 Difference]: Finished difference Result 136 states and 138 transitions. [2018-12-01 14:08:50,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-12-01 14:08:50,963 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 106 [2018-12-01 14:08:50,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:50,963 INFO L225 Difference]: With dead ends: 136 [2018-12-01 14:08:50,964 INFO L226 Difference]: Without dead ends: 134 [2018-12-01 14:08:50,965 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 79 SyntacticMatches, 7 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 532 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=351, Invalid=2619, Unknown=0, NotChecked=0, Total=2970 [2018-12-01 14:08:50,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-01 14:08:50,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-01 14:08:50,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-01 14:08:50,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-12-01 14:08:50,968 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 106 [2018-12-01 14:08:50,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:50,968 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-12-01 14:08:50,968 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-12-01 14:08:50,968 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-12-01 14:08:50,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-01 14:08:50,969 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:50,969 INFO L402 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:50,970 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:50,970 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:50,970 INFO L82 PathProgramCache]: Analyzing trace with hash -1729876608, now seen corresponding path program 1 times [2018-12-01 14:08:50,970 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:50,970 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:50,972 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:50,972 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-01 14:08:50,972 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:50,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:51,072 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:51,073 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:51,073 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:51,083 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:51,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:51,124 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:51,136 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:51,152 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-01 14:08:51,152 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-12-01 14:08:51,152 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-01 14:08:51,153 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-01 14:08:51,153 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-12-01 14:08:51,153 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 16 states. [2018-12-01 14:08:51,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:51,188 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2018-12-01 14:08:51,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-01 14:08:51,188 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 112 [2018-12-01 14:08:51,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:51,189 INFO L225 Difference]: With dead ends: 137 [2018-12-01 14:08:51,189 INFO L226 Difference]: Without dead ends: 135 [2018-12-01 14:08:51,189 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-12-01 14:08:51,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-01 14:08:51,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-12-01 14:08:51,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-12-01 14:08:51,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 137 transitions. [2018-12-01 14:08:51,191 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 137 transitions. Word has length 112 [2018-12-01 14:08:51,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:51,191 INFO L480 AbstractCegarLoop]: Abstraction has 135 states and 137 transitions. [2018-12-01 14:08:51,191 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-01 14:08:51,191 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 137 transitions. [2018-12-01 14:08:51,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-01 14:08:51,191 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:51,191 INFO L402 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:51,192 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:51,192 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:51,192 INFO L82 PathProgramCache]: Analyzing trace with hash 1998405475, now seen corresponding path program 2 times [2018-12-01 14:08:51,192 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:51,192 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:51,192 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:51,193 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:51,193 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:51,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:51,278 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:51,279 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:51,279 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:51,288 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-01 14:08:51,328 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-01 14:08:51,328 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-01 14:08:51,333 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:51,401 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-01 14:08:51,402 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-01 14:08:51,402 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:08:51,403 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:51,404 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:51,404 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-12-01 14:08:51,471 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-01 14:08:51,473 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-01 14:08:51,476 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-01 14:08:51,476 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-12-01 14:08:52,075 WARN L854 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-12-01 14:08:52,081 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-12-01 14:08:52,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:08:52,084 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-12-01 14:08:52,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:08:52,087 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:08:52,090 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-12-01 14:08:52,090 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-01 14:08:52,095 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:52,097 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:52,101 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:52,101 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-12-01 14:08:52,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:08:52,425 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-12-01 14:08:52,427 INFO L683 Elim1Store]: detected equality via solver [2018-12-01 14:08:52,428 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:08:52,428 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-12-01 14:08:52,428 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:08:52,430 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:52,433 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:52,433 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-12-01 14:08:52,736 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-12-01 14:08:52,737 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-01 14:08:52,737 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:08:52,738 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:52,738 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:08:52,738 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-12-01 14:08:52,774 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-12-01 14:08:52,789 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-01 14:08:52,790 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [43] imperfect sequences [16] total 57 [2018-12-01 14:08:52,790 INFO L459 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-12-01 14:08:52,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-12-01 14:08:52,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=202, Invalid=2881, Unknown=1, NotChecked=108, Total=3192 [2018-12-01 14:08:52,791 INFO L87 Difference]: Start difference. First operand 135 states and 137 transitions. Second operand 57 states. [2018-12-01 14:08:54,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:54,986 INFO L93 Difference]: Finished difference Result 116 states and 116 transitions. [2018-12-01 14:08:54,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-12-01 14:08:54,986 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 113 [2018-12-01 14:08:54,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:54,987 INFO L225 Difference]: With dead ends: 116 [2018-12-01 14:08:54,987 INFO L226 Difference]: Without dead ends: 114 [2018-12-01 14:08:54,988 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 72 SyntacticMatches, 1 SemanticMatches, 89 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1506 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=508, Invalid=7505, Unknown=1, NotChecked=176, Total=8190 [2018-12-01 14:08:54,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-01 14:08:54,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-12-01 14:08:54,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-12-01 14:08:54,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 114 transitions. [2018-12-01 14:08:54,990 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 114 transitions. Word has length 113 [2018-12-01 14:08:54,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:54,990 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 114 transitions. [2018-12-01 14:08:54,990 INFO L481 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-12-01 14:08:54,990 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 114 transitions. [2018-12-01 14:08:54,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-01 14:08:54,990 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:54,991 INFO L402 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:54,991 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:54,991 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:54,991 INFO L82 PathProgramCache]: Analyzing trace with hash 2034289743, now seen corresponding path program 1 times [2018-12-01 14:08:54,991 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:54,991 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:54,992 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:54,992 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-01 14:08:54,992 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:55,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:55,117 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:55,117 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:55,117 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:55,124 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:55,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:55,183 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:55,200 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:55,216 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-01 14:08:55,216 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-12-01 14:08:55,217 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-01 14:08:55,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-01 14:08:55,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-12-01 14:08:55,217 INFO L87 Difference]: Start difference. First operand 114 states and 114 transitions. Second operand 18 states. [2018-12-01 14:08:55,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:55,258 INFO L93 Difference]: Finished difference Result 117 states and 117 transitions. [2018-12-01 14:08:55,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-01 14:08:55,259 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 113 [2018-12-01 14:08:55,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:55,259 INFO L225 Difference]: With dead ends: 117 [2018-12-01 14:08:55,259 INFO L226 Difference]: Without dead ends: 115 [2018-12-01 14:08:55,259 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-12-01 14:08:55,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-12-01 14:08:55,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-12-01 14:08:55,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-12-01 14:08:55,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 115 transitions. [2018-12-01 14:08:55,261 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 115 transitions. Word has length 113 [2018-12-01 14:08:55,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:55,261 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 115 transitions. [2018-12-01 14:08:55,261 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-01 14:08:55,262 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 115 transitions. [2018-12-01 14:08:55,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-12-01 14:08:55,262 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:55,262 INFO L402 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:55,262 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:55,262 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:55,262 INFO L82 PathProgramCache]: Analyzing trace with hash 1646917324, now seen corresponding path program 2 times [2018-12-01 14:08:55,263 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:55,263 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:55,263 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:55,263 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:08:55,264 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:55,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:55,401 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:55,401 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:55,401 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:55,409 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-01 14:08:55,474 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-01 14:08:55,474 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-01 14:08:55,476 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:08:55,489 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:55,504 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-01 14:08:55,504 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-12-01 14:08:55,505 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-01 14:08:55,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-01 14:08:55,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-12-01 14:08:55,505 INFO L87 Difference]: Start difference. First operand 115 states and 115 transitions. Second operand 19 states. [2018-12-01 14:08:55,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:08:55,532 INFO L93 Difference]: Finished difference Result 118 states and 118 transitions. [2018-12-01 14:08:55,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-01 14:08:55,532 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 114 [2018-12-01 14:08:55,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:08:55,533 INFO L225 Difference]: With dead ends: 118 [2018-12-01 14:08:55,533 INFO L226 Difference]: Without dead ends: 116 [2018-12-01 14:08:55,533 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-12-01 14:08:55,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-12-01 14:08:55,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-12-01 14:08:55,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-12-01 14:08:55,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 116 transitions. [2018-12-01 14:08:55,535 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 116 transitions. Word has length 114 [2018-12-01 14:08:55,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:08:55,535 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 116 transitions. [2018-12-01 14:08:55,535 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-01 14:08:55,535 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 116 transitions. [2018-12-01 14:08:55,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-01 14:08:55,535 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:08:55,535 INFO L402 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:08:55,536 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:08:55,536 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:08:55,536 INFO L82 PathProgramCache]: Analyzing trace with hash -1771693073, now seen corresponding path program 3 times [2018-12-01 14:08:55,536 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:08:55,536 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:08:55,537 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:55,537 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-01 14:08:55,537 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:08:55,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:08:55,640 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:08:55,640 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:08:55,640 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:08:55,647 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-01 14:09:08,960 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-12-01 14:09:08,960 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-01 14:09:08,968 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:09,168 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:09,185 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-01 14:09:09,185 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 23] total 40 [2018-12-01 14:09:09,186 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-12-01 14:09:09,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-12-01 14:09:09,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=470, Invalid=1090, Unknown=0, NotChecked=0, Total=1560 [2018-12-01 14:09:09,186 INFO L87 Difference]: Start difference. First operand 116 states and 116 transitions. Second operand 40 states. [2018-12-01 14:09:09,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:09,249 INFO L93 Difference]: Finished difference Result 119 states and 119 transitions. [2018-12-01 14:09:09,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-01 14:09:09,249 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 115 [2018-12-01 14:09:09,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:09,250 INFO L225 Difference]: With dead ends: 119 [2018-12-01 14:09:09,250 INFO L226 Difference]: Without dead ends: 117 [2018-12-01 14:09:09,250 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 616 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=512, Invalid=1210, Unknown=0, NotChecked=0, Total=1722 [2018-12-01 14:09:09,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-12-01 14:09:09,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-12-01 14:09:09,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-12-01 14:09:09,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 117 transitions. [2018-12-01 14:09:09,253 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 117 transitions. Word has length 115 [2018-12-01 14:09:09,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:09,253 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 117 transitions. [2018-12-01 14:09:09,253 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-12-01 14:09:09,253 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 117 transitions. [2018-12-01 14:09:09,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-12-01 14:09:09,254 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:09,254 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:09,254 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-01 14:09:09,254 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:09,254 INFO L82 PathProgramCache]: Analyzing trace with hash -374432980, now seen corresponding path program 4 times [2018-12-01 14:09:09,254 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-01 14:09:09,254 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-01 14:09:09,255 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:09:09,255 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-01 14:09:09,255 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-01 14:09:09,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-01 14:09:09,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-01 14:09:09,375 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-01 14:09:09,388 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-12-01 14:09:09,393 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-01 14:09:09,398 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 18 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-01 14:09:09,398 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 17 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-01 14:09:09,412 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 01.12 02:09:09 BoogieIcfgContainer [2018-12-01 14:09:09,412 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-01 14:09:09,412 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-01 14:09:09,412 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-01 14:09:09,412 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-01 14:09:09,413 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 01.12 02:08:41" (3/4) ... [2018-12-01 14:09:09,416 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-01 14:09:09,416 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-01 14:09:09,417 INFO L168 Benchmark]: Toolchain (without parser) took 29167.30 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 454.6 MB). Free memory was 951.7 MB in the beginning and 1.0 GB in the end (delta: -91.7 MB). Peak memory consumption was 362.8 MB. Max. memory is 11.5 GB. [2018-12-01 14:09:09,418 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 976.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-01 14:09:09,418 INFO L168 Benchmark]: CACSL2BoogieTranslator took 317.95 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 116.4 MB). Free memory was 951.7 MB in the beginning and 1.1 GB in the end (delta: -133.5 MB). Peak memory consumption was 26.7 MB. Max. memory is 11.5 GB. [2018-12-01 14:09:09,419 INFO L168 Benchmark]: Boogie Preprocessor took 46.70 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-01 14:09:09,419 INFO L168 Benchmark]: RCFGBuilder took 512.85 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 981.2 MB in the end (delta: 104.0 MB). Peak memory consumption was 104.0 MB. Max. memory is 11.5 GB. [2018-12-01 14:09:09,419 INFO L168 Benchmark]: TraceAbstraction took 28282.72 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 338.2 MB). Free memory was 981.2 MB in the beginning and 1.0 GB in the end (delta: -62.3 MB). Peak memory consumption was 275.9 MB. Max. memory is 11.5 GB. [2018-12-01 14:09:09,419 INFO L168 Benchmark]: Witness Printer took 4.25 ms. Allocated memory is still 1.5 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-01 14:09:09,421 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 976.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 317.95 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 116.4 MB). Free memory was 951.7 MB in the beginning and 1.1 GB in the end (delta: -133.5 MB). Peak memory consumption was 26.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 46.70 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 512.85 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 981.2 MB in the end (delta: 104.0 MB). Peak memory consumption was 104.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 28282.72 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 338.2 MB). Free memory was 981.2 MB in the beginning and 1.0 GB in the end (delta: -62.3 MB). Peak memory consumption was 275.9 MB. Max. memory is 11.5 GB. * Witness Printer took 4.25 ms. Allocated memory is still 1.5 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 18 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 17 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1452]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1452. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={30:0}] [L1453] CALL entry_point() VAL [ldv_global_msg_list={30:0}] [L1445] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={30:0}] [L1446] CALL, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={30:0}] [L1406] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={30:0}] [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16, ldv_global_msg_list={30:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=16, \result={25:0}, ldv_global_msg_list={30:0}, malloc(size)={25:0}, size=16] [L1408] RET, EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_global_msg_list={30:0}, ldv_malloc(sizeof(*kobj))={25:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={25:0}, ldv_global_msg_list={30:0}, memset(kobj, 0, sizeof(*kobj))={25:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={25:12}, ldv_global_msg_list={30:0}] [L1294] ((&kref->refcount)->counter) = (1) VAL [kref={25:12}, kref={25:12}, ldv_global_msg_list={30:0}] [L1382] RET ldv_kref_init(&kobj->kref) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [ldv_global_msg_list={30:0}, list={25:4}] [L1099] list->next = list VAL [ldv_global_msg_list={30:0}, list={25:4}, list={25:4}] [L1100] list->prev = list VAL [ldv_global_msg_list={30:0}, list={25:4}, list={25:4}] [L1383] RET LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1398] RET ldv_kobject_init_internal(kobj) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1413] RET ldv_kobject_init(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1414] return kobj; VAL [\result={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1446] RET, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={30:0}, ldv_kobject_create()={25:0}] [L1446] kobj = ldv_kobject_create() [L1447] CALL f_22_get(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1437] CALL ldv_kobject_get(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={25:12}, ldv_global_msg_list={30:0}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={30:0}, v={25:12}] [L1255] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={25:12}, v={25:12}] [L1256] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={25:12}, v={25:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=2, v={25:12}, v={25:12}] [L1258] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=2, v={25:12}, v={25:12}] [L1259] return temp; VAL [\old(i)=1, \result=2, i=1, ldv_global_msg_list={30:0}, temp=2, v={25:12}, v={25:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={25:12}, kref={25:12}, ldv_atomic_add_return(1, (&kref->refcount))=2, ldv_global_msg_list={30:0}] [L1374] RET ldv_kref_get(&kobj->kref) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1375] return kobj; VAL [\result={25:0}, kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1437] RET ldv_kobject_get(kobj) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}, ldv_kobject_get(kobj)={25:0}] [L1447] RET f_22_get(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1449] CALL ldv_kobject_put(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={25:12}, ldv_global_msg_list={30:0}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={25:12}, ldv_global_msg_list={30:0}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={30:0}, v={25:12}] [L1264] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={25:12}, v={25:12}] [L1265] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={25:12}, v={25:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=1, v={25:12}, v={25:12}] [L1267] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=1, v={25:12}, v={25:12}] [L1268] return temp; VAL [\old(i)=1, \result=1, i=1, ldv_global_msg_list={30:0}, temp=1, v={25:12}, v={25:12}] [L1281] RET, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={25:12}, kref={25:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, ldv_global_msg_list={30:0}, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] return 0; VAL [\old(count)=1, \result=0, count=1, kref={25:12}, kref={25:12}, ldv_global_msg_list={30:0}, release={-1:0}, release={-1:0}] [L1313] RET, EXPR ldv_kref_sub(kref, 1, release) VAL [kref={25:12}, kref={25:12}, ldv_global_msg_list={30:0}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] return ldv_kref_sub(kref, 1, release); [L1363] RET ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1449] RET ldv_kobject_put(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1453] RET entry_point() VAL [ldv_global_msg_list={30:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 45 procedures, 319 locations, 67 error locations. UNSAFE Result, 28.2s OverallTime, 33 OverallIterations, 16 TraceHistogramMax, 8.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4019 SDtfs, 911 SDslu, 32532 SDs, 0 SdLazy, 11999 SolverSat, 228 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1702 GetRequests, 1116 SyntacticMatches, 20 SemanticMatches, 566 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3650 ImplicationChecksByTransitivity, 6.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=177occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 32 MinimizatonAttempts, 106 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 13.9s SatisfiabilityAnalysisTime, 4.9s InterpolantComputationTime, 3392 NumberOfCodeBlocks, 3350 NumberOfCodeBlocksAsserted, 57 NumberOfCheckSat, 3229 ConstructedInterpolants, 174 QuantifiedInterpolants, 608923 SizeOfPredicates, 114 NumberOfNonLiveVariables, 6119 ConjunctsInSsa, 588 ConjunctsInUnsatCore, 47 InterpolantComputations, 23 PerfectInterpolantSequences, 400/1557 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-01 14:09:10,644 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-01 14:09:10,645 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-01 14:09:10,650 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-01 14:09:10,651 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-01 14:09:10,651 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-01 14:09:10,652 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-01 14:09:10,652 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-01 14:09:10,653 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-01 14:09:10,654 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-01 14:09:10,654 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-01 14:09:10,654 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-01 14:09:10,655 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-01 14:09:10,655 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-01 14:09:10,655 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-01 14:09:10,656 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-01 14:09:10,656 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-01 14:09:10,657 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-01 14:09:10,659 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-01 14:09:10,659 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-01 14:09:10,660 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-01 14:09:10,660 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-01 14:09:10,661 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-01 14:09:10,662 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-01 14:09:10,662 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-01 14:09:10,662 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-01 14:09:10,663 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-01 14:09:10,663 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-01 14:09:10,663 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-01 14:09:10,664 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-01 14:09:10,664 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-01 14:09:10,664 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-01 14:09:10,664 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-01 14:09:10,664 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-01 14:09:10,665 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-01 14:09:10,665 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-01 14:09:10,665 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf [2018-12-01 14:09:10,675 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-01 14:09:10,675 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-01 14:09:10,676 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-01 14:09:10,676 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-01 14:09:10,676 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-01 14:09:10,677 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-01 14:09:10,677 INFO L133 SettingsManager]: * Use SBE=true [2018-12-01 14:09:10,677 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-01 14:09:10,677 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-01 14:09:10,677 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-01 14:09:10,677 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-01 14:09:10,677 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-01 14:09:10,678 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-01 14:09:10,678 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-01 14:09:10,678 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-01 14:09:10,678 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-01 14:09:10,678 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-01 14:09:10,678 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-01 14:09:10,679 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-01 14:09:10,679 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-01 14:09:10,679 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-01 14:09:10,679 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-01 14:09:10,679 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-01 14:09:10,679 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-01 14:09:10,680 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-01 14:09:10,680 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-01 14:09:10,680 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-01 14:09:10,680 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-01 14:09:10,680 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-12-01 14:09:10,680 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-01 14:09:10,680 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-01 14:09:10,681 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bc6894f63179c5a0c3641b97a75e8f614c456bea [2018-12-01 14:09:10,704 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-01 14:09:10,712 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-01 14:09:10,714 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-01 14:09:10,715 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-01 14:09:10,715 INFO L276 PluginConnector]: CDTParser initialized [2018-12-01 14:09:10,715 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-01 14:09:10,750 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/data/7622048cf/d2076e46324e440490c4f8f8c10c1d99/FLAGfc892886e [2018-12-01 14:09:11,189 INFO L307 CDTParser]: Found 1 translation units. [2018-12-01 14:09:11,190 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-01 14:09:11,197 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/data/7622048cf/d2076e46324e440490c4f8f8c10c1d99/FLAGfc892886e [2018-12-01 14:09:11,206 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/data/7622048cf/d2076e46324e440490c4f8f8c10c1d99 [2018-12-01 14:09:11,208 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-01 14:09:11,209 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-01 14:09:11,209 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-01 14:09:11,209 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-01 14:09:11,211 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-01 14:09:11,212 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 01.12 02:09:11" (1/1) ... [2018-12-01 14:09:11,213 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7d255691 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:09:11, skipping insertion in model container [2018-12-01 14:09:11,213 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 01.12 02:09:11" (1/1) ... [2018-12-01 14:09:11,218 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-01 14:09:11,242 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-01 14:09:11,429 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-01 14:09:11,441 INFO L191 MainTranslator]: Completed pre-run [2018-12-01 14:09:11,516 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-01 14:09:11,556 INFO L195 MainTranslator]: Completed translation [2018-12-01 14:09:11,556 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:09:11 WrapperNode [2018-12-01 14:09:11,556 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-01 14:09:11,556 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-01 14:09:11,556 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-01 14:09:11,556 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-01 14:09:11,564 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:09:11" (1/1) ... [2018-12-01 14:09:11,564 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:09:11" (1/1) ... [2018-12-01 14:09:11,576 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:09:11" (1/1) ... [2018-12-01 14:09:11,576 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:09:11" (1/1) ... [2018-12-01 14:09:11,592 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:09:11" (1/1) ... [2018-12-01 14:09:11,595 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:09:11" (1/1) ... [2018-12-01 14:09:11,598 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:09:11" (1/1) ... [2018-12-01 14:09:11,602 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-01 14:09:11,602 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-01 14:09:11,602 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-01 14:09:11,602 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-01 14:09:11,603 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:09:11" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-01 14:09:11,634 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-01 14:09:11,634 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-01 14:09:11,634 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-01 14:09:11,634 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-12-01 14:09:11,635 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-12-01 14:09:11,635 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-12-01 14:09:11,635 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-12-01 14:09:11,635 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-01 14:09:11,635 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-01 14:09:11,635 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-01 14:09:11,635 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-12-01 14:09:11,635 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-12-01 14:09:11,635 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-12-01 14:09:11,635 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-12-01 14:09:11,635 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-12-01 14:09:11,635 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-12-01 14:09:11,636 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-12-01 14:09:11,636 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-12-01 14:09:11,636 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-12-01 14:09:11,636 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-12-01 14:09:11,636 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-01 14:09:11,636 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-01 14:09:11,636 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-01 14:09:11,636 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-01 14:09:11,636 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-01 14:09:11,636 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-01 14:09:11,636 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-01 14:09:11,637 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-01 14:09:11,637 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-12-01 14:09:11,637 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-01 14:09:11,637 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-01 14:09:11,637 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-01 14:09:11,637 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-01 14:09:11,637 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-01 14:09:11,637 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-01 14:09:11,637 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-01 14:09:11,637 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-12-01 14:09:11,637 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-12-01 14:09:11,637 INFO L138 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-12-01 14:09:11,637 INFO L138 BoogieDeclarations]: Found implementation of procedure f_22_put [2018-12-01 14:09:11,638 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-01 14:09:11,638 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-01 14:09:11,638 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-01 14:09:11,638 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-01 14:09:11,638 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-12-01 14:09:11,638 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-12-01 14:09:11,638 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-12-01 14:09:11,638 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-12-01 14:09:11,638 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-12-01 14:09:11,638 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-12-01 14:09:11,638 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-12-01 14:09:11,638 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-12-01 14:09:11,638 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-12-01 14:09:11,638 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-12-01 14:09:11,638 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-12-01 14:09:11,639 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-12-01 14:09:11,640 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-12-01 14:09:11,640 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-12-01 14:09:11,640 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-12-01 14:09:11,640 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-12-01 14:09:11,640 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-12-01 14:09:11,640 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-12-01 14:09:11,640 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-12-01 14:09:11,640 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-12-01 14:09:11,640 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-12-01 14:09:11,640 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-12-01 14:09:11,640 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-12-01 14:09:11,640 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-12-01 14:09:11,640 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-12-01 14:09:11,641 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-12-01 14:09:11,641 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-12-01 14:09:11,641 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-12-01 14:09:11,641 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-12-01 14:09:11,641 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-12-01 14:09:11,641 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-12-01 14:09:11,641 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-12-01 14:09:11,641 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-12-01 14:09:11,641 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-12-01 14:09:11,642 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-12-01 14:09:11,642 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-12-01 14:09:11,642 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-12-01 14:09:11,642 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-12-01 14:09:11,642 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-12-01 14:09:11,642 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-12-01 14:09:11,642 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-12-01 14:09:11,642 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-12-01 14:09:11,642 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-12-01 14:09:11,642 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-12-01 14:09:11,643 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-12-01 14:09:11,643 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-12-01 14:09:11,643 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-12-01 14:09:11,643 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-12-01 14:09:11,643 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-12-01 14:09:11,643 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-12-01 14:09:11,643 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-12-01 14:09:11,643 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-12-01 14:09:11,643 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-12-01 14:09:11,644 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-12-01 14:09:11,644 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-12-01 14:09:11,644 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-12-01 14:09:11,644 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-12-01 14:09:11,644 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-12-01 14:09:11,644 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-12-01 14:09:11,644 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-12-01 14:09:11,644 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-12-01 14:09:11,644 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-12-01 14:09:11,644 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-12-01 14:09:11,645 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-12-01 14:09:11,645 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-12-01 14:09:11,645 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-12-01 14:09:11,645 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-12-01 14:09:11,645 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-12-01 14:09:11,645 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-12-01 14:09:11,645 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-12-01 14:09:11,645 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-12-01 14:09:11,645 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-12-01 14:09:11,645 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-12-01 14:09:11,646 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-12-01 14:09:11,646 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-12-01 14:09:11,646 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-12-01 14:09:11,646 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-12-01 14:09:11,646 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-12-01 14:09:11,646 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-12-01 14:09:11,646 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-12-01 14:09:11,646 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-12-01 14:09:11,646 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-12-01 14:09:11,647 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-12-01 14:09:11,647 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-12-01 14:09:11,647 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-12-01 14:09:11,647 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-12-01 14:09:11,647 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-12-01 14:09:11,647 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-12-01 14:09:11,647 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-01 14:09:11,647 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-12-01 14:09:11,647 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-12-01 14:09:11,647 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-12-01 14:09:11,648 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-12-01 14:09:11,648 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-12-01 14:09:11,648 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-12-01 14:09:11,648 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-01 14:09:11,648 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-01 14:09:11,648 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-01 14:09:11,648 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-01 14:09:11,648 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-01 14:09:11,648 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-01 14:09:11,648 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-12-01 14:09:11,649 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-12-01 14:09:11,649 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-12-01 14:09:11,649 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-01 14:09:11,649 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-12-01 14:09:11,649 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-12-01 14:09:11,649 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-12-01 14:09:11,649 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-12-01 14:09:11,649 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-12-01 14:09:11,649 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-12-01 14:09:11,649 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-01 14:09:11,650 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-12-01 14:09:11,650 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-12-01 14:09:11,650 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-01 14:09:11,650 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-01 14:09:11,650 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-01 14:09:11,650 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-12-01 14:09:11,650 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-12-01 14:09:11,650 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-01 14:09:11,650 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-01 14:09:11,650 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-01 14:09:11,650 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-01 14:09:11,651 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-01 14:09:11,651 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-01 14:09:11,651 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-12-01 14:09:11,651 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-01 14:09:11,651 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-01 14:09:11,651 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-01 14:09:11,651 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-01 14:09:11,651 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-01 14:09:11,651 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-01 14:09:11,651 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-01 14:09:11,651 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-01 14:09:11,652 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-12-01 14:09:11,652 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-12-01 14:09:11,652 INFO L130 BoogieDeclarations]: Found specification of procedure f_22_get [2018-12-01 14:09:11,652 INFO L130 BoogieDeclarations]: Found specification of procedure f_22_put [2018-12-01 14:09:11,652 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-01 14:09:11,652 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-01 14:09:11,652 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-01 14:09:11,652 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-01 14:09:11,652 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-01 14:09:11,652 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-12-01 14:09:11,652 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE4 [2018-12-01 14:09:11,653 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-12-01 14:09:11,653 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-12-01 14:09:11,926 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-01 14:09:12,183 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-01 14:09:12,389 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-01 14:09:12,390 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-01 14:09:12,390 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 01.12 02:09:12 BoogieIcfgContainer [2018-12-01 14:09:12,390 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-01 14:09:12,391 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-01 14:09:12,391 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-01 14:09:12,393 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-01 14:09:12,393 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 01.12 02:09:11" (1/3) ... [2018-12-01 14:09:12,394 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4a7f4317 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 01.12 02:09:12, skipping insertion in model container [2018-12-01 14:09:12,394 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 02:09:11" (2/3) ... [2018-12-01 14:09:12,394 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4a7f4317 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 01.12 02:09:12, skipping insertion in model container [2018-12-01 14:09:12,394 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 01.12 02:09:12" (3/3) ... [2018-12-01 14:09:12,396 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-01 14:09:12,403 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-01 14:09:12,410 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 67 error locations. [2018-12-01 14:09:12,420 INFO L257 AbstractCegarLoop]: Starting to check reachability of 67 error locations. [2018-12-01 14:09:12,434 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-01 14:09:12,434 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-01 14:09:12,435 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-01 14:09:12,435 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-01 14:09:12,435 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-01 14:09:12,435 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-01 14:09:12,435 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-01 14:09:12,435 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-01 14:09:12,435 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-01 14:09:12,446 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states. [2018-12-01 14:09:12,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-01 14:09:12,452 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:12,452 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:12,454 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:12,457 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:12,457 INFO L82 PathProgramCache]: Analyzing trace with hash 1631349868, now seen corresponding path program 1 times [2018-12-01 14:09:12,459 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:12,460 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:12,475 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:12,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:12,526 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:12,553 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:09:12,554 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:12,558 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:12,558 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-01 14:09:12,577 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:12,578 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:12,580 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:12,580 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-01 14:09:12,582 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-01 14:09:12,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-01 14:09:12,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:09:12,592 INFO L87 Difference]: Start difference. First operand 176 states. Second operand 5 states. [2018-12-01 14:09:12,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:12,812 INFO L93 Difference]: Finished difference Result 156 states and 167 transitions. [2018-12-01 14:09:12,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-01 14:09:12,814 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-01 14:09:12,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:12,822 INFO L225 Difference]: With dead ends: 156 [2018-12-01 14:09:12,822 INFO L226 Difference]: Without dead ends: 153 [2018-12-01 14:09:12,823 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:09:12,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-12-01 14:09:12,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 147. [2018-12-01 14:09:12,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-01 14:09:12,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 158 transitions. [2018-12-01 14:09:12,852 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 158 transitions. Word has length 17 [2018-12-01 14:09:12,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:12,852 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 158 transitions. [2018-12-01 14:09:12,852 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-01 14:09:12,852 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 158 transitions. [2018-12-01 14:09:12,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-01 14:09:12,853 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:12,853 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:12,853 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:12,853 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:12,853 INFO L82 PathProgramCache]: Analyzing trace with hash 1631349869, now seen corresponding path program 1 times [2018-12-01 14:09:12,854 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:12,854 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:12,869 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:12,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:12,906 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:12,915 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:09:12,915 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:12,920 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:12,920 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-01 14:09:12,952 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:12,952 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:12,954 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:12,954 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-01 14:09:12,955 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-01 14:09:12,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-01 14:09:12,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-01 14:09:12,956 INFO L87 Difference]: Start difference. First operand 147 states and 158 transitions. Second operand 6 states. [2018-12-01 14:09:13,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:13,187 INFO L93 Difference]: Finished difference Result 152 states and 163 transitions. [2018-12-01 14:09:13,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-01 14:09:13,187 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-01 14:09:13,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:13,189 INFO L225 Difference]: With dead ends: 152 [2018-12-01 14:09:13,189 INFO L226 Difference]: Without dead ends: 152 [2018-12-01 14:09:13,189 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-01 14:09:13,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-12-01 14:09:13,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 147. [2018-12-01 14:09:13,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-01 14:09:13,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 157 transitions. [2018-12-01 14:09:13,200 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 157 transitions. Word has length 17 [2018-12-01 14:09:13,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:13,200 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 157 transitions. [2018-12-01 14:09:13,200 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-01 14:09:13,200 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 157 transitions. [2018-12-01 14:09:13,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-01 14:09:13,201 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:13,201 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:13,201 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:13,201 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:13,202 INFO L82 PathProgramCache]: Analyzing trace with hash 1659979019, now seen corresponding path program 1 times [2018-12-01 14:09:13,202 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:13,202 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:13,217 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:13,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:13,245 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:13,269 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:13,269 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:13,270 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:13,271 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-01 14:09:13,271 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-01 14:09:13,271 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-01 14:09:13,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:09:13,271 INFO L87 Difference]: Start difference. First operand 147 states and 157 transitions. Second operand 5 states. [2018-12-01 14:09:13,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:13,289 INFO L93 Difference]: Finished difference Result 146 states and 154 transitions. [2018-12-01 14:09:13,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-01 14:09:13,290 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-01 14:09:13,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:13,291 INFO L225 Difference]: With dead ends: 146 [2018-12-01 14:09:13,291 INFO L226 Difference]: Without dead ends: 146 [2018-12-01 14:09:13,291 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:09:13,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-01 14:09:13,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-12-01 14:09:13,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-01 14:09:13,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 152 transitions. [2018-12-01 14:09:13,299 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 152 transitions. Word has length 17 [2018-12-01 14:09:13,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:13,300 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 152 transitions. [2018-12-01 14:09:13,300 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-01 14:09:13,300 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 152 transitions. [2018-12-01 14:09:13,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-01 14:09:13,301 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:13,301 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:13,301 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:13,301 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:13,302 INFO L82 PathProgramCache]: Analyzing trace with hash 581616962, now seen corresponding path program 1 times [2018-12-01 14:09:13,302 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:13,302 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:13,323 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:13,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:13,365 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:13,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:13,388 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:13,389 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:13,389 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-01 14:09:13,389 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-01 14:09:13,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-01 14:09:13,390 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:09:13,390 INFO L87 Difference]: Start difference. First operand 144 states and 152 transitions. Second operand 5 states. [2018-12-01 14:09:13,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:13,403 INFO L93 Difference]: Finished difference Result 146 states and 153 transitions. [2018-12-01 14:09:13,403 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-01 14:09:13,403 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-01 14:09:13,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:13,404 INFO L225 Difference]: With dead ends: 146 [2018-12-01 14:09:13,404 INFO L226 Difference]: Without dead ends: 146 [2018-12-01 14:09:13,405 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:09:13,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-01 14:09:13,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-12-01 14:09:13,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-01 14:09:13,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 151 transitions. [2018-12-01 14:09:13,409 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 151 transitions. Word has length 29 [2018-12-01 14:09:13,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:13,409 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 151 transitions. [2018-12-01 14:09:13,409 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-01 14:09:13,409 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 151 transitions. [2018-12-01 14:09:13,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-01 14:09:13,410 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:13,410 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:13,410 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:13,410 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:13,410 INFO L82 PathProgramCache]: Analyzing trace with hash -415455391, now seen corresponding path program 1 times [2018-12-01 14:09:13,410 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:13,410 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:13,425 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:13,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:13,477 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:13,538 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:13,538 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:13,539 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:13,539 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-01 14:09:13,540 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-01 14:09:13,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-01 14:09:13,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-01 14:09:13,541 INFO L87 Difference]: Start difference. First operand 144 states and 151 transitions. Second operand 9 states. [2018-12-01 14:09:13,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:13,609 INFO L93 Difference]: Finished difference Result 164 states and 172 transitions. [2018-12-01 14:09:13,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-01 14:09:13,609 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-12-01 14:09:13,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:13,610 INFO L225 Difference]: With dead ends: 164 [2018-12-01 14:09:13,610 INFO L226 Difference]: Without dead ends: 164 [2018-12-01 14:09:13,610 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-01 14:09:13,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-12-01 14:09:13,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 158. [2018-12-01 14:09:13,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-12-01 14:09:13,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 165 transitions. [2018-12-01 14:09:13,616 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 165 transitions. Word has length 29 [2018-12-01 14:09:13,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:13,616 INFO L480 AbstractCegarLoop]: Abstraction has 158 states and 165 transitions. [2018-12-01 14:09:13,616 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-01 14:09:13,616 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 165 transitions. [2018-12-01 14:09:13,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-01 14:09:13,617 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:13,617 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:13,617 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:13,617 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:13,617 INFO L82 PathProgramCache]: Analyzing trace with hash -639527829, now seen corresponding path program 1 times [2018-12-01 14:09:13,618 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:13,618 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:13,632 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:13,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:13,684 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:13,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:13,694 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:13,695 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:13,695 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-01 14:09:13,704 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-01 14:09:13,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-01 14:09:13,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-01 14:09:13,704 INFO L87 Difference]: Start difference. First operand 158 states and 165 transitions. Second operand 4 states. [2018-12-01 14:09:13,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:13,732 INFO L93 Difference]: Finished difference Result 161 states and 168 transitions. [2018-12-01 14:09:13,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-01 14:09:13,733 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-01 14:09:13,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:13,734 INFO L225 Difference]: With dead ends: 161 [2018-12-01 14:09:13,734 INFO L226 Difference]: Without dead ends: 159 [2018-12-01 14:09:13,734 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-01 14:09:13,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-12-01 14:09:13,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-12-01 14:09:13,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-01 14:09:13,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 166 transitions. [2018-12-01 14:09:13,738 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 166 transitions. Word has length 32 [2018-12-01 14:09:13,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:13,738 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 166 transitions. [2018-12-01 14:09:13,738 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-01 14:09:13,738 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 166 transitions. [2018-12-01 14:09:13,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-01 14:09:13,738 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:13,738 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:13,739 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:13,739 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:13,739 INFO L82 PathProgramCache]: Analyzing trace with hash 600235342, now seen corresponding path program 1 times [2018-12-01 14:09:13,739 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:13,739 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:13,752 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:13,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:13,803 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:13,814 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:13,814 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-01 14:09:13,862 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:13,864 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-01 14:09:13,864 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-12-01 14:09:13,864 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-01 14:09:13,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-01 14:09:13,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-01 14:09:13,864 INFO L87 Difference]: Start difference. First operand 159 states and 166 transitions. Second operand 8 states. [2018-12-01 14:09:13,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:13,955 INFO L93 Difference]: Finished difference Result 166 states and 174 transitions. [2018-12-01 14:09:13,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-01 14:09:13,956 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2018-12-01 14:09:13,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:13,957 INFO L225 Difference]: With dead ends: 166 [2018-12-01 14:09:13,957 INFO L226 Difference]: Without dead ends: 162 [2018-12-01 14:09:13,957 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 58 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-12-01 14:09:13,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-12-01 14:09:13,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2018-12-01 14:09:13,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-12-01 14:09:13,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 169 transitions. [2018-12-01 14:09:13,961 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 169 transitions. Word has length 33 [2018-12-01 14:09:13,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:13,962 INFO L480 AbstractCegarLoop]: Abstraction has 162 states and 169 transitions. [2018-12-01 14:09:13,962 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-01 14:09:13,962 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 169 transitions. [2018-12-01 14:09:13,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-01 14:09:13,962 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:13,963 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:13,963 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:13,963 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:13,963 INFO L82 PathProgramCache]: Analyzing trace with hash -849464021, now seen corresponding path program 2 times [2018-12-01 14:09:13,963 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:13,963 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:13,977 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-01 14:09:14,027 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-01 14:09:14,028 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-01 14:09:14,030 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:14,032 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:09:14,033 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:14,034 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:14,034 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-01 14:09:14,132 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-01 14:09:14,132 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:14,133 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:14,134 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-01 14:09:14,134 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-01 14:09:14,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-01 14:09:14,134 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-12-01 14:09:14,134 INFO L87 Difference]: Start difference. First operand 162 states and 169 transitions. Second operand 13 states. [2018-12-01 14:09:15,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:15,019 INFO L93 Difference]: Finished difference Result 173 states and 179 transitions. [2018-12-01 14:09:15,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-01 14:09:15,019 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 36 [2018-12-01 14:09:15,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:15,020 INFO L225 Difference]: With dead ends: 173 [2018-12-01 14:09:15,020 INFO L226 Difference]: Without dead ends: 173 [2018-12-01 14:09:15,020 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-12-01 14:09:15,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-12-01 14:09:15,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 161. [2018-12-01 14:09:15,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-12-01 14:09:15,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 168 transitions. [2018-12-01 14:09:15,023 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 168 transitions. Word has length 36 [2018-12-01 14:09:15,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:15,024 INFO L480 AbstractCegarLoop]: Abstraction has 161 states and 168 transitions. [2018-12-01 14:09:15,024 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-01 14:09:15,024 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 168 transitions. [2018-12-01 14:09:15,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-01 14:09:15,024 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:15,024 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:15,025 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:15,025 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:15,025 INFO L82 PathProgramCache]: Analyzing trace with hash -849464020, now seen corresponding path program 1 times [2018-12-01 14:09:15,025 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:15,025 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:15,040 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-01 14:09:15,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:15,107 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:15,133 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:15,133 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-01 14:09:15,283 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:15,285 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-01 14:09:15,286 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2018-12-01 14:09:15,286 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-01 14:09:15,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-01 14:09:15,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-12-01 14:09:15,287 INFO L87 Difference]: Start difference. First operand 161 states and 168 transitions. Second operand 14 states. [2018-12-01 14:09:15,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:15,786 INFO L93 Difference]: Finished difference Result 171 states and 182 transitions. [2018-12-01 14:09:15,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-01 14:09:15,787 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 36 [2018-12-01 14:09:15,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:15,788 INFO L225 Difference]: With dead ends: 171 [2018-12-01 14:09:15,788 INFO L226 Difference]: Without dead ends: 167 [2018-12-01 14:09:15,788 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 58 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=131, Invalid=211, Unknown=0, NotChecked=0, Total=342 [2018-12-01 14:09:15,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-12-01 14:09:15,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 167. [2018-12-01 14:09:15,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-12-01 14:09:15,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 174 transitions. [2018-12-01 14:09:15,791 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 174 transitions. Word has length 36 [2018-12-01 14:09:15,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:15,791 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 174 transitions. [2018-12-01 14:09:15,791 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-01 14:09:15,791 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 174 transitions. [2018-12-01 14:09:15,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-01 14:09:15,792 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:15,792 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:15,792 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:15,793 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:15,793 INFO L82 PathProgramCache]: Analyzing trace with hash -872830515, now seen corresponding path program 1 times [2018-12-01 14:09:15,793 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:15,793 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:15,808 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:15,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:15,895 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:15,942 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:15,942 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:15,944 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:15,944 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-01 14:09:15,944 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-01 14:09:15,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-01 14:09:15,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-01 14:09:15,944 INFO L87 Difference]: Start difference. First operand 167 states and 174 transitions. Second operand 7 states. [2018-12-01 14:09:15,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:15,974 INFO L93 Difference]: Finished difference Result 176 states and 183 transitions. [2018-12-01 14:09:15,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-01 14:09:15,975 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2018-12-01 14:09:15,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:15,975 INFO L225 Difference]: With dead ends: 176 [2018-12-01 14:09:15,975 INFO L226 Difference]: Without dead ends: 176 [2018-12-01 14:09:15,976 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-01 14:09:15,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-12-01 14:09:15,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 172. [2018-12-01 14:09:15,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-12-01 14:09:15,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 179 transitions. [2018-12-01 14:09:15,979 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 179 transitions. Word has length 40 [2018-12-01 14:09:15,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:15,979 INFO L480 AbstractCegarLoop]: Abstraction has 172 states and 179 transitions. [2018-12-01 14:09:15,979 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-01 14:09:15,979 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 179 transitions. [2018-12-01 14:09:15,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-01 14:09:15,979 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:15,980 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:15,980 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:15,980 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:15,980 INFO L82 PathProgramCache]: Analyzing trace with hash 1431338402, now seen corresponding path program 1 times [2018-12-01 14:09:15,980 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:15,980 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:15,998 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:16,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:16,023 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:16,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:16,032 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:16,033 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:16,033 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-01 14:09:16,033 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-01 14:09:16,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-01 14:09:16,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-01 14:09:16,034 INFO L87 Difference]: Start difference. First operand 172 states and 179 transitions. Second operand 3 states. [2018-12-01 14:09:16,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:16,140 INFO L93 Difference]: Finished difference Result 183 states and 189 transitions. [2018-12-01 14:09:16,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-01 14:09:16,141 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 38 [2018-12-01 14:09:16,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:16,141 INFO L225 Difference]: With dead ends: 183 [2018-12-01 14:09:16,142 INFO L226 Difference]: Without dead ends: 157 [2018-12-01 14:09:16,142 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-01 14:09:16,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-12-01 14:09:16,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 149. [2018-12-01 14:09:16,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-01 14:09:16,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 155 transitions. [2018-12-01 14:09:16,146 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 155 transitions. Word has length 38 [2018-12-01 14:09:16,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:16,146 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 155 transitions. [2018-12-01 14:09:16,146 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-01 14:09:16,146 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 155 transitions. [2018-12-01 14:09:16,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-01 14:09:16,147 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:16,147 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:16,147 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:16,148 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:16,148 INFO L82 PathProgramCache]: Analyzing trace with hash 361968204, now seen corresponding path program 2 times [2018-12-01 14:09:16,148 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:16,148 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:16,164 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-01 14:09:16,216 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-01 14:09:16,216 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-01 14:09:16,218 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:16,226 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:09:16,226 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:16,230 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:16,230 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-01 14:09:16,377 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-12-01 14:09:16,378 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:16,379 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:16,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-01 14:09:16,380 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-01 14:09:16,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-01 14:09:16,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-12-01 14:09:16,380 INFO L87 Difference]: Start difference. First operand 149 states and 155 transitions. Second operand 13 states. [2018-12-01 14:09:17,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:17,249 INFO L93 Difference]: Finished difference Result 148 states and 154 transitions. [2018-12-01 14:09:17,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-01 14:09:17,249 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 42 [2018-12-01 14:09:17,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:17,250 INFO L225 Difference]: With dead ends: 148 [2018-12-01 14:09:17,250 INFO L226 Difference]: Without dead ends: 148 [2018-12-01 14:09:17,250 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2018-12-01 14:09:17,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-12-01 14:09:17,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2018-12-01 14:09:17,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-01 14:09:17,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 154 transitions. [2018-12-01 14:09:17,252 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 154 transitions. Word has length 42 [2018-12-01 14:09:17,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:17,252 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 154 transitions. [2018-12-01 14:09:17,252 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-01 14:09:17,252 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 154 transitions. [2018-12-01 14:09:17,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-01 14:09:17,253 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:17,253 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:17,253 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:17,253 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:17,253 INFO L82 PathProgramCache]: Analyzing trace with hash 1098993020, now seen corresponding path program 1 times [2018-12-01 14:09:17,253 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:17,253 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:17,268 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-01 14:09:17,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:17,362 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:17,425 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:17,425 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-01 14:09:17,815 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:09:17,817 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-01 14:09:17,817 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 26 [2018-12-01 14:09:17,817 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-01 14:09:17,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-01 14:09:17,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=178, Invalid=472, Unknown=0, NotChecked=0, Total=650 [2018-12-01 14:09:17,818 INFO L87 Difference]: Start difference. First operand 148 states and 154 transitions. Second operand 26 states. [2018-12-01 14:09:18,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:18,857 INFO L93 Difference]: Finished difference Result 158 states and 168 transitions. [2018-12-01 14:09:18,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-01 14:09:18,858 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 47 [2018-12-01 14:09:18,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:18,858 INFO L225 Difference]: With dead ends: 158 [2018-12-01 14:09:18,858 INFO L226 Difference]: Without dead ends: 154 [2018-12-01 14:09:18,859 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 68 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=278, Invalid=652, Unknown=0, NotChecked=0, Total=930 [2018-12-01 14:09:18,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-12-01 14:09:18,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 154. [2018-12-01 14:09:18,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-12-01 14:09:18,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 160 transitions. [2018-12-01 14:09:18,862 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 160 transitions. Word has length 47 [2018-12-01 14:09:18,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:18,862 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 160 transitions. [2018-12-01 14:09:18,862 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-01 14:09:18,862 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 160 transitions. [2018-12-01 14:09:18,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-01 14:09:18,863 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:18,863 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:18,863 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:18,863 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:18,863 INFO L82 PathProgramCache]: Analyzing trace with hash 393272412, now seen corresponding path program 2 times [2018-12-01 14:09:18,863 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:18,864 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:18,888 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-01 14:09:18,945 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-01 14:09:18,945 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-01 14:09:18,947 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:18,950 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:09:18,950 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:18,951 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:18,951 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-01 14:09:19,055 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-01 14:09:19,055 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:19,057 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:19,057 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-01 14:09:19,057 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-01 14:09:19,057 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-01 14:09:19,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-12-01 14:09:19,057 INFO L87 Difference]: Start difference. First operand 154 states and 160 transitions. Second operand 13 states. [2018-12-01 14:09:19,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:19,925 INFO L93 Difference]: Finished difference Result 164 states and 169 transitions. [2018-12-01 14:09:19,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-01 14:09:19,925 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 53 [2018-12-01 14:09:19,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:19,926 INFO L225 Difference]: With dead ends: 164 [2018-12-01 14:09:19,926 INFO L226 Difference]: Without dead ends: 164 [2018-12-01 14:09:19,926 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-12-01 14:09:19,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-12-01 14:09:19,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 152. [2018-12-01 14:09:19,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-12-01 14:09:19,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 158 transitions. [2018-12-01 14:09:19,928 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 158 transitions. Word has length 53 [2018-12-01 14:09:19,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:19,929 INFO L480 AbstractCegarLoop]: Abstraction has 152 states and 158 transitions. [2018-12-01 14:09:19,929 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-01 14:09:19,929 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 158 transitions. [2018-12-01 14:09:19,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-01 14:09:19,929 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:19,929 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:19,929 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:19,929 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:19,929 INFO L82 PathProgramCache]: Analyzing trace with hash 393272413, now seen corresponding path program 1 times [2018-12-01 14:09:19,930 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:19,930 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:19,944 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-01 14:09:20,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:20,103 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:20,109 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:09:20,109 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:20,113 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:20,113 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-01 14:09:20,266 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-01 14:09:20,266 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:20,269 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:20,269 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-01 14:09:20,269 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-01 14:09:20,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-01 14:09:20,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-12-01 14:09:20,270 INFO L87 Difference]: Start difference. First operand 152 states and 158 transitions. Second operand 13 states. [2018-12-01 14:09:21,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:21,084 INFO L93 Difference]: Finished difference Result 150 states and 156 transitions. [2018-12-01 14:09:21,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-01 14:09:21,085 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 53 [2018-12-01 14:09:21,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:21,085 INFO L225 Difference]: With dead ends: 150 [2018-12-01 14:09:21,085 INFO L226 Difference]: Without dead ends: 150 [2018-12-01 14:09:21,086 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2018-12-01 14:09:21,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-01 14:09:21,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-01 14:09:21,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-01 14:09:21,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 156 transitions. [2018-12-01 14:09:21,089 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 156 transitions. Word has length 53 [2018-12-01 14:09:21,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:21,089 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 156 transitions. [2018-12-01 14:09:21,089 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-01 14:09:21,090 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 156 transitions. [2018-12-01 14:09:21,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-12-01 14:09:21,090 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:21,090 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:21,091 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:21,091 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:21,091 INFO L82 PathProgramCache]: Analyzing trace with hash -1198180007, now seen corresponding path program 1 times [2018-12-01 14:09:21,091 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:21,091 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:21,106 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:21,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:21,156 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:21,179 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-01 14:09:21,179 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:21,180 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:21,180 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-01 14:09:21,181 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-01 14:09:21,181 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-01 14:09:21,181 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-01 14:09:21,181 INFO L87 Difference]: Start difference. First operand 150 states and 156 transitions. Second operand 7 states. [2018-12-01 14:09:21,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:21,212 INFO L93 Difference]: Finished difference Result 152 states and 157 transitions. [2018-12-01 14:09:21,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-01 14:09:21,213 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 58 [2018-12-01 14:09:21,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:21,213 INFO L225 Difference]: With dead ends: 152 [2018-12-01 14:09:21,214 INFO L226 Difference]: Without dead ends: 150 [2018-12-01 14:09:21,214 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 52 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-01 14:09:21,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-01 14:09:21,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-01 14:09:21,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-01 14:09:21,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 155 transitions. [2018-12-01 14:09:21,217 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 155 transitions. Word has length 58 [2018-12-01 14:09:21,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:21,217 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 155 transitions. [2018-12-01 14:09:21,217 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-01 14:09:21,217 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 155 transitions. [2018-12-01 14:09:21,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-12-01 14:09:21,218 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:21,218 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:21,218 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:21,219 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:21,219 INFO L82 PathProgramCache]: Analyzing trace with hash 2025310666, now seen corresponding path program 1 times [2018-12-01 14:09:21,219 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:21,219 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:21,234 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:21,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:21,295 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:21,328 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-01 14:09:21,328 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:21,330 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:21,330 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-01 14:09:21,330 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-01 14:09:21,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-01 14:09:21,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-01 14:09:21,330 INFO L87 Difference]: Start difference. First operand 150 states and 155 transitions. Second operand 9 states. [2018-12-01 14:09:21,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:21,390 INFO L93 Difference]: Finished difference Result 154 states and 158 transitions. [2018-12-01 14:09:21,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-01 14:09:21,390 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 63 [2018-12-01 14:09:21,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:21,390 INFO L225 Difference]: With dead ends: 154 [2018-12-01 14:09:21,391 INFO L226 Difference]: Without dead ends: 150 [2018-12-01 14:09:21,391 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-01 14:09:21,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-01 14:09:21,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-01 14:09:21,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-01 14:09:21,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 154 transitions. [2018-12-01 14:09:21,393 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 154 transitions. Word has length 63 [2018-12-01 14:09:21,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:21,393 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 154 transitions. [2018-12-01 14:09:21,393 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-01 14:09:21,393 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 154 transitions. [2018-12-01 14:09:21,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-01 14:09:21,393 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:21,394 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:21,394 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:21,394 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:21,394 INFO L82 PathProgramCache]: Analyzing trace with hash 1370658201, now seen corresponding path program 1 times [2018-12-01 14:09:21,394 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:21,394 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:21,409 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:21,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:21,559 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:21,562 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:09:21,562 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:21,563 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:21,563 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-01 14:09:21,793 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-01 14:09:21,794 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:21,796 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:21,796 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-01 14:09:21,797 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-01 14:09:21,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-01 14:09:21,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-12-01 14:09:21,797 INFO L87 Difference]: Start difference. First operand 150 states and 154 transitions. Second operand 20 states. [2018-12-01 14:09:23,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:23,327 INFO L93 Difference]: Finished difference Result 160 states and 163 transitions. [2018-12-01 14:09:23,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-01 14:09:23,327 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 74 [2018-12-01 14:09:23,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:23,328 INFO L225 Difference]: With dead ends: 160 [2018-12-01 14:09:23,328 INFO L226 Difference]: Without dead ends: 160 [2018-12-01 14:09:23,328 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=79, Invalid=521, Unknown=0, NotChecked=0, Total=600 [2018-12-01 14:09:23,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-01 14:09:23,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 148. [2018-12-01 14:09:23,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-01 14:09:23,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 152 transitions. [2018-12-01 14:09:23,331 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 152 transitions. Word has length 74 [2018-12-01 14:09:23,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:23,331 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 152 transitions. [2018-12-01 14:09:23,331 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-01 14:09:23,331 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 152 transitions. [2018-12-01 14:09:23,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-01 14:09:23,332 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:23,332 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:23,333 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:23,333 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:23,333 INFO L82 PathProgramCache]: Analyzing trace with hash 1370658202, now seen corresponding path program 1 times [2018-12-01 14:09:23,333 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:23,333 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:23,355 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:23,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:23,578 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:23,584 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:09:23,584 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:23,588 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:23,588 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-01 14:09:23,937 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-01 14:09:23,937 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:23,940 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:23,940 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-01 14:09:23,940 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-01 14:09:23,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-01 14:09:23,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2018-12-01 14:09:23,941 INFO L87 Difference]: Start difference. First operand 148 states and 152 transitions. Second operand 20 states. [2018-12-01 14:09:25,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:25,613 INFO L93 Difference]: Finished difference Result 146 states and 150 transitions. [2018-12-01 14:09:25,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-01 14:09:25,613 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 74 [2018-12-01 14:09:25,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:25,614 INFO L225 Difference]: With dead ends: 146 [2018-12-01 14:09:25,614 INFO L226 Difference]: Without dead ends: 146 [2018-12-01 14:09:25,614 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=81, Invalid=569, Unknown=0, NotChecked=0, Total=650 [2018-12-01 14:09:25,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-01 14:09:25,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-01 14:09:25,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-01 14:09:25,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 150 transitions. [2018-12-01 14:09:25,616 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 150 transitions. Word has length 74 [2018-12-01 14:09:25,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:25,617 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 150 transitions. [2018-12-01 14:09:25,617 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-01 14:09:25,617 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 150 transitions. [2018-12-01 14:09:25,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-01 14:09:25,617 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:25,617 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:25,618 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:25,618 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:25,618 INFO L82 PathProgramCache]: Analyzing trace with hash -1929434987, now seen corresponding path program 1 times [2018-12-01 14:09:25,618 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:25,618 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:25,635 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:25,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:25,729 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:25,788 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-01 14:09:25,788 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:25,789 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:25,789 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-01 14:09:25,789 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-01 14:09:25,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-01 14:09:25,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-12-01 14:09:25,790 INFO L87 Difference]: Start difference. First operand 146 states and 150 transitions. Second operand 12 states. [2018-12-01 14:09:25,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:25,872 INFO L93 Difference]: Finished difference Result 152 states and 155 transitions. [2018-12-01 14:09:25,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-01 14:09:25,873 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 85 [2018-12-01 14:09:25,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:25,873 INFO L225 Difference]: With dead ends: 152 [2018-12-01 14:09:25,873 INFO L226 Difference]: Without dead ends: 146 [2018-12-01 14:09:25,874 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2018-12-01 14:09:25,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-01 14:09:25,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-01 14:09:25,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-01 14:09:25,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 149 transitions. [2018-12-01 14:09:25,875 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 149 transitions. Word has length 85 [2018-12-01 14:09:25,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:25,875 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 149 transitions. [2018-12-01 14:09:25,875 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-01 14:09:25,875 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 149 transitions. [2018-12-01 14:09:25,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-01 14:09:25,876 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:25,876 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:25,876 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:25,876 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:25,876 INFO L82 PathProgramCache]: Analyzing trace with hash 1961126046, now seen corresponding path program 1 times [2018-12-01 14:09:25,877 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:25,877 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:25,891 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:26,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:26,090 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:26,094 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:09:26,094 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:26,095 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:26,095 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-01 14:09:26,388 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-01 14:09:26,388 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:26,391 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:26,391 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-01 14:09:26,391 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-01 14:09:26,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-01 14:09:26,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-12-01 14:09:26,392 INFO L87 Difference]: Start difference. First operand 146 states and 149 transitions. Second operand 20 states. [2018-12-01 14:09:27,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:27,899 INFO L93 Difference]: Finished difference Result 160 states and 162 transitions. [2018-12-01 14:09:27,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-01 14:09:27,899 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 98 [2018-12-01 14:09:27,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:27,900 INFO L225 Difference]: With dead ends: 160 [2018-12-01 14:09:27,900 INFO L226 Difference]: Without dead ends: 160 [2018-12-01 14:09:27,900 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 74 SyntacticMatches, 5 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=79, Invalid=521, Unknown=0, NotChecked=0, Total=600 [2018-12-01 14:09:27,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-01 14:09:27,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 144. [2018-12-01 14:09:27,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-01 14:09:27,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 147 transitions. [2018-12-01 14:09:27,902 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 147 transitions. Word has length 98 [2018-12-01 14:09:27,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:27,903 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 147 transitions. [2018-12-01 14:09:27,903 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-01 14:09:27,903 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 147 transitions. [2018-12-01 14:09:27,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-01 14:09:27,904 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:27,904 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:27,904 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:27,904 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:27,904 INFO L82 PathProgramCache]: Analyzing trace with hash 1961126047, now seen corresponding path program 1 times [2018-12-01 14:09:27,905 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:27,905 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:27,934 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:28,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:28,189 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:28,194 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:09:28,194 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:28,198 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:28,199 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-01 14:09:28,540 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-01 14:09:28,540 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:28,543 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:28,543 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-01 14:09:28,543 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-01 14:09:28,543 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-01 14:09:28,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2018-12-01 14:09:28,544 INFO L87 Difference]: Start difference. First operand 144 states and 147 transitions. Second operand 20 states. [2018-12-01 14:09:30,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:30,014 INFO L93 Difference]: Finished difference Result 142 states and 145 transitions. [2018-12-01 14:09:30,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-01 14:09:30,015 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 98 [2018-12-01 14:09:30,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:30,015 INFO L225 Difference]: With dead ends: 142 [2018-12-01 14:09:30,015 INFO L226 Difference]: Without dead ends: 142 [2018-12-01 14:09:30,015 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 74 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=81, Invalid=569, Unknown=0, NotChecked=0, Total=650 [2018-12-01 14:09:30,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-01 14:09:30,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-01 14:09:30,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-01 14:09:30,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 145 transitions. [2018-12-01 14:09:30,017 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 145 transitions. Word has length 98 [2018-12-01 14:09:30,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:30,017 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 145 transitions. [2018-12-01 14:09:30,017 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-01 14:09:30,017 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 145 transitions. [2018-12-01 14:09:30,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-01 14:09:30,018 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:30,018 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:30,018 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:30,018 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:30,018 INFO L82 PathProgramCache]: Analyzing trace with hash -456213325, now seen corresponding path program 1 times [2018-12-01 14:09:30,018 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:30,019 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:30,033 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:30,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:30,099 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:30,164 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-01 14:09:30,164 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:30,166 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:30,166 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-01 14:09:30,166 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-01 14:09:30,166 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-01 14:09:30,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-01 14:09:30,166 INFO L87 Difference]: Start difference. First operand 142 states and 145 transitions. Second operand 10 states. [2018-12-01 14:09:30,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:30,216 INFO L93 Difference]: Finished difference Result 144 states and 146 transitions. [2018-12-01 14:09:30,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-01 14:09:30,216 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 96 [2018-12-01 14:09:30,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:30,217 INFO L225 Difference]: With dead ends: 144 [2018-12-01 14:09:30,217 INFO L226 Difference]: Without dead ends: 142 [2018-12-01 14:09:30,217 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-01 14:09:30,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-01 14:09:30,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-01 14:09:30,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-01 14:09:30,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 144 transitions. [2018-12-01 14:09:30,219 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 144 transitions. Word has length 96 [2018-12-01 14:09:30,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:30,219 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 144 transitions. [2018-12-01 14:09:30,219 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-01 14:09:30,219 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 144 transitions. [2018-12-01 14:09:30,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-01 14:09:30,219 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:30,220 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:30,220 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:30,220 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:30,220 INFO L82 PathProgramCache]: Analyzing trace with hash -1610192467, now seen corresponding path program 1 times [2018-12-01 14:09:30,220 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:30,220 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:30,234 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:30,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:30,453 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:30,456 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:09:30,456 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:30,457 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:30,457 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-01 14:09:30,855 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-01 14:09:30,855 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:30,859 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:30,859 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-01 14:09:30,859 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-01 14:09:30,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-01 14:09:30,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=486, Unknown=0, NotChecked=0, Total=552 [2018-12-01 14:09:30,859 INFO L87 Difference]: Start difference. First operand 142 states and 144 transitions. Second operand 24 states. [2018-12-01 14:09:32,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:32,803 INFO L93 Difference]: Finished difference Result 152 states and 153 transitions. [2018-12-01 14:09:32,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-01 14:09:32,803 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 111 [2018-12-01 14:09:32,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:32,803 INFO L225 Difference]: With dead ends: 152 [2018-12-01 14:09:32,803 INFO L226 Difference]: Without dead ends: 152 [2018-12-01 14:09:32,804 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 81 SyntacticMatches, 7 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=101, Invalid=829, Unknown=0, NotChecked=0, Total=930 [2018-12-01 14:09:32,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-12-01 14:09:32,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 140. [2018-12-01 14:09:32,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-01 14:09:32,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 142 transitions. [2018-12-01 14:09:32,806 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 142 transitions. Word has length 111 [2018-12-01 14:09:32,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:32,806 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 142 transitions. [2018-12-01 14:09:32,806 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-01 14:09:32,806 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 142 transitions. [2018-12-01 14:09:32,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-01 14:09:32,806 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:32,806 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:32,806 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:32,807 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:32,807 INFO L82 PathProgramCache]: Analyzing trace with hash -1610192466, now seen corresponding path program 1 times [2018-12-01 14:09:32,807 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:32,807 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:32,821 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:33,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:33,121 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:33,128 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-01 14:09:33,128 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:33,133 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:33,134 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-01 14:09:33,631 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-01 14:09:33,631 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:09:33,634 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-01 14:09:33,634 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-01 14:09:33,635 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-01 14:09:33,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-01 14:09:33,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=488, Unknown=0, NotChecked=0, Total=552 [2018-12-01 14:09:33,635 INFO L87 Difference]: Start difference. First operand 140 states and 142 transitions. Second operand 24 states. [2018-12-01 14:09:35,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:09:35,660 INFO L93 Difference]: Finished difference Result 138 states and 140 transitions. [2018-12-01 14:09:35,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-01 14:09:35,660 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 111 [2018-12-01 14:09:35,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:09:35,661 INFO L225 Difference]: With dead ends: 138 [2018-12-01 14:09:35,661 INFO L226 Difference]: Without dead ends: 138 [2018-12-01 14:09:35,661 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 81 SyntacticMatches, 7 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=103, Invalid=889, Unknown=0, NotChecked=0, Total=992 [2018-12-01 14:09:35,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-01 14:09:35,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-01 14:09:35,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-01 14:09:35,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 140 transitions. [2018-12-01 14:09:35,663 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 140 transitions. Word has length 111 [2018-12-01 14:09:35,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:09:35,663 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 140 transitions. [2018-12-01 14:09:35,663 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-01 14:09:35,663 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 140 transitions. [2018-12-01 14:09:35,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-12-01 14:09:35,663 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:09:35,663 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:09:35,664 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:09:35,664 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:09:35,664 INFO L82 PathProgramCache]: Analyzing trace with hash -714946492, now seen corresponding path program 1 times [2018-12-01 14:09:35,664 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:09:35,664 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:09:35,678 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:09:36,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:09:36,043 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:09:36,075 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-01 14:09:36,077 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-01 14:09:36,077 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,079 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,084 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,084 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-12-01 14:09:36,102 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-12-01 14:09:36,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,106 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-12-01 14:09:36,107 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,116 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,126 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,126 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-12-01 14:09:36,160 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-12-01 14:09:36,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,168 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-12-01 14:09:36,168 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,187 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,203 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,204 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:35 [2018-12-01 14:09:36,248 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-12-01 14:09:36,253 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,254 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,256 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,262 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-12-01 14:09:36,263 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,292 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,313 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,313 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:46 [2018-12-01 14:09:36,376 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-12-01 14:09:36,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,387 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,400 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-12-01 14:09:36,401 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,454 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,484 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,484 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:57 [2018-12-01 14:09:36,560 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-12-01 14:09:36,566 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,568 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,570 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,575 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,577 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,582 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,584 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,586 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,592 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-12-01 14:09:36,593 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,666 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,702 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,702 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:68 [2018-12-01 14:09:36,805 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-12-01 14:09:36,813 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,815 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,820 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,824 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,831 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,837 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:36,857 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-12-01 14:09:36,857 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:36,963 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:37,012 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:37,012 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:83, output treesize:79 [2018-12-01 14:09:37,144 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-12-01 14:09:37,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,159 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,161 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,170 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,175 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,179 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,184 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,186 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,188 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,190 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,199 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,201 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,205 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,207 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,211 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-12-01 14:09:37,211 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:37,371 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:37,427 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:37,427 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:94, output treesize:90 [2018-12-01 14:09:37,564 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-12-01 14:09:37,572 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,574 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,577 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,579 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,582 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,584 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,594 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,596 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,598 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,605 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,615 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,622 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,627 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,636 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:37,657 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-12-01 14:09:37,657 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:37,875 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:37,942 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:37,943 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:105, output treesize:101 [2018-12-01 14:09:38,121 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-12-01 14:09:38,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,134 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,137 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,139 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,142 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,153 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,159 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,161 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,169 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,176 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,179 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,184 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,186 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,199 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,204 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,207 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,217 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,220 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,226 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,228 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,231 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,233 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,235 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,238 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,242 INFO L303 Elim1Store]: Index analysis took 120 ms [2018-12-01 14:09:38,243 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-12-01 14:09:38,243 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:38,528 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:38,610 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:38,610 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:116, output treesize:112 [2018-12-01 14:09:38,812 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 101 [2018-12-01 14:09:38,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,831 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,834 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,840 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,865 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,884 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,887 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,890 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,902 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,910 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,930 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,939 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,942 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,945 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,948 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,952 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,964 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,972 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:38,976 INFO L303 Elim1Store]: Index analysis took 163 ms [2018-12-01 14:09:38,977 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 540 [2018-12-01 14:09:38,978 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:39,367 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:39,470 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:39,470 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:127, output treesize:123 [2018-12-01 14:09:39,710 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 110 [2018-12-01 14:09:39,720 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,723 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,726 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,729 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,735 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,738 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,741 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,744 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,747 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,750 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,756 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,759 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,767 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,770 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,772 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,783 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,786 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,789 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,795 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,798 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,804 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,809 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,812 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,814 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,820 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,825 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,830 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,838 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,864 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,866 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,877 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,891 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,894 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,902 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:39,909 INFO L303 Elim1Store]: Index analysis took 197 ms [2018-12-01 14:09:39,910 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 66 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 637 [2018-12-01 14:09:39,911 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:40,376 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:40,482 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:40,483 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:138, output treesize:134 [2018-12-01 14:09:40,731 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification that was a NOOP. DAG size: 57 [2018-12-01 14:09:40,753 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-12-01 14:09:40,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,768 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,771 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,774 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,777 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,781 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,784 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,787 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,793 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,803 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,811 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,815 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,823 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,840 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,859 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,865 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,877 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,892 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,901 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,904 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,917 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,920 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,939 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,942 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,945 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,948 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,965 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,972 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,987 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,991 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:40,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:41,002 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:41,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:41,008 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:41,012 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:41,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:41,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:41,021 INFO L303 Elim1Store]: Index analysis took 266 ms [2018-12-01 14:09:41,023 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 78 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 742 [2018-12-01 14:09:41,024 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:41,597 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:41,719 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:41,719 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:149, output treesize:145 [2018-12-01 14:09:42,002 WARN L180 SmtUtils]: Spent 126.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2018-12-01 14:09:42,033 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 128 [2018-12-01 14:09:42,060 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,073 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,119 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,140 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,184 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,204 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,220 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,234 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,245 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,271 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,296 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,304 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,315 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,320 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,331 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,356 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,369 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,380 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,413 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,437 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,480 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,539 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,550 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,581 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,594 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,608 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,699 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,708 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,738 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,749 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,770 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,808 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,866 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,910 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,956 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,965 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:42,992 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:43,002 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:43,008 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:43,009 INFO L303 Elim1Store]: Index analysis took 974 ms [2018-12-01 14:09:43,010 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 91 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 855 [2018-12-01 14:09:43,011 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:43,714 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:43,847 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:43,847 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:160, output treesize:156 [2018-12-01 14:09:44,144 WARN L180 SmtUtils]: Spent 131.00 ms on a formula simplification that was a NOOP. DAG size: 65 [2018-12-01 14:09:44,166 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 137 [2018-12-01 14:09:44,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,184 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,201 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,204 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,211 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,215 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,222 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,225 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,228 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,236 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,244 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,247 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,251 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,255 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,259 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,263 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,267 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,272 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,279 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,291 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,303 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,311 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,315 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,324 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,331 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,347 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,363 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,375 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,385 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,403 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,407 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,428 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,446 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,473 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,480 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,484 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,492 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,495 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,499 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,506 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,516 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,520 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,523 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,530 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,534 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,541 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,544 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,548 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,551 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:44,560 INFO L303 Elim1Store]: Index analysis took 392 ms [2018-12-01 14:09:44,561 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 105 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 976 [2018-12-01 14:09:44,562 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:45,407 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:45,562 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:45,562 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:171, output treesize:167 [2018-12-01 14:09:45,916 WARN L180 SmtUtils]: Spent 162.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2018-12-01 14:09:45,954 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 179 treesize of output 146 [2018-12-01 14:09:45,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,000 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,018 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,028 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,046 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,063 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,078 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,089 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,094 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,126 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,213 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,231 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,273 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,302 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,315 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,433 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,483 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,499 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,532 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,550 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,568 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,583 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,633 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,723 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,739 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,770 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,775 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,809 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,825 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,935 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,968 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:46,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,000 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,006 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,019 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,032 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,049 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,066 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,081 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,092 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,124 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,139 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,217 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,246 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,293 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,356 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,369 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,448 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,479 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,508 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,523 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,530 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,547 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,665 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,677 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:47,678 INFO L303 Elim1Store]: Index analysis took 1723 ms [2018-12-01 14:09:47,680 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 1105 [2018-12-01 14:09:47,681 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:09:48,684 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:48,853 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:09:48,853 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:179, output treesize:175 [2018-12-01 14:09:49,278 WARN L180 SmtUtils]: Spent 170.00 ms on a formula simplification that was a NOOP. DAG size: 70 [2018-12-01 14:09:51,180 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-01 14:09:51,186 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-01 14:09:51,191 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-01 14:09:51,192 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:27 [2018-12-01 14:09:53,196 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= |c_#memory_$Pointer$.offset| (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base|) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv8 32)) .cse0))))) is different from true [2018-12-01 14:09:55,207 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base|) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv8 32)) .cse0))) |c_#memory_$Pointer$.offset|)) is different from true [2018-12-01 14:09:55,317 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:55,317 INFO L303 Elim1Store]: Index analysis took 107 ms [2018-12-01 14:09:55,318 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 170 treesize of output 158 [2018-12-01 14:09:55,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:55,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:55,511 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:55,559 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:55,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:55,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:55,703 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:55,752 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:55,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:55,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:55,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:55,949 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,004 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,157 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,264 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,482 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,690 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:56,957 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,114 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,272 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,377 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,430 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,483 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,536 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,584 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,686 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,738 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,824 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:57,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,074 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,127 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,231 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,336 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,387 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,493 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,546 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,701 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,752 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:58,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,233 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,336 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,556 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,703 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,804 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:09:59,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,015 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,057 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,111 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,213 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,263 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,315 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,566 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,707 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,757 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,804 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:00,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,000 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,305 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,545 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,739 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,789 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,887 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,935 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:01,980 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:02,032 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:02,080 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:02,133 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:02,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:02,229 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:02,278 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:02,326 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:02,370 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:02,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:02,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:02,506 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:02,507 INFO L683 Elim1Store]: detected equality via solver [2018-12-01 14:10:04,210 INFO L303 Elim1Store]: Index analysis took 8889 ms [2018-12-01 14:10:04,424 INFO L478 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 158 treesize of output 1177 [2018-12-01 14:10:04,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,541 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,619 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,693 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,716 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,741 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,765 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,789 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,830 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:04,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,014 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,039 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,063 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,087 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,133 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,179 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,204 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,227 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,250 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,298 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,323 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,523 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,544 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,696 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,720 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,743 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,768 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,812 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,831 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:05,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,011 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,035 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,060 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,081 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,102 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,150 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,239 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,262 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,280 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,303 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,348 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,398 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,468 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,489 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,539 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,678 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,700 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,723 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,744 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,769 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,882 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,906 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,949 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:06,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:07,023 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:07,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:07,073 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:07,091 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:07,116 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:07,140 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:07,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:07,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:07,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:07,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:07,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:07,296 INFO L303 Elim1Store]: Index analysis took 2841 ms [2018-12-01 14:10:07,298 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1092 treesize of output 1092 [2018-12-01 14:10:08,018 WARN L180 SmtUtils]: Spent 716.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 77 [2018-12-01 14:10:08,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,060 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,078 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,088 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,096 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,105 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,113 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,119 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,127 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,135 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,205 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,213 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,220 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,227 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,234 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,248 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,256 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,264 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,272 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,278 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,302 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,310 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,317 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,340 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,345 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,375 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,482 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,497 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,503 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,511 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,525 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,532 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,540 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,547 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,554 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,561 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,568 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,575 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,583 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,598 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,624 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,629 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,666 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,682 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,697 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,704 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,713 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,722 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,756 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,774 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,783 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,816 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,825 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:08,890 INFO L303 Elim1Store]: Index analysis took 870 ms [2018-12-01 14:10:08,892 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 1096 [2018-12-01 14:10:08,893 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-01 14:10:09,291 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:10,599 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,678 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,706 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,731 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,760 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,789 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,920 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:10,996 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,024 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,124 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,228 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,530 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,581 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,599 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,707 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,733 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,813 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,915 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,942 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,971 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:11,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,053 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,079 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,134 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,160 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,210 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,448 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,495 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,547 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,572 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,597 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,624 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,676 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,705 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,783 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,939 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:12,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,023 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,049 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,075 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,104 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,160 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,215 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,266 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,293 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,504 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,584 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,608 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,743 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,770 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:13,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:14,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:14,027 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:14,053 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:14,081 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:14,104 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:14,126 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:14,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:14,175 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:14,201 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:14,228 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:14,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:15,078 INFO L303 Elim1Store]: Index analysis took 4526 ms [2018-12-01 14:10:15,163 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 155 treesize of output 1164 [2018-12-01 14:10:16,942 WARN L180 SmtUtils]: Spent 1.78 s on a formula simplification. DAG size of input: 166 DAG size of output: 119 [2018-12-01 14:10:16,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:16,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:16,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:16,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:16,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,019 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,028 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,037 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,059 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,068 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,093 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,101 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,111 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,130 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,140 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,175 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,211 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,220 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,231 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,250 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,267 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,294 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,301 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,309 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,317 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,385 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,426 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,468 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,485 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,495 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,500 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,545 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,551 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,560 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,586 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,671 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,678 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,697 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,704 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,714 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,723 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,739 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,746 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,783 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,809 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,824 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,877 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,904 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,920 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,953 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,960 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,968 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,977 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:17,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,229 INFO L303 Elim1Store]: Index analysis took 1285 ms [2018-12-01 14:10:18,231 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 133 treesize of output 1092 [2018-12-01 14:10:18,232 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-01 14:10:18,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,879 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,906 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,924 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,949 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,977 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:18,996 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,014 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,024 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,033 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,043 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,053 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,063 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,088 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,098 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,117 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,134 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,153 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,190 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,199 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,217 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,225 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,235 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,242 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,250 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,259 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,277 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,285 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,294 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,303 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,311 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,347 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,383 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,433 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,496 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,531 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,541 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,549 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,567 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,575 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,584 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,627 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,665 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,700 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,719 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,728 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,736 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,771 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,781 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,808 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,859 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,876 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:19,892 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:20,113 INFO L303 Elim1Store]: Index analysis took 1284 ms [2018-12-01 14:10:20,114 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 1062 [2018-12-01 14:10:20,116 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-01 14:10:20,551 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-01 14:10:20,688 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-01 14:10:20,756 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:20,808 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:20,808 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 2 variables, input treesize:173, output treesize:141 [2018-12-01 14:10:24,267 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 129 treesize of output 96 [2018-12-01 14:10:24,273 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,276 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,277 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,278 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,279 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,280 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,280 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,281 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,282 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,285 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,286 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:24,302 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 200 [2018-12-01 14:10:24,303 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:10:24,350 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:24,377 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:24,377 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:132, output treesize:113 [2018-12-01 14:10:26,596 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 121 treesize of output 88 [2018-12-01 14:10:26,827 INFO L303 Elim1Store]: Index analysis took 230 ms [2018-12-01 14:10:26,828 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 106 [2018-12-01 14:10:26,829 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:10:26,854 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:26,879 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:26,879 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:121, output treesize:106 [2018-12-01 14:10:29,004 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 81 [2018-12-01 14:10:29,080 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 16 select indices, 16 select index equivalence classes, 105 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 15 case distinctions, treesize of input 81 treesize of output 121 [2018-12-01 14:10:29,081 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-12-01 14:10:29,082 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-12-01 14:10:29,136 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-01 14:10:29,195 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-01 14:10:29,196 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:113, output treesize:130 [2018-12-01 14:10:30,129 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-01 14:10:30,129 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-01 14:10:32,256 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-01 14:10:32,258 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-01 14:10:32,259 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-01 14:10:32,260 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:10 [2018-12-01 14:10:32,551 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-01 14:10:32,551 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-01 14:10:32,557 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:10:32,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-01 14:10:32,628 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-01 14:10:33,383 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-01 14:10:33,384 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-01 14:10:33,384 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:10:33,386 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:33,389 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:33,389 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-12-01 14:10:34,796 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-01 14:10:34,802 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-01 14:10:34,829 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-01 14:10:34,829 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:38 [2018-12-01 14:10:38,466 WARN L180 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 22 [2018-12-01 14:10:38,476 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 31 [2018-12-01 14:10:38,481 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:38,483 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 41 [2018-12-01 14:10:38,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:38,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:38,491 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:38,496 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 45 [2018-12-01 14:10:38,496 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-01 14:10:38,507 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:38,514 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:38,535 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:38,536 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:58, output treesize:22 [2018-12-01 14:10:44,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:44,087 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 38 [2018-12-01 14:10:44,090 INFO L683 Elim1Store]: detected equality via solver [2018-12-01 14:10:44,091 INFO L701 Elim1Store]: detected not equals via solver [2018-12-01 14:10:44,091 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 15 [2018-12-01 14:10:44,092 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:10:44,095 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:44,100 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:44,100 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:13 [2018-12-01 14:10:48,030 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-12-01 14:10:48,032 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-01 14:10:48,032 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-01 14:10:48,033 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:48,034 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-01 14:10:48,034 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-12-01 14:10:48,338 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-01 14:10:48,338 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-01 14:10:48,354 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-01 14:10:48,354 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [42] imperfect sequences [63] total 101 [2018-12-01 14:10:48,355 INFO L459 AbstractCegarLoop]: Interpolant automaton has 101 states [2018-12-01 14:10:48,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2018-12-01 14:10:48,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=320, Invalid=11458, Unknown=2, NotChecked=430, Total=12210 [2018-12-01 14:10:48,357 INFO L87 Difference]: Start difference. First operand 138 states and 140 transitions. Second operand 101 states. [2018-12-01 14:11:43,627 WARN L180 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 29 [2018-12-01 14:11:49,030 WARN L180 SmtUtils]: Spent 4.07 s on a formula simplification. DAG size of input: 38 DAG size of output: 31 [2018-12-01 14:11:52,394 WARN L180 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 32 [2018-12-01 14:11:58,932 WARN L180 SmtUtils]: Spent 119.00 ms on a formula simplification that was a NOOP. DAG size: 128 [2018-12-01 14:12:13,358 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 108 [2018-12-01 14:12:21,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-01 14:12:21,852 INFO L93 Difference]: Finished difference Result 116 states and 116 transitions. [2018-12-01 14:12:21,853 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-12-01 14:12:21,853 INFO L78 Accepts]: Start accepts. Automaton has 101 states. Word has length 116 [2018-12-01 14:12:21,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-01 14:12:21,854 INFO L225 Difference]: With dead ends: 116 [2018-12-01 14:12:21,854 INFO L226 Difference]: Without dead ends: 116 [2018-12-01 14:12:21,856 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 288 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 152 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 3510 ImplicationChecksByTransitivity, 57.3s TimeCoverageRelationStatistics Valid=742, Invalid=22216, Unknown=2, NotChecked=602, Total=23562 [2018-12-01 14:12:21,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-12-01 14:12:21,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-12-01 14:12:21,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-12-01 14:12:21,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 116 transitions. [2018-12-01 14:12:21,858 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 116 transitions. Word has length 116 [2018-12-01 14:12:21,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-01 14:12:21,859 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 116 transitions. [2018-12-01 14:12:21,859 INFO L481 AbstractCegarLoop]: Interpolant automaton has 101 states. [2018-12-01 14:12:21,859 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 116 transitions. [2018-12-01 14:12:21,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-01 14:12:21,859 INFO L394 BasicCegarLoop]: Found error trace [2018-12-01 14:12:21,860 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-01 14:12:21,860 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-01 14:12:21,860 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-01 14:12:21,860 INFO L82 PathProgramCache]: Analyzing trace with hash -724169652, now seen corresponding path program 1 times [2018-12-01 14:12:21,860 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-01 14:12:21,861 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4953cd02-5be8-402f-8f34-c6a29a0b4a4c/bin-2019/uautomizer/cvc4 Starting monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-01 14:12:21,875 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-01 14:12:26,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-01 14:12:30,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-01 14:12:30,813 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-01 14:12:30,826 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-12-01 14:12:30,831 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-01 14:12:30,834 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-01 14:12:30,835 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-01 14:12:30,844 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 01.12 02:12:30 BoogieIcfgContainer [2018-12-01 14:12:30,844 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-01 14:12:30,845 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-01 14:12:30,845 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-01 14:12:30,845 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-01 14:12:30,845 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 01.12 02:09:12" (3/4) ... [2018-12-01 14:12:30,847 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-01 14:12:30,847 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-01 14:12:30,848 INFO L168 Benchmark]: Toolchain (without parser) took 199639.87 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 281.5 MB). Free memory was 939.3 MB in the beginning and 943.0 MB in the end (delta: -3.6 MB). Peak memory consumption was 277.9 MB. Max. memory is 11.5 GB. [2018-12-01 14:12:30,848 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-01 14:12:30,848 INFO L168 Benchmark]: CACSL2BoogieTranslator took 347.11 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 133.7 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -161.4 MB). Peak memory consumption was 33.6 MB. Max. memory is 11.5 GB. [2018-12-01 14:12:30,848 INFO L168 Benchmark]: Boogie Preprocessor took 45.42 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-01 14:12:30,848 INFO L168 Benchmark]: RCFGBuilder took 788.14 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 982.1 MB in the end (delta: 118.6 MB). Peak memory consumption was 118.6 MB. Max. memory is 11.5 GB. [2018-12-01 14:12:30,849 INFO L168 Benchmark]: TraceAbstraction took 198453.81 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 147.8 MB). Free memory was 982.1 MB in the beginning and 943.0 MB in the end (delta: 39.2 MB). Peak memory consumption was 187.0 MB. Max. memory is 11.5 GB. [2018-12-01 14:12:30,849 INFO L168 Benchmark]: Witness Printer took 2.69 ms. Allocated memory is still 1.3 GB. Free memory is still 943.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-01 14:12:30,849 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 347.11 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 133.7 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -161.4 MB). Peak memory consumption was 33.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 45.42 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 788.14 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 982.1 MB in the end (delta: 118.6 MB). Peak memory consumption was 118.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 198453.81 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 147.8 MB). Free memory was 982.1 MB in the beginning and 943.0 MB in the end (delta: 39.2 MB). Peak memory consumption was 187.0 MB. Max. memory is 11.5 GB. * Witness Printer took 2.69 ms. Allocated memory is still 1.3 GB. Free memory is still 943.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1452]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1452. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={-1:0}] [L1453] CALL entry_point() VAL [ldv_global_msg_list={-1:0}] [L1445] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1446] CALL, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}] [L1406] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16, ldv_global_msg_list={-1:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=16, \result={1082401:0}, ldv_global_msg_list={-1:0}, malloc(size)={1082401:0}, size=16] [L1408] RET, EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_global_msg_list={-1:0}, ldv_malloc(sizeof(*kobj))={1082401:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}, memset(kobj, 0, sizeof(*kobj))={1082401:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1294] ((&kref->refcount)->counter) = (1) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1382] RET ldv_kref_init(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [ldv_global_msg_list={-1:0}, list={1082401:4}] [L1099] list->next = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1100] list->prev = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1383] RET LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] RET ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1413] RET ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1414] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1446] RET, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}, ldv_kobject_create()={1082401:0}] [L1446] kobj = ldv_kobject_create() [L1447] CALL f_22_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1437] CALL ldv_kobject_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1255] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1256] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1258] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1259] return temp; VAL [\old(i)=1, \result=2, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={1082401:12}, kref={1082401:12}, ldv_atomic_add_return(1, (&kref->refcount))=2, ldv_global_msg_list={-1:0}] [L1374] RET ldv_kref_get(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1375] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1437] RET ldv_kobject_get(kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kobject_get(kobj)={1082401:0}] [L1447] RET f_22_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1449] CALL ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1264] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1265] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1267] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1268] return temp; VAL [\old(i)=1, \result=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1281] RET, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={1082401:12}, kref={1082401:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] return 0; VAL [\old(count)=1, \result=0, count=1, kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1313] RET, EXPR ldv_kref_sub(kref, 1, release) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] return ldv_kref_sub(kref, 1, release); [L1363] RET ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1449] RET ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1453] RET entry_point() VAL [ldv_global_msg_list={-1:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 45 procedures, 318 locations, 67 error locations. UNSAFE Result, 198.4s OverallTime, 27 OverallIterations, 16 TraceHistogramMax, 109.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3142 SDtfs, 1387 SDslu, 22924 SDs, 0 SdLazy, 16437 SolverSat, 417 SolverUnsat, 6 SolverUnknown, 0 SolverNotchecked, 79.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1842 GetRequests, 1313 SyntacticMatches, 41 SemanticMatches, 488 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 3964 ImplicationChecksByTransitivity, 62.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=176occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 26 MinimizatonAttempts, 97 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 6.7s SatisfiabilityAnalysisTime, 76.1s InterpolantComputationTime, 1734 NumberOfCodeBlocks, 1704 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 1705 ConstructedInterpolants, 344 QuantifiedInterpolants, 1272556 SizeOfPredicates, 236 NumberOfNonLiveVariables, 6497 ConjunctsInSsa, 669 ConjunctsInUnsatCore, 30 InterpolantComputations, 23 PerfectInterpolantSequences, 1833/2101 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...