./Ultimate.py --spec ../../sv-benchmarks/c/properties/no-overflow.prp --file ../../sv-benchmarks/c/busybox-1.22.0/dirname_true-no-overflow_true-valid-memsafety.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for overflows Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/busybox-1.22.0/dirname_true-no-overflow_true-valid-memsafety.i -s /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/config/svcomp-Overflow-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! overflow) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash eb1520ccd16a6dcbfeb7912e1d04b4742bbea576 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis No suitable file found in config dir /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/config using search string *Overflow*64bit*_Bitvector*.epf No suitable settings file found using Overflow*64bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-02 01:04:36,579 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 01:04:36,579 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 01:04:36,586 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-02 01:04:36,586 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-02 01:04:36,586 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-02 01:04:36,587 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-02 01:04:36,588 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-02 01:04:36,588 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-02 01:04:36,589 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-02 01:04:36,589 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-02 01:04:36,589 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 01:04:36,590 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 01:04:36,590 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 01:04:36,591 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 01:04:36,591 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 01:04:36,591 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 01:04:36,592 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 01:04:36,593 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 01:04:36,594 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 01:04:36,594 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 01:04:36,595 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 01:04:36,596 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 01:04:36,596 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 01:04:36,596 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 01:04:36,596 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 01:04:36,597 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 01:04:36,597 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 01:04:36,598 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 01:04:36,598 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 01:04:36,598 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 01:04:36,599 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 01:04:36,599 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 01:04:36,599 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 01:04:36,599 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 01:04:36,599 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 01:04:36,600 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/config/svcomp-Overflow-64bit-Automizer_Default.epf [2018-12-02 01:04:36,606 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 01:04:36,607 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 01:04:36,607 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 01:04:36,607 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 01:04:36,607 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-02 01:04:36,608 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-02 01:04:36,608 INFO L133 SettingsManager]: * Use SBE=true [2018-12-02 01:04:36,608 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 01:04:36,608 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-02 01:04:36,608 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-02 01:04:36,608 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 01:04:36,608 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-02 01:04:36,608 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 01:04:36,608 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-02 01:04:36,608 INFO L133 SettingsManager]: * Check absence of signed integer overflows=true [2018-12-02 01:04:36,608 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-02 01:04:36,609 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-02 01:04:36,609 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-02 01:04:36,609 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 01:04:36,609 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 01:04:36,609 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 01:04:36,609 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 01:04:36,609 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 01:04:36,609 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 01:04:36,609 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 01:04:36,609 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-02 01:04:36,610 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-02 01:04:36,610 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 01:04:36,610 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-02 01:04:36,610 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! overflow) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> eb1520ccd16a6dcbfeb7912e1d04b4742bbea576 [2018-12-02 01:04:36,627 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 01:04:36,636 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 01:04:36,639 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 01:04:36,640 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 01:04:36,640 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 01:04:36,641 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/../../sv-benchmarks/c/busybox-1.22.0/dirname_true-no-overflow_true-valid-memsafety.i [2018-12-02 01:04:36,680 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/data/631222d8d/d6c71f662fc14555a31c6fad9a7890e7/FLAG41aed5b60 [2018-12-02 01:04:37,144 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 01:04:37,144 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/sv-benchmarks/c/busybox-1.22.0/dirname_true-no-overflow_true-valid-memsafety.i [2018-12-02 01:04:37,153 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/data/631222d8d/d6c71f662fc14555a31c6fad9a7890e7/FLAG41aed5b60 [2018-12-02 01:04:37,162 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/data/631222d8d/d6c71f662fc14555a31c6fad9a7890e7 [2018-12-02 01:04:37,164 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 01:04:37,164 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-02 01:04:37,165 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 01:04:37,165 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 01:04:37,167 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 01:04:37,168 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 01:04:37" (1/1) ... [2018-12-02 01:04:37,169 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@75e4b745 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:04:37, skipping insertion in model container [2018-12-02 01:04:37,169 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 01:04:37" (1/1) ... [2018-12-02 01:04:37,173 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 01:04:37,199 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 01:04:37,554 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 01:04:37,575 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 01:04:37,614 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 01:04:37,693 INFO L195 MainTranslator]: Completed translation [2018-12-02 01:04:37,693 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:04:37 WrapperNode [2018-12-02 01:04:37,693 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 01:04:37,694 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-02 01:04:37,694 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-02 01:04:37,694 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-02 01:04:37,699 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:04:37" (1/1) ... [2018-12-02 01:04:37,713 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:04:37" (1/1) ... [2018-12-02 01:04:37,719 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-02 01:04:37,720 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 01:04:37,720 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 01:04:37,720 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 01:04:37,726 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:04:37" (1/1) ... [2018-12-02 01:04:37,726 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:04:37" (1/1) ... [2018-12-02 01:04:37,730 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:04:37" (1/1) ... [2018-12-02 01:04:37,731 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:04:37" (1/1) ... [2018-12-02 01:04:37,743 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:04:37" (1/1) ... [2018-12-02 01:04:37,748 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:04:37" (1/1) ... [2018-12-02 01:04:37,751 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:04:37" (1/1) ... [2018-12-02 01:04:37,754 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 01:04:37,754 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 01:04:37,754 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 01:04:37,754 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 01:04:37,755 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:04:37" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 01:04:37,789 INFO L130 BoogieDeclarations]: Found specification of procedure __main [2018-12-02 01:04:37,789 INFO L138 BoogieDeclarations]: Found implementation of procedure __main [2018-12-02 01:04:37,789 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-02 01:04:37,789 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-02 01:04:37,789 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-02 01:04:37,790 INFO L130 BoogieDeclarations]: Found specification of procedure fflush_all [2018-12-02 01:04:37,790 INFO L138 BoogieDeclarations]: Found implementation of procedure fflush_all [2018-12-02 01:04:37,790 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-02 01:04:37,790 INFO L130 BoogieDeclarations]: Found specification of procedure single_argv [2018-12-02 01:04:37,790 INFO L138 BoogieDeclarations]: Found implementation of procedure single_argv [2018-12-02 01:04:37,790 INFO L130 BoogieDeclarations]: Found specification of procedure bb_show_usage [2018-12-02 01:04:37,790 INFO L138 BoogieDeclarations]: Found implementation of procedure bb_show_usage [2018-12-02 01:04:37,790 INFO L130 BoogieDeclarations]: Found specification of procedure dirname [2018-12-02 01:04:37,790 INFO L138 BoogieDeclarations]: Found implementation of procedure dirname [2018-12-02 01:04:37,791 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-02 01:04:37,791 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-02 01:04:37,791 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-02 01:04:37,791 INFO L130 BoogieDeclarations]: Found specification of procedure puts [2018-12-02 01:04:37,791 INFO L130 BoogieDeclarations]: Found specification of procedure fflush [2018-12-02 01:04:37,791 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-02 01:04:37,791 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-02 01:04:37,791 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-02 01:04:37,792 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-02 01:04:37,792 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 01:04:37,792 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 01:04:38,097 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 01:04:38,098 INFO L280 CfgBuilder]: Removed 6 assue(true) statements. [2018-12-02 01:04:38,098 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 01:04:38 BoogieIcfgContainer [2018-12-02 01:04:38,098 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 01:04:38,098 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 01:04:38,099 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 01:04:38,100 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 01:04:38,101 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 01:04:37" (1/3) ... [2018-12-02 01:04:38,101 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2643e5c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 01:04:38, skipping insertion in model container [2018-12-02 01:04:38,101 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:04:37" (2/3) ... [2018-12-02 01:04:38,101 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2643e5c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 01:04:38, skipping insertion in model container [2018-12-02 01:04:38,101 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 01:04:38" (3/3) ... [2018-12-02 01:04:38,102 INFO L112 eAbstractionObserver]: Analyzing ICFG dirname_true-no-overflow_true-valid-memsafety.i [2018-12-02 01:04:38,108 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 01:04:38,113 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 28 error locations. [2018-12-02 01:04:38,122 INFO L257 AbstractCegarLoop]: Starting to check reachability of 28 error locations. [2018-12-02 01:04:38,140 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-02 01:04:38,141 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 01:04:38,141 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-02 01:04:38,141 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 01:04:38,141 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 01:04:38,141 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 01:04:38,141 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 01:04:38,141 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 01:04:38,141 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 01:04:38,153 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states. [2018-12-02 01:04:38,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-12-02 01:04:38,156 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:38,157 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:38,158 INFO L423 AbstractCegarLoop]: === Iteration 1 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:38,161 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:38,161 INFO L82 PathProgramCache]: Analyzing trace with hash -484679774, now seen corresponding path program 1 times [2018-12-02 01:04:38,162 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:38,163 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:38,196 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,196 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:38,196 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:38,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 01:04:38,288 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:04:38,289 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:04:38,291 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:04:38,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:04:38,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,300 INFO L87 Difference]: Start difference. First operand 118 states. Second operand 3 states. [2018-12-02 01:04:38,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:38,339 INFO L93 Difference]: Finished difference Result 226 states and 277 transitions. [2018-12-02 01:04:38,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:04:38,340 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-12-02 01:04:38,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:38,348 INFO L225 Difference]: With dead ends: 226 [2018-12-02 01:04:38,348 INFO L226 Difference]: Without dead ends: 113 [2018-12-02 01:04:38,350 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-12-02 01:04:38,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-12-02 01:04:38,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-12-02 01:04:38,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 131 transitions. [2018-12-02 01:04:38,383 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 131 transitions. Word has length 8 [2018-12-02 01:04:38,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:38,383 INFO L480 AbstractCegarLoop]: Abstraction has 113 states and 131 transitions. [2018-12-02 01:04:38,383 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:04:38,383 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 131 transitions. [2018-12-02 01:04:38,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-12-02 01:04:38,384 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:38,384 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:38,385 INFO L423 AbstractCegarLoop]: === Iteration 2 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:38,385 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:38,385 INFO L82 PathProgramCache]: Analyzing trace with hash -2140170941, now seen corresponding path program 1 times [2018-12-02 01:04:38,385 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:38,385 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:38,388 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,388 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:38,388 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:38,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 01:04:38,435 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:04:38,435 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:04:38,436 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:04:38,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:04:38,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,437 INFO L87 Difference]: Start difference. First operand 113 states and 131 transitions. Second operand 3 states. [2018-12-02 01:04:38,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:38,450 INFO L93 Difference]: Finished difference Result 116 states and 134 transitions. [2018-12-02 01:04:38,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:04:38,451 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2018-12-02 01:04:38,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:38,452 INFO L225 Difference]: With dead ends: 116 [2018-12-02 01:04:38,452 INFO L226 Difference]: Without dead ends: 115 [2018-12-02 01:04:38,452 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-12-02 01:04:38,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-12-02 01:04:38,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-12-02 01:04:38,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 133 transitions. [2018-12-02 01:04:38,458 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 133 transitions. Word has length 9 [2018-12-02 01:04:38,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:38,458 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 133 transitions. [2018-12-02 01:04:38,458 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:04:38,458 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 133 transitions. [2018-12-02 01:04:38,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-02 01:04:38,459 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:38,459 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:38,459 INFO L423 AbstractCegarLoop]: === Iteration 3 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:38,459 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:38,459 INFO L82 PathProgramCache]: Analyzing trace with hash 957163037, now seen corresponding path program 1 times [2018-12-02 01:04:38,459 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:38,460 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:38,461 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,461 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:38,461 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:38,489 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-02 01:04:38,490 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:04:38,490 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:04:38,490 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:04:38,490 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:04:38,490 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,490 INFO L87 Difference]: Start difference. First operand 115 states and 133 transitions. Second operand 3 states. [2018-12-02 01:04:38,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:38,526 INFO L93 Difference]: Finished difference Result 115 states and 133 transitions. [2018-12-02 01:04:38,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:04:38,527 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-12-02 01:04:38,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:38,528 INFO L225 Difference]: With dead ends: 115 [2018-12-02 01:04:38,528 INFO L226 Difference]: Without dead ends: 111 [2018-12-02 01:04:38,528 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-12-02 01:04:38,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-12-02 01:04:38,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-12-02 01:04:38,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 129 transitions. [2018-12-02 01:04:38,533 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 129 transitions. Word has length 12 [2018-12-02 01:04:38,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:38,533 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 129 transitions. [2018-12-02 01:04:38,534 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:04:38,534 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 129 transitions. [2018-12-02 01:04:38,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-02 01:04:38,534 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:38,534 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:38,534 INFO L423 AbstractCegarLoop]: === Iteration 4 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:38,535 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:38,535 INFO L82 PathProgramCache]: Analyzing trace with hash 957164767, now seen corresponding path program 1 times [2018-12-02 01:04:38,535 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:38,535 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:38,536 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,536 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:38,536 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:38,567 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 01:04:38,567 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:04:38,567 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:04:38,567 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:04:38,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:04:38,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,568 INFO L87 Difference]: Start difference. First operand 111 states and 129 transitions. Second operand 3 states. [2018-12-02 01:04:38,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:38,580 INFO L93 Difference]: Finished difference Result 111 states and 129 transitions. [2018-12-02 01:04:38,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:04:38,581 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-12-02 01:04:38,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:38,582 INFO L225 Difference]: With dead ends: 111 [2018-12-02 01:04:38,582 INFO L226 Difference]: Without dead ends: 110 [2018-12-02 01:04:38,582 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-12-02 01:04:38,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 108. [2018-12-02 01:04:38,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-12-02 01:04:38,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 126 transitions. [2018-12-02 01:04:38,590 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 126 transitions. Word has length 12 [2018-12-02 01:04:38,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:38,590 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 126 transitions. [2018-12-02 01:04:38,590 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:04:38,590 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 126 transitions. [2018-12-02 01:04:38,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-12-02 01:04:38,591 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:38,591 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:38,591 INFO L423 AbstractCegarLoop]: === Iteration 5 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:38,591 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:38,591 INFO L82 PathProgramCache]: Analyzing trace with hash -392716752, now seen corresponding path program 1 times [2018-12-02 01:04:38,591 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:38,592 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:38,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,593 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:38,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:38,622 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-02 01:04:38,622 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:04:38,622 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:04:38,622 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:04:38,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:04:38,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,623 INFO L87 Difference]: Start difference. First operand 108 states and 126 transitions. Second operand 3 states. [2018-12-02 01:04:38,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:38,652 INFO L93 Difference]: Finished difference Result 108 states and 126 transitions. [2018-12-02 01:04:38,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:04:38,653 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2018-12-02 01:04:38,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:38,653 INFO L225 Difference]: With dead ends: 108 [2018-12-02 01:04:38,653 INFO L226 Difference]: Without dead ends: 106 [2018-12-02 01:04:38,654 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-02 01:04:38,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-12-02 01:04:38,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-02 01:04:38,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 124 transitions. [2018-12-02 01:04:38,658 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 124 transitions. Word has length 13 [2018-12-02 01:04:38,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:38,659 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 124 transitions. [2018-12-02 01:04:38,659 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:04:38,659 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 124 transitions. [2018-12-02 01:04:38,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-02 01:04:38,659 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:38,659 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:38,659 INFO L423 AbstractCegarLoop]: === Iteration 6 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:38,660 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:38,660 INFO L82 PathProgramCache]: Analyzing trace with hash 556328978, now seen corresponding path program 1 times [2018-12-02 01:04:38,660 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:38,660 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:38,661 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,661 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:38,661 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:38,681 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-02 01:04:38,682 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:04:38,682 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:04:38,682 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:04:38,682 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:04:38,682 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,683 INFO L87 Difference]: Start difference. First operand 106 states and 124 transitions. Second operand 3 states. [2018-12-02 01:04:38,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:38,707 INFO L93 Difference]: Finished difference Result 106 states and 124 transitions. [2018-12-02 01:04:38,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:04:38,708 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 15 [2018-12-02 01:04:38,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:38,708 INFO L225 Difference]: With dead ends: 106 [2018-12-02 01:04:38,709 INFO L226 Difference]: Without dead ends: 104 [2018-12-02 01:04:38,709 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-12-02 01:04:38,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 104. [2018-12-02 01:04:38,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-02 01:04:38,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 122 transitions. [2018-12-02 01:04:38,715 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 122 transitions. Word has length 15 [2018-12-02 01:04:38,716 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:38,716 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 122 transitions. [2018-12-02 01:04:38,716 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:04:38,716 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 122 transitions. [2018-12-02 01:04:38,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-12-02 01:04:38,717 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:38,717 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:38,717 INFO L423 AbstractCegarLoop]: === Iteration 7 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:38,718 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:38,718 INFO L82 PathProgramCache]: Analyzing trace with hash 1553574359, now seen corresponding path program 1 times [2018-12-02 01:04:38,718 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:38,718 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:38,720 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,720 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:38,720 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:38,756 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-02 01:04:38,756 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:04:38,756 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 01:04:38,756 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:04:38,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:04:38,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,757 INFO L87 Difference]: Start difference. First operand 104 states and 122 transitions. Second operand 3 states. [2018-12-02 01:04:38,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:38,774 INFO L93 Difference]: Finished difference Result 192 states and 230 transitions. [2018-12-02 01:04:38,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:04:38,774 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2018-12-02 01:04:38,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:38,775 INFO L225 Difference]: With dead ends: 192 [2018-12-02 01:04:38,775 INFO L226 Difference]: Without dead ends: 107 [2018-12-02 01:04:38,776 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-12-02 01:04:38,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 107. [2018-12-02 01:04:38,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-12-02 01:04:38,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 125 transitions. [2018-12-02 01:04:38,782 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 125 transitions. Word has length 22 [2018-12-02 01:04:38,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:38,782 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 125 transitions. [2018-12-02 01:04:38,782 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:04:38,782 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 125 transitions. [2018-12-02 01:04:38,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-02 01:04:38,783 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:38,783 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:38,784 INFO L423 AbstractCegarLoop]: === Iteration 8 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:38,784 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:38,784 INFO L82 PathProgramCache]: Analyzing trace with hash -32009876, now seen corresponding path program 1 times [2018-12-02 01:04:38,784 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:38,784 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:38,786 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,786 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:38,786 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:38,819 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 01:04:38,819 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:04:38,819 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 01:04:38,820 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 01:04:38,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 01:04:38,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 01:04:38,820 INFO L87 Difference]: Start difference. First operand 107 states and 125 transitions. Second operand 4 states. [2018-12-02 01:04:38,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:38,866 INFO L93 Difference]: Finished difference Result 115 states and 135 transitions. [2018-12-02 01:04:38,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 01:04:38,867 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-12-02 01:04:38,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:38,868 INFO L225 Difference]: With dead ends: 115 [2018-12-02 01:04:38,869 INFO L226 Difference]: Without dead ends: 114 [2018-12-02 01:04:38,869 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 01:04:38,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-02 01:04:38,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 106. [2018-12-02 01:04:38,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-02 01:04:38,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 124 transitions. [2018-12-02 01:04:38,879 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 124 transitions. Word has length 25 [2018-12-02 01:04:38,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:38,879 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 124 transitions. [2018-12-02 01:04:38,879 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 01:04:38,879 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 124 transitions. [2018-12-02 01:04:38,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-02 01:04:38,880 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:38,880 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:38,880 INFO L423 AbstractCegarLoop]: === Iteration 9 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:38,881 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:38,881 INFO L82 PathProgramCache]: Analyzing trace with hash -32009821, now seen corresponding path program 1 times [2018-12-02 01:04:38,881 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:38,881 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:38,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:38,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:38,915 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 01:04:38,916 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:04:38,916 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:04:38,916 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:04:38,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:04:38,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,917 INFO L87 Difference]: Start difference. First operand 106 states and 124 transitions. Second operand 3 states. [2018-12-02 01:04:38,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:38,931 INFO L93 Difference]: Finished difference Result 106 states and 124 transitions. [2018-12-02 01:04:38,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:04:38,932 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2018-12-02 01:04:38,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:38,932 INFO L225 Difference]: With dead ends: 106 [2018-12-02 01:04:38,933 INFO L226 Difference]: Without dead ends: 105 [2018-12-02 01:04:38,933 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-12-02 01:04:38,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2018-12-02 01:04:38,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-12-02 01:04:38,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 123 transitions. [2018-12-02 01:04:38,939 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 123 transitions. Word has length 25 [2018-12-02 01:04:38,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:38,939 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 123 transitions. [2018-12-02 01:04:38,939 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:04:38,939 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 123 transitions. [2018-12-02 01:04:38,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-02 01:04:38,940 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:38,940 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:38,941 INFO L423 AbstractCegarLoop]: === Iteration 10 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:38,941 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:38,941 INFO L82 PathProgramCache]: Analyzing trace with hash -992305943, now seen corresponding path program 1 times [2018-12-02 01:04:38,941 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:38,941 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:38,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:38,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:38,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:38,986 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 01:04:38,986 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:04:38,987 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:04:38,987 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:04:38,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:04:38,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:38,987 INFO L87 Difference]: Start difference. First operand 105 states and 123 transitions. Second operand 3 states. [2018-12-02 01:04:39,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:39,010 INFO L93 Difference]: Finished difference Result 123 states and 144 transitions. [2018-12-02 01:04:39,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:04:39,011 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 26 [2018-12-02 01:04:39,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:39,011 INFO L225 Difference]: With dead ends: 123 [2018-12-02 01:04:39,012 INFO L226 Difference]: Without dead ends: 122 [2018-12-02 01:04:39,012 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:39,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-12-02 01:04:39,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 114. [2018-12-02 01:04:39,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-12-02 01:04:39,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 135 transitions. [2018-12-02 01:04:39,017 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 135 transitions. Word has length 26 [2018-12-02 01:04:39,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:39,017 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 135 transitions. [2018-12-02 01:04:39,018 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:04:39,018 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 135 transitions. [2018-12-02 01:04:39,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-02 01:04:39,018 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:39,018 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:39,019 INFO L423 AbstractCegarLoop]: === Iteration 11 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:39,019 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:39,019 INFO L82 PathProgramCache]: Analyzing trace with hash -992304245, now seen corresponding path program 1 times [2018-12-02 01:04:39,019 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:39,019 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:39,021 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,021 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:39,021 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:39,051 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-02 01:04:39,051 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:04:39,052 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:04:39,052 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:04:39,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:04:39,052 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:39,052 INFO L87 Difference]: Start difference. First operand 114 states and 135 transitions. Second operand 3 states. [2018-12-02 01:04:39,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:39,064 INFO L93 Difference]: Finished difference Result 121 states and 143 transitions. [2018-12-02 01:04:39,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:04:39,065 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 26 [2018-12-02 01:04:39,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:39,066 INFO L225 Difference]: With dead ends: 121 [2018-12-02 01:04:39,066 INFO L226 Difference]: Without dead ends: 120 [2018-12-02 01:04:39,066 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:39,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-12-02 01:04:39,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 109. [2018-12-02 01:04:39,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-12-02 01:04:39,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 129 transitions. [2018-12-02 01:04:39,071 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 129 transitions. Word has length 26 [2018-12-02 01:04:39,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:39,071 INFO L480 AbstractCegarLoop]: Abstraction has 109 states and 129 transitions. [2018-12-02 01:04:39,071 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:04:39,071 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 129 transitions. [2018-12-02 01:04:39,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-02 01:04:39,071 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:39,071 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:39,072 INFO L423 AbstractCegarLoop]: === Iteration 12 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:39,072 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:39,072 INFO L82 PathProgramCache]: Analyzing trace with hash 1525307751, now seen corresponding path program 1 times [2018-12-02 01:04:39,072 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:39,072 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:39,073 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,073 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:39,073 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:39,098 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 01:04:39,098 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:04:39,099 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:04:39,110 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:39,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:39,156 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:04:39,174 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 01:04:39,189 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 01:04:39,190 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2018-12-02 01:04:39,190 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 01:04:39,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 01:04:39,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-12-02 01:04:39,190 INFO L87 Difference]: Start difference. First operand 109 states and 129 transitions. Second operand 5 states. [2018-12-02 01:04:39,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:39,209 INFO L93 Difference]: Finished difference Result 213 states and 253 transitions. [2018-12-02 01:04:39,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 01:04:39,209 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-02 01:04:39,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:39,210 INFO L225 Difference]: With dead ends: 213 [2018-12-02 01:04:39,210 INFO L226 Difference]: Without dead ends: 114 [2018-12-02 01:04:39,211 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-12-02 01:04:39,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-02 01:04:39,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 112. [2018-12-02 01:04:39,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-12-02 01:04:39,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 132 transitions. [2018-12-02 01:04:39,216 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 132 transitions. Word has length 29 [2018-12-02 01:04:39,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:39,216 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 132 transitions. [2018-12-02 01:04:39,216 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 01:04:39,216 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 132 transitions. [2018-12-02 01:04:39,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-02 01:04:39,217 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:39,217 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:39,217 INFO L423 AbstractCegarLoop]: === Iteration 13 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:39,217 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:39,217 INFO L82 PathProgramCache]: Analyzing trace with hash -1995699453, now seen corresponding path program 2 times [2018-12-02 01:04:39,218 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:39,218 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:39,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,219 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:39,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:39,263 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 01:04:39,263 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:04:39,263 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:04:39,272 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 01:04:39,307 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 01:04:39,308 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 01:04:39,310 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:04:39,329 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-12-02 01:04:39,351 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 01:04:39,352 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [5] total 7 [2018-12-02 01:04:39,352 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 01:04:39,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 01:04:39,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-02 01:04:39,352 INFO L87 Difference]: Start difference. First operand 112 states and 132 transitions. Second operand 7 states. [2018-12-02 01:04:39,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:39,438 INFO L93 Difference]: Finished difference Result 216 states and 256 transitions. [2018-12-02 01:04:39,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 01:04:39,438 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 32 [2018-12-02 01:04:39,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:39,439 INFO L225 Difference]: With dead ends: 216 [2018-12-02 01:04:39,439 INFO L226 Difference]: Without dead ends: 117 [2018-12-02 01:04:39,440 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-02 01:04:39,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-12-02 01:04:39,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 115. [2018-12-02 01:04:39,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-12-02 01:04:39,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 134 transitions. [2018-12-02 01:04:39,446 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 134 transitions. Word has length 32 [2018-12-02 01:04:39,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:39,446 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 134 transitions. [2018-12-02 01:04:39,446 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 01:04:39,446 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 134 transitions. [2018-12-02 01:04:39,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-12-02 01:04:39,447 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:39,447 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:39,448 INFO L423 AbstractCegarLoop]: === Iteration 14 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:39,448 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:39,448 INFO L82 PathProgramCache]: Analyzing trace with hash -842011914, now seen corresponding path program 1 times [2018-12-02 01:04:39,448 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:39,449 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:39,450 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,450 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 01:04:39,450 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:39,488 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-12-02 01:04:39,488 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:04:39,488 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:04:39,488 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:04:39,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:04:39,489 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:39,489 INFO L87 Difference]: Start difference. First operand 115 states and 134 transitions. Second operand 3 states. [2018-12-02 01:04:39,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:39,503 INFO L93 Difference]: Finished difference Result 115 states and 134 transitions. [2018-12-02 01:04:39,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:04:39,504 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2018-12-02 01:04:39,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:39,505 INFO L225 Difference]: With dead ends: 115 [2018-12-02 01:04:39,505 INFO L226 Difference]: Without dead ends: 114 [2018-12-02 01:04:39,505 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:04:39,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-02 01:04:39,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 108. [2018-12-02 01:04:39,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-12-02 01:04:39,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 126 transitions. [2018-12-02 01:04:39,511 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 126 transitions. Word has length 39 [2018-12-02 01:04:39,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:39,511 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 126 transitions. [2018-12-02 01:04:39,511 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:04:39,511 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 126 transitions. [2018-12-02 01:04:39,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-02 01:04:39,512 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:39,512 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:39,513 INFO L423 AbstractCegarLoop]: === Iteration 15 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:39,513 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:39,513 INFO L82 PathProgramCache]: Analyzing trace with hash -716164038, now seen corresponding path program 1 times [2018-12-02 01:04:39,513 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:39,513 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:39,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,514 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:39,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:39,550 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-02 01:04:39,551 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:04:39,551 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:04:39,563 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:39,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:39,615 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:04:39,653 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-02 01:04:39,668 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 01:04:39,668 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 6] total 8 [2018-12-02 01:04:39,669 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-02 01:04:39,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-02 01:04:39,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-12-02 01:04:39,669 INFO L87 Difference]: Start difference. First operand 108 states and 126 transitions. Second operand 8 states. [2018-12-02 01:04:39,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:39,712 INFO L93 Difference]: Finished difference Result 210 states and 247 transitions. [2018-12-02 01:04:39,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 01:04:39,712 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-12-02 01:04:39,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:39,713 INFO L225 Difference]: With dead ends: 210 [2018-12-02 01:04:39,713 INFO L226 Difference]: Without dead ends: 118 [2018-12-02 01:04:39,714 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-12-02 01:04:39,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-12-02 01:04:39,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 114. [2018-12-02 01:04:39,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-12-02 01:04:39,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 132 transitions. [2018-12-02 01:04:39,717 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 132 transitions. Word has length 42 [2018-12-02 01:04:39,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:39,718 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 132 transitions. [2018-12-02 01:04:39,718 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-02 01:04:39,718 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 132 transitions. [2018-12-02 01:04:39,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-02 01:04:39,718 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:39,718 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:39,719 INFO L423 AbstractCegarLoop]: === Iteration 16 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:39,719 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:39,719 INFO L82 PathProgramCache]: Analyzing trace with hash -86642261, now seen corresponding path program 2 times [2018-12-02 01:04:39,719 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:39,719 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:39,720 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,721 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:39,721 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:39,755 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-02 01:04:39,755 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:04:39,755 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:04:39,764 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 01:04:39,800 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-02 01:04:39,800 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 01:04:39,803 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:04:39,809 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-02 01:04:39,828 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 01:04:39,828 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2018-12-02 01:04:39,829 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 01:04:39,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 01:04:39,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 01:04:39,829 INFO L87 Difference]: Start difference. First operand 114 states and 132 transitions. Second operand 6 states. [2018-12-02 01:04:39,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:39,863 INFO L93 Difference]: Finished difference Result 216 states and 260 transitions. [2018-12-02 01:04:39,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 01:04:39,863 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 48 [2018-12-02 01:04:39,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:39,865 INFO L225 Difference]: With dead ends: 216 [2018-12-02 01:04:39,865 INFO L226 Difference]: Without dead ends: 131 [2018-12-02 01:04:39,865 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 48 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 01:04:39,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-12-02 01:04:39,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 118. [2018-12-02 01:04:39,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-12-02 01:04:39,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 136 transitions. [2018-12-02 01:04:39,869 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 136 transitions. Word has length 48 [2018-12-02 01:04:39,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:39,869 INFO L480 AbstractCegarLoop]: Abstraction has 118 states and 136 transitions. [2018-12-02 01:04:39,869 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 01:04:39,869 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 136 transitions. [2018-12-02 01:04:39,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-12-02 01:04:39,869 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:39,869 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:39,870 INFO L423 AbstractCegarLoop]: === Iteration 17 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:39,870 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:39,870 INFO L82 PathProgramCache]: Analyzing trace with hash 1247548610, now seen corresponding path program 1 times [2018-12-02 01:04:39,870 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:39,870 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:39,871 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,871 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 01:04:39,871 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:39,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:39,908 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-02 01:04:39,908 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:04:39,908 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:04:39,918 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:39,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:39,970 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:04:40,020 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-02 01:04:40,045 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 01:04:40,045 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7] total 11 [2018-12-02 01:04:40,045 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-02 01:04:40,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-02 01:04:40,045 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-12-02 01:04:40,046 INFO L87 Difference]: Start difference. First operand 118 states and 136 transitions. Second operand 11 states. [2018-12-02 01:04:40,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:40,099 INFO L93 Difference]: Finished difference Result 227 states and 264 transitions. [2018-12-02 01:04:40,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-02 01:04:40,100 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 52 [2018-12-02 01:04:40,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:40,100 INFO L225 Difference]: With dead ends: 227 [2018-12-02 01:04:40,101 INFO L226 Difference]: Without dead ends: 128 [2018-12-02 01:04:40,101 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 48 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-12-02 01:04:40,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-12-02 01:04:40,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 124. [2018-12-02 01:04:40,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-12-02 01:04:40,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 142 transitions. [2018-12-02 01:04:40,107 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 142 transitions. Word has length 52 [2018-12-02 01:04:40,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:40,107 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 142 transitions. [2018-12-02 01:04:40,107 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-02 01:04:40,107 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 142 transitions. [2018-12-02 01:04:40,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-12-02 01:04:40,108 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:40,108 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:40,108 INFO L423 AbstractCegarLoop]: === Iteration 18 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:40,108 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:40,109 INFO L82 PathProgramCache]: Analyzing trace with hash 2080661809, now seen corresponding path program 2 times [2018-12-02 01:04:40,109 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:40,109 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:40,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:40,110 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:40,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:40,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:40,182 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-12-02 01:04:40,182 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:04:40,182 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:04:40,192 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 01:04:40,248 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-02 01:04:40,249 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 01:04:40,252 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:04:40,307 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-12-02 01:04:40,322 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 01:04:40,322 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 13 [2018-12-02 01:04:40,323 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 01:04:40,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 01:04:40,323 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2018-12-02 01:04:40,323 INFO L87 Difference]: Start difference. First operand 124 states and 142 transitions. Second operand 13 states. [2018-12-02 01:04:40,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:40,379 INFO L93 Difference]: Finished difference Result 236 states and 273 transitions. [2018-12-02 01:04:40,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 01:04:40,380 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 58 [2018-12-02 01:04:40,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:40,380 INFO L225 Difference]: With dead ends: 236 [2018-12-02 01:04:40,380 INFO L226 Difference]: Without dead ends: 134 [2018-12-02 01:04:40,380 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2018-12-02 01:04:40,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-02 01:04:40,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 130. [2018-12-02 01:04:40,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-12-02 01:04:40,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 148 transitions. [2018-12-02 01:04:40,384 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 148 transitions. Word has length 58 [2018-12-02 01:04:40,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:40,384 INFO L480 AbstractCegarLoop]: Abstraction has 130 states and 148 transitions. [2018-12-02 01:04:40,384 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 01:04:40,384 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 148 transitions. [2018-12-02 01:04:40,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-02 01:04:40,385 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:40,385 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:40,385 INFO L423 AbstractCegarLoop]: === Iteration 19 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:40,385 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:40,385 INFO L82 PathProgramCache]: Analyzing trace with hash -1647139486, now seen corresponding path program 3 times [2018-12-02 01:04:40,385 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:40,385 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:40,386 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:40,386 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 01:04:40,386 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:40,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:40,431 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 1 proven. 35 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-12-02 01:04:40,431 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:04:40,431 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:04:40,438 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 01:04:42,664 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-12-02 01:04:42,664 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 01:04:42,668 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:04:42,679 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 1 proven. 35 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-12-02 01:04:42,697 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 01:04:42,697 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-12-02 01:04:42,697 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 01:04:42,697 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 01:04:42,697 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-02 01:04:42,698 INFO L87 Difference]: Start difference. First operand 130 states and 148 transitions. Second operand 9 states. [2018-12-02 01:04:42,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:42,726 INFO L93 Difference]: Finished difference Result 230 states and 266 transitions. [2018-12-02 01:04:42,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 01:04:42,726 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 64 [2018-12-02 01:04:42,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:42,727 INFO L225 Difference]: With dead ends: 230 [2018-12-02 01:04:42,727 INFO L226 Difference]: Without dead ends: 135 [2018-12-02 01:04:42,728 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 64 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-02 01:04:42,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-02 01:04:42,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 133. [2018-12-02 01:04:42,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-12-02 01:04:42,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 151 transitions. [2018-12-02 01:04:42,734 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 151 transitions. Word has length 64 [2018-12-02 01:04:42,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:42,734 INFO L480 AbstractCegarLoop]: Abstraction has 133 states and 151 transitions. [2018-12-02 01:04:42,734 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 01:04:42,734 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 151 transitions. [2018-12-02 01:04:42,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-02 01:04:42,735 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:42,735 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:42,735 INFO L423 AbstractCegarLoop]: === Iteration 20 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:42,735 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:42,736 INFO L82 PathProgramCache]: Analyzing trace with hash 1571808757, now seen corresponding path program 4 times [2018-12-02 01:04:42,736 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:42,736 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:42,737 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:42,737 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 01:04:42,737 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:42,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:42,810 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-12-02 01:04:42,810 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:04:42,810 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:04:42,820 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-02 01:04:42,870 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-02 01:04:42,870 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 01:04:42,873 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:04:42,880 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-12-02 01:04:42,905 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 01:04:42,905 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-12-02 01:04:42,905 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 01:04:42,905 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 01:04:42,905 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-02 01:04:42,906 INFO L87 Difference]: Start difference. First operand 133 states and 151 transitions. Second operand 10 states. [2018-12-02 01:04:42,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:42,935 INFO L93 Difference]: Finished difference Result 246 states and 282 transitions. [2018-12-02 01:04:42,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 01:04:42,936 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2018-12-02 01:04:42,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:42,936 INFO L225 Difference]: With dead ends: 246 [2018-12-02 01:04:42,936 INFO L226 Difference]: Without dead ends: 138 [2018-12-02 01:04:42,937 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-02 01:04:42,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-02 01:04:42,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 136. [2018-12-02 01:04:42,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-02 01:04:42,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 154 transitions. [2018-12-02 01:04:42,941 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 154 transitions. Word has length 67 [2018-12-02 01:04:42,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:42,941 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 154 transitions. [2018-12-02 01:04:42,941 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 01:04:42,941 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 154 transitions. [2018-12-02 01:04:42,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-12-02 01:04:42,941 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:42,941 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:42,942 INFO L423 AbstractCegarLoop]: === Iteration 21 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:42,942 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:42,942 INFO L82 PathProgramCache]: Analyzing trace with hash 312181393, now seen corresponding path program 5 times [2018-12-02 01:04:42,942 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:42,942 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:42,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:42,943 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 01:04:42,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:42,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:43,007 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-12-02 01:04:43,007 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:04:43,007 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:04:43,018 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-12-02 01:04:46,391 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-12-02 01:04:46,391 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 01:04:46,395 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:04:46,457 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 1 proven. 51 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-12-02 01:04:46,473 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 01:04:46,473 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 [2018-12-02 01:04:46,473 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-02 01:04:46,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-02 01:04:46,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2018-12-02 01:04:46,474 INFO L87 Difference]: Start difference. First operand 136 states and 154 transitions. Second operand 17 states. [2018-12-02 01:04:46,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:46,532 INFO L93 Difference]: Finished difference Result 254 states and 291 transitions. [2018-12-02 01:04:46,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-02 01:04:46,532 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 70 [2018-12-02 01:04:46,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:46,532 INFO L225 Difference]: With dead ends: 254 [2018-12-02 01:04:46,533 INFO L226 Difference]: Without dead ends: 146 [2018-12-02 01:04:46,533 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 64 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2018-12-02 01:04:46,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-02 01:04:46,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 142. [2018-12-02 01:04:46,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-02 01:04:46,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 160 transitions. [2018-12-02 01:04:46,538 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 160 transitions. Word has length 70 [2018-12-02 01:04:46,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:46,538 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 160 transitions. [2018-12-02 01:04:46,538 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-02 01:04:46,538 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 160 transitions. [2018-12-02 01:04:46,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-02 01:04:46,538 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:46,539 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:46,539 INFO L423 AbstractCegarLoop]: === Iteration 22 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:46,539 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:46,539 INFO L82 PathProgramCache]: Analyzing trace with hash 1501953538, now seen corresponding path program 6 times [2018-12-02 01:04:46,539 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:46,539 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:46,540 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:46,540 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 01:04:46,540 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:46,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:46,612 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 1 proven. 70 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-12-02 01:04:46,612 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:04:46,612 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:04:46,620 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-12-02 01:04:51,758 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-12-02 01:04:51,759 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 01:04:51,763 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:04:51,838 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2018-12-02 01:04:51,856 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 01:04:51,856 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 19 [2018-12-02 01:04:51,857 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-02 01:04:51,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-02 01:04:51,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=243, Unknown=0, NotChecked=0, Total=342 [2018-12-02 01:04:51,857 INFO L87 Difference]: Start difference. First operand 142 states and 160 transitions. Second operand 19 states. [2018-12-02 01:04:51,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:51,946 INFO L93 Difference]: Finished difference Result 263 states and 300 transitions. [2018-12-02 01:04:51,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-02 01:04:51,946 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 76 [2018-12-02 01:04:51,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:51,947 INFO L225 Difference]: With dead ends: 263 [2018-12-02 01:04:51,947 INFO L226 Difference]: Without dead ends: 152 [2018-12-02 01:04:51,947 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=99, Invalid=243, Unknown=0, NotChecked=0, Total=342 [2018-12-02 01:04:51,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-12-02 01:04:51,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 148. [2018-12-02 01:04:51,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-02 01:04:51,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 166 transitions. [2018-12-02 01:04:51,953 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 166 transitions. Word has length 76 [2018-12-02 01:04:51,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:51,954 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 166 transitions. [2018-12-02 01:04:51,954 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-02 01:04:51,954 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 166 transitions. [2018-12-02 01:04:51,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-02 01:04:51,954 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:51,954 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:51,954 INFO L423 AbstractCegarLoop]: === Iteration 23 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:51,955 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:51,955 INFO L82 PathProgramCache]: Analyzing trace with hash 631233521, now seen corresponding path program 7 times [2018-12-02 01:04:51,955 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:51,955 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:51,955 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:51,955 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 01:04:51,956 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:51,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:52,040 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 1 proven. 92 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2018-12-02 01:04:52,040 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:04:52,041 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:04:52,051 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:52,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:52,104 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:04:52,193 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2018-12-02 01:04:52,219 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 01:04:52,219 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12] total 21 [2018-12-02 01:04:52,219 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-12-02 01:04:52,219 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-12-02 01:04:52,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=300, Unknown=0, NotChecked=0, Total=420 [2018-12-02 01:04:52,220 INFO L87 Difference]: Start difference. First operand 148 states and 166 transitions. Second operand 21 states. [2018-12-02 01:04:52,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:52,294 INFO L93 Difference]: Finished difference Result 270 states and 307 transitions. [2018-12-02 01:04:52,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-02 01:04:52,294 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 82 [2018-12-02 01:04:52,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:52,295 INFO L225 Difference]: With dead ends: 270 [2018-12-02 01:04:52,295 INFO L226 Difference]: Without dead ends: 156 [2018-12-02 01:04:52,296 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 73 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=120, Invalid=300, Unknown=0, NotChecked=0, Total=420 [2018-12-02 01:04:52,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-02 01:04:52,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 154. [2018-12-02 01:04:52,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-12-02 01:04:52,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 172 transitions. [2018-12-02 01:04:52,301 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 172 transitions. Word has length 82 [2018-12-02 01:04:52,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:52,301 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 172 transitions. [2018-12-02 01:04:52,301 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-12-02 01:04:52,302 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 172 transitions. [2018-12-02 01:04:52,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-12-02 01:04:52,302 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:52,302 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:52,303 INFO L423 AbstractCegarLoop]: === Iteration 24 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:52,303 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:52,303 INFO L82 PathProgramCache]: Analyzing trace with hash 1461722786, now seen corresponding path program 8 times [2018-12-02 01:04:52,303 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:52,303 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:52,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:52,304 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:04:52,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:52,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:52,379 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 1 proven. 117 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-02 01:04:52,379 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:04:52,379 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:04:52,388 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-02 01:04:52,457 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-02 01:04:52,457 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 01:04:52,460 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:04:52,473 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 1 proven. 117 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-02 01:04:52,489 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 01:04:52,489 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-12-02 01:04:52,489 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-02 01:04:52,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-02 01:04:52,490 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-02 01:04:52,490 INFO L87 Difference]: Start difference. First operand 154 states and 172 transitions. Second operand 13 states. [2018-12-02 01:04:52,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:04:52,531 INFO L93 Difference]: Finished difference Result 264 states and 300 transitions. [2018-12-02 01:04:52,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-02 01:04:52,532 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 88 [2018-12-02 01:04:52,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:04:52,533 INFO L225 Difference]: With dead ends: 264 [2018-12-02 01:04:52,533 INFO L226 Difference]: Without dead ends: 157 [2018-12-02 01:04:52,533 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-02 01:04:52,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-12-02 01:04:52,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 157. [2018-12-02 01:04:52,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-12-02 01:04:52,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 175 transitions. [2018-12-02 01:04:52,540 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 175 transitions. Word has length 88 [2018-12-02 01:04:52,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:04:52,540 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 175 transitions. [2018-12-02 01:04:52,540 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-02 01:04:52,540 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 175 transitions. [2018-12-02 01:04:52,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-12-02 01:04:52,541 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:04:52,541 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:04:52,541 INFO L423 AbstractCegarLoop]: === Iteration 25 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:04:52,541 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:04:52,541 INFO L82 PathProgramCache]: Analyzing trace with hash 1012982965, now seen corresponding path program 9 times [2018-12-02 01:04:52,541 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:04:52,542 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:04:52,543 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:52,543 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 01:04:52,543 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:04:52,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:04:53,117 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 28 proven. 29 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2018-12-02 01:04:53,118 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:04:53,118 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:04:53,124 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-02 01:05:23,762 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-12-02 01:05:23,762 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 01:05:23,771 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:05:23,812 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-02 01:05:23,813 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:23,818 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:23,818 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:15 [2018-12-02 01:05:23,838 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:23,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:23,840 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-02 01:05:23,840 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:23,857 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-12-02 01:05:23,859 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-02 01:05:23,860 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:23,861 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:23,875 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-12-02 01:05:23,878 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-02 01:05:23,878 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:23,880 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:23,891 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:23,891 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:59, output treesize:49 [2018-12-02 01:05:23,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:23,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:23,935 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:23,936 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-12-02 01:05:23,936 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,015 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 634 treesize of output 452 [2018-12-02 01:05:24,083 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:24,086 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 35 [2018-12-02 01:05:24,086 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,112 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 178 treesize of output 170 [2018-12-02 01:05:24,115 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-02 01:05:24,115 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,143 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 165 treesize of output 174 [2018-12-02 01:05:24,147 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 112 treesize of output 111 [2018-12-02 01:05:24,147 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,160 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,167 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,175 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,204 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 191 treesize of output 105 [2018-12-02 01:05:24,228 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:24,229 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 35 [2018-12-02 01:05:24,230 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,241 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 58 [2018-12-02 01:05:24,243 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-02 01:05:24,243 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,256 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 70 [2018-12-02 01:05:24,258 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 23 [2018-12-02 01:05:24,258 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,265 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,269 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,273 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,289 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 01:05:24,289 INFO L202 ElimStorePlain]: Needed 14 recursive calls to eliminate 7 variables, input treesize:676, output treesize:101 [2018-12-02 01:05:24,338 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 166 [2018-12-02 01:05:24,340 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-02 01:05:24,341 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,350 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,387 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 110 [2018-12-02 01:05:24,390 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-02 01:05:24,390 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,397 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,411 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 01:05:24,411 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-02 01:05:24,429 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 166 [2018-12-02 01:05:24,433 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-02 01:05:24,433 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,443 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,470 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 110 [2018-12-02 01:05:24,473 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-02 01:05:24,473 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,480 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,494 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 01:05:24,494 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-02 01:05:24,508 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-02 01:05:24,511 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-02 01:05:24,511 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,521 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,548 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-02 01:05:24,551 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-02 01:05:24,551 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,563 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,577 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 01:05:24,578 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-02 01:05:24,592 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-02 01:05:24,595 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-02 01:05:24,595 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,605 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,634 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-02 01:05:24,636 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-02 01:05:24,637 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,643 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,659 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 01:05:24,659 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-02 01:05:24,674 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-02 01:05:24,677 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-02 01:05:24,677 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,687 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,717 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-02 01:05:24,719 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-02 01:05:24,720 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,725 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,748 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 01:05:24,748 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-02 01:05:24,763 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-02 01:05:24,765 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-02 01:05:24,766 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,775 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,800 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-02 01:05:24,802 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-02 01:05:24,803 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,808 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,822 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 01:05:24,822 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-02 01:05:24,834 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-02 01:05:24,837 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-02 01:05:24,837 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,846 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,873 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-02 01:05:24,874 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-02 01:05:24,875 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,883 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,897 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 01:05:24,897 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-02 01:05:24,913 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-02 01:05:24,916 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-02 01:05:24,916 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,926 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,953 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-02 01:05:24,956 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-02 01:05:24,956 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,962 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:24,976 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 01:05:24,976 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-02 01:05:24,990 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-02 01:05:24,992 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-02 01:05:24,993 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:25,003 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:25,028 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-02 01:05:25,030 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-02 01:05:25,030 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:25,036 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:25,049 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 01:05:25,049 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-02 01:05:25,063 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-02 01:05:25,065 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-02 01:05:25,065 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:25,074 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:25,101 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-02 01:05:25,103 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-02 01:05:25,103 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:25,109 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:25,122 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-02 01:05:25,122 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-02 01:05:25,371 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 290 trivial. 0 not checked. [2018-12-02 01:05:25,392 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-02 01:05:25,393 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 12] total 25 [2018-12-02 01:05:25,393 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-12-02 01:05:25,393 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-12-02 01:05:25,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=529, Unknown=0, NotChecked=0, Total=600 [2018-12-02 01:05:25,393 INFO L87 Difference]: Start difference. First operand 157 states and 175 transitions. Second operand 25 states. [2018-12-02 01:05:26,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:05:26,361 INFO L93 Difference]: Finished difference Result 279 states and 320 transitions. [2018-12-02 01:05:26,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-02 01:05:26,361 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 91 [2018-12-02 01:05:26,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:05:26,362 INFO L225 Difference]: With dead ends: 279 [2018-12-02 01:05:26,362 INFO L226 Difference]: Without dead ends: 208 [2018-12-02 01:05:26,362 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 90 SyntacticMatches, 6 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 258 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=166, Invalid=956, Unknown=0, NotChecked=0, Total=1122 [2018-12-02 01:05:26,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-12-02 01:05:26,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 205. [2018-12-02 01:05:26,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2018-12-02 01:05:26,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 230 transitions. [2018-12-02 01:05:26,373 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 230 transitions. Word has length 91 [2018-12-02 01:05:26,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:05:26,373 INFO L480 AbstractCegarLoop]: Abstraction has 205 states and 230 transitions. [2018-12-02 01:05:26,373 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-12-02 01:05:26,373 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 230 transitions. [2018-12-02 01:05:26,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-12-02 01:05:26,376 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:05:26,376 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:05:26,376 INFO L423 AbstractCegarLoop]: === Iteration 26 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:05:26,376 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:05:26,376 INFO L82 PathProgramCache]: Analyzing trace with hash -2132172502, now seen corresponding path program 1 times [2018-12-02 01:05:26,377 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:05:26,377 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:05:26,377 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:26,378 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 01:05:26,378 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:26,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:05:26,421 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 291 trivial. 0 not checked. [2018-12-02 01:05:26,421 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:05:26,421 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:05:26,421 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:05:26,422 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:05:26,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:05:26,422 INFO L87 Difference]: Start difference. First operand 205 states and 230 transitions. Second operand 3 states. [2018-12-02 01:05:26,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:05:26,438 INFO L93 Difference]: Finished difference Result 223 states and 250 transitions. [2018-12-02 01:05:26,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:05:26,439 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 97 [2018-12-02 01:05:26,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:05:26,440 INFO L225 Difference]: With dead ends: 223 [2018-12-02 01:05:26,440 INFO L226 Difference]: Without dead ends: 205 [2018-12-02 01:05:26,440 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:05:26,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-12-02 01:05:26,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 205. [2018-12-02 01:05:26,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2018-12-02 01:05:26,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 230 transitions. [2018-12-02 01:05:26,448 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 230 transitions. Word has length 97 [2018-12-02 01:05:26,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:05:26,448 INFO L480 AbstractCegarLoop]: Abstraction has 205 states and 230 transitions. [2018-12-02 01:05:26,448 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:05:26,448 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 230 transitions. [2018-12-02 01:05:26,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-02 01:05:26,449 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:05:26,449 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:05:26,449 INFO L423 AbstractCegarLoop]: === Iteration 27 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:05:26,449 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:05:26,449 INFO L82 PathProgramCache]: Analyzing trace with hash -1672837872, now seen corresponding path program 1 times [2018-12-02 01:05:26,449 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:05:26,449 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:05:26,450 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:26,450 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:05:26,450 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:26,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:05:26,480 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 291 trivial. 0 not checked. [2018-12-02 01:05:26,480 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:05:26,480 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:05:26,480 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:05:26,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:05:26,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:05:26,480 INFO L87 Difference]: Start difference. First operand 205 states and 230 transitions. Second operand 3 states. [2018-12-02 01:05:26,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:05:26,493 INFO L93 Difference]: Finished difference Result 208 states and 233 transitions. [2018-12-02 01:05:26,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:05:26,493 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2018-12-02 01:05:26,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:05:26,494 INFO L225 Difference]: With dead ends: 208 [2018-12-02 01:05:26,494 INFO L226 Difference]: Without dead ends: 207 [2018-12-02 01:05:26,495 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:05:26,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-12-02 01:05:26,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 207. [2018-12-02 01:05:26,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-12-02 01:05:26,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 232 transitions. [2018-12-02 01:05:26,506 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 232 transitions. Word has length 98 [2018-12-02 01:05:26,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:05:26,506 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 232 transitions. [2018-12-02 01:05:26,506 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:05:26,507 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 232 transitions. [2018-12-02 01:05:26,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-12-02 01:05:26,507 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:05:26,507 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:05:26,508 INFO L423 AbstractCegarLoop]: === Iteration 28 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:05:26,508 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:05:26,508 INFO L82 PathProgramCache]: Analyzing trace with hash -1007265881, now seen corresponding path program 1 times [2018-12-02 01:05:26,508 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:05:26,508 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:05:26,509 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:26,509 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:05:26,509 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:26,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:05:26,549 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 291 trivial. 0 not checked. [2018-12-02 01:05:26,549 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:05:26,549 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:05:26,549 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:05:26,550 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:05:26,550 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:05:26,550 INFO L87 Difference]: Start difference. First operand 207 states and 232 transitions. Second operand 3 states. [2018-12-02 01:05:26,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:05:26,565 INFO L93 Difference]: Finished difference Result 207 states and 232 transitions. [2018-12-02 01:05:26,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:05:26,565 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 101 [2018-12-02 01:05:26,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:05:26,566 INFO L225 Difference]: With dead ends: 207 [2018-12-02 01:05:26,566 INFO L226 Difference]: Without dead ends: 206 [2018-12-02 01:05:26,567 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:05:26,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-12-02 01:05:26,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 204. [2018-12-02 01:05:26,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-12-02 01:05:26,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 229 transitions. [2018-12-02 01:05:26,579 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 229 transitions. Word has length 101 [2018-12-02 01:05:26,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:05:26,579 INFO L480 AbstractCegarLoop]: Abstraction has 204 states and 229 transitions. [2018-12-02 01:05:26,579 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:05:26,579 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 229 transitions. [2018-12-02 01:05:26,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-02 01:05:26,580 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:05:26,580 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:05:26,580 INFO L423 AbstractCegarLoop]: === Iteration 29 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:05:26,580 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:05:26,580 INFO L82 PathProgramCache]: Analyzing trace with hash 446640932, now seen corresponding path program 1 times [2018-12-02 01:05:26,581 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:05:26,581 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:05:26,582 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:26,582 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:05:26,582 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:26,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:05:26,644 INFO L134 CoverageAnalysis]: Checked inductivity of 292 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2018-12-02 01:05:26,645 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:05:26,645 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 01:05:26,645 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 01:05:26,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 01:05:26,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 01:05:26,645 INFO L87 Difference]: Start difference. First operand 204 states and 229 transitions. Second operand 4 states. [2018-12-02 01:05:26,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:05:26,698 INFO L93 Difference]: Finished difference Result 205 states and 230 transitions. [2018-12-02 01:05:26,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 01:05:26,698 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 113 [2018-12-02 01:05:26,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:05:26,699 INFO L225 Difference]: With dead ends: 205 [2018-12-02 01:05:26,699 INFO L226 Difference]: Without dead ends: 204 [2018-12-02 01:05:26,699 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 01:05:26,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-12-02 01:05:26,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 203. [2018-12-02 01:05:26,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-12-02 01:05:26,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 228 transitions. [2018-12-02 01:05:26,706 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 228 transitions. Word has length 113 [2018-12-02 01:05:26,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:05:26,707 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 228 transitions. [2018-12-02 01:05:26,707 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 01:05:26,707 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 228 transitions. [2018-12-02 01:05:26,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-12-02 01:05:26,707 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:05:26,707 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:05:26,707 INFO L423 AbstractCegarLoop]: === Iteration 30 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:05:26,707 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:05:26,708 INFO L82 PathProgramCache]: Analyzing trace with hash 960967235, now seen corresponding path program 1 times [2018-12-02 01:05:26,708 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:05:26,708 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:05:26,708 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:26,708 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:05:26,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:26,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:05:26,742 INFO L134 CoverageAnalysis]: Checked inductivity of 292 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2018-12-02 01:05:26,742 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:05:26,742 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:05:26,743 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:05:26,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:05:26,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:05:26,743 INFO L87 Difference]: Start difference. First operand 203 states and 228 transitions. Second operand 3 states. [2018-12-02 01:05:26,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:05:26,758 INFO L93 Difference]: Finished difference Result 207 states and 232 transitions. [2018-12-02 01:05:26,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:05:26,759 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 114 [2018-12-02 01:05:26,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:05:26,760 INFO L225 Difference]: With dead ends: 207 [2018-12-02 01:05:26,760 INFO L226 Difference]: Without dead ends: 206 [2018-12-02 01:05:26,760 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:05:26,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-12-02 01:05:26,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 206. [2018-12-02 01:05:26,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-12-02 01:05:26,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 231 transitions. [2018-12-02 01:05:26,773 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 231 transitions. Word has length 114 [2018-12-02 01:05:26,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:05:26,773 INFO L480 AbstractCegarLoop]: Abstraction has 206 states and 231 transitions. [2018-12-02 01:05:26,773 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:05:26,774 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 231 transitions. [2018-12-02 01:05:26,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-12-02 01:05:26,774 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:05:26,775 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:05:26,775 INFO L423 AbstractCegarLoop]: === Iteration 31 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:05:26,775 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:05:26,775 INFO L82 PathProgramCache]: Analyzing trace with hash -2076872735, now seen corresponding path program 1 times [2018-12-02 01:05:26,775 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:05:26,775 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:05:26,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:26,776 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:05:26,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:26,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:05:26,819 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2018-12-02 01:05:26,819 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 01:05:26,820 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-02 01:05:26,820 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 01:05:26,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 01:05:26,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:05:26,820 INFO L87 Difference]: Start difference. First operand 206 states and 231 transitions. Second operand 3 states. [2018-12-02 01:05:26,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 01:05:26,829 INFO L93 Difference]: Finished difference Result 206 states and 231 transitions. [2018-12-02 01:05:26,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 01:05:26,830 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 117 [2018-12-02 01:05:26,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 01:05:26,830 INFO L225 Difference]: With dead ends: 206 [2018-12-02 01:05:26,830 INFO L226 Difference]: Without dead ends: 151 [2018-12-02 01:05:26,831 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 01:05:26,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-02 01:05:26,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-12-02 01:05:26,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-02 01:05:26,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 161 transitions. [2018-12-02 01:05:26,840 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 161 transitions. Word has length 117 [2018-12-02 01:05:26,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 01:05:26,840 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 161 transitions. [2018-12-02 01:05:26,840 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 01:05:26,840 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 161 transitions. [2018-12-02 01:05:26,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-12-02 01:05:26,841 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 01:05:26,841 INFO L402 BasicCegarLoop]: trace histogram [20, 20, 20, 10, 10, 10, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 01:05:26,841 INFO L423 AbstractCegarLoop]: === Iteration 32 === [single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-02 01:05:26,841 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 01:05:26,841 INFO L82 PathProgramCache]: Analyzing trace with hash 576931341, now seen corresponding path program 10 times [2018-12-02 01:05:26,842 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 01:05:26,842 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 01:05:26,843 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:26,843 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 01:05:26,843 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 01:05:27,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 01:05:29,811 INFO L134 CoverageAnalysis]: Checked inductivity of 761 backedges. 28 proven. 499 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2018-12-02 01:05:29,811 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 01:05:29,811 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_031fc285-9f10-41e8-9446-37dc2acb8ed0/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:05:29,818 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-02 01:05:29,902 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-02 01:05:29,902 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-02 01:05:29,910 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 01:05:29,917 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 202 treesize of output 186 [2018-12-02 01:05:29,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:29,951 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 186 treesize of output 174 [2018-12-02 01:05:29,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:29,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:29,980 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 170 treesize of output 162 [2018-12-02 01:05:29,986 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 156 treesize of output 144 [2018-12-02 01:05:30,178 WARN L180 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 46 [2018-12-02 01:05:30,186 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,229 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,229 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 130 treesize of output 143 [2018-12-02 01:05:30,368 WARN L180 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 46 [2018-12-02 01:05:30,375 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,379 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,383 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,387 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,435 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 11 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 148 [2018-12-02 01:05:30,498 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,499 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,503 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,506 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,507 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,507 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,510 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,511 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 17 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 157 [2018-12-02 01:05:30,740 WARN L180 SmtUtils]: Spent 228.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 63 [2018-12-02 01:05:30,747 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,749 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,752 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,757 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,759 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,768 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,793 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,794 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 24 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 175 [2018-12-02 01:05:30,977 WARN L180 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 74 [2018-12-02 01:05:30,982 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,987 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,991 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:30,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,022 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 32 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 198 [2018-12-02 01:05:31,132 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 105 DAG size of output: 87 [2018-12-02 01:05:31,135 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,137 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,139 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,142 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,150 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,152 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 41 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 226 [2018-12-02 01:05:31,162 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 41 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 220 [2018-12-02 01:05:31,163 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:31,236 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:31,311 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:31,385 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:31,462 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:31,549 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:31,626 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:31,714 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:31,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:31,905 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 154 treesize of output 150 [2018-12-02 01:05:32,409 WARN L180 SmtUtils]: Spent 502.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 79 [2018-12-02 01:05:32,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,460 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 145 treesize of output 158 [2018-12-02 01:05:32,653 WARN L180 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 49 [2018-12-02 01:05:32,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,665 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,694 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,701 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,703 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,715 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,715 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 12 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 152 [2018-12-02 01:05:32,920 WARN L180 SmtUtils]: Spent 203.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 56 [2018-12-02 01:05:32,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,964 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,973 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,976 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:32,977 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 18 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 161 [2018-12-02 01:05:33,185 WARN L180 SmtUtils]: Spent 207.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 65 [2018-12-02 01:05:33,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,211 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,215 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,222 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,229 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,237 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,247 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,248 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 25 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 179 [2018-12-02 01:05:33,437 WARN L180 SmtUtils]: Spent 187.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 76 [2018-12-02 01:05:33,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,448 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,455 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,477 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 33 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 202 [2018-12-02 01:05:33,639 WARN L180 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 89 [2018-12-02 01:05:33,645 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,657 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,665 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,668 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:33,669 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 42 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 230 [2018-12-02 01:05:33,678 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 42 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 224 [2018-12-02 01:05:33,679 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:33,751 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:33,824 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:33,898 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:33,972 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:34,052 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:34,138 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:34,271 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,277 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,329 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,341 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,364 INFO L303 Elim1Store]: Index analysis took 102 ms [2018-12-02 01:05:34,396 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 8 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 139 treesize of output 160 [2018-12-02 01:05:34,904 WARN L180 SmtUtils]: Spent 506.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 83 [2018-12-02 01:05:34,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,917 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,928 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,960 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,965 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:34,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,006 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,021 INFO L303 Elim1Store]: Index analysis took 115 ms [2018-12-02 01:05:35,055 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 14 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 123 treesize of output 166 [2018-12-02 01:05:35,616 WARN L180 SmtUtils]: Spent 559.00 ms on a formula simplification. DAG size of input: 105 DAG size of output: 89 [2018-12-02 01:05:35,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,627 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,684 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,699 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,703 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,720 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,728 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:35,728 INFO L303 Elim1Store]: Index analysis took 111 ms [2018-12-02 01:05:35,735 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 21 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 121 treesize of output 179 [2018-12-02 01:05:36,171 WARN L180 SmtUtils]: Spent 434.00 ms on a formula simplification. DAG size of input: 117 DAG size of output: 97 [2018-12-02 01:05:36,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,186 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,207 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,216 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,220 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,231 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,234 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,235 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 23 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 183 [2018-12-02 01:05:36,329 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,331 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,332 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,332 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,336 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,336 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,343 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 194 [2018-12-02 01:05:36,453 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 85 [2018-12-02 01:05:36,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,462 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,466 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,468 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,472 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 222 [2018-12-02 01:05:36,482 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 216 [2018-12-02 01:05:36,483 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:36,552 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:36,621 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:36,700 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:36,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,837 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,838 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,840 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:36,872 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 29 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 126 treesize of output 201 [2018-12-02 01:05:37,499 WARN L180 SmtUtils]: Spent 625.00 ms on a formula simplification. DAG size of input: 131 DAG size of output: 109 [2018-12-02 01:05:37,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,507 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,510 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,512 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,517 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,523 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,528 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,530 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,533 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,540 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,542 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,546 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,567 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:37,592 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 38 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 138 treesize of output 228 [2018-12-02 01:05:38,100 WARN L180 SmtUtils]: Spent 505.00 ms on a formula simplification. DAG size of input: 147 DAG size of output: 121 [2018-12-02 01:05:38,105 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,107 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,107 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,110 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,112 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,115 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,116 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,117 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,118 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,124 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,130 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,130 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,131 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,133 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,139 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,140 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,150 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 48 disjoint index pairs (out of 55 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 157 treesize of output 260 [2018-12-02 01:05:38,167 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 49 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 256 treesize of output 258 [2018-12-02 01:05:38,168 INFO L267 ElimStorePlain]: Start of recursive call 31: End of recursive call: and 2 xjuncts. [2018-12-02 01:05:38,564 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,566 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,567 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,572 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,574 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,574 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,577 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:38,578 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 180 treesize of output 232 [2018-12-02 01:05:38,579 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:38,919 INFO L267 ElimStorePlain]: Start of recursive call 30: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-02 01:05:39,315 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,317 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,320 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,323 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,329 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:39,331 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 155 treesize of output 238 [2018-12-02 01:05:39,340 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 216 [2018-12-02 01:05:39,340 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:39,431 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:39,824 INFO L267 ElimStorePlain]: Start of recursive call 29: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-12-02 01:05:40,278 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,280 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,281 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,285 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,289 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,291 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,293 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,294 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,296 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,298 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,319 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 136 treesize of output 210 [2018-12-02 01:05:40,436 WARN L180 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 111 DAG size of output: 85 [2018-12-02 01:05:40,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,446 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,446 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,448 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:40,459 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 222 [2018-12-02 01:05:40,468 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 216 [2018-12-02 01:05:40,469 INFO L267 ElimStorePlain]: Start of recursive call 37: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:40,548 INFO L267 ElimStorePlain]: Start of recursive call 36: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:40,626 INFO L267 ElimStorePlain]: Start of recursive call 35: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:41,148 INFO L267 ElimStorePlain]: Start of recursive call 28: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-02 01:05:41,911 INFO L267 ElimStorePlain]: Start of recursive call 23: 2 dim-1 vars, End of recursive call: and 6 xjuncts. [2018-12-02 01:05:42,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:42,721 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:42,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:42,746 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:42,750 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:42,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:42,767 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:42,769 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:42,775 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:42,777 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:42,781 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:42,782 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 16 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 165 [2018-12-02 01:05:43,015 WARN L180 SmtUtils]: Spent 232.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 61 [2018-12-02 01:05:43,022 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,024 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,026 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,028 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,031 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,034 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,037 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,045 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,059 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,075 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,078 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,083 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,084 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 23 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 171 [2018-12-02 01:05:43,169 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,170 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,175 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,175 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,176 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,183 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 194 [2018-12-02 01:05:43,293 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 85 [2018-12-02 01:05:43,296 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,297 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,298 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,298 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,301 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,302 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,304 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,309 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:43,310 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 222 [2018-12-02 01:05:43,318 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 216 [2018-12-02 01:05:43,319 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:43,388 INFO L267 ElimStorePlain]: Start of recursive call 41: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:43,456 INFO L267 ElimStorePlain]: Start of recursive call 40: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:43,527 INFO L267 ElimStorePlain]: Start of recursive call 39: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:43,604 INFO L267 ElimStorePlain]: Start of recursive call 38: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:44,515 INFO L267 ElimStorePlain]: Start of recursive call 22: 2 dim-1 vars, End of recursive call: and 7 xjuncts. [2018-12-02 01:05:45,491 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,496 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,517 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,539 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,544 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,548 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,549 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 13 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 133 treesize of output 168 [2018-12-02 01:05:45,747 WARN L180 SmtUtils]: Spent 197.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 58 [2018-12-02 01:05:45,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,758 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,767 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,778 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,781 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,796 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,804 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:45,807 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 19 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 165 [2018-12-02 01:05:46,021 WARN L180 SmtUtils]: Spent 212.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 67 [2018-12-02 01:05:46,027 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,030 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,032 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,035 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,037 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,060 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,068 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,075 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,076 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 26 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 183 [2018-12-02 01:05:46,292 WARN L180 SmtUtils]: Spent 215.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 78 [2018-12-02 01:05:46,297 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,301 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,303 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,304 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,310 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,311 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,312 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,314 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,329 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 34 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 206 [2018-12-02 01:05:46,497 WARN L180 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 91 [2018-12-02 01:05:46,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,503 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,504 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,506 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,507 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,508 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,510 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,515 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,520 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,522 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:46,522 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 43 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 234 [2018-12-02 01:05:46,529 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 43 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 228 [2018-12-02 01:05:46,529 INFO L267 ElimStorePlain]: Start of recursive call 48: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:46,602 INFO L267 ElimStorePlain]: Start of recursive call 47: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:46,676 INFO L267 ElimStorePlain]: Start of recursive call 46: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:46,754 INFO L267 ElimStorePlain]: Start of recursive call 45: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:46,834 INFO L267 ElimStorePlain]: Start of recursive call 44: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:46,919 INFO L267 ElimStorePlain]: Start of recursive call 43: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:47,696 INFO L267 ElimStorePlain]: Start of recursive call 21: 2 dim-1 vars, End of recursive call: and 8 xjuncts. [2018-12-02 01:05:48,778 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-1 vars, End of recursive call: and 9 xjuncts. [2018-12-02 01:05:49,861 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 10 xjuncts. [2018-12-02 01:05:51,172 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 152 [2018-12-02 01:05:51,201 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 133 [2018-12-02 01:05:51,222 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,224 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,229 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,230 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 130 treesize of output 139 [2018-12-02 01:05:51,359 WARN L180 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 44 [2018-12-02 01:05:51,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,387 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,405 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,426 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,436 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 10 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 144 [2018-12-02 01:05:51,628 WARN L180 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 52 [2018-12-02 01:05:51,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,657 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,675 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,679 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,695 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 16 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 153 [2018-12-02 01:05:51,914 WARN L180 SmtUtils]: Spent 217.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 61 [2018-12-02 01:05:51,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,924 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,930 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,957 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:51,976 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 23 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 171 [2018-12-02 01:05:52,175 WARN L180 SmtUtils]: Spent 197.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 72 [2018-12-02 01:05:52,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,199 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,201 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,205 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,226 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,227 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 194 [2018-12-02 01:05:52,381 WARN L180 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 85 [2018-12-02 01:05:52,385 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,387 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,403 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,405 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:52,409 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 222 [2018-12-02 01:05:52,418 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 216 [2018-12-02 01:05:52,419 INFO L267 ElimStorePlain]: Start of recursive call 57: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:52,487 INFO L267 ElimStorePlain]: Start of recursive call 56: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:52,565 INFO L267 ElimStorePlain]: Start of recursive call 55: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:52,636 INFO L267 ElimStorePlain]: Start of recursive call 54: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:52,712 INFO L267 ElimStorePlain]: Start of recursive call 53: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:52,787 INFO L267 ElimStorePlain]: Start of recursive call 52: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:52,864 INFO L267 ElimStorePlain]: Start of recursive call 51: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:52,941 INFO L267 ElimStorePlain]: Start of recursive call 50: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:53,020 INFO L267 ElimStorePlain]: Start of recursive call 49: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:54,116 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 11 xjuncts. [2018-12-02 01:05:55,735 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 11 xjuncts. [2018-12-02 01:05:56,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:56,918 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 25 [2018-12-02 01:05:56,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:56,924 INFO L701 Elim1Store]: detected not equals via solver [2018-12-02 01:05:56,925 INFO L683 Elim1Store]: detected equality via solver [2018-12-02 01:05:56,927 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-12-02 01:05:56,927 INFO L267 ElimStorePlain]: Start of recursive call 59: End of recursive call: and 1 xjuncts. [2018-12-02 01:05:56,936 INFO L267 ElimStorePlain]: Start of recursive call 58: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-02 01:05:57,945 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 90 dim-0 vars, and 11 xjuncts. [2018-12-02 01:05:57,945 INFO L202 ElimStorePlain]: Needed 59 recursive calls to eliminate 11 variables, input treesize:223, output treesize:2528 [2018-12-02 01:06:17,839 WARN L194 Executor]: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000) stderr output: (error "out of memory") [2018-12-02 01:06:18,040 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 01:06:18,042 FATAL L265 ToolchainWalker]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:208) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:225) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.WrapperScript.checkSat(WrapperScript.java:116) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.WrapperScript.checkSat(WrapperScript.java:116) at de.uni_freiburg.informatik.ultimate.logic.Util.checkSat(Util.java:61) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA.getRedundancy(SimplifyDDA.java:626) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.SimplifyDDAWithTimeout.getRedundancy(SimplifyDDAWithTimeout.java:122) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA$Simplifier.walk(SimplifyDDA.java:371) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:122) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:113) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA.simplifyOnce(SimplifyDDA.java:650) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.SimplifyDDAWithTimeout.getSimplifiedTerm(SimplifyDDAWithTimeout.java:187) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.SmtUtils.simplify(SmtUtils.java:151) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:354) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:299) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:575) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:200) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:286) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:232) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:456) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:434) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:334) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:126) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1427) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:630) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:419) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:205) ... 45 more [2018-12-02 01:06:18,049 INFO L168 Benchmark]: Toolchain (without parser) took 100884.73 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 262.7 MB). Free memory was 951.7 MB in the beginning and 853.1 MB in the end (delta: 98.6 MB). Peak memory consumption was 361.3 MB. Max. memory is 11.5 GB. [2018-12-02 01:06:18,050 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 01:06:18,050 INFO L168 Benchmark]: CACSL2BoogieTranslator took 528.64 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 121.1 MB). Free memory was 951.7 MB in the beginning and 1.0 GB in the end (delta: -95.8 MB). Peak memory consumption was 38.8 MB. Max. memory is 11.5 GB. [2018-12-02 01:06:18,050 INFO L168 Benchmark]: Boogie Procedure Inliner took 25.66 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 3.8 MB). Peak memory consumption was 3.8 MB. Max. memory is 11.5 GB. [2018-12-02 01:06:18,050 INFO L168 Benchmark]: Boogie Preprocessor took 34.39 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-02 01:06:18,051 INFO L168 Benchmark]: RCFGBuilder took 343.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 996.0 MB in the end (delta: 45.0 MB). Peak memory consumption was 45.0 MB. Max. memory is 11.5 GB. [2018-12-02 01:06:18,051 INFO L168 Benchmark]: TraceAbstraction took 99949.18 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 141.6 MB). Free memory was 993.4 MB in the beginning and 853.1 MB in the end (delta: 140.3 MB). Peak memory consumption was 281.8 MB. Max. memory is 11.5 GB. [2018-12-02 01:06:18,052 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 528.64 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 121.1 MB). Free memory was 951.7 MB in the beginning and 1.0 GB in the end (delta: -95.8 MB). Peak memory consumption was 38.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 25.66 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 3.8 MB). Peak memory consumption was 3.8 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 34.39 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 343.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 996.0 MB in the end (delta: 45.0 MB). Peak memory consumption was 45.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 99949.18 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 141.6 MB). Free memory was 993.4 MB in the beginning and 853.1 MB in the end (delta: 140.3 MB). Peak memory consumption was 281.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:208) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request...