./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0565341d48a13ae8e32e38d25cc35ee0d392a001 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-02 02:43:22,742 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 02:43:22,743 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 02:43:22,749 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-02 02:43:22,749 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-02 02:43:22,750 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-02 02:43:22,750 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-02 02:43:22,751 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-02 02:43:22,752 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-02 02:43:22,752 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-02 02:43:22,753 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-02 02:43:22,753 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 02:43:22,753 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 02:43:22,754 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 02:43:22,754 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 02:43:22,755 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 02:43:22,755 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 02:43:22,756 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 02:43:22,757 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 02:43:22,757 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 02:43:22,758 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 02:43:22,759 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 02:43:22,760 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 02:43:22,760 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 02:43:22,760 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 02:43:22,760 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 02:43:22,761 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 02:43:22,761 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 02:43:22,762 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 02:43:22,762 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 02:43:22,762 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 02:43:22,763 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 02:43:22,763 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 02:43:22,763 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 02:43:22,763 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 02:43:22,764 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 02:43:22,764 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-12-02 02:43:22,771 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 02:43:22,771 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 02:43:22,771 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 02:43:22,772 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 02:43:22,772 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-02 02:43:22,772 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-02 02:43:22,772 INFO L133 SettingsManager]: * Use SBE=true [2018-12-02 02:43:22,772 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 02:43:22,772 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-02 02:43:22,772 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-02 02:43:22,773 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-02 02:43:22,773 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 02:43:22,773 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-02 02:43:22,773 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 02:43:22,773 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-02 02:43:22,773 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-02 02:43:22,773 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-02 02:43:22,773 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-02 02:43:22,773 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-02 02:43:22,773 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 02:43:22,773 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 02:43:22,774 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 02:43:22,774 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 02:43:22,774 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 02:43:22,774 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 02:43:22,774 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 02:43:22,774 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-02 02:43:22,774 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-02 02:43:22,774 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 02:43:22,774 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-02 02:43:22,774 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0565341d48a13ae8e32e38d25cc35ee0d392a001 [2018-12-02 02:43:22,792 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 02:43:22,801 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 02:43:22,804 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 02:43:22,805 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 02:43:22,806 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 02:43:22,806 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i [2018-12-02 02:43:22,847 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer/data/0aa67d795/25e3934479304351aaed7450d9bf392c/FLAG5c3251dae [2018-12-02 02:43:23,289 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 02:43:23,290 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i [2018-12-02 02:43:23,299 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer/data/0aa67d795/25e3934479304351aaed7450d9bf392c/FLAG5c3251dae [2018-12-02 02:43:23,308 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer/data/0aa67d795/25e3934479304351aaed7450d9bf392c [2018-12-02 02:43:23,310 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 02:43:23,311 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-02 02:43:23,312 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 02:43:23,312 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 02:43:23,314 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 02:43:23,315 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 02:43:23" (1/1) ... [2018-12-02 02:43:23,316 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@10370d22 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:43:23, skipping insertion in model container [2018-12-02 02:43:23,316 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 02:43:23" (1/1) ... [2018-12-02 02:43:23,321 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 02:43:23,349 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 02:43:23,554 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 02:43:23,562 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 02:43:23,636 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 02:43:23,667 INFO L195 MainTranslator]: Completed translation [2018-12-02 02:43:23,667 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:43:23 WrapperNode [2018-12-02 02:43:23,667 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 02:43:23,668 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-02 02:43:23,668 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-02 02:43:23,668 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-02 02:43:23,673 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:43:23" (1/1) ... [2018-12-02 02:43:23,684 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:43:23" (1/1) ... [2018-12-02 02:43:23,699 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-02 02:43:23,699 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 02:43:23,699 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 02:43:23,699 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 02:43:23,705 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:43:23" (1/1) ... [2018-12-02 02:43:23,705 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:43:23" (1/1) ... [2018-12-02 02:43:23,708 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:43:23" (1/1) ... [2018-12-02 02:43:23,708 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:43:23" (1/1) ... [2018-12-02 02:43:23,714 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:43:23" (1/1) ... [2018-12-02 02:43:23,717 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:43:23" (1/1) ... [2018-12-02 02:43:23,718 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:43:23" (1/1) ... [2018-12-02 02:43:23,721 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 02:43:23,721 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 02:43:23,721 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 02:43:23,721 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 02:43:23,721 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:43:23" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 02:43:23,753 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-02 02:43:23,753 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-02 02:43:23,753 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-02 02:43:23,753 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-12-02 02:43:23,753 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-02 02:43:23,753 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-12-02 02:43:23,754 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-12-02 02:43:23,754 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-12-02 02:43:23,754 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-12-02 02:43:23,754 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-12-02 02:43:23,754 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-12-02 02:43:23,754 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-02 02:43:23,754 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-12-02 02:43:23,754 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 02:43:23,754 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 02:43:23,755 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-12-02 02:43:24,131 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 02:43:24,131 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-12-02 02:43:24,131 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 02:43:24 BoogieIcfgContainer [2018-12-02 02:43:24,131 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 02:43:24,132 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 02:43:24,132 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 02:43:24,134 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 02:43:24,134 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 02:43:23" (1/3) ... [2018-12-02 02:43:24,135 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@572e0328 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 02:43:24, skipping insertion in model container [2018-12-02 02:43:24,135 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 02:43:23" (2/3) ... [2018-12-02 02:43:24,135 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@572e0328 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 02:43:24, skipping insertion in model container [2018-12-02 02:43:24,135 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 02:43:24" (3/3) ... [2018-12-02 02:43:24,137 INFO L112 eAbstractionObserver]: Analyzing ICFG thin001_power.opt_false-unreach-call.i [2018-12-02 02:43:24,171 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,171 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,171 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,172 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,172 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,172 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,172 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,172 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,172 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,172 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,173 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,173 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,173 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,173 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,173 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,173 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,173 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,174 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,174 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,174 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,174 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,174 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,174 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,174 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,175 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,175 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,175 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,175 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,175 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,175 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,175 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,176 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,176 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,176 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,176 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,176 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,176 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,176 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,176 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,177 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,177 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,177 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,177 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,177 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,177 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,178 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,178 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,178 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,178 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,178 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,179 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,179 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,179 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,179 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,179 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,179 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,179 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,180 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,180 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,180 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,180 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,180 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,180 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,180 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,180 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,180 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,181 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,181 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,181 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,181 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,181 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,181 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,181 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,182 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,182 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,182 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,182 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,182 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,182 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,182 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,182 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,182 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,182 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,183 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,183 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,183 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,183 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,183 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,183 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,183 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,183 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,184 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,184 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,184 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,184 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,184 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,184 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,184 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,184 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,184 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,185 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,185 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,185 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,185 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,185 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,185 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,185 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,185 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,185 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,186 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,186 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,186 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,186 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,186 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,186 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,186 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,187 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,187 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,187 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,187 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,187 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,187 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,187 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,188 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,188 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,188 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,188 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,188 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,188 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,188 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,188 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,189 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,189 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,189 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,189 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,189 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,189 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,189 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,190 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,190 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,190 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,190 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,190 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,190 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,190 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,190 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,191 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,191 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,191 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,191 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,191 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,191 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,191 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,192 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,192 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,192 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,192 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,192 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,192 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,193 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,193 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,193 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,193 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,193 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,193 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,194 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,194 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,194 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,194 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,194 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,194 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,195 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,195 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,195 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,195 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,195 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,196 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,196 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,196 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,196 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,196 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,196 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,196 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,196 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,196 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,197 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,197 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,197 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,197 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,197 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,197 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,197 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,198 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,198 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,198 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,198 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,198 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,198 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,198 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,198 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,198 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,199 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,199 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,199 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,199 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,199 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,199 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,199 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,200 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,200 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,200 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,200 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,200 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,200 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,200 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,200 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,200 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,201 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,201 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,201 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,201 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,201 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,201 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,201 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,201 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,202 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,202 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,202 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,202 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,202 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,202 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,203 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,203 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,203 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,203 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,203 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,203 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,203 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,203 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,203 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 02:43:24,219 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-12-02 02:43:24,219 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 02:43:24,226 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-12-02 02:43:24,240 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-12-02 02:43:24,258 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-02 02:43:24,259 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 02:43:24,259 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-02 02:43:24,259 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 02:43:24,259 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 02:43:24,259 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 02:43:24,259 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 02:43:24,260 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 02:43:24,260 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 02:43:24,269 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 217places, 275 transitions [2018-12-02 02:44:49,486 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 346782 states. [2018-12-02 02:44:49,487 INFO L276 IsEmpty]: Start isEmpty. Operand 346782 states. [2018-12-02 02:44:49,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-12-02 02:44:49,492 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:44:49,493 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:44:49,494 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:44:49,498 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:44:49,498 INFO L82 PathProgramCache]: Analyzing trace with hash -1575025892, now seen corresponding path program 1 times [2018-12-02 02:44:49,499 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:44:49,499 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:44:49,534 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:44:49,534 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:44:49,534 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:44:49,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:44:49,644 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:44:49,646 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:44:49,646 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 02:44:49,648 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 02:44:49,656 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 02:44:49,656 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 02:44:49,658 INFO L87 Difference]: Start difference. First operand 346782 states. Second operand 4 states. [2018-12-02 02:44:54,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:44:54,576 INFO L93 Difference]: Finished difference Result 604682 states and 2849651 transitions. [2018-12-02 02:44:54,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 02:44:54,577 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2018-12-02 02:44:54,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:44:56,119 INFO L225 Difference]: With dead ends: 604682 [2018-12-02 02:44:56,119 INFO L226 Difference]: Without dead ends: 434932 [2018-12-02 02:44:56,120 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 02:45:03,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434932 states. [2018-12-02 02:45:08,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434932 to 269012. [2018-12-02 02:45:08,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269012 states. [2018-12-02 02:45:09,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269012 states to 269012 states and 1271315 transitions. [2018-12-02 02:45:09,389 INFO L78 Accepts]: Start accepts. Automaton has 269012 states and 1271315 transitions. Word has length 59 [2018-12-02 02:45:09,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:09,390 INFO L480 AbstractCegarLoop]: Abstraction has 269012 states and 1271315 transitions. [2018-12-02 02:45:09,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 02:45:09,390 INFO L276 IsEmpty]: Start isEmpty. Operand 269012 states and 1271315 transitions. [2018-12-02 02:45:09,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-02 02:45:09,404 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:09,404 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:09,405 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:09,405 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:09,405 INFO L82 PathProgramCache]: Analyzing trace with hash -1682673917, now seen corresponding path program 1 times [2018-12-02 02:45:09,405 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:09,405 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:09,409 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:09,409 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:09,410 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:09,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:09,495 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:09,496 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:09,496 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 02:45:09,497 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 02:45:09,497 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 02:45:09,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 02:45:09,497 INFO L87 Difference]: Start difference. First operand 269012 states and 1271315 transitions. Second operand 4 states. [2018-12-02 02:45:11,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:11,278 INFO L93 Difference]: Finished difference Result 237806 states and 1098321 transitions. [2018-12-02 02:45:11,278 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 02:45:11,279 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 71 [2018-12-02 02:45:11,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:11,887 INFO L225 Difference]: With dead ends: 237806 [2018-12-02 02:45:11,887 INFO L226 Difference]: Without dead ends: 229076 [2018-12-02 02:45:11,888 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:45:13,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229076 states. [2018-12-02 02:45:19,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229076 to 229076. [2018-12-02 02:45:19,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 229076 states. [2018-12-02 02:45:20,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 229076 states to 229076 states and 1065775 transitions. [2018-12-02 02:45:20,619 INFO L78 Accepts]: Start accepts. Automaton has 229076 states and 1065775 transitions. Word has length 71 [2018-12-02 02:45:20,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:20,620 INFO L480 AbstractCegarLoop]: Abstraction has 229076 states and 1065775 transitions. [2018-12-02 02:45:20,620 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 02:45:20,620 INFO L276 IsEmpty]: Start isEmpty. Operand 229076 states and 1065775 transitions. [2018-12-02 02:45:20,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 02:45:20,626 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:20,626 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:20,626 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:20,627 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:20,627 INFO L82 PathProgramCache]: Analyzing trace with hash 112998639, now seen corresponding path program 1 times [2018-12-02 02:45:20,627 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:20,627 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:20,628 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:20,628 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:20,628 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:20,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:20,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:20,669 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:20,669 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 02:45:20,669 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 02:45:20,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 02:45:20,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:45:20,669 INFO L87 Difference]: Start difference. First operand 229076 states and 1065775 transitions. Second operand 5 states. [2018-12-02 02:45:20,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:20,939 INFO L93 Difference]: Finished difference Result 62964 states and 259111 transitions. [2018-12-02 02:45:20,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 02:45:20,940 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-12-02 02:45:20,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:21,080 INFO L225 Difference]: With dead ends: 62964 [2018-12-02 02:45:21,080 INFO L226 Difference]: Without dead ends: 55536 [2018-12-02 02:45:21,081 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-02 02:45:21,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55536 states. [2018-12-02 02:45:21,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55536 to 54660. [2018-12-02 02:45:21,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54660 states. [2018-12-02 02:45:21,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54660 states to 54660 states and 224891 transitions. [2018-12-02 02:45:21,904 INFO L78 Accepts]: Start accepts. Automaton has 54660 states and 224891 transitions. Word has length 72 [2018-12-02 02:45:21,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:21,905 INFO L480 AbstractCegarLoop]: Abstraction has 54660 states and 224891 transitions. [2018-12-02 02:45:21,905 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 02:45:21,905 INFO L276 IsEmpty]: Start isEmpty. Operand 54660 states and 224891 transitions. [2018-12-02 02:45:21,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 02:45:21,907 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:21,907 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:21,907 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:21,907 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:21,908 INFO L82 PathProgramCache]: Analyzing trace with hash -1640714172, now seen corresponding path program 1 times [2018-12-02 02:45:21,908 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:21,908 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:21,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:21,909 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:21,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:21,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:21,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:21,977 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:21,977 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 02:45:21,977 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 02:45:21,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 02:45:21,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-02 02:45:21,978 INFO L87 Difference]: Start difference. First operand 54660 states and 224891 transitions. Second operand 6 states. [2018-12-02 02:45:23,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:23,032 INFO L93 Difference]: Finished difference Result 117028 states and 470836 transitions. [2018-12-02 02:45:23,033 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 02:45:23,033 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-12-02 02:45:23,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:23,283 INFO L225 Difference]: With dead ends: 117028 [2018-12-02 02:45:23,283 INFO L226 Difference]: Without dead ends: 116528 [2018-12-02 02:45:23,283 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-12-02 02:45:23,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116528 states. [2018-12-02 02:45:24,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116528 to 70499. [2018-12-02 02:45:24,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70499 states. [2018-12-02 02:45:24,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70499 states to 70499 states and 284728 transitions. [2018-12-02 02:45:24,896 INFO L78 Accepts]: Start accepts. Automaton has 70499 states and 284728 transitions. Word has length 72 [2018-12-02 02:45:24,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:24,896 INFO L480 AbstractCegarLoop]: Abstraction has 70499 states and 284728 transitions. [2018-12-02 02:45:24,896 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 02:45:24,896 INFO L276 IsEmpty]: Start isEmpty. Operand 70499 states and 284728 transitions. [2018-12-02 02:45:24,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-02 02:45:24,900 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:24,900 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:24,900 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:24,900 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:24,900 INFO L82 PathProgramCache]: Analyzing trace with hash 523567789, now seen corresponding path program 1 times [2018-12-02 02:45:24,900 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:24,900 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:24,901 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:24,901 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:24,901 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:24,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:24,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:24,923 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:24,923 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 02:45:24,923 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 02:45:24,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 02:45:24,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 02:45:24,924 INFO L87 Difference]: Start difference. First operand 70499 states and 284728 transitions. Second operand 3 states. [2018-12-02 02:45:25,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:25,326 INFO L93 Difference]: Finished difference Result 99897 states and 398052 transitions. [2018-12-02 02:45:25,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 02:45:25,327 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 74 [2018-12-02 02:45:25,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:25,544 INFO L225 Difference]: With dead ends: 99897 [2018-12-02 02:45:25,544 INFO L226 Difference]: Without dead ends: 99897 [2018-12-02 02:45:25,544 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 02:45:25,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99897 states. [2018-12-02 02:45:28,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99897 to 78575. [2018-12-02 02:45:28,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78575 states. [2018-12-02 02:45:28,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78575 states to 78575 states and 313492 transitions. [2018-12-02 02:45:28,674 INFO L78 Accepts]: Start accepts. Automaton has 78575 states and 313492 transitions. Word has length 74 [2018-12-02 02:45:28,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:28,674 INFO L480 AbstractCegarLoop]: Abstraction has 78575 states and 313492 transitions. [2018-12-02 02:45:28,674 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 02:45:28,674 INFO L276 IsEmpty]: Start isEmpty. Operand 78575 states and 313492 transitions. [2018-12-02 02:45:28,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-02 02:45:28,680 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:28,681 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:28,681 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:28,681 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:28,681 INFO L82 PathProgramCache]: Analyzing trace with hash -690257246, now seen corresponding path program 1 times [2018-12-02 02:45:28,681 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:28,681 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:28,683 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:28,683 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:28,683 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:28,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:28,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:28,770 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:28,770 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 02:45:28,770 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 02:45:28,770 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 02:45:28,770 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-02 02:45:28,771 INFO L87 Difference]: Start difference. First operand 78575 states and 313492 transitions. Second operand 7 states. [2018-12-02 02:45:29,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:29,646 INFO L93 Difference]: Finished difference Result 104973 states and 415691 transitions. [2018-12-02 02:45:29,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-02 02:45:29,647 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 78 [2018-12-02 02:45:29,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:29,872 INFO L225 Difference]: With dead ends: 104973 [2018-12-02 02:45:29,872 INFO L226 Difference]: Without dead ends: 104443 [2018-12-02 02:45:29,873 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2018-12-02 02:45:30,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104443 states. [2018-12-02 02:45:31,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104443 to 78092. [2018-12-02 02:45:31,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78092 states. [2018-12-02 02:45:31,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78092 states to 78092 states and 312344 transitions. [2018-12-02 02:45:31,295 INFO L78 Accepts]: Start accepts. Automaton has 78092 states and 312344 transitions. Word has length 78 [2018-12-02 02:45:31,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:31,295 INFO L480 AbstractCegarLoop]: Abstraction has 78092 states and 312344 transitions. [2018-12-02 02:45:31,295 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 02:45:31,295 INFO L276 IsEmpty]: Start isEmpty. Operand 78092 states and 312344 transitions. [2018-12-02 02:45:31,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-02 02:45:31,312 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:31,313 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:31,313 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:31,313 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:31,313 INFO L82 PathProgramCache]: Analyzing trace with hash 1434670274, now seen corresponding path program 1 times [2018-12-02 02:45:31,313 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:31,313 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:31,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:31,314 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:31,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:31,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:31,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:31,343 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:31,344 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 02:45:31,344 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 02:45:31,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 02:45:31,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 02:45:31,344 INFO L87 Difference]: Start difference. First operand 78092 states and 312344 transitions. Second operand 4 states. [2018-12-02 02:45:31,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:31,745 INFO L93 Difference]: Finished difference Result 85627 states and 342574 transitions. [2018-12-02 02:45:31,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 02:45:31,746 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 86 [2018-12-02 02:45:31,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:31,921 INFO L225 Difference]: With dead ends: 85627 [2018-12-02 02:45:31,921 INFO L226 Difference]: Without dead ends: 85627 [2018-12-02 02:45:31,921 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:45:32,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85627 states. [2018-12-02 02:45:33,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85627 to 80612. [2018-12-02 02:45:33,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80612 states. [2018-12-02 02:45:33,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80612 states to 80612 states and 322364 transitions. [2018-12-02 02:45:33,304 INFO L78 Accepts]: Start accepts. Automaton has 80612 states and 322364 transitions. Word has length 86 [2018-12-02 02:45:33,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:33,305 INFO L480 AbstractCegarLoop]: Abstraction has 80612 states and 322364 transitions. [2018-12-02 02:45:33,305 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 02:45:33,305 INFO L276 IsEmpty]: Start isEmpty. Operand 80612 states and 322364 transitions. [2018-12-02 02:45:33,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-02 02:45:33,322 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:33,322 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:33,322 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:33,323 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:33,323 INFO L82 PathProgramCache]: Analyzing trace with hash -1117486687, now seen corresponding path program 1 times [2018-12-02 02:45:33,323 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:33,323 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:33,324 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:33,324 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:33,324 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:33,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:33,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:33,475 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:33,475 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 02:45:33,476 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 02:45:33,476 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 02:45:33,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-12-02 02:45:33,476 INFO L87 Difference]: Start difference. First operand 80612 states and 322364 transitions. Second operand 10 states. [2018-12-02 02:45:34,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:34,533 INFO L93 Difference]: Finished difference Result 111736 states and 437776 transitions. [2018-12-02 02:45:34,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-02 02:45:34,533 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 86 [2018-12-02 02:45:34,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:34,779 INFO L225 Difference]: With dead ends: 111736 [2018-12-02 02:45:34,779 INFO L226 Difference]: Without dead ends: 111381 [2018-12-02 02:45:34,780 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=136, Invalid=370, Unknown=0, NotChecked=0, Total=506 [2018-12-02 02:45:35,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111381 states. [2018-12-02 02:45:36,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111381 to 91754. [2018-12-02 02:45:36,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91754 states. [2018-12-02 02:45:36,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91754 states to 91754 states and 363901 transitions. [2018-12-02 02:45:36,382 INFO L78 Accepts]: Start accepts. Automaton has 91754 states and 363901 transitions. Word has length 86 [2018-12-02 02:45:36,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:36,382 INFO L480 AbstractCegarLoop]: Abstraction has 91754 states and 363901 transitions. [2018-12-02 02:45:36,383 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 02:45:36,383 INFO L276 IsEmpty]: Start isEmpty. Operand 91754 states and 363901 transitions. [2018-12-02 02:45:36,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-02 02:45:36,421 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:36,421 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:36,421 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:36,421 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:36,421 INFO L82 PathProgramCache]: Analyzing trace with hash -683354241, now seen corresponding path program 1 times [2018-12-02 02:45:36,421 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:36,422 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:36,423 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:36,423 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:36,423 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:36,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:36,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:36,446 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:36,446 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 02:45:36,447 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 02:45:36,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 02:45:36,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 02:45:36,447 INFO L87 Difference]: Start difference. First operand 91754 states and 363901 transitions. Second operand 3 states. [2018-12-02 02:45:37,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:37,036 INFO L93 Difference]: Finished difference Result 110538 states and 435126 transitions. [2018-12-02 02:45:37,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 02:45:37,037 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 92 [2018-12-02 02:45:37,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:37,281 INFO L225 Difference]: With dead ends: 110538 [2018-12-02 02:45:37,281 INFO L226 Difference]: Without dead ends: 110538 [2018-12-02 02:45:37,281 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 02:45:37,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110538 states. [2018-12-02 02:45:38,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110538 to 89632. [2018-12-02 02:45:38,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89632 states. [2018-12-02 02:45:38,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89632 states to 89632 states and 351874 transitions. [2018-12-02 02:45:38,717 INFO L78 Accepts]: Start accepts. Automaton has 89632 states and 351874 transitions. Word has length 92 [2018-12-02 02:45:38,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:38,717 INFO L480 AbstractCegarLoop]: Abstraction has 89632 states and 351874 transitions. [2018-12-02 02:45:38,717 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 02:45:38,717 INFO L276 IsEmpty]: Start isEmpty. Operand 89632 states and 351874 transitions. [2018-12-02 02:45:38,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-12-02 02:45:38,751 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:38,752 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:38,752 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:38,752 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:38,752 INFO L82 PathProgramCache]: Analyzing trace with hash 1266677969, now seen corresponding path program 1 times [2018-12-02 02:45:38,752 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:38,752 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:38,753 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:38,753 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:38,753 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:38,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:38,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:38,791 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:38,791 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 02:45:38,791 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 02:45:38,791 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 02:45:38,791 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 02:45:38,791 INFO L87 Difference]: Start difference. First operand 89632 states and 351874 transitions. Second operand 4 states. [2018-12-02 02:45:39,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:39,573 INFO L93 Difference]: Finished difference Result 119085 states and 458214 transitions. [2018-12-02 02:45:39,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 02:45:39,574 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2018-12-02 02:45:39,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:39,835 INFO L225 Difference]: With dead ends: 119085 [2018-12-02 02:45:39,835 INFO L226 Difference]: Without dead ends: 119085 [2018-12-02 02:45:39,836 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 02:45:40,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119085 states. [2018-12-02 02:45:41,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119085 to 103759. [2018-12-02 02:45:41,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103759 states. [2018-12-02 02:45:41,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103759 states to 103759 states and 402755 transitions. [2018-12-02 02:45:41,686 INFO L78 Accepts]: Start accepts. Automaton has 103759 states and 402755 transitions. Word has length 93 [2018-12-02 02:45:41,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:41,686 INFO L480 AbstractCegarLoop]: Abstraction has 103759 states and 402755 transitions. [2018-12-02 02:45:41,686 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 02:45:41,686 INFO L276 IsEmpty]: Start isEmpty. Operand 103759 states and 402755 transitions. [2018-12-02 02:45:41,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-12-02 02:45:41,739 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:41,739 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:41,739 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:41,739 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:41,739 INFO L82 PathProgramCache]: Analyzing trace with hash 1277994096, now seen corresponding path program 1 times [2018-12-02 02:45:41,739 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:41,739 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:41,740 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:41,740 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:41,740 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:41,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:41,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:41,770 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:41,770 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 02:45:41,770 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 02:45:41,770 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 02:45:41,770 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 02:45:41,770 INFO L87 Difference]: Start difference. First operand 103759 states and 402755 transitions. Second operand 3 states. [2018-12-02 02:45:42,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:42,294 INFO L93 Difference]: Finished difference Result 107236 states and 414613 transitions. [2018-12-02 02:45:42,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 02:45:42,295 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 93 [2018-12-02 02:45:42,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:42,521 INFO L225 Difference]: With dead ends: 107236 [2018-12-02 02:45:42,521 INFO L226 Difference]: Without dead ends: 107236 [2018-12-02 02:45:42,521 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 02:45:42,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107236 states. [2018-12-02 02:45:43,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107236 to 106055. [2018-12-02 02:45:43,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106055 states. [2018-12-02 02:45:44,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106055 states to 106055 states and 410410 transitions. [2018-12-02 02:45:44,238 INFO L78 Accepts]: Start accepts. Automaton has 106055 states and 410410 transitions. Word has length 93 [2018-12-02 02:45:44,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:44,238 INFO L480 AbstractCegarLoop]: Abstraction has 106055 states and 410410 transitions. [2018-12-02 02:45:44,238 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 02:45:44,238 INFO L276 IsEmpty]: Start isEmpty. Operand 106055 states and 410410 transitions. [2018-12-02 02:45:44,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 02:45:44,288 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:44,288 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:44,288 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:44,288 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:44,288 INFO L82 PathProgramCache]: Analyzing trace with hash -135831755, now seen corresponding path program 1 times [2018-12-02 02:45:44,289 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:44,289 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:44,290 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:44,290 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:44,290 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:44,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:44,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:44,358 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:44,359 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 02:45:44,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 02:45:44,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 02:45:44,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 02:45:44,359 INFO L87 Difference]: Start difference. First operand 106055 states and 410410 transitions. Second operand 6 states. [2018-12-02 02:45:45,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:45,625 INFO L93 Difference]: Finished difference Result 138332 states and 525656 transitions. [2018-12-02 02:45:45,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 02:45:45,625 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-02 02:45:45,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:45,907 INFO L225 Difference]: With dead ends: 138332 [2018-12-02 02:45:45,907 INFO L226 Difference]: Without dead ends: 137832 [2018-12-02 02:45:45,908 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-02 02:45:46,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137832 states. [2018-12-02 02:45:47,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137832 to 118845. [2018-12-02 02:45:47,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118845 states. [2018-12-02 02:45:47,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118845 states to 118845 states and 455877 transitions. [2018-12-02 02:45:47,937 INFO L78 Accepts]: Start accepts. Automaton has 118845 states and 455877 transitions. Word has length 95 [2018-12-02 02:45:47,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:47,937 INFO L480 AbstractCegarLoop]: Abstraction has 118845 states and 455877 transitions. [2018-12-02 02:45:47,937 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 02:45:47,937 INFO L276 IsEmpty]: Start isEmpty. Operand 118845 states and 455877 transitions. [2018-12-02 02:45:47,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 02:45:47,991 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:47,992 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:47,992 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:47,992 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:47,992 INFO L82 PathProgramCache]: Analyzing trace with hash -124515628, now seen corresponding path program 1 times [2018-12-02 02:45:47,992 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:47,992 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:47,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:47,993 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:47,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:47,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:48,062 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:48,062 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:48,062 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 02:45:48,062 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 02:45:48,063 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 02:45:48,063 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-02 02:45:48,063 INFO L87 Difference]: Start difference. First operand 118845 states and 455877 transitions. Second operand 6 states. [2018-12-02 02:45:49,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:49,016 INFO L93 Difference]: Finished difference Result 133218 states and 498309 transitions. [2018-12-02 02:45:49,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 02:45:49,017 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-02 02:45:49,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:49,292 INFO L225 Difference]: With dead ends: 133218 [2018-12-02 02:45:49,293 INFO L226 Difference]: Without dead ends: 133218 [2018-12-02 02:45:49,293 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-12-02 02:45:49,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133218 states. [2018-12-02 02:45:50,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133218 to 121746. [2018-12-02 02:45:50,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121746 states. [2018-12-02 02:45:51,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121746 states to 121746 states and 460619 transitions. [2018-12-02 02:45:51,478 INFO L78 Accepts]: Start accepts. Automaton has 121746 states and 460619 transitions. Word has length 95 [2018-12-02 02:45:51,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:51,478 INFO L480 AbstractCegarLoop]: Abstraction has 121746 states and 460619 transitions. [2018-12-02 02:45:51,478 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 02:45:51,478 INFO L276 IsEmpty]: Start isEmpty. Operand 121746 states and 460619 transitions. [2018-12-02 02:45:51,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 02:45:51,527 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:51,527 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:51,527 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:51,528 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:51,528 INFO L82 PathProgramCache]: Analyzing trace with hash -93495821, now seen corresponding path program 1 times [2018-12-02 02:45:51,528 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:51,528 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:51,529 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:51,529 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:51,529 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:51,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:51,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:51,567 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:51,567 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 02:45:51,567 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 02:45:51,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 02:45:51,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:45:51,568 INFO L87 Difference]: Start difference. First operand 121746 states and 460619 transitions. Second operand 5 states. [2018-12-02 02:45:52,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:52,344 INFO L93 Difference]: Finished difference Result 151316 states and 564452 transitions. [2018-12-02 02:45:52,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 02:45:52,345 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-12-02 02:45:52,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:52,647 INFO L225 Difference]: With dead ends: 151316 [2018-12-02 02:45:52,647 INFO L226 Difference]: Without dead ends: 151316 [2018-12-02 02:45:52,647 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-02 02:45:52,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151316 states. [2018-12-02 02:45:54,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151316 to 140748. [2018-12-02 02:45:54,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140748 states. [2018-12-02 02:45:54,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140748 states to 140748 states and 524720 transitions. [2018-12-02 02:45:54,903 INFO L78 Accepts]: Start accepts. Automaton has 140748 states and 524720 transitions. Word has length 95 [2018-12-02 02:45:54,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:54,904 INFO L480 AbstractCegarLoop]: Abstraction has 140748 states and 524720 transitions. [2018-12-02 02:45:54,904 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 02:45:54,904 INFO L276 IsEmpty]: Start isEmpty. Operand 140748 states and 524720 transitions. [2018-12-02 02:45:54,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 02:45:54,966 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:54,966 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:54,967 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:54,967 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:54,967 INFO L82 PathProgramCache]: Analyzing trace with hash -1090568174, now seen corresponding path program 1 times [2018-12-02 02:45:54,967 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:54,967 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:54,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:54,968 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:54,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:54,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:55,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:55,014 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:55,014 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 02:45:55,014 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 02:45:55,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 02:45:55,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:45:55,015 INFO L87 Difference]: Start difference. First operand 140748 states and 524720 transitions. Second operand 5 states. [2018-12-02 02:45:56,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:45:56,104 INFO L93 Difference]: Finished difference Result 206315 states and 766646 transitions. [2018-12-02 02:45:56,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 02:45:56,104 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-12-02 02:45:56,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:45:56,847 INFO L225 Difference]: With dead ends: 206315 [2018-12-02 02:45:56,847 INFO L226 Difference]: Without dead ends: 206315 [2018-12-02 02:45:56,847 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-02 02:45:57,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206315 states. [2018-12-02 02:45:59,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206315 to 175062. [2018-12-02 02:45:59,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175062 states. [2018-12-02 02:45:59,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175062 states to 175062 states and 650421 transitions. [2018-12-02 02:45:59,745 INFO L78 Accepts]: Start accepts. Automaton has 175062 states and 650421 transitions. Word has length 95 [2018-12-02 02:45:59,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:45:59,745 INFO L480 AbstractCegarLoop]: Abstraction has 175062 states and 650421 transitions. [2018-12-02 02:45:59,745 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 02:45:59,745 INFO L276 IsEmpty]: Start isEmpty. Operand 175062 states and 650421 transitions. [2018-12-02 02:45:59,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 02:45:59,817 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:45:59,817 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:45:59,818 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:45:59,818 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:45:59,818 INFO L82 PathProgramCache]: Analyzing trace with hash 1407447763, now seen corresponding path program 1 times [2018-12-02 02:45:59,818 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:45:59,818 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:45:59,819 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:59,819 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:45:59,819 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:45:59,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:45:59,859 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:45:59,859 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:45:59,859 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 02:45:59,859 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 02:45:59,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 02:45:59,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 02:45:59,859 INFO L87 Difference]: Start difference. First operand 175062 states and 650421 transitions. Second operand 6 states. [2018-12-02 02:46:00,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:00,046 INFO L93 Difference]: Finished difference Result 54182 states and 168525 transitions. [2018-12-02 02:46:00,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 02:46:00,047 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-02 02:46:00,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:00,103 INFO L225 Difference]: With dead ends: 54182 [2018-12-02 02:46:00,103 INFO L226 Difference]: Without dead ends: 44774 [2018-12-02 02:46:00,103 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-02 02:46:00,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44774 states. [2018-12-02 02:46:00,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44774 to 38449. [2018-12-02 02:46:00,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38449 states. [2018-12-02 02:46:00,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38449 states to 38449 states and 117604 transitions. [2018-12-02 02:46:00,566 INFO L78 Accepts]: Start accepts. Automaton has 38449 states and 117604 transitions. Word has length 95 [2018-12-02 02:46:00,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:00,566 INFO L480 AbstractCegarLoop]: Abstraction has 38449 states and 117604 transitions. [2018-12-02 02:46:00,566 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 02:46:00,566 INFO L276 IsEmpty]: Start isEmpty. Operand 38449 states and 117604 transitions. [2018-12-02 02:46:00,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-02 02:46:00,591 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:00,591 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:00,592 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:00,592 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:00,592 INFO L82 PathProgramCache]: Analyzing trace with hash 3877787, now seen corresponding path program 1 times [2018-12-02 02:46:00,592 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:00,592 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:00,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:00,593 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:00,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:00,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:00,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:00,631 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:00,631 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 02:46:00,631 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 02:46:00,631 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 02:46:00,631 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:46:00,631 INFO L87 Difference]: Start difference. First operand 38449 states and 117604 transitions. Second operand 5 states. [2018-12-02 02:46:00,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:00,845 INFO L93 Difference]: Finished difference Result 43859 states and 134447 transitions. [2018-12-02 02:46:00,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 02:46:00,845 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-12-02 02:46:00,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:00,893 INFO L225 Difference]: With dead ends: 43859 [2018-12-02 02:46:00,893 INFO L226 Difference]: Without dead ends: 43859 [2018-12-02 02:46:00,894 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-02 02:46:00,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43859 states. [2018-12-02 02:46:01,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43859 to 38564. [2018-12-02 02:46:01,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38564 states. [2018-12-02 02:46:01,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38564 states to 38564 states and 117926 transitions. [2018-12-02 02:46:01,316 INFO L78 Accepts]: Start accepts. Automaton has 38564 states and 117926 transitions. Word has length 98 [2018-12-02 02:46:01,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:01,316 INFO L480 AbstractCegarLoop]: Abstraction has 38564 states and 117926 transitions. [2018-12-02 02:46:01,316 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 02:46:01,317 INFO L276 IsEmpty]: Start isEmpty. Operand 38564 states and 117926 transitions. [2018-12-02 02:46:01,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-02 02:46:01,343 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:01,344 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:01,344 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:01,344 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:01,344 INFO L82 PathProgramCache]: Analyzing trace with hash 1746688122, now seen corresponding path program 1 times [2018-12-02 02:46:01,344 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:01,344 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:01,345 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:01,345 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:01,345 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:01,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:01,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:01,410 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:01,410 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 02:46:01,410 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 02:46:01,410 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 02:46:01,410 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:46:01,410 INFO L87 Difference]: Start difference. First operand 38564 states and 117926 transitions. Second operand 5 states. [2018-12-02 02:46:01,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:01,568 INFO L93 Difference]: Finished difference Result 49646 states and 153106 transitions. [2018-12-02 02:46:01,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 02:46:01,568 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-12-02 02:46:01,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:01,622 INFO L225 Difference]: With dead ends: 49646 [2018-12-02 02:46:01,622 INFO L226 Difference]: Without dead ends: 49646 [2018-12-02 02:46:01,623 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-12-02 02:46:01,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49646 states. [2018-12-02 02:46:02,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49646 to 39434. [2018-12-02 02:46:02,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39434 states. [2018-12-02 02:46:02,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39434 states to 39434 states and 120372 transitions. [2018-12-02 02:46:02,053 INFO L78 Accepts]: Start accepts. Automaton has 39434 states and 120372 transitions. Word has length 98 [2018-12-02 02:46:02,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:02,054 INFO L480 AbstractCegarLoop]: Abstraction has 39434 states and 120372 transitions. [2018-12-02 02:46:02,054 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 02:46:02,054 INFO L276 IsEmpty]: Start isEmpty. Operand 39434 states and 120372 transitions. [2018-12-02 02:46:02,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-02 02:46:02,092 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:02,092 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:02,092 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:02,093 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:02,093 INFO L82 PathProgramCache]: Analyzing trace with hash -50263237, now seen corresponding path program 1 times [2018-12-02 02:46:02,093 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:02,093 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:02,094 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:02,094 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:02,094 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:02,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:02,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:02,161 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:02,161 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 02:46:02,162 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 02:46:02,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 02:46:02,162 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-02 02:46:02,162 INFO L87 Difference]: Start difference. First operand 39434 states and 120372 transitions. Second operand 6 states. [2018-12-02 02:46:02,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:02,728 INFO L93 Difference]: Finished difference Result 78743 states and 240695 transitions. [2018-12-02 02:46:02,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 02:46:02,728 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 98 [2018-12-02 02:46:02,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:02,894 INFO L225 Difference]: With dead ends: 78743 [2018-12-02 02:46:02,895 INFO L226 Difference]: Without dead ends: 78148 [2018-12-02 02:46:02,895 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-12-02 02:46:02,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78148 states. [2018-12-02 02:46:03,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78148 to 42604. [2018-12-02 02:46:03,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42604 states. [2018-12-02 02:46:03,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42604 states to 42604 states and 129633 transitions. [2018-12-02 02:46:03,462 INFO L78 Accepts]: Start accepts. Automaton has 42604 states and 129633 transitions. Word has length 98 [2018-12-02 02:46:03,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:03,463 INFO L480 AbstractCegarLoop]: Abstraction has 42604 states and 129633 transitions. [2018-12-02 02:46:03,463 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 02:46:03,463 INFO L276 IsEmpty]: Start isEmpty. Operand 42604 states and 129633 transitions. [2018-12-02 02:46:03,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-12-02 02:46:03,500 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:03,500 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:03,500 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:03,500 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:03,500 INFO L82 PathProgramCache]: Analyzing trace with hash 1472576150, now seen corresponding path program 1 times [2018-12-02 02:46:03,500 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:03,500 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:03,501 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:03,501 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:03,501 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:03,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:03,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:03,539 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:03,539 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 02:46:03,540 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 02:46:03,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 02:46:03,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 02:46:03,540 INFO L87 Difference]: Start difference. First operand 42604 states and 129633 transitions. Second operand 4 states. [2018-12-02 02:46:03,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:03,696 INFO L93 Difference]: Finished difference Result 47734 states and 144082 transitions. [2018-12-02 02:46:03,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 02:46:03,696 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 120 [2018-12-02 02:46:03,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:03,749 INFO L225 Difference]: With dead ends: 47734 [2018-12-02 02:46:03,749 INFO L226 Difference]: Without dead ends: 47734 [2018-12-02 02:46:03,749 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:46:03,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47734 states. [2018-12-02 02:46:04,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47734 to 44939. [2018-12-02 02:46:04,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44939 states. [2018-12-02 02:46:04,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44939 states to 44939 states and 135996 transitions. [2018-12-02 02:46:04,243 INFO L78 Accepts]: Start accepts. Automaton has 44939 states and 135996 transitions. Word has length 120 [2018-12-02 02:46:04,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:04,244 INFO L480 AbstractCegarLoop]: Abstraction has 44939 states and 135996 transitions. [2018-12-02 02:46:04,244 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 02:46:04,244 INFO L276 IsEmpty]: Start isEmpty. Operand 44939 states and 135996 transitions. [2018-12-02 02:46:04,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 02:46:04,282 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:04,282 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:04,282 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:04,282 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:04,282 INFO L82 PathProgramCache]: Analyzing trace with hash -1945328128, now seen corresponding path program 1 times [2018-12-02 02:46:04,282 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:04,282 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:04,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:04,284 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:04,284 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:04,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:04,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:04,343 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:04,343 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 02:46:04,343 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 02:46:04,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 02:46:04,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:46:04,343 INFO L87 Difference]: Start difference. First operand 44939 states and 135996 transitions. Second operand 5 states. [2018-12-02 02:46:04,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:04,544 INFO L93 Difference]: Finished difference Result 53609 states and 161847 transitions. [2018-12-02 02:46:04,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 02:46:04,544 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 122 [2018-12-02 02:46:04,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:04,676 INFO L225 Difference]: With dead ends: 53609 [2018-12-02 02:46:04,676 INFO L226 Difference]: Without dead ends: 53609 [2018-12-02 02:46:04,677 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-02 02:46:04,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53609 states. [2018-12-02 02:46:05,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53609 to 45069. [2018-12-02 02:46:05,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45069 states. [2018-12-02 02:46:05,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45069 states to 45069 states and 136195 transitions. [2018-12-02 02:46:05,118 INFO L78 Accepts]: Start accepts. Automaton has 45069 states and 136195 transitions. Word has length 122 [2018-12-02 02:46:05,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:05,119 INFO L480 AbstractCegarLoop]: Abstraction has 45069 states and 136195 transitions. [2018-12-02 02:46:05,119 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 02:46:05,119 INFO L276 IsEmpty]: Start isEmpty. Operand 45069 states and 136195 transitions. [2018-12-02 02:46:05,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 02:46:05,153 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:05,153 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:05,153 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:05,153 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:05,153 INFO L82 PathProgramCache]: Analyzing trace with hash -483748129, now seen corresponding path program 1 times [2018-12-02 02:46:05,153 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:05,153 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:05,154 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:05,154 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:05,154 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:05,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:05,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:05,201 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:05,201 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 02:46:05,201 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 02:46:05,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 02:46:05,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:46:05,201 INFO L87 Difference]: Start difference. First operand 45069 states and 136195 transitions. Second operand 5 states. [2018-12-02 02:46:05,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:05,677 INFO L93 Difference]: Finished difference Result 73185 states and 219003 transitions. [2018-12-02 02:46:05,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 02:46:05,678 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 122 [2018-12-02 02:46:05,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:05,761 INFO L225 Difference]: With dead ends: 73185 [2018-12-02 02:46:05,761 INFO L226 Difference]: Without dead ends: 73185 [2018-12-02 02:46:05,761 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:46:05,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73185 states. [2018-12-02 02:46:06,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73185 to 47879. [2018-12-02 02:46:06,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47879 states. [2018-12-02 02:46:06,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47879 states to 47879 states and 144868 transitions. [2018-12-02 02:46:06,425 INFO L78 Accepts]: Start accepts. Automaton has 47879 states and 144868 transitions. Word has length 122 [2018-12-02 02:46:06,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:06,425 INFO L480 AbstractCegarLoop]: Abstraction has 47879 states and 144868 transitions. [2018-12-02 02:46:06,425 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 02:46:06,425 INFO L276 IsEmpty]: Start isEmpty. Operand 47879 states and 144868 transitions. [2018-12-02 02:46:06,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 02:46:06,466 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:06,466 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:06,466 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:06,466 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:06,466 INFO L82 PathProgramCache]: Analyzing trace with hash -132948192, now seen corresponding path program 1 times [2018-12-02 02:46:06,466 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:06,466 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:06,467 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:06,467 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:06,467 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:06,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:06,540 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:06,540 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:06,541 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 02:46:06,541 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 02:46:06,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 02:46:06,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-02 02:46:06,541 INFO L87 Difference]: Start difference. First operand 47879 states and 144868 transitions. Second operand 6 states. [2018-12-02 02:46:06,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:06,986 INFO L93 Difference]: Finished difference Result 61355 states and 184599 transitions. [2018-12-02 02:46:06,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 02:46:06,986 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 122 [2018-12-02 02:46:06,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:07,059 INFO L225 Difference]: With dead ends: 61355 [2018-12-02 02:46:07,059 INFO L226 Difference]: Without dead ends: 61227 [2018-12-02 02:46:07,059 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-02 02:46:07,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61227 states. [2018-12-02 02:46:07,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61227 to 51369. [2018-12-02 02:46:07,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51369 states. [2018-12-02 02:46:07,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51369 states to 51369 states and 155865 transitions. [2018-12-02 02:46:07,710 INFO L78 Accepts]: Start accepts. Automaton has 51369 states and 155865 transitions. Word has length 122 [2018-12-02 02:46:07,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:07,710 INFO L480 AbstractCegarLoop]: Abstraction has 51369 states and 155865 transitions. [2018-12-02 02:46:07,710 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 02:46:07,710 INFO L276 IsEmpty]: Start isEmpty. Operand 51369 states and 155865 transitions. [2018-12-02 02:46:07,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 02:46:07,762 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:07,762 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:07,762 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:07,762 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:07,762 INFO L82 PathProgramCache]: Analyzing trace with hash -426351199, now seen corresponding path program 1 times [2018-12-02 02:46:07,762 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:07,762 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:07,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:07,763 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:07,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:07,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:07,831 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:07,832 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:07,832 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-02 02:46:07,832 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-02 02:46:07,832 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-02 02:46:07,832 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-12-02 02:46:07,832 INFO L87 Difference]: Start difference. First operand 51369 states and 155865 transitions. Second operand 8 states. [2018-12-02 02:46:08,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:08,339 INFO L93 Difference]: Finished difference Result 83081 states and 255622 transitions. [2018-12-02 02:46:08,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-02 02:46:08,340 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 122 [2018-12-02 02:46:08,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:08,445 INFO L225 Difference]: With dead ends: 83081 [2018-12-02 02:46:08,445 INFO L226 Difference]: Without dead ends: 83081 [2018-12-02 02:46:08,446 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-12-02 02:46:08,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83081 states. [2018-12-02 02:46:09,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83081 to 55077. [2018-12-02 02:46:09,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55077 states. [2018-12-02 02:46:09,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55077 states to 55077 states and 168055 transitions. [2018-12-02 02:46:09,277 INFO L78 Accepts]: Start accepts. Automaton has 55077 states and 168055 transitions. Word has length 122 [2018-12-02 02:46:09,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:09,277 INFO L480 AbstractCegarLoop]: Abstraction has 55077 states and 168055 transitions. [2018-12-02 02:46:09,277 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-02 02:46:09,278 INFO L276 IsEmpty]: Start isEmpty. Operand 55077 states and 168055 transitions. [2018-12-02 02:46:09,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 02:46:09,331 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:09,331 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:09,331 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:09,331 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:09,331 INFO L82 PathProgramCache]: Analyzing trace with hash 2061161634, now seen corresponding path program 1 times [2018-12-02 02:46:09,331 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:09,332 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:09,332 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:09,332 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:09,332 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:09,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:09,403 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:09,403 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:09,403 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 02:46:09,403 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 02:46:09,404 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 02:46:09,404 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 02:46:09,404 INFO L87 Difference]: Start difference. First operand 55077 states and 168055 transitions. Second operand 6 states. [2018-12-02 02:46:09,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:09,585 INFO L93 Difference]: Finished difference Result 69153 states and 210071 transitions. [2018-12-02 02:46:09,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 02:46:09,586 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 122 [2018-12-02 02:46:09,586 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:09,668 INFO L225 Difference]: With dead ends: 69153 [2018-12-02 02:46:09,669 INFO L226 Difference]: Without dead ends: 69153 [2018-12-02 02:46:09,669 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 02:46:09,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69153 states. [2018-12-02 02:46:10,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69153 to 55867. [2018-12-02 02:46:10,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55867 states. [2018-12-02 02:46:10,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55867 states to 55867 states and 169562 transitions. [2018-12-02 02:46:10,371 INFO L78 Accepts]: Start accepts. Automaton has 55867 states and 169562 transitions. Word has length 122 [2018-12-02 02:46:10,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:10,371 INFO L480 AbstractCegarLoop]: Abstraction has 55867 states and 169562 transitions. [2018-12-02 02:46:10,371 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 02:46:10,371 INFO L276 IsEmpty]: Start isEmpty. Operand 55867 states and 169562 transitions. [2018-12-02 02:46:10,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 02:46:10,425 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:10,425 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:10,426 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:10,426 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:10,426 INFO L82 PathProgramCache]: Analyzing trace with hash -2022454749, now seen corresponding path program 1 times [2018-12-02 02:46:10,426 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:10,426 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:10,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:10,427 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:10,428 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:10,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:10,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:10,468 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:10,468 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 02:46:10,468 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 02:46:10,468 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 02:46:10,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 02:46:10,469 INFO L87 Difference]: Start difference. First operand 55867 states and 169562 transitions. Second operand 3 states. [2018-12-02 02:46:10,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:10,614 INFO L93 Difference]: Finished difference Result 54843 states and 165402 transitions. [2018-12-02 02:46:10,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 02:46:10,615 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 122 [2018-12-02 02:46:10,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:10,749 INFO L225 Difference]: With dead ends: 54843 [2018-12-02 02:46:10,749 INFO L226 Difference]: Without dead ends: 54715 [2018-12-02 02:46:10,749 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 02:46:10,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54715 states. [2018-12-02 02:46:11,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54715 to 46678. [2018-12-02 02:46:11,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46678 states. [2018-12-02 02:46:11,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46678 states to 46678 states and 139997 transitions. [2018-12-02 02:46:11,266 INFO L78 Accepts]: Start accepts. Automaton has 46678 states and 139997 transitions. Word has length 122 [2018-12-02 02:46:11,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:11,266 INFO L480 AbstractCegarLoop]: Abstraction has 46678 states and 139997 transitions. [2018-12-02 02:46:11,266 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 02:46:11,266 INFO L276 IsEmpty]: Start isEmpty. Operand 46678 states and 139997 transitions. [2018-12-02 02:46:11,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 02:46:11,306 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:11,306 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:11,307 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:11,307 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:11,307 INFO L82 PathProgramCache]: Analyzing trace with hash -1760164679, now seen corresponding path program 1 times [2018-12-02 02:46:11,307 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:11,307 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:11,308 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:11,308 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:11,308 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:11,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:11,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:11,340 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:11,340 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 02:46:11,340 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 02:46:11,340 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 02:46:11,340 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 02:46:11,340 INFO L87 Difference]: Start difference. First operand 46678 states and 139997 transitions. Second operand 4 states. [2018-12-02 02:46:11,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:11,506 INFO L93 Difference]: Finished difference Result 49429 states and 148437 transitions. [2018-12-02 02:46:11,506 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 02:46:11,506 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2018-12-02 02:46:11,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:11,564 INFO L225 Difference]: With dead ends: 49429 [2018-12-02 02:46:11,565 INFO L226 Difference]: Without dead ends: 49429 [2018-12-02 02:46:11,565 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 02:46:11,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49429 states. [2018-12-02 02:46:12,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49429 to 47223. [2018-12-02 02:46:12,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47223 states. [2018-12-02 02:46:12,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47223 states to 47223 states and 141618 transitions. [2018-12-02 02:46:12,088 INFO L78 Accepts]: Start accepts. Automaton has 47223 states and 141618 transitions. Word has length 124 [2018-12-02 02:46:12,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:12,088 INFO L480 AbstractCegarLoop]: Abstraction has 47223 states and 141618 transitions. [2018-12-02 02:46:12,088 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 02:46:12,088 INFO L276 IsEmpty]: Start isEmpty. Operand 47223 states and 141618 transitions. [2018-12-02 02:46:12,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 02:46:12,128 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:12,128 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:12,128 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:12,128 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:12,128 INFO L82 PathProgramCache]: Analyzing trace with hash 1537730264, now seen corresponding path program 1 times [2018-12-02 02:46:12,128 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:12,128 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:12,129 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:12,129 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:12,129 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:12,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:12,159 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:12,160 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:12,160 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 02:46:12,160 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 02:46:12,160 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 02:46:12,160 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 02:46:12,160 INFO L87 Difference]: Start difference. First operand 47223 states and 141618 transitions. Second operand 4 states. [2018-12-02 02:46:12,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:12,354 INFO L93 Difference]: Finished difference Result 47799 states and 143490 transitions. [2018-12-02 02:46:12,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 02:46:12,354 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2018-12-02 02:46:12,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:12,406 INFO L225 Difference]: With dead ends: 47799 [2018-12-02 02:46:12,407 INFO L226 Difference]: Without dead ends: 47671 [2018-12-02 02:46:12,407 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:46:12,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47671 states. [2018-12-02 02:46:12,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47671 to 45446. [2018-12-02 02:46:12,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45446 states. [2018-12-02 02:46:12,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45446 states to 45446 states and 136307 transitions. [2018-12-02 02:46:12,939 INFO L78 Accepts]: Start accepts. Automaton has 45446 states and 136307 transitions. Word has length 124 [2018-12-02 02:46:12,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:12,939 INFO L480 AbstractCegarLoop]: Abstraction has 45446 states and 136307 transitions. [2018-12-02 02:46:12,939 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 02:46:12,939 INFO L276 IsEmpty]: Start isEmpty. Operand 45446 states and 136307 transitions. [2018-12-02 02:46:12,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 02:46:12,977 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:12,977 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:12,977 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:12,977 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:12,977 INFO L82 PathProgramCache]: Analyzing trace with hash 1244327257, now seen corresponding path program 1 times [2018-12-02 02:46:12,977 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:12,977 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:12,978 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:12,978 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:12,978 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:12,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:13,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:13,032 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:13,032 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 02:46:13,032 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 02:46:13,032 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 02:46:13,032 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-02 02:46:13,032 INFO L87 Difference]: Start difference. First operand 45446 states and 136307 transitions. Second operand 6 states. [2018-12-02 02:46:13,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:13,373 INFO L93 Difference]: Finished difference Result 56717 states and 170199 transitions. [2018-12-02 02:46:13,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 02:46:13,374 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 124 [2018-12-02 02:46:13,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:13,439 INFO L225 Difference]: With dead ends: 56717 [2018-12-02 02:46:13,440 INFO L226 Difference]: Without dead ends: 56577 [2018-12-02 02:46:13,440 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-12-02 02:46:13,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56577 states. [2018-12-02 02:46:13,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56577 to 49106. [2018-12-02 02:46:13,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49106 states. [2018-12-02 02:46:14,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49106 states to 49106 states and 147480 transitions. [2018-12-02 02:46:14,025 INFO L78 Accepts]: Start accepts. Automaton has 49106 states and 147480 transitions. Word has length 124 [2018-12-02 02:46:14,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:14,025 INFO L480 AbstractCegarLoop]: Abstraction has 49106 states and 147480 transitions. [2018-12-02 02:46:14,026 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 02:46:14,026 INFO L276 IsEmpty]: Start isEmpty. Operand 49106 states and 147480 transitions. [2018-12-02 02:46:14,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 02:46:14,068 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:14,068 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:14,068 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:14,068 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:14,069 INFO L82 PathProgramCache]: Analyzing trace with hash 1177320504, now seen corresponding path program 1 times [2018-12-02 02:46:14,069 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:14,069 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:14,070 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:14,070 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:14,070 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:14,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:14,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:14,127 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:14,128 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 02:46:14,128 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 02:46:14,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 02:46:14,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:46:14,128 INFO L87 Difference]: Start difference. First operand 49106 states and 147480 transitions. Second operand 5 states. [2018-12-02 02:46:14,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:14,249 INFO L93 Difference]: Finished difference Result 48786 states and 146248 transitions. [2018-12-02 02:46:14,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 02:46:14,250 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 124 [2018-12-02 02:46:14,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:14,301 INFO L225 Difference]: With dead ends: 48786 [2018-12-02 02:46:14,301 INFO L226 Difference]: Without dead ends: 48786 [2018-12-02 02:46:14,301 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-12-02 02:46:14,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48786 states. [2018-12-02 02:46:14,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48786 to 47029. [2018-12-02 02:46:14,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47029 states. [2018-12-02 02:46:14,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47029 states to 47029 states and 140943 transitions. [2018-12-02 02:46:14,849 INFO L78 Accepts]: Start accepts. Automaton has 47029 states and 140943 transitions. Word has length 124 [2018-12-02 02:46:14,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:14,850 INFO L480 AbstractCegarLoop]: Abstraction has 47029 states and 140943 transitions. [2018-12-02 02:46:14,850 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 02:46:14,850 INFO L276 IsEmpty]: Start isEmpty. Operand 47029 states and 140943 transitions. [2018-12-02 02:46:14,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 02:46:14,890 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:14,890 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:14,890 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:14,890 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:14,890 INFO L82 PathProgramCache]: Analyzing trace with hash -630133959, now seen corresponding path program 1 times [2018-12-02 02:46:14,891 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:14,891 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:14,891 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:14,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:14,892 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:14,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:14,925 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:14,925 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:14,926 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 02:46:14,926 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 02:46:14,926 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 02:46:14,926 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 02:46:14,926 INFO L87 Difference]: Start difference. First operand 47029 states and 140943 transitions. Second operand 4 states. [2018-12-02 02:46:15,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:15,210 INFO L93 Difference]: Finished difference Result 54479 states and 162323 transitions. [2018-12-02 02:46:15,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 02:46:15,211 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2018-12-02 02:46:15,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:15,278 INFO L225 Difference]: With dead ends: 54479 [2018-12-02 02:46:15,278 INFO L226 Difference]: Without dead ends: 54204 [2018-12-02 02:46:15,278 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:46:15,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54204 states. [2018-12-02 02:46:15,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54204 to 47484. [2018-12-02 02:46:15,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47484 states. [2018-12-02 02:46:15,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47484 states to 47484 states and 141507 transitions. [2018-12-02 02:46:15,861 INFO L78 Accepts]: Start accepts. Automaton has 47484 states and 141507 transitions. Word has length 124 [2018-12-02 02:46:15,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:15,861 INFO L480 AbstractCegarLoop]: Abstraction has 47484 states and 141507 transitions. [2018-12-02 02:46:15,861 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 02:46:15,861 INFO L276 IsEmpty]: Start isEmpty. Operand 47484 states and 141507 transitions. [2018-12-02 02:46:15,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 02:46:15,903 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:15,903 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:15,903 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:15,903 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:15,904 INFO L82 PathProgramCache]: Analyzing trace with hash -817863751, now seen corresponding path program 1 times [2018-12-02 02:46:15,904 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:15,904 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:15,904 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:15,905 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:15,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:15,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:15,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:15,999 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:15,999 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 02:46:15,999 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 02:46:15,999 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 02:46:16,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-12-02 02:46:16,000 INFO L87 Difference]: Start difference. First operand 47484 states and 141507 transitions. Second operand 10 states. [2018-12-02 02:46:16,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:16,742 INFO L93 Difference]: Finished difference Result 60737 states and 181239 transitions. [2018-12-02 02:46:16,742 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-02 02:46:16,742 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 124 [2018-12-02 02:46:16,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:16,810 INFO L225 Difference]: With dead ends: 60737 [2018-12-02 02:46:16,810 INFO L226 Difference]: Without dead ends: 60737 [2018-12-02 02:46:16,810 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2018-12-02 02:46:16,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60737 states. [2018-12-02 02:46:17,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60737 to 52874. [2018-12-02 02:46:17,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52874 states. [2018-12-02 02:46:17,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52874 states to 52874 states and 158034 transitions. [2018-12-02 02:46:17,482 INFO L78 Accepts]: Start accepts. Automaton has 52874 states and 158034 transitions. Word has length 124 [2018-12-02 02:46:17,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:17,482 INFO L480 AbstractCegarLoop]: Abstraction has 52874 states and 158034 transitions. [2018-12-02 02:46:17,482 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 02:46:17,482 INFO L276 IsEmpty]: Start isEmpty. Operand 52874 states and 158034 transitions. [2018-12-02 02:46:17,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 02:46:17,532 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:17,533 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:17,533 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:17,533 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:17,533 INFO L82 PathProgramCache]: Analyzing trace with hash -884870504, now seen corresponding path program 1 times [2018-12-02 02:46:17,533 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:17,533 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:17,534 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:17,534 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:17,534 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:17,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:17,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:17,559 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:17,559 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 02:46:17,559 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 02:46:17,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 02:46:17,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 02:46:17,560 INFO L87 Difference]: Start difference. First operand 52874 states and 158034 transitions. Second operand 3 states. [2018-12-02 02:46:17,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:17,684 INFO L93 Difference]: Finished difference Result 52874 states and 157970 transitions. [2018-12-02 02:46:17,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 02:46:17,685 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 124 [2018-12-02 02:46:17,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:17,746 INFO L225 Difference]: With dead ends: 52874 [2018-12-02 02:46:17,747 INFO L226 Difference]: Without dead ends: 52874 [2018-12-02 02:46:17,747 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 02:46:17,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52874 states. [2018-12-02 02:46:18,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52874 to 52874. [2018-12-02 02:46:18,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52874 states. [2018-12-02 02:46:18,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52874 states to 52874 states and 157970 transitions. [2018-12-02 02:46:18,325 INFO L78 Accepts]: Start accepts. Automaton has 52874 states and 157970 transitions. Word has length 124 [2018-12-02 02:46:18,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:18,325 INFO L480 AbstractCegarLoop]: Abstraction has 52874 states and 157970 transitions. [2018-12-02 02:46:18,325 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 02:46:18,325 INFO L276 IsEmpty]: Start isEmpty. Operand 52874 states and 157970 transitions. [2018-12-02 02:46:18,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 02:46:18,377 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:18,377 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:18,377 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:18,377 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:18,377 INFO L82 PathProgramCache]: Analyzing trace with hash -206422043, now seen corresponding path program 1 times [2018-12-02 02:46:18,377 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:18,377 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:18,378 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:18,378 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:18,378 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:18,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:18,458 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:18,458 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:18,458 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 02:46:18,458 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 02:46:18,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 02:46:18,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-12-02 02:46:18,459 INFO L87 Difference]: Start difference. First operand 52874 states and 157970 transitions. Second operand 10 states. [2018-12-02 02:46:18,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:18,940 INFO L93 Difference]: Finished difference Result 70731 states and 211274 transitions. [2018-12-02 02:46:18,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 02:46:18,941 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 126 [2018-12-02 02:46:18,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:18,968 INFO L225 Difference]: With dead ends: 70731 [2018-12-02 02:46:18,968 INFO L226 Difference]: Without dead ends: 25871 [2018-12-02 02:46:18,968 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=175, Unknown=0, NotChecked=0, Total=240 [2018-12-02 02:46:19,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25871 states. [2018-12-02 02:46:19,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25871 to 25262. [2018-12-02 02:46:19,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25262 states. [2018-12-02 02:46:19,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25262 states to 25262 states and 70846 transitions. [2018-12-02 02:46:19,277 INFO L78 Accepts]: Start accepts. Automaton has 25262 states and 70846 transitions. Word has length 126 [2018-12-02 02:46:19,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:19,277 INFO L480 AbstractCegarLoop]: Abstraction has 25262 states and 70846 transitions. [2018-12-02 02:46:19,277 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 02:46:19,278 INFO L276 IsEmpty]: Start isEmpty. Operand 25262 states and 70846 transitions. [2018-12-02 02:46:19,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 02:46:19,300 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:19,300 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:19,301 INFO L423 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:19,301 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:19,301 INFO L82 PathProgramCache]: Analyzing trace with hash 1627446649, now seen corresponding path program 2 times [2018-12-02 02:46:19,301 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:19,301 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:19,302 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:19,302 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:19,302 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:19,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:19,394 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:19,394 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:19,394 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-02 02:46:19,394 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 02:46:19,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 02:46:19,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-12-02 02:46:19,394 INFO L87 Difference]: Start difference. First operand 25262 states and 70846 transitions. Second operand 9 states. [2018-12-02 02:46:19,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:19,772 INFO L93 Difference]: Finished difference Result 36679 states and 104970 transitions. [2018-12-02 02:46:19,773 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 02:46:19,773 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 126 [2018-12-02 02:46:19,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:19,782 INFO L225 Difference]: With dead ends: 36679 [2018-12-02 02:46:19,782 INFO L226 Difference]: Without dead ends: 9987 [2018-12-02 02:46:19,782 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2018-12-02 02:46:19,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9987 states. [2018-12-02 02:46:19,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9987 to 9987. [2018-12-02 02:46:19,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9987 states. [2018-12-02 02:46:19,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9987 states to 9987 states and 30110 transitions. [2018-12-02 02:46:19,869 INFO L78 Accepts]: Start accepts. Automaton has 9987 states and 30110 transitions. Word has length 126 [2018-12-02 02:46:19,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:19,869 INFO L480 AbstractCegarLoop]: Abstraction has 9987 states and 30110 transitions. [2018-12-02 02:46:19,869 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 02:46:19,869 INFO L276 IsEmpty]: Start isEmpty. Operand 9987 states and 30110 transitions. [2018-12-02 02:46:19,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 02:46:19,877 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:19,878 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:19,878 INFO L423 AbstractCegarLoop]: === Iteration 36 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:19,878 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:19,878 INFO L82 PathProgramCache]: Analyzing trace with hash 661191913, now seen corresponding path program 1 times [2018-12-02 02:46:19,878 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:19,878 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:19,879 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:19,879 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 02:46:19,879 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:19,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:19,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:19,958 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:19,958 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 02:46:19,958 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 02:46:19,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 02:46:19,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 02:46:19,958 INFO L87 Difference]: Start difference. First operand 9987 states and 30110 transitions. Second operand 6 states. [2018-12-02 02:46:20,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:20,056 INFO L93 Difference]: Finished difference Result 11011 states and 32834 transitions. [2018-12-02 02:46:20,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 02:46:20,056 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 126 [2018-12-02 02:46:20,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:20,066 INFO L225 Difference]: With dead ends: 11011 [2018-12-02 02:46:20,066 INFO L226 Difference]: Without dead ends: 10859 [2018-12-02 02:46:20,066 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-02 02:46:20,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10859 states. [2018-12-02 02:46:20,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10859 to 9475. [2018-12-02 02:46:20,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9475 states. [2018-12-02 02:46:20,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9475 states to 9475 states and 28414 transitions. [2018-12-02 02:46:20,162 INFO L78 Accepts]: Start accepts. Automaton has 9475 states and 28414 transitions. Word has length 126 [2018-12-02 02:46:20,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:20,163 INFO L480 AbstractCegarLoop]: Abstraction has 9475 states and 28414 transitions. [2018-12-02 02:46:20,163 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 02:46:20,163 INFO L276 IsEmpty]: Start isEmpty. Operand 9475 states and 28414 transitions. [2018-12-02 02:46:20,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 02:46:20,170 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:20,170 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:20,170 INFO L423 AbstractCegarLoop]: === Iteration 37 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:20,171 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:20,171 INFO L82 PathProgramCache]: Analyzing trace with hash -1522485014, now seen corresponding path program 1 times [2018-12-02 02:46:20,171 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:20,171 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:20,171 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:20,172 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:20,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:20,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:20,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:20,242 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:20,242 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 02:46:20,243 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 02:46:20,243 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 02:46:20,243 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-02 02:46:20,243 INFO L87 Difference]: Start difference. First operand 9475 states and 28414 transitions. Second operand 5 states. [2018-12-02 02:46:20,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:20,316 INFO L93 Difference]: Finished difference Result 10227 states and 30270 transitions. [2018-12-02 02:46:20,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 02:46:20,316 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 126 [2018-12-02 02:46:20,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:20,325 INFO L225 Difference]: With dead ends: 10227 [2018-12-02 02:46:20,326 INFO L226 Difference]: Without dead ends: 10227 [2018-12-02 02:46:20,326 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 02:46:20,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10227 states. [2018-12-02 02:46:20,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10227 to 8683. [2018-12-02 02:46:20,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8683 states. [2018-12-02 02:46:20,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8683 states to 8683 states and 25920 transitions. [2018-12-02 02:46:20,411 INFO L78 Accepts]: Start accepts. Automaton has 8683 states and 25920 transitions. Word has length 126 [2018-12-02 02:46:20,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:20,412 INFO L480 AbstractCegarLoop]: Abstraction has 8683 states and 25920 transitions. [2018-12-02 02:46:20,412 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 02:46:20,412 INFO L276 IsEmpty]: Start isEmpty. Operand 8683 states and 25920 transitions. [2018-12-02 02:46:20,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 02:46:20,419 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:20,419 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:20,419 INFO L423 AbstractCegarLoop]: === Iteration 38 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:20,419 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:20,419 INFO L82 PathProgramCache]: Analyzing trace with hash 902437230, now seen corresponding path program 1 times [2018-12-02 02:46:20,419 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:20,419 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:20,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:20,420 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:20,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:20,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 02:46:20,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 02:46:20,474 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 02:46:20,474 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 02:46:20,474 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 02:46:20,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 02:46:20,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-02 02:46:20,474 INFO L87 Difference]: Start difference. First operand 8683 states and 25920 transitions. Second operand 7 states. [2018-12-02 02:46:20,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 02:46:20,561 INFO L93 Difference]: Finished difference Result 13376 states and 40145 transitions. [2018-12-02 02:46:20,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 02:46:20,561 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 126 [2018-12-02 02:46:20,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 02:46:20,573 INFO L225 Difference]: With dead ends: 13376 [2018-12-02 02:46:20,574 INFO L226 Difference]: Without dead ends: 13376 [2018-12-02 02:46:20,574 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-12-02 02:46:20,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13376 states. [2018-12-02 02:46:20,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13376 to 8287. [2018-12-02 02:46:20,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8287 states. [2018-12-02 02:46:20,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8287 states to 8287 states and 24695 transitions. [2018-12-02 02:46:20,667 INFO L78 Accepts]: Start accepts. Automaton has 8287 states and 24695 transitions. Word has length 126 [2018-12-02 02:46:20,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 02:46:20,667 INFO L480 AbstractCegarLoop]: Abstraction has 8287 states and 24695 transitions. [2018-12-02 02:46:20,667 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 02:46:20,667 INFO L276 IsEmpty]: Start isEmpty. Operand 8287 states and 24695 transitions. [2018-12-02 02:46:20,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 02:46:20,673 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 02:46:20,674 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 02:46:20,674 INFO L423 AbstractCegarLoop]: === Iteration 39 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 02:46:20,674 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 02:46:20,674 INFO L82 PathProgramCache]: Analyzing trace with hash -1442229811, now seen corresponding path program 3 times [2018-12-02 02:46:20,674 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-02 02:46:20,674 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-02 02:46:20,675 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:20,675 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 02:46:20,675 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 02:46:20,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 02:46:20,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 02:46:20,727 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-02 02:46:20,840 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-12-02 02:46:20,841 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 02:46:20 BasicIcfg [2018-12-02 02:46:20,841 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-02 02:46:20,842 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-02 02:46:20,842 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-02 02:46:20,842 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-02 02:46:20,842 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 02:43:24" (3/4) ... [2018-12-02 02:46:20,844 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-02 02:46:20,955 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_8a3220e7-f696-4be3-b6ba-a9f0e11a35b5/bin-2019/uautomizer/witness.graphml [2018-12-02 02:46:20,955 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-02 02:46:20,956 INFO L168 Benchmark]: Toolchain (without parser) took 177645.20 ms. Allocated memory was 1.0 GB in the beginning and 7.5 GB in the end (delta: 6.5 GB). Free memory was 951.7 MB in the beginning and 4.2 GB in the end (delta: -3.2 GB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. [2018-12-02 02:46:20,957 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 02:46:20,957 INFO L168 Benchmark]: CACSL2BoogieTranslator took 355.62 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.9 MB). Free memory was 951.7 MB in the beginning and 1.1 GB in the end (delta: -121.0 MB). Peak memory consumption was 37.4 MB. Max. memory is 11.5 GB. [2018-12-02 02:46:20,957 INFO L168 Benchmark]: Boogie Procedure Inliner took 31.20 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-02 02:46:20,957 INFO L168 Benchmark]: Boogie Preprocessor took 21.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-02 02:46:20,957 INFO L168 Benchmark]: RCFGBuilder took 410.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 63.9 MB). Peak memory consumption was 63.9 MB. Max. memory is 11.5 GB. [2018-12-02 02:46:20,958 INFO L168 Benchmark]: TraceAbstraction took 176709.64 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 1.0 GB in the beginning and 4.3 GB in the end (delta: -3.3 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2018-12-02 02:46:20,958 INFO L168 Benchmark]: Witness Printer took 113.31 ms. Allocated memory is still 7.5 GB. Free memory was 4.3 GB in the beginning and 4.2 GB in the end (delta: 96.9 MB). Peak memory consumption was 96.9 MB. Max. memory is 11.5 GB. [2018-12-02 02:46:20,959 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 355.62 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.9 MB). Free memory was 951.7 MB in the beginning and 1.1 GB in the end (delta: -121.0 MB). Peak memory consumption was 37.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 31.20 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 21.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 410.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 63.9 MB). Peak memory consumption was 63.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 176709.64 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 1.0 GB in the beginning and 4.3 GB in the end (delta: -3.3 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. * Witness Printer took 113.31 ms. Allocated memory is still 7.5 GB. Free memory was 4.3 GB in the beginning and 4.2 GB in the end (delta: 96.9 MB). Peak memory consumption was 96.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L679] -1 _Bool __unbuffered_p2_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0] [L680] -1 int __unbuffered_p2_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0] [L681] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0] [L682] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0] [L683] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0] [L684] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0] [L685] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0] [L686] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0] [L687] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0] [L688] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0] [L689] -1 _Bool __unbuffered_p2_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0] [L690] -1 int *__unbuffered_p2_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}] [L691] -1 int __unbuffered_p2_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0] [L692] -1 _Bool __unbuffered_p2_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0] [L693] -1 int __unbuffered_p2_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0] [L694] -1 _Bool __unbuffered_p2_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0] [L695] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0] [L696] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L700] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}] [L701] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0] [L702] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0] [L703] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L704] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L705] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L706] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L707] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L708] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L709] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L710] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L711] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L712] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L713] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L714] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L715] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L716] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L719] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L720] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L721] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L813] -1 pthread_t t2686; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK -1 pthread_create(&t2686, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L815] -1 pthread_t t2687; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK -1 pthread_create(&t2687, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L817] -1 pthread_t t2688; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L818] FCALL, FORK -1 pthread_create(&t2688, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L769] 0 weak$$choice0 = __VERIFIER_nondet_pointer() [L770] 0 weak$$choice2 = __VERIFIER_nondet_pointer() [L771] 0 y$flush_delayed = weak$$choice2 [L772] EXPR 0 \read(y) [L772] 0 y$mem_tmp = y [L773] 0 weak$$choice1 = __VERIFIER_nondet_pointer() [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L774] EXPR 0 \read(y) [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) VAL [!y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y))))=0, \read(y)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L774] 0 y = !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L775] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) [L776] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) [L777] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) [L778] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L779] EXPR 0 weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] 0 y$r_buff0_thd3 = weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L780] EXPR 0 weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] 0 y$r_buff1_thd3 = weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L781] 0 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L782] 0 __unbuffered_p2_EAX$read_delayed_var = &y [L783] EXPR 0 \read(y) [L783] 0 __unbuffered_p2_EAX = y [L784] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L784] 0 y = y$flush_delayed ? y$mem_tmp : y [L785] 0 y$flush_delayed = (_Bool)0 [L788] 0 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] 1 __unbuffered_p0_EAX = z [L728] 1 x = 1 [L733] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L740] 2 __unbuffered_p1_EAX = x [L743] 2 y$w_buff1 = y$w_buff0 [L744] 2 y$w_buff0 = 1 [L745] 2 y$w_buff1_used = y$w_buff0_used [L746] 2 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y [L791] EXPR 0 \read(y) [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L792] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L792] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L793] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L794] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L794] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L795] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L795] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L798] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L749] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L750] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L751] 2 y$r_buff1_thd3 = y$r_buff0_thd3 [L752] 2 y$r_buff0_thd2 = (_Bool)1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L759] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L759] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L762] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L824] EXPR -1 \read(y) [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L825] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L825] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L826] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L826] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L827] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L827] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L828] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L828] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L831] -1 weak$$choice1 = __VERIFIER_nondet_pointer() [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L832] EXPR -1 \read(*__unbuffered_p2_EAX$read_delayed_var) [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] -1 __unbuffered_p2_EAX = __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L833] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 340 locations, 3 error locations. UNSAFE Result, 176.5s OverallTime, 39 OverallIterations, 1 TraceHistogramMax, 30.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 12848 SDtfs, 18178 SDslu, 26514 SDs, 0 SdLazy, 9722 SolverSat, 692 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 362 GetRequests, 90 SyntacticMatches, 39 SemanticMatches, 233 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 315 ImplicationChecksByTransitivity, 1.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=346782occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 57.2s AutomataMinimizationTime, 38 MinimizatonAttempts, 584903 StatesRemovedByMinimization, 35 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 4121 NumberOfCodeBlocks, 4121 NumberOfCodeBlocksAsserted, 39 NumberOfCheckSat, 3957 ConstructedInterpolants, 0 QuantifiedInterpolants, 1036271 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 38 InterpolantComputations, 38 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...