./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2f4049400be941342f32e9ba06dfe9aa51e5b146 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2f4049400be941342f32e9ba06dfe9aa51e5b146 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Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 01:16:37,062 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 01:16:37,064 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 01:16:37,072 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 01:16:37,072 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 01:16:37,073 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 01:16:37,074 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 01:16:37,075 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 01:16:37,076 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 01:16:37,077 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 01:16:37,077 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 01:16:37,077 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 01:16:37,078 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 01:16:37,079 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 01:16:37,080 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 01:16:37,080 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 01:16:37,081 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 01:16:37,082 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 01:16:37,083 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 01:16:37,084 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 01:16:37,085 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 01:16:37,086 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 01:16:37,088 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 01:16:37,088 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 01:16:37,088 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 01:16:37,089 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 01:16:37,089 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 01:16:37,090 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 01:16:37,091 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 01:16:37,091 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 01:16:37,091 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 01:16:37,092 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 01:16:37,092 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 01:16:37,092 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 01:16:37,093 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 01:16:37,093 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 01:16:37,093 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-12-09 01:16:37,100 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 01:16:37,100 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 01:16:37,101 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 01:16:37,101 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 01:16:37,101 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-09 01:16:37,101 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-09 01:16:37,101 INFO L133 SettingsManager]: * Use SBE=true [2018-12-09 01:16:37,101 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 01:16:37,102 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 01:16:37,102 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-09 01:16:37,102 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 01:16:37,102 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 01:16:37,102 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 01:16:37,102 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-09 01:16:37,102 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-09 01:16:37,102 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-09 01:16:37,102 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 01:16:37,102 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 01:16:37,102 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-09 01:16:37,102 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 01:16:37,103 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 01:16:37,103 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 01:16:37,103 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 01:16:37,103 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 01:16:37,103 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 01:16:37,103 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 01:16:37,103 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-09 01:16:37,103 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 01:16:37,103 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2f4049400be941342f32e9ba06dfe9aa51e5b146 [2018-12-09 01:16:37,120 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 01:16:37,126 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 01:16:37,128 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 01:16:37,129 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 01:16:37,129 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 01:16:37,130 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-12-09 01:16:37,163 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/data/5029c8b3b/a0c4790abb77412fb9b40256b4c90b31/FLAG4836a77dc [2018-12-09 01:16:37,660 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 01:16:37,660 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-12-09 01:16:37,667 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/data/5029c8b3b/a0c4790abb77412fb9b40256b4c90b31/FLAG4836a77dc [2018-12-09 01:16:37,675 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/data/5029c8b3b/a0c4790abb77412fb9b40256b4c90b31 [2018-12-09 01:16:37,677 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 01:16:37,678 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-09 01:16:37,678 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 01:16:37,678 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 01:16:37,680 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 01:16:37,681 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 01:16:37" (1/1) ... [2018-12-09 01:16:37,682 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@142c46d6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:16:37, skipping insertion in model container [2018-12-09 01:16:37,682 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 01:16:37" (1/1) ... [2018-12-09 01:16:37,686 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 01:16:37,707 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 01:16:37,926 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 01:16:37,937 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 01:16:37,970 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 01:16:38,002 INFO L195 MainTranslator]: Completed translation [2018-12-09 01:16:38,002 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:16:38 WrapperNode [2018-12-09 01:16:38,002 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 01:16:38,002 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 01:16:38,003 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 01:16:38,003 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 01:16:38,011 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:16:38" (1/1) ... [2018-12-09 01:16:38,011 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:16:38" (1/1) ... [2018-12-09 01:16:38,022 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:16:38" (1/1) ... [2018-12-09 01:16:38,022 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:16:38" (1/1) ... [2018-12-09 01:16:38,039 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:16:38" (1/1) ... [2018-12-09 01:16:38,043 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:16:38" (1/1) ... [2018-12-09 01:16:38,045 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:16:38" (1/1) ... [2018-12-09 01:16:38,050 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 01:16:38,050 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 01:16:38,050 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 01:16:38,050 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 01:16:38,051 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:16:38" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 01:16:38,082 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-09 01:16:38,082 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 01:16:38,082 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-09 01:16:38,082 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-12-09 01:16:38,082 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-12-09 01:16:38,082 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-12-09 01:16:38,082 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-12-09 01:16:38,082 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-09 01:16:38,082 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-09 01:16:38,082 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-09 01:16:38,082 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-12-09 01:16:38,082 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-09 01:16:38,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_get_clientdata [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_set_clientdata [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_3_11 [2018-12-09 01:16:38,084 INFO L138 BoogieDeclarations]: Found implementation of procedure free_11 [2018-12-09 01:16:38,085 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-09 01:16:38,085 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-09 01:16:38,085 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-09 01:16:38,085 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-09 01:16:38,085 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-12-09 01:16:38,085 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-12-09 01:16:38,085 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-12-09 01:16:38,085 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-12-09 01:16:38,085 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-12-09 01:16:38,085 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-12-09 01:16:38,085 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-12-09 01:16:38,085 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-12-09 01:16:38,085 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-12-09 01:16:38,085 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-12-09 01:16:38,085 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-12-09 01:16:38,086 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-12-09 01:16:38,087 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-12-09 01:16:38,088 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-12-09 01:16:38,089 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-12-09 01:16:38,090 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-12-09 01:16:38,091 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 01:16:38,092 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-09 01:16:38,093 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_get_clientdata [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_set_clientdata [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_3_11 [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure free_11 [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-12-09 01:16:38,094 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-12-09 01:16:38,333 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-09 01:16:38,457 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-09 01:16:38,601 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 01:16:38,602 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-09 01:16:38,602 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 01:16:38 BoogieIcfgContainer [2018-12-09 01:16:38,602 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 01:16:38,603 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 01:16:38,603 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 01:16:38,605 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 01:16:38,605 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 01:16:37" (1/3) ... [2018-12-09 01:16:38,605 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3cb9b740 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 01:16:38, skipping insertion in model container [2018-12-09 01:16:38,606 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:16:38" (2/3) ... [2018-12-09 01:16:38,606 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3cb9b740 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 01:16:38, skipping insertion in model container [2018-12-09 01:16:38,606 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 01:16:38" (3/3) ... [2018-12-09 01:16:38,607 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-12-09 01:16:38,613 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 01:16:38,618 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 85 error locations. [2018-12-09 01:16:38,628 INFO L257 AbstractCegarLoop]: Starting to check reachability of 85 error locations. [2018-12-09 01:16:38,642 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-09 01:16:38,643 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 01:16:38,643 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-09 01:16:38,643 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 01:16:38,643 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 01:16:38,643 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 01:16:38,643 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 01:16:38,643 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 01:16:38,643 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 01:16:38,654 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states. [2018-12-09 01:16:38,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-09 01:16:38,660 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:38,661 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:38,663 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:38,666 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:38,666 INFO L82 PathProgramCache]: Analyzing trace with hash 1348674973, now seen corresponding path program 1 times [2018-12-09 01:16:38,668 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:38,668 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:38,701 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:38,701 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:38,701 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:38,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:38,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:16:38,796 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:16:38,796 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 01:16:38,798 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:16:38,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:16:38,807 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:16:38,808 INFO L87 Difference]: Start difference. First operand 170 states. Second operand 5 states. [2018-12-09 01:16:38,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:38,859 INFO L93 Difference]: Finished difference Result 132 states and 153 transitions. [2018-12-09 01:16:38,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:16:38,860 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-12-09 01:16:38,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:38,867 INFO L225 Difference]: With dead ends: 132 [2018-12-09 01:16:38,867 INFO L226 Difference]: Without dead ends: 129 [2018-12-09 01:16:38,868 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:16:38,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-12-09 01:16:38,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 101. [2018-12-09 01:16:38,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-09 01:16:38,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 113 transitions. [2018-12-09 01:16:38,900 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 113 transitions. Word has length 16 [2018-12-09 01:16:38,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:38,900 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 113 transitions. [2018-12-09 01:16:38,900 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:16:38,900 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 113 transitions. [2018-12-09 01:16:38,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-09 01:16:38,901 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:38,901 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:38,902 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:38,902 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:38,902 INFO L82 PathProgramCache]: Analyzing trace with hash -1203481988, now seen corresponding path program 1 times [2018-12-09 01:16:38,902 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:38,902 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:38,904 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:38,904 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:38,904 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:38,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:38,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:16:38,930 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:16:38,930 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:16:38,932 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:16:38,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:16:38,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:16:38,932 INFO L87 Difference]: Start difference. First operand 101 states and 113 transitions. Second operand 3 states. [2018-12-09 01:16:39,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:39,030 INFO L93 Difference]: Finished difference Result 144 states and 168 transitions. [2018-12-09 01:16:39,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:16:39,031 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-12-09 01:16:39,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:39,032 INFO L225 Difference]: With dead ends: 144 [2018-12-09 01:16:39,032 INFO L226 Difference]: Without dead ends: 141 [2018-12-09 01:16:39,033 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:16:39,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-09 01:16:39,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 97. [2018-12-09 01:16:39,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-09 01:16:39,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 105 transitions. [2018-12-09 01:16:39,042 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 105 transitions. Word has length 16 [2018-12-09 01:16:39,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:39,043 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 105 transitions. [2018-12-09 01:16:39,043 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:16:39,043 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 105 transitions. [2018-12-09 01:16:39,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 01:16:39,043 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:39,044 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:39,044 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:39,044 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:39,044 INFO L82 PathProgramCache]: Analyzing trace with hash -1252423737, now seen corresponding path program 1 times [2018-12-09 01:16:39,045 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:39,045 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:39,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:39,046 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:39,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:39,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:39,085 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:16:39,085 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:16:39,085 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 01:16:39,085 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:16:39,085 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:16:39,085 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:16:39,086 INFO L87 Difference]: Start difference. First operand 97 states and 105 transitions. Second operand 5 states. [2018-12-09 01:16:39,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:39,116 INFO L93 Difference]: Finished difference Result 126 states and 143 transitions. [2018-12-09 01:16:39,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:16:39,116 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-12-09 01:16:39,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:39,117 INFO L225 Difference]: With dead ends: 126 [2018-12-09 01:16:39,117 INFO L226 Difference]: Without dead ends: 126 [2018-12-09 01:16:39,117 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:16:39,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-12-09 01:16:39,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 101. [2018-12-09 01:16:39,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-09 01:16:39,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 112 transitions. [2018-12-09 01:16:39,123 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 112 transitions. Word has length 21 [2018-12-09 01:16:39,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:39,123 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 112 transitions. [2018-12-09 01:16:39,123 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:16:39,123 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 112 transitions. [2018-12-09 01:16:39,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 01:16:39,123 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:39,124 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:39,124 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:39,124 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:39,124 INFO L82 PathProgramCache]: Analyzing trace with hash -1252423700, now seen corresponding path program 1 times [2018-12-09 01:16:39,124 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:39,124 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:39,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:39,125 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:39,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:39,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:39,194 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:16:39,194 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:16:39,195 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:16:39,201 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:39,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:39,226 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:16:39,250 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:16:39,251 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:39,253 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:39,253 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:16:39,276 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:39,277 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:39,278 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-09 01:16:39,278 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:39,283 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:16:39,284 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-12-09 01:16:39,295 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:16:39,311 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:16:39,311 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7] total 8 [2018-12-09 01:16:39,311 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 01:16:39,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 01:16:39,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-12-09 01:16:39,312 INFO L87 Difference]: Start difference. First operand 101 states and 112 transitions. Second operand 9 states. [2018-12-09 01:16:39,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:39,736 INFO L93 Difference]: Finished difference Result 193 states and 229 transitions. [2018-12-09 01:16:39,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 01:16:39,737 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-12-09 01:16:39,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:39,739 INFO L225 Difference]: With dead ends: 193 [2018-12-09 01:16:39,739 INFO L226 Difference]: Without dead ends: 193 [2018-12-09 01:16:39,739 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 18 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2018-12-09 01:16:39,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-12-09 01:16:39,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 111. [2018-12-09 01:16:39,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-12-09 01:16:39,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 127 transitions. [2018-12-09 01:16:39,746 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 127 transitions. Word has length 21 [2018-12-09 01:16:39,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:39,746 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 127 transitions. [2018-12-09 01:16:39,746 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 01:16:39,746 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 127 transitions. [2018-12-09 01:16:39,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 01:16:39,747 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:39,747 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:39,747 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:39,747 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:39,747 INFO L82 PathProgramCache]: Analyzing trace with hash -1252423699, now seen corresponding path program 1 times [2018-12-09 01:16:39,747 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:39,748 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:39,749 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:39,749 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:39,749 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:39,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:39,860 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:16:39,860 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:16:39,860 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:16:39,869 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:39,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:39,884 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:16:39,888 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:16:39,888 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:39,894 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:16:39,894 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:39,899 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:39,900 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-12-09 01:16:39,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:39,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:39,932 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:16:39,933 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:39,944 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:16:39,945 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:39,950 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:39,950 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-09 01:16:39,956 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:16:39,970 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:16:39,970 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-12-09 01:16:39,971 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 01:16:39,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 01:16:39,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-12-09 01:16:39,971 INFO L87 Difference]: Start difference. First operand 111 states and 127 transitions. Second operand 10 states. [2018-12-09 01:16:40,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:40,544 INFO L93 Difference]: Finished difference Result 257 states and 303 transitions. [2018-12-09 01:16:40,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 01:16:40,544 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 21 [2018-12-09 01:16:40,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:40,545 INFO L225 Difference]: With dead ends: 257 [2018-12-09 01:16:40,545 INFO L226 Difference]: Without dead ends: 257 [2018-12-09 01:16:40,545 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 16 SyntacticMatches, 5 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=162, Unknown=0, NotChecked=0, Total=210 [2018-12-09 01:16:40,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-12-09 01:16:40,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 136. [2018-12-09 01:16:40,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-09 01:16:40,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 172 transitions. [2018-12-09 01:16:40,553 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 172 transitions. Word has length 21 [2018-12-09 01:16:40,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:40,553 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 172 transitions. [2018-12-09 01:16:40,553 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 01:16:40,553 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 172 transitions. [2018-12-09 01:16:40,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 01:16:40,553 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:40,554 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:40,554 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:40,554 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:40,554 INFO L82 PathProgramCache]: Analyzing trace with hash -1545826707, now seen corresponding path program 1 times [2018-12-09 01:16:40,554 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:40,554 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:40,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:40,555 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:40,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:40,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:40,602 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:16:40,602 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:16:40,602 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:16:40,608 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:40,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:40,620 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:16:40,629 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:16:40,644 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 01:16:40,644 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-12-09 01:16:40,644 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:16:40,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:16:40,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:16:40,644 INFO L87 Difference]: Start difference. First operand 136 states and 172 transitions. Second operand 5 states. [2018-12-09 01:16:40,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:40,655 INFO L93 Difference]: Finished difference Result 123 states and 148 transitions. [2018-12-09 01:16:40,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:16:40,656 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-12-09 01:16:40,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:40,656 INFO L225 Difference]: With dead ends: 123 [2018-12-09 01:16:40,656 INFO L226 Difference]: Without dead ends: 121 [2018-12-09 01:16:40,657 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 19 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:16:40,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-12-09 01:16:40,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2018-12-09 01:16:40,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-12-09 01:16:40,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 146 transitions. [2018-12-09 01:16:40,660 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 146 transitions. Word has length 21 [2018-12-09 01:16:40,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:40,660 INFO L480 AbstractCegarLoop]: Abstraction has 121 states and 146 transitions. [2018-12-09 01:16:40,661 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:16:40,661 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 146 transitions. [2018-12-09 01:16:40,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-09 01:16:40,661 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:40,661 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:40,661 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:40,661 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:40,662 INFO L82 PathProgramCache]: Analyzing trace with hash -817295485, now seen corresponding path program 1 times [2018-12-09 01:16:40,662 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:40,662 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:40,662 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:40,662 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:40,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:40,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:40,722 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:16:40,723 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:16:40,723 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:16:40,729 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:40,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:40,740 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:16:42,113 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:16:42,128 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:16:42,128 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6] total 9 [2018-12-09 01:16:42,128 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 01:16:42,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 01:16:42,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=63, Unknown=6, NotChecked=0, Total=90 [2018-12-09 01:16:42,128 INFO L87 Difference]: Start difference. First operand 121 states and 146 transitions. Second operand 10 states. [2018-12-09 01:16:42,707 WARN L180 SmtUtils]: Spent 533.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 11 [2018-12-09 01:16:42,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:42,909 INFO L93 Difference]: Finished difference Result 146 states and 176 transitions. [2018-12-09 01:16:42,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 01:16:42,909 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 25 [2018-12-09 01:16:42,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:42,910 INFO L225 Difference]: With dead ends: 146 [2018-12-09 01:16:42,910 INFO L226 Difference]: Without dead ends: 141 [2018-12-09 01:16:42,910 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 25 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=26, Invalid=78, Unknown=6, NotChecked=0, Total=110 [2018-12-09 01:16:42,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-09 01:16:42,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 117. [2018-12-09 01:16:42,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-12-09 01:16:42,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 141 transitions. [2018-12-09 01:16:42,914 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 141 transitions. Word has length 25 [2018-12-09 01:16:42,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:42,914 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 141 transitions. [2018-12-09 01:16:42,914 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 01:16:42,914 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 141 transitions. [2018-12-09 01:16:42,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 01:16:42,914 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:42,915 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:42,915 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:42,915 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:42,915 INFO L82 PathProgramCache]: Analyzing trace with hash 514865073, now seen corresponding path program 1 times [2018-12-09 01:16:42,915 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:42,915 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:42,916 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:42,916 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:42,916 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:42,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:42,934 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:16:42,934 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:16:42,934 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 01:16:42,935 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:16:42,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:16:42,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:16:42,935 INFO L87 Difference]: Start difference. First operand 117 states and 141 transitions. Second operand 5 states. [2018-12-09 01:16:42,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:42,957 INFO L93 Difference]: Finished difference Result 133 states and 156 transitions. [2018-12-09 01:16:42,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:16:42,957 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-09 01:16:42,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:42,958 INFO L225 Difference]: With dead ends: 133 [2018-12-09 01:16:42,958 INFO L226 Difference]: Without dead ends: 133 [2018-12-09 01:16:42,959 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:16:42,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-12-09 01:16:42,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 117. [2018-12-09 01:16:42,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-12-09 01:16:42,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 140 transitions. [2018-12-09 01:16:42,964 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 140 transitions. Word has length 29 [2018-12-09 01:16:42,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:42,964 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 140 transitions. [2018-12-09 01:16:42,964 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:16:42,964 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 140 transitions. [2018-12-09 01:16:42,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 01:16:42,965 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:42,965 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:42,966 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:42,966 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:42,966 INFO L82 PathProgramCache]: Analyzing trace with hash 514865125, now seen corresponding path program 1 times [2018-12-09 01:16:42,966 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:42,966 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:42,967 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:42,967 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:42,967 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:42,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:43,022 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:16:43,022 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:16:43,022 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:16:43,029 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:43,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:43,047 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:16:43,049 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:16:43,050 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:43,051 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:43,051 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:16:43,071 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:43,073 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:43,073 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-09 01:16:43,074 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:43,083 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:16:43,084 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-12-09 01:16:43,103 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:16:43,128 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:16:43,128 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7] total 8 [2018-12-09 01:16:43,128 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 01:16:43,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 01:16:43,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-12-09 01:16:43,129 INFO L87 Difference]: Start difference. First operand 117 states and 140 transitions. Second operand 9 states. [2018-12-09 01:16:43,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:43,424 INFO L93 Difference]: Finished difference Result 162 states and 195 transitions. [2018-12-09 01:16:43,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 01:16:43,424 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-12-09 01:16:43,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:43,425 INFO L225 Difference]: With dead ends: 162 [2018-12-09 01:16:43,425 INFO L226 Difference]: Without dead ends: 162 [2018-12-09 01:16:43,426 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 25 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2018-12-09 01:16:43,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-12-09 01:16:43,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 129. [2018-12-09 01:16:43,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-12-09 01:16:43,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 158 transitions. [2018-12-09 01:16:43,431 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 158 transitions. Word has length 29 [2018-12-09 01:16:43,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:43,431 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 158 transitions. [2018-12-09 01:16:43,431 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 01:16:43,432 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 158 transitions. [2018-12-09 01:16:43,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 01:16:43,432 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:43,432 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:43,433 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:43,433 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:43,433 INFO L82 PathProgramCache]: Analyzing trace with hash 514865126, now seen corresponding path program 1 times [2018-12-09 01:16:43,433 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:43,433 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:43,434 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:43,434 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:43,434 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:43,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:43,518 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 01:16:43,518 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:16:43,518 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:16:43,526 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:43,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:43,543 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:16:43,547 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:16:43,547 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:43,553 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:16:43,553 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:43,558 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:43,558 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-12-09 01:16:43,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:43,594 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:16:43,595 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:43,605 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:43,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:43,606 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:16:43,607 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:43,615 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:43,616 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-09 01:16:43,618 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 01:16:43,635 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:16:43,636 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-12-09 01:16:43,636 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 01:16:43,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 01:16:43,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-12-09 01:16:43,637 INFO L87 Difference]: Start difference. First operand 129 states and 158 transitions. Second operand 10 states. [2018-12-09 01:16:45,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:45,058 INFO L93 Difference]: Finished difference Result 182 states and 219 transitions. [2018-12-09 01:16:45,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 01:16:45,058 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 29 [2018-12-09 01:16:45,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:45,059 INFO L225 Difference]: With dead ends: 182 [2018-12-09 01:16:45,059 INFO L226 Difference]: Without dead ends: 182 [2018-12-09 01:16:45,059 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2018-12-09 01:16:45,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-12-09 01:16:45,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 141. [2018-12-09 01:16:45,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-09 01:16:45,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 177 transitions. [2018-12-09 01:16:45,064 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 177 transitions. Word has length 29 [2018-12-09 01:16:45,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:45,064 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 177 transitions. [2018-12-09 01:16:45,064 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 01:16:45,064 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 177 transitions. [2018-12-09 01:16:45,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 01:16:45,064 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:45,064 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:45,065 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:45,065 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:45,065 INFO L82 PathProgramCache]: Analyzing trace with hash 9306500, now seen corresponding path program 1 times [2018-12-09 01:16:45,065 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:45,065 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:45,066 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:45,066 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:45,066 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:45,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:45,089 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:16:45,089 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:16:45,089 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:16:45,099 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:45,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:45,113 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:16:45,121 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:16:45,136 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 01:16:45,136 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-12-09 01:16:45,136 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:16:45,136 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:16:45,136 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:16:45,136 INFO L87 Difference]: Start difference. First operand 141 states and 177 transitions. Second operand 5 states. [2018-12-09 01:16:45,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:45,145 INFO L93 Difference]: Finished difference Result 118 states and 137 transitions. [2018-12-09 01:16:45,145 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:16:45,145 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-09 01:16:45,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:45,145 INFO L225 Difference]: With dead ends: 118 [2018-12-09 01:16:45,146 INFO L226 Difference]: Without dead ends: 116 [2018-12-09 01:16:45,146 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:16:45,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-12-09 01:16:45,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-12-09 01:16:45,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-12-09 01:16:45,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 135 transitions. [2018-12-09 01:16:45,150 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 135 transitions. Word has length 29 [2018-12-09 01:16:45,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:45,150 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 135 transitions. [2018-12-09 01:16:45,150 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:16:45,150 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 135 transitions. [2018-12-09 01:16:45,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 01:16:45,151 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:45,151 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:45,151 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:45,152 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:45,152 INFO L82 PathProgramCache]: Analyzing trace with hash 1019181102, now seen corresponding path program 1 times [2018-12-09 01:16:45,152 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:45,152 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:45,153 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:45,153 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:45,153 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:45,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:45,197 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 01:16:45,197 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:16:45,197 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 01:16:45,197 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 01:16:45,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 01:16:45,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-09 01:16:45,198 INFO L87 Difference]: Start difference. First operand 116 states and 135 transitions. Second operand 7 states. [2018-12-09 01:16:45,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:45,338 INFO L93 Difference]: Finished difference Result 125 states and 145 transitions. [2018-12-09 01:16:45,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 01:16:45,338 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 32 [2018-12-09 01:16:45,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:45,339 INFO L225 Difference]: With dead ends: 125 [2018-12-09 01:16:45,339 INFO L226 Difference]: Without dead ends: 125 [2018-12-09 01:16:45,339 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-12-09 01:16:45,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-12-09 01:16:45,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 115. [2018-12-09 01:16:45,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-12-09 01:16:45,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 134 transitions. [2018-12-09 01:16:45,342 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 134 transitions. Word has length 32 [2018-12-09 01:16:45,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:45,342 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 134 transitions. [2018-12-09 01:16:45,343 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 01:16:45,343 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 134 transitions. [2018-12-09 01:16:45,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 01:16:45,343 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:45,343 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:45,344 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:45,344 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:45,344 INFO L82 PathProgramCache]: Analyzing trace with hash 1019181103, now seen corresponding path program 1 times [2018-12-09 01:16:45,344 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:45,344 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:45,345 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:45,345 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:45,345 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:45,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:45,424 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:16:45,424 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:16:45,424 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:16:45,432 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:45,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:45,448 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:16:45,471 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:45,473 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:16:45,473 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:45,480 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:45,480 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:45,481 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:16:45,481 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:45,486 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:45,486 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-12-09 01:16:45,520 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 01:16:45,535 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 01:16:45,535 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2018-12-09 01:16:45,535 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-09 01:16:45,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-09 01:16:45,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2018-12-09 01:16:45,536 INFO L87 Difference]: Start difference. First operand 115 states and 134 transitions. Second operand 16 states. [2018-12-09 01:16:45,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:45,913 INFO L93 Difference]: Finished difference Result 130 states and 147 transitions. [2018-12-09 01:16:45,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-09 01:16:45,913 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 32 [2018-12-09 01:16:45,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:45,913 INFO L225 Difference]: With dead ends: 130 [2018-12-09 01:16:45,913 INFO L226 Difference]: Without dead ends: 130 [2018-12-09 01:16:45,914 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=387, Unknown=0, NotChecked=0, Total=462 [2018-12-09 01:16:45,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-12-09 01:16:45,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 95. [2018-12-09 01:16:45,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-12-09 01:16:45,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 103 transitions. [2018-12-09 01:16:45,916 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 103 transitions. Word has length 32 [2018-12-09 01:16:45,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:45,916 INFO L480 AbstractCegarLoop]: Abstraction has 95 states and 103 transitions. [2018-12-09 01:16:45,916 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-09 01:16:45,916 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 103 transitions. [2018-12-09 01:16:45,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 01:16:45,917 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:45,917 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:45,917 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:45,917 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:45,917 INFO L82 PathProgramCache]: Analyzing trace with hash -789849662, now seen corresponding path program 1 times [2018-12-09 01:16:45,917 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:45,917 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:45,918 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:45,918 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:45,918 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:45,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:45,985 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:16:45,985 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:16:45,985 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:16:45,992 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:46,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:46,013 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:16:46,015 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:16:46,015 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:46,016 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:46,017 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:16:46,027 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:46,028 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:46,028 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:16:46,029 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:46,030 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:46,030 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 01:16:46,049 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:46,049 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-12-09 01:16:46,049 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:46,054 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:16:46,054 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-12-09 01:16:46,064 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:16:46,079 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:16:46,079 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10] total 10 [2018-12-09 01:16:46,079 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 01:16:46,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 01:16:46,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-12-09 01:16:46,080 INFO L87 Difference]: Start difference. First operand 95 states and 103 transitions. Second operand 11 states. [2018-12-09 01:16:46,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:46,260 INFO L93 Difference]: Finished difference Result 118 states and 133 transitions. [2018-12-09 01:16:46,261 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 01:16:46,261 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-12-09 01:16:46,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:46,261 INFO L225 Difference]: With dead ends: 118 [2018-12-09 01:16:46,261 INFO L226 Difference]: Without dead ends: 118 [2018-12-09 01:16:46,261 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 26 SyntacticMatches, 8 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-12-09 01:16:46,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-12-09 01:16:46,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 97. [2018-12-09 01:16:46,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-09 01:16:46,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 105 transitions. [2018-12-09 01:16:46,264 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 105 transitions. Word has length 32 [2018-12-09 01:16:46,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:46,265 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 105 transitions. [2018-12-09 01:16:46,265 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 01:16:46,265 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 105 transitions. [2018-12-09 01:16:46,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-09 01:16:46,265 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:46,265 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:46,266 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:46,266 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:46,266 INFO L82 PathProgramCache]: Analyzing trace with hash 180504079, now seen corresponding path program 1 times [2018-12-09 01:16:46,266 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:46,266 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:46,267 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:46,267 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:46,267 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:46,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:46,361 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:16:46,361 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:16:46,361 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:16:46,367 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:46,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:46,387 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:16:46,389 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:16:46,389 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:46,391 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:46,391 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:16:46,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:46,405 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:46,405 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:16:46,406 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:46,407 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:46,407 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 01:16:46,432 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:16:46,433 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:16:46,433 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:46,434 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:46,436 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:46,436 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:16, output treesize:12 [2018-12-09 01:16:48,439 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_4 Int) (v_entry_point_~c11~0.base_BEFORE_CALL_9 Int)) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_9 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_9) v_entry_point_~c11~0.offset_BEFORE_CALL_4)))) is different from true [2018-12-09 01:16:48,454 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-12-09 01:16:48,456 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 01:16:48,456 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:48,459 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:48,463 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:48,463 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:37, output treesize:18 [2018-12-09 01:16:48,502 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-12-09 01:16:48,503 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-12-09 01:16:48,503 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:48,505 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:48,507 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:48,507 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:5 [2018-12-09 01:16:48,516 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-12-09 01:16:48,531 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:16:48,531 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 18 [2018-12-09 01:16:48,531 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-09 01:16:48,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-09 01:16:48,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=270, Unknown=1, NotChecked=32, Total=342 [2018-12-09 01:16:48,532 INFO L87 Difference]: Start difference. First operand 97 states and 105 transitions. Second operand 19 states. [2018-12-09 01:16:52,609 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 01:16:56,628 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 18 [2018-12-09 01:16:58,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:16:58,982 INFO L93 Difference]: Finished difference Result 123 states and 138 transitions. [2018-12-09 01:16:58,983 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-09 01:16:58,983 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 34 [2018-12-09 01:16:58,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:16:58,983 INFO L225 Difference]: With dead ends: 123 [2018-12-09 01:16:58,983 INFO L226 Difference]: Without dead ends: 123 [2018-12-09 01:16:58,984 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 26 SyntacticMatches, 5 SemanticMatches, 29 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 12.2s TimeCoverageRelationStatistics Valid=119, Invalid=751, Unknown=4, NotChecked=56, Total=930 [2018-12-09 01:16:58,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-12-09 01:16:58,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 100. [2018-12-09 01:16:58,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-09 01:16:58,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 108 transitions. [2018-12-09 01:16:58,986 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 108 transitions. Word has length 34 [2018-12-09 01:16:58,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:16:58,986 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 108 transitions. [2018-12-09 01:16:58,986 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-09 01:16:58,986 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 108 transitions. [2018-12-09 01:16:58,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-09 01:16:58,986 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:16:58,986 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:16:58,987 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:16:58,987 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:16:58,987 INFO L82 PathProgramCache]: Analyzing trace with hash 180504080, now seen corresponding path program 1 times [2018-12-09 01:16:58,987 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:16:58,987 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:16:58,987 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:58,988 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:58,988 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:16:58,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:59,091 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:16:59,091 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:16:59,091 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:16:59,097 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:16:59,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:16:59,114 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:16:59,116 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:16:59,117 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:59,118 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:59,118 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:16:59,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:59,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:16:59,156 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:16:59,156 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:59,157 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:59,157 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 01:16:59,182 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:16:59,184 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:16:59,184 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:59,185 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:59,191 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:16:59,192 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:16:59,192 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:16:59,194 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:59,197 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:16:59,197 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-12-09 01:17:01,214 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_12 Int) (v_entry_point_~c11~0.offset_BEFORE_CALL_6 Int)) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_12 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_12) v_entry_point_~c11~0.offset_BEFORE_CALL_6)))) is different from true [2018-12-09 01:17:01,243 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 70 [2018-12-09 01:17:01,245 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 01:17:01,245 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:01,252 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:01,262 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 58 [2018-12-09 01:17:01,264 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 01:17:01,264 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:01,278 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:01,283 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:01,284 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:77, output treesize:31 [2018-12-09 01:17:01,343 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-12-09 01:17:01,345 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 16 [2018-12-09 01:17:01,345 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:01,348 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:01,352 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 20 [2018-12-09 01:17:01,354 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 11 [2018-12-09 01:17:01,354 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:01,356 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:01,359 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:01,359 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:45, output treesize:11 [2018-12-09 01:17:01,391 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-12-09 01:17:01,405 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:17:01,405 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 24 [2018-12-09 01:17:01,406 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-12-09 01:17:01,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-12-09 01:17:01,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=501, Unknown=1, NotChecked=44, Total=600 [2018-12-09 01:17:01,406 INFO L87 Difference]: Start difference. First operand 100 states and 108 transitions. Second operand 25 states. [2018-12-09 01:17:05,529 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 01:17:09,555 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 20 [2018-12-09 01:17:10,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:17:10,151 INFO L93 Difference]: Finished difference Result 122 states and 137 transitions. [2018-12-09 01:17:10,151 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-09 01:17:10,151 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 34 [2018-12-09 01:17:10,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:17:10,152 INFO L225 Difference]: With dead ends: 122 [2018-12-09 01:17:10,152 INFO L226 Difference]: Without dead ends: 122 [2018-12-09 01:17:10,152 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 22 SyntacticMatches, 3 SemanticMatches, 35 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 10.5s TimeCoverageRelationStatistics Valid=149, Invalid=1112, Unknown=3, NotChecked=68, Total=1332 [2018-12-09 01:17:10,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-12-09 01:17:10,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 99. [2018-12-09 01:17:10,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-09 01:17:10,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 107 transitions. [2018-12-09 01:17:10,154 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 107 transitions. Word has length 34 [2018-12-09 01:17:10,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:17:10,155 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 107 transitions. [2018-12-09 01:17:10,155 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-12-09 01:17:10,155 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 107 transitions. [2018-12-09 01:17:10,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-12-09 01:17:10,155 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:17:10,155 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:17:10,155 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:17:10,155 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:17:10,155 INFO L82 PathProgramCache]: Analyzing trace with hash 1714971376, now seen corresponding path program 1 times [2018-12-09 01:17:10,156 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:17:10,156 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:17:10,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:17:10,156 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:17:10,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:17:10,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:17:10,341 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-09 01:17:10,341 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:17:10,341 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:17:10,348 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:17:10,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:17:10,362 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:17:13,193 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:17:13,208 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:17:13,208 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-12-09 01:17:13,208 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-09 01:17:13,208 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-09 01:17:13,208 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=226, Unknown=6, NotChecked=0, Total=272 [2018-12-09 01:17:13,209 INFO L87 Difference]: Start difference. First operand 99 states and 107 transitions. Second operand 17 states. [2018-12-09 01:17:14,655 WARN L180 SmtUtils]: Spent 1.24 s on a formula simplification. DAG size of input: 29 DAG size of output: 25 [2018-12-09 01:17:15,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:17:15,491 INFO L93 Difference]: Finished difference Result 123 states and 137 transitions. [2018-12-09 01:17:15,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 01:17:15,491 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 35 [2018-12-09 01:17:15,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:17:15,492 INFO L225 Difference]: With dead ends: 123 [2018-12-09 01:17:15,492 INFO L226 Difference]: Without dead ends: 116 [2018-12-09 01:17:15,492 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 34 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=66, Invalid=390, Unknown=6, NotChecked=0, Total=462 [2018-12-09 01:17:15,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-12-09 01:17:15,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 93. [2018-12-09 01:17:15,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-09 01:17:15,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 100 transitions. [2018-12-09 01:17:15,494 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 100 transitions. Word has length 35 [2018-12-09 01:17:15,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:17:15,494 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 100 transitions. [2018-12-09 01:17:15,494 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-09 01:17:15,495 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 100 transitions. [2018-12-09 01:17:15,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-09 01:17:15,495 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:17:15,495 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:17:15,495 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:17:15,495 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:17:15,495 INFO L82 PathProgramCache]: Analyzing trace with hash 1753082646, now seen corresponding path program 1 times [2018-12-09 01:17:15,495 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:17:15,495 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:17:15,496 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:17:15,496 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:17:15,496 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:17:15,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:17:15,680 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-09 01:17:15,680 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:17:15,680 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:17:15,687 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:17:15,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:17:15,707 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:17:15,709 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:17:15,709 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:15,710 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:15,710 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:17:15,714 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:17:15,715 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:17:15,715 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:17:15,715 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:15,716 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:15,716 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 01:17:15,723 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:17:15,724 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:17:15,724 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:15,726 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:15,731 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:17:15,732 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:17:15,732 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:15,733 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:15,736 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:15,736 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-12-09 01:17:17,738 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_17 Int) (v_entry_point_~c11~0.offset_BEFORE_CALL_8 Int)) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_17 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_17) v_entry_point_~c11~0.offset_BEFORE_CALL_8)))) is different from true [2018-12-09 01:17:17,741 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:17:17,741 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:17,746 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:17:17,746 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:14 [2018-12-09 01:17:21,765 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 14 [2018-12-09 01:17:21,824 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-12-09 01:17:21,826 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:17:21,827 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:21,830 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:21,840 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 35 [2018-12-09 01:17:21,842 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 11 [2018-12-09 01:17:21,842 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:21,846 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:21,853 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:21,853 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:62, output treesize:26 [2018-12-09 01:17:21,904 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-12-09 01:17:21,906 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-12-09 01:17:21,906 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:21,907 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:21,911 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:17:21,911 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:29 [2018-12-09 01:17:21,959 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-12-09 01:17:21,960 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-09 01:17:21,960 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:21,963 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-09 01:17:21,963 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:21,964 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:21,965 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:21,965 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:33, output treesize:5 [2018-12-09 01:17:22,317 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:17:22,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:17:22,318 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-09 01:17:22,319 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:22,322 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:17:22,322 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-12-09 01:17:22,344 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 4 not checked. [2018-12-09 01:17:22,359 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:17:22,359 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 22] total 28 [2018-12-09 01:17:22,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-12-09 01:17:22,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-12-09 01:17:22,360 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=688, Unknown=3, NotChecked=52, Total=812 [2018-12-09 01:17:22,360 INFO L87 Difference]: Start difference. First operand 93 states and 100 transitions. Second operand 29 states. [2018-12-09 01:17:27,074 WARN L180 SmtUtils]: Spent 323.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-12-09 01:17:33,598 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 01:17:37,948 WARN L180 SmtUtils]: Spent 2.33 s on a formula simplification that was a NOOP. DAG size: 25 [2018-12-09 01:17:40,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:17:40,824 INFO L93 Difference]: Finished difference Result 140 states and 158 transitions. [2018-12-09 01:17:40,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-12-09 01:17:40,825 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 43 [2018-12-09 01:17:40,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:17:40,825 INFO L225 Difference]: With dead ends: 140 [2018-12-09 01:17:40,825 INFO L226 Difference]: Without dead ends: 140 [2018-12-09 01:17:40,826 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 29 SyntacticMatches, 8 SemanticMatches, 48 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 474 ImplicationChecksByTransitivity, 19.6s TimeCoverageRelationStatistics Valid=243, Invalid=2106, Unknown=7, NotChecked=94, Total=2450 [2018-12-09 01:17:40,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-09 01:17:40,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 124. [2018-12-09 01:17:40,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-12-09 01:17:40,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 145 transitions. [2018-12-09 01:17:40,828 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 145 transitions. Word has length 43 [2018-12-09 01:17:40,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:17:40,829 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 145 transitions. [2018-12-09 01:17:40,829 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-12-09 01:17:40,829 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 145 transitions. [2018-12-09 01:17:40,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-09 01:17:40,829 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:17:40,829 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:17:40,829 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:17:40,829 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:17:40,830 INFO L82 PathProgramCache]: Analyzing trace with hash 1753082647, now seen corresponding path program 1 times [2018-12-09 01:17:40,830 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:17:40,830 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:17:40,830 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:17:40,830 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:17:40,830 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:17:40,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:17:41,114 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 01:17:41,114 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:17:41,114 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:17:41,120 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:17:41,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:17:41,140 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:17:41,142 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:17:41,142 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:41,143 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:41,143 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:17:41,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:17:41,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:17:41,152 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:17:41,152 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:41,153 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:41,153 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 01:17:41,161 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:17:41,162 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:17:41,162 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:41,163 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:41,168 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:17:41,169 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:17:41,170 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:41,171 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:41,174 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:41,174 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-12-09 01:17:43,176 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_20 Int) (v_entry_point_~c11~0.offset_BEFORE_CALL_10 Int)) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_20) v_entry_point_~c11~0.offset_BEFORE_CALL_10) v_entry_point_~c11~0.base_BEFORE_CALL_20))) is different from true [2018-12-09 01:17:44,258 WARN L180 SmtUtils]: Spent 467.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 01:17:44,261 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:17:44,261 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:44,268 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:17:44,268 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:44,273 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:17:44,273 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:27, output treesize:22 [2018-12-09 01:17:48,302 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 21 [2018-12-09 01:17:48,363 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-12-09 01:17:48,364 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 11 [2018-12-09 01:17:48,365 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:48,368 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:48,379 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 35 [2018-12-09 01:17:48,380 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:17:48,380 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:48,385 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:48,392 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:48,392 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:67, output treesize:58 [2018-12-09 01:17:48,547 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 69 [2018-12-09 01:17:48,549 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-12-09 01:17:48,549 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:17:48,557 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 11 [2018-12-09 01:17:48,558 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:48,563 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:17:48,570 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-12-09 01:17:48,571 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-12-09 01:17:48,572 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:48,578 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:48,582 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:48,582 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:88, output treesize:14 [2018-12-09 01:17:48,972 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:17:48,973 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:17:48,973 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:48,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:17:48,980 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:17:48,980 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:17:48,980 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:17:48,984 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:17:48,984 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-09 01:17:48,988 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-12-09 01:17:49,003 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:17:49,004 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 24] total 32 [2018-12-09 01:17:49,004 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-12-09 01:17:49,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-12-09 01:17:49,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=911, Unknown=4, NotChecked=60, Total=1056 [2018-12-09 01:17:49,004 INFO L87 Difference]: Start difference. First operand 124 states and 145 transitions. Second operand 33 states. [2018-12-09 01:17:58,490 WARN L180 SmtUtils]: Spent 324.00 ms on a formula simplification that was a NOOP. DAG size: 26 [2018-12-09 01:18:11,314 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 15 [2018-12-09 01:18:13,986 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 18 [2018-12-09 01:18:18,347 WARN L180 SmtUtils]: Spent 2.34 s on a formula simplification that was a NOOP. DAG size: 34 [2018-12-09 01:18:21,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:21,649 INFO L93 Difference]: Finished difference Result 146 states and 165 transitions. [2018-12-09 01:18:21,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-12-09 01:18:21,649 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 43 [2018-12-09 01:18:21,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:21,650 INFO L225 Difference]: With dead ends: 146 [2018-12-09 01:18:21,650 INFO L226 Difference]: Without dead ends: 146 [2018-12-09 01:18:21,650 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 30 SyntacticMatches, 6 SemanticMatches, 50 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 508 ImplicationChecksByTransitivity, 26.9s TimeCoverageRelationStatistics Valid=247, Invalid=2295, Unknown=12, NotChecked=98, Total=2652 [2018-12-09 01:18:21,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-09 01:18:21,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 114. [2018-12-09 01:18:21,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-12-09 01:18:21,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 125 transitions. [2018-12-09 01:18:21,653 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 125 transitions. Word has length 43 [2018-12-09 01:18:21,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:21,654 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 125 transitions. [2018-12-09 01:18:21,654 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-12-09 01:18:21,654 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 125 transitions. [2018-12-09 01:18:21,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-09 01:18:21,654 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:21,654 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:21,655 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:21,655 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:21,655 INFO L82 PathProgramCache]: Analyzing trace with hash 1344258421, now seen corresponding path program 1 times [2018-12-09 01:18:21,655 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:21,655 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:21,656 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:21,656 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:21,656 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:21,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:21,676 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:18:21,677 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:21,677 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:21,683 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:21,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:21,703 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:21,708 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:18:21,722 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 01:18:21,723 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-12-09 01:18:21,723 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:18:21,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:18:21,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:18:21,723 INFO L87 Difference]: Start difference. First operand 114 states and 125 transitions. Second operand 5 states. [2018-12-09 01:18:21,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:21,731 INFO L93 Difference]: Finished difference Result 95 states and 100 transitions. [2018-12-09 01:18:21,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:18:21,731 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2018-12-09 01:18:21,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:21,731 INFO L225 Difference]: With dead ends: 95 [2018-12-09 01:18:21,731 INFO L226 Difference]: Without dead ends: 91 [2018-12-09 01:18:21,732 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:18:21,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-12-09 01:18:21,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 91. [2018-12-09 01:18:21,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-12-09 01:18:21,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 96 transitions. [2018-12-09 01:18:21,733 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 96 transitions. Word has length 43 [2018-12-09 01:18:21,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:21,733 INFO L480 AbstractCegarLoop]: Abstraction has 91 states and 96 transitions. [2018-12-09 01:18:21,733 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:18:21,733 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 96 transitions. [2018-12-09 01:18:21,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 01:18:21,734 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:21,734 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:21,734 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:21,734 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:21,734 INFO L82 PathProgramCache]: Analyzing trace with hash -658039088, now seen corresponding path program 1 times [2018-12-09 01:18:21,734 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:21,734 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:21,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:21,735 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:21,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:21,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:21,753 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:18:21,754 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:18:21,754 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 01:18:21,754 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:18:21,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:18:21,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:18:21,754 INFO L87 Difference]: Start difference. First operand 91 states and 96 transitions. Second operand 5 states. [2018-12-09 01:18:21,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:21,763 INFO L93 Difference]: Finished difference Result 98 states and 104 transitions. [2018-12-09 01:18:21,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:18:21,763 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-12-09 01:18:21,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:21,763 INFO L225 Difference]: With dead ends: 98 [2018-12-09 01:18:21,764 INFO L226 Difference]: Without dead ends: 98 [2018-12-09 01:18:21,764 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:18:21,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-12-09 01:18:21,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 93. [2018-12-09 01:18:21,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-09 01:18:21,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 98 transitions. [2018-12-09 01:18:21,765 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 98 transitions. Word has length 47 [2018-12-09 01:18:21,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:21,765 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 98 transitions. [2018-12-09 01:18:21,765 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:18:21,766 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 98 transitions. [2018-12-09 01:18:21,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 01:18:21,766 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:21,766 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:21,766 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:21,766 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:21,766 INFO L82 PathProgramCache]: Analyzing trace with hash -854552593, now seen corresponding path program 1 times [2018-12-09 01:18:21,766 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:21,766 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:21,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:21,767 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:21,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:21,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:21,793 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-09 01:18:21,793 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:18:21,793 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 01:18:21,793 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 01:18:21,793 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 01:18:21,793 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-09 01:18:21,793 INFO L87 Difference]: Start difference. First operand 93 states and 98 transitions. Second operand 8 states. [2018-12-09 01:18:21,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:21,968 INFO L93 Difference]: Finished difference Result 109 states and 114 transitions. [2018-12-09 01:18:21,968 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 01:18:21,968 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-12-09 01:18:21,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:21,969 INFO L225 Difference]: With dead ends: 109 [2018-12-09 01:18:21,969 INFO L226 Difference]: Without dead ends: 109 [2018-12-09 01:18:21,969 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2018-12-09 01:18:21,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-12-09 01:18:21,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 103. [2018-12-09 01:18:21,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-09 01:18:21,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 109 transitions. [2018-12-09 01:18:21,971 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 109 transitions. Word has length 47 [2018-12-09 01:18:21,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:21,972 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 109 transitions. [2018-12-09 01:18:21,972 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 01:18:21,972 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 109 transitions. [2018-12-09 01:18:21,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 01:18:21,972 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:21,972 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:21,973 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:21,973 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:21,973 INFO L82 PathProgramCache]: Analyzing trace with hash -854552592, now seen corresponding path program 1 times [2018-12-09 01:18:21,973 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:21,973 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:21,974 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:21,974 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:21,974 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:21,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:22,102 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 01:18:22,102 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:22,102 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:22,109 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:22,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:22,132 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:22,135 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:18:22,135 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:22,140 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:18:22,140 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:22,144 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:22,144 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-12-09 01:18:22,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:22,174 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:18:22,174 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:22,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:22,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:22,182 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:18:22,182 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:22,186 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:22,187 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-09 01:18:22,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:22,192 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:18:22,192 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:22,199 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:22,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:22,200 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:18:22,200 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:22,204 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:22,204 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-09 01:18:22,253 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 17 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 01:18:22,268 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:18:22,268 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16] total 18 [2018-12-09 01:18:22,269 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-09 01:18:22,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-09 01:18:22,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=300, Unknown=0, NotChecked=0, Total=342 [2018-12-09 01:18:22,269 INFO L87 Difference]: Start difference. First operand 103 states and 109 transitions. Second operand 19 states. [2018-12-09 01:18:22,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:22,845 INFO L93 Difference]: Finished difference Result 122 states and 129 transitions. [2018-12-09 01:18:22,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-09 01:18:22,846 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-12-09 01:18:22,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:22,846 INFO L225 Difference]: With dead ends: 122 [2018-12-09 01:18:22,846 INFO L226 Difference]: Without dead ends: 122 [2018-12-09 01:18:22,846 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 43 SyntacticMatches, 6 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=110, Invalid=702, Unknown=0, NotChecked=0, Total=812 [2018-12-09 01:18:22,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-12-09 01:18:22,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 103. [2018-12-09 01:18:22,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-09 01:18:22,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 108 transitions. [2018-12-09 01:18:22,848 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 108 transitions. Word has length 47 [2018-12-09 01:18:22,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:22,848 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 108 transitions. [2018-12-09 01:18:22,848 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-09 01:18:22,849 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 108 transitions. [2018-12-09 01:18:22,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-09 01:18:22,849 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:22,849 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:22,849 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:22,849 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:22,849 INFO L82 PathProgramCache]: Analyzing trace with hash -1632542409, now seen corresponding path program 1 times [2018-12-09 01:18:22,849 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:22,849 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:22,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:22,850 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:22,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:22,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:22,890 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-09 01:18:22,890 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:18:22,890 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-09 01:18:22,890 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 01:18:22,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 01:18:22,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-12-09 01:18:22,891 INFO L87 Difference]: Start difference. First operand 103 states and 108 transitions. Second operand 9 states. [2018-12-09 01:18:23,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:23,101 INFO L93 Difference]: Finished difference Result 107 states and 112 transitions. [2018-12-09 01:18:23,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 01:18:23,101 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 48 [2018-12-09 01:18:23,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:23,102 INFO L225 Difference]: With dead ends: 107 [2018-12-09 01:18:23,102 INFO L226 Difference]: Without dead ends: 107 [2018-12-09 01:18:23,102 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=160, Unknown=0, NotChecked=0, Total=210 [2018-12-09 01:18:23,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-12-09 01:18:23,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 102. [2018-12-09 01:18:23,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-09 01:18:23,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 107 transitions. [2018-12-09 01:18:23,104 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 107 transitions. Word has length 48 [2018-12-09 01:18:23,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:23,104 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 107 transitions. [2018-12-09 01:18:23,104 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 01:18:23,104 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 107 transitions. [2018-12-09 01:18:23,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-09 01:18:23,104 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:23,104 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:23,105 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:23,105 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:23,105 INFO L82 PathProgramCache]: Analyzing trace with hash -1632542408, now seen corresponding path program 1 times [2018-12-09 01:18:23,105 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:23,105 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:23,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:23,105 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:23,106 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:23,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:23,284 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:18:23,284 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:23,284 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:23,290 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:23,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:23,317 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:23,320 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:18:23,320 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:23,327 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:18:23,327 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:23,331 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:23,332 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-12-09 01:18:23,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:23,369 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:23,369 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:18:23,370 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:23,376 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:18:23,376 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:23,382 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:23,382 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-09 01:18:23,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:23,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:23,390 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:18:23,390 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:23,396 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:18:23,396 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:23,400 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:23,400 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-09 01:18:23,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:23,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:23,436 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:18:23,436 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:23,441 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:18:23,441 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:23,445 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:23,445 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-09 01:18:23,466 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-09 01:18:23,480 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:18:23,480 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 19 [2018-12-09 01:18:23,481 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-09 01:18:23,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-09 01:18:23,481 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=334, Unknown=0, NotChecked=0, Total=380 [2018-12-09 01:18:23,481 INFO L87 Difference]: Start difference. First operand 102 states and 107 transitions. Second operand 20 states. [2018-12-09 01:18:25,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:25,113 INFO L93 Difference]: Finished difference Result 120 states and 127 transitions. [2018-12-09 01:18:25,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-09 01:18:25,114 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 48 [2018-12-09 01:18:25,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:25,115 INFO L225 Difference]: With dead ends: 120 [2018-12-09 01:18:25,115 INFO L226 Difference]: Without dead ends: 120 [2018-12-09 01:18:25,116 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 46 SyntacticMatches, 6 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=133, Invalid=859, Unknown=0, NotChecked=0, Total=992 [2018-12-09 01:18:25,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-12-09 01:18:25,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 101. [2018-12-09 01:18:25,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-09 01:18:25,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 106 transitions. [2018-12-09 01:18:25,120 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 106 transitions. Word has length 48 [2018-12-09 01:18:25,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:25,120 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 106 transitions. [2018-12-09 01:18:25,120 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-09 01:18:25,121 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 106 transitions. [2018-12-09 01:18:25,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-09 01:18:25,121 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:25,122 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:25,122 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:25,122 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:25,122 INFO L82 PathProgramCache]: Analyzing trace with hash -773284884, now seen corresponding path program 1 times [2018-12-09 01:18:25,123 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:25,123 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:25,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:25,124 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:25,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:25,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:25,194 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-09 01:18:25,194 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:18:25,194 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-09 01:18:25,194 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 01:18:25,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 01:18:25,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-12-09 01:18:25,195 INFO L87 Difference]: Start difference. First operand 101 states and 106 transitions. Second operand 13 states. [2018-12-09 01:18:25,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:25,474 INFO L93 Difference]: Finished difference Result 133 states and 140 transitions. [2018-12-09 01:18:25,474 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-09 01:18:25,474 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 62 [2018-12-09 01:18:25,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:25,475 INFO L225 Difference]: With dead ends: 133 [2018-12-09 01:18:25,475 INFO L226 Difference]: Without dead ends: 133 [2018-12-09 01:18:25,475 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=391, Unknown=0, NotChecked=0, Total=462 [2018-12-09 01:18:25,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-12-09 01:18:25,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 124. [2018-12-09 01:18:25,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-12-09 01:18:25,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-12-09 01:18:25,478 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 62 [2018-12-09 01:18:25,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:25,478 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-12-09 01:18:25,478 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 01:18:25,479 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-12-09 01:18:25,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-09 01:18:25,479 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:25,479 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:25,479 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:25,480 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:25,480 INFO L82 PathProgramCache]: Analyzing trace with hash -773284883, now seen corresponding path program 1 times [2018-12-09 01:18:25,480 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:25,480 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:25,480 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:25,481 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:25,481 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:25,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:25,619 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:18:25,619 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:25,619 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:25,632 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:25,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:25,657 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:25,799 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:18:25,814 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:18:25,814 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 19] total 25 [2018-12-09 01:18:25,814 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-09 01:18:25,815 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-09 01:18:25,815 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=594, Unknown=0, NotChecked=0, Total=650 [2018-12-09 01:18:25,815 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 26 states. [2018-12-09 01:18:26,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:26,349 INFO L93 Difference]: Finished difference Result 123 states and 130 transitions. [2018-12-09 01:18:26,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-09 01:18:26,349 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 62 [2018-12-09 01:18:26,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:26,350 INFO L225 Difference]: With dead ends: 123 [2018-12-09 01:18:26,350 INFO L226 Difference]: Without dead ends: 123 [2018-12-09 01:18:26,350 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 48 SyntacticMatches, 6 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 229 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=154, Invalid=1568, Unknown=0, NotChecked=0, Total=1722 [2018-12-09 01:18:26,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-12-09 01:18:26,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 123. [2018-12-09 01:18:26,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-12-09 01:18:26,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 130 transitions. [2018-12-09 01:18:26,352 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 130 transitions. Word has length 62 [2018-12-09 01:18:26,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:26,352 INFO L480 AbstractCegarLoop]: Abstraction has 123 states and 130 transitions. [2018-12-09 01:18:26,352 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-09 01:18:26,352 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 130 transitions. [2018-12-09 01:18:26,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-12-09 01:18:26,353 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:26,353 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:26,353 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:26,353 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:26,353 INFO L82 PathProgramCache]: Analyzing trace with hash -632987292, now seen corresponding path program 1 times [2018-12-09 01:18:26,353 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:26,353 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:26,354 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:26,354 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:26,354 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:26,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:26,437 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-09 01:18:26,438 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:18:26,438 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-12-09 01:18:26,438 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-09 01:18:26,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-09 01:18:26,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-12-09 01:18:26,438 INFO L87 Difference]: Start difference. First operand 123 states and 130 transitions. Second operand 15 states. [2018-12-09 01:18:26,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:26,611 INFO L93 Difference]: Finished difference Result 126 states and 133 transitions. [2018-12-09 01:18:26,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 01:18:26,611 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 63 [2018-12-09 01:18:26,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:26,612 INFO L225 Difference]: With dead ends: 126 [2018-12-09 01:18:26,612 INFO L226 Difference]: Without dead ends: 126 [2018-12-09 01:18:26,612 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=369, Unknown=0, NotChecked=0, Total=420 [2018-12-09 01:18:26,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-12-09 01:18:26,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 99. [2018-12-09 01:18:26,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-09 01:18:26,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 104 transitions. [2018-12-09 01:18:26,614 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 104 transitions. Word has length 63 [2018-12-09 01:18:26,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:26,615 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 104 transitions. [2018-12-09 01:18:26,615 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-09 01:18:26,615 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 104 transitions. [2018-12-09 01:18:26,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-09 01:18:26,615 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:26,615 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:26,616 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:26,616 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:26,616 INFO L82 PathProgramCache]: Analyzing trace with hash 1765117560, now seen corresponding path program 1 times [2018-12-09 01:18:26,616 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:26,616 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:26,616 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:26,616 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:26,616 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:26,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:26,641 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:18:26,642 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:18:26,642 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 01:18:26,642 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:18:26,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:18:26,642 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:18:26,642 INFO L87 Difference]: Start difference. First operand 99 states and 104 transitions. Second operand 5 states. [2018-12-09 01:18:26,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:26,649 INFO L93 Difference]: Finished difference Result 99 states and 102 transitions. [2018-12-09 01:18:26,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:18:26,649 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-12-09 01:18:26,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:26,649 INFO L225 Difference]: With dead ends: 99 [2018-12-09 01:18:26,649 INFO L226 Difference]: Without dead ends: 99 [2018-12-09 01:18:26,650 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:18:26,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-12-09 01:18:26,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 97. [2018-12-09 01:18:26,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-09 01:18:26,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 100 transitions. [2018-12-09 01:18:26,651 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 100 transitions. Word has length 72 [2018-12-09 01:18:26,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:26,651 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 100 transitions. [2018-12-09 01:18:26,651 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:18:26,651 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 100 transitions. [2018-12-09 01:18:26,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-09 01:18:26,652 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:26,652 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:26,652 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:26,652 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:26,652 INFO L82 PathProgramCache]: Analyzing trace with hash 1556016431, now seen corresponding path program 1 times [2018-12-09 01:18:26,652 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:26,652 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:26,653 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:26,653 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:26,653 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:26,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:26,889 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:18:26,889 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:26,889 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:26,897 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:26,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:26,924 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:26,950 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 01:18:26,951 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 01:18:26,951 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:26,952 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:26,953 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:26,953 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-09 01:18:27,231 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2018-12-09 01:18:27,234 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 3 [2018-12-09 01:18:27,234 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:27,237 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:27,238 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:27,238 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:28, output treesize:3 [2018-12-09 01:18:27,242 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-09 01:18:27,257 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 01:18:27,257 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [21] total 35 [2018-12-09 01:18:27,257 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-12-09 01:18:27,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-12-09 01:18:27,257 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=1164, Unknown=0, NotChecked=0, Total=1260 [2018-12-09 01:18:27,257 INFO L87 Difference]: Start difference. First operand 97 states and 100 transitions. Second operand 36 states. [2018-12-09 01:18:27,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:27,732 INFO L93 Difference]: Finished difference Result 102 states and 104 transitions. [2018-12-09 01:18:27,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-09 01:18:27,733 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 71 [2018-12-09 01:18:27,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:27,733 INFO L225 Difference]: With dead ends: 102 [2018-12-09 01:18:27,733 INFO L226 Difference]: Without dead ends: 100 [2018-12-09 01:18:27,734 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 56 SyntacticMatches, 2 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 320 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=179, Invalid=2173, Unknown=0, NotChecked=0, Total=2352 [2018-12-09 01:18:27,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-12-09 01:18:27,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2018-12-09 01:18:27,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-09 01:18:27,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 102 transitions. [2018-12-09 01:18:27,737 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 102 transitions. Word has length 71 [2018-12-09 01:18:27,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:27,737 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 102 transitions. [2018-12-09 01:18:27,737 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-12-09 01:18:27,737 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 102 transitions. [2018-12-09 01:18:27,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-09 01:18:27,737 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:27,738 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:27,738 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:27,738 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:27,738 INFO L82 PathProgramCache]: Analyzing trace with hash 991869487, now seen corresponding path program 1 times [2018-12-09 01:18:27,738 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:27,738 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:27,739 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:27,739 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:27,739 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:27,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:27,981 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:18:27,981 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:27,981 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:27,988 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:28,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:28,015 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:28,053 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 01:18:28,055 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 01:18:28,055 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:28,056 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:28,057 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:28,057 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-09 01:18:28,334 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2018-12-09 01:18:28,337 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 3 [2018-12-09 01:18:28,337 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:28,341 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:28,342 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:28,342 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:28, output treesize:3 [2018-12-09 01:18:28,363 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-09 01:18:28,383 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 01:18:28,383 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [21] total 35 [2018-12-09 01:18:28,383 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-12-09 01:18:28,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-12-09 01:18:28,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=1164, Unknown=0, NotChecked=0, Total=1260 [2018-12-09 01:18:28,384 INFO L87 Difference]: Start difference. First operand 100 states and 102 transitions. Second operand 36 states. [2018-12-09 01:18:29,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:29,006 INFO L93 Difference]: Finished difference Result 99 states and 101 transitions. [2018-12-09 01:18:29,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-09 01:18:29,007 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 72 [2018-12-09 01:18:29,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:29,008 INFO L225 Difference]: With dead ends: 99 [2018-12-09 01:18:29,008 INFO L226 Difference]: Without dead ends: 99 [2018-12-09 01:18:29,009 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 56 SyntacticMatches, 3 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 270 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=166, Invalid=1904, Unknown=0, NotChecked=0, Total=2070 [2018-12-09 01:18:29,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-12-09 01:18:29,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-12-09 01:18:29,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-09 01:18:29,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 101 transitions. [2018-12-09 01:18:29,012 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 101 transitions. Word has length 72 [2018-12-09 01:18:29,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:29,013 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 101 transitions. [2018-12-09 01:18:29,013 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-12-09 01:18:29,013 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 101 transitions. [2018-12-09 01:18:29,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-09 01:18:29,013 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:29,014 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:29,014 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:29,014 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:29,015 INFO L82 PathProgramCache]: Analyzing trace with hash 683372519, now seen corresponding path program 1 times [2018-12-09 01:18:29,015 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:29,015 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:29,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:29,016 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:29,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:29,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:29,065 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:18:29,065 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:29,065 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:29,074 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:29,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:29,099 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:29,103 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:18:29,118 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:18:29,118 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-12-09 01:18:29,118 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:18:29,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:18:29,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:18:29,119 INFO L87 Difference]: Start difference. First operand 99 states and 101 transitions. Second operand 5 states. [2018-12-09 01:18:29,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:29,126 INFO L93 Difference]: Finished difference Result 98 states and 100 transitions. [2018-12-09 01:18:29,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:18:29,126 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2018-12-09 01:18:29,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:29,126 INFO L225 Difference]: With dead ends: 98 [2018-12-09 01:18:29,127 INFO L226 Difference]: Without dead ends: 98 [2018-12-09 01:18:29,127 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 72 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:18:29,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-12-09 01:18:29,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-12-09 01:18:29,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-12-09 01:18:29,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 100 transitions. [2018-12-09 01:18:29,128 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 100 transitions. Word has length 73 [2018-12-09 01:18:29,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:29,128 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 100 transitions. [2018-12-09 01:18:29,128 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:18:29,128 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 100 transitions. [2018-12-09 01:18:29,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-09 01:18:29,128 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:29,129 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:29,129 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:29,129 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:29,129 INFO L82 PathProgramCache]: Analyzing trace with hash -290287964, now seen corresponding path program 1 times [2018-12-09 01:18:29,129 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:29,129 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:29,130 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:29,130 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:29,130 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:29,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:29,164 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:18:29,164 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:29,164 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:29,172 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:29,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:29,197 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:29,199 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:18:29,199 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:29,200 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:29,200 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:18:29,204 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:18:29,219 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:18:29,219 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-12-09 01:18:29,219 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 01:18:29,219 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 01:18:29,219 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 01:18:29,219 INFO L87 Difference]: Start difference. First operand 98 states and 100 transitions. Second operand 6 states. [2018-12-09 01:18:29,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:29,309 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2018-12-09 01:18:29,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 01:18:29,309 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2018-12-09 01:18:29,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:29,310 INFO L225 Difference]: With dead ends: 106 [2018-12-09 01:18:29,310 INFO L226 Difference]: Without dead ends: 106 [2018-12-09 01:18:29,310 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 78 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 01:18:29,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-09 01:18:29,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-12-09 01:18:29,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-09 01:18:29,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 110 transitions. [2018-12-09 01:18:29,312 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 110 transitions. Word has length 74 [2018-12-09 01:18:29,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:29,312 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 110 transitions. [2018-12-09 01:18:29,312 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 01:18:29,313 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 110 transitions. [2018-12-09 01:18:29,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-12-09 01:18:29,313 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:29,313 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:29,313 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:29,313 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:29,314 INFO L82 PathProgramCache]: Analyzing trace with hash -293937124, now seen corresponding path program 1 times [2018-12-09 01:18:29,314 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:29,314 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:29,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:29,314 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:29,315 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:29,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:29,363 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:18:29,363 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:29,363 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:29,369 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:29,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:29,404 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:29,406 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:18:29,406 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:29,407 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:29,407 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:18:29,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:29,431 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-12-09 01:18:29,431 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:29,433 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:18:29,433 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-12-09 01:18:29,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:29,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:29,451 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-09 01:18:29,451 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:29,456 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:18:29,456 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-12-09 01:18:29,471 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:18:29,490 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:18:29,490 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8] total 9 [2018-12-09 01:18:29,490 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 01:18:29,490 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 01:18:29,490 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-12-09 01:18:29,490 INFO L87 Difference]: Start difference. First operand 106 states and 110 transitions. Second operand 10 states. [2018-12-09 01:18:29,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:29,681 INFO L93 Difference]: Finished difference Result 111 states and 115 transitions. [2018-12-09 01:18:29,681 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 01:18:29,681 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 75 [2018-12-09 01:18:29,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:29,681 INFO L225 Difference]: With dead ends: 111 [2018-12-09 01:18:29,681 INFO L226 Difference]: Without dead ends: 111 [2018-12-09 01:18:29,681 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 73 SyntacticMatches, 5 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2018-12-09 01:18:29,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-12-09 01:18:29,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 102. [2018-12-09 01:18:29,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-09 01:18:29,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 104 transitions. [2018-12-09 01:18:29,683 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 104 transitions. Word has length 75 [2018-12-09 01:18:29,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:29,683 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 104 transitions. [2018-12-09 01:18:29,683 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 01:18:29,683 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 104 transitions. [2018-12-09 01:18:29,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-09 01:18:29,683 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:29,683 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:29,684 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:29,684 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:29,684 INFO L82 PathProgramCache]: Analyzing trace with hash 206154598, now seen corresponding path program 1 times [2018-12-09 01:18:29,684 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:29,684 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:29,684 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:29,684 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:29,684 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:29,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:29,762 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 01:18:29,762 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:29,762 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:29,769 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:29,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:29,802 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:29,804 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:18:29,804 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:29,805 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:29,806 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:18:29,820 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:29,821 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:29,821 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:18:29,822 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:29,823 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:29,824 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 01:18:29,830 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:29,830 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-12-09 01:18:29,831 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:29,839 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:18:29,839 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-12-09 01:18:29,855 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 01:18:29,870 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:18:29,870 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10] total 10 [2018-12-09 01:18:29,870 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 01:18:29,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 01:18:29,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-12-09 01:18:29,871 INFO L87 Difference]: Start difference. First operand 102 states and 104 transitions. Second operand 11 states. [2018-12-09 01:18:30,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:30,008 INFO L93 Difference]: Finished difference Result 110 states and 114 transitions. [2018-12-09 01:18:30,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 01:18:30,009 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 76 [2018-12-09 01:18:30,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:30,009 INFO L225 Difference]: With dead ends: 110 [2018-12-09 01:18:30,009 INFO L226 Difference]: Without dead ends: 110 [2018-12-09 01:18:30,009 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 79 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-12-09 01:18:30,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-12-09 01:18:30,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-12-09 01:18:30,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-12-09 01:18:30,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 114 transitions. [2018-12-09 01:18:30,011 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 114 transitions. Word has length 76 [2018-12-09 01:18:30,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:30,011 INFO L480 AbstractCegarLoop]: Abstraction has 110 states and 114 transitions. [2018-12-09 01:18:30,011 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 01:18:30,011 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 114 transitions. [2018-12-09 01:18:30,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-09 01:18:30,011 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:30,011 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:30,012 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:30,012 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:30,012 INFO L82 PathProgramCache]: Analyzing trace with hash 994279134, now seen corresponding path program 1 times [2018-12-09 01:18:30,012 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:30,012 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:30,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:30,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:30,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:30,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:30,288 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-09 01:18:30,288 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:30,288 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:30,294 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:30,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:30,321 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:30,323 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:18:30,323 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:30,324 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:30,324 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:18:30,365 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:30,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:30,366 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:18:30,366 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:30,367 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:30,367 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 01:18:31,054 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:31,055 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-12-09 01:18:31,055 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:31,056 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:18:31,057 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-12-09 01:18:31,413 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:31,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:31,414 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-09 01:18:31,415 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:31,419 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:18:31,420 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-12-09 01:18:31,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:31,448 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 34 [2018-12-09 01:18:31,448 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-12-09 01:18:31,471 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-12-09 01:18:31,471 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:25, output treesize:36 [2018-12-09 01:18:31,503 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 01:18:31,518 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:18:31,518 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 13] total 31 [2018-12-09 01:18:31,518 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-12-09 01:18:31,518 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-12-09 01:18:31,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=873, Unknown=2, NotChecked=0, Total=992 [2018-12-09 01:18:31,519 INFO L87 Difference]: Start difference. First operand 110 states and 114 transitions. Second operand 32 states. [2018-12-09 01:18:32,240 WARN L180 SmtUtils]: Spent 336.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-12-09 01:18:34,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:34,210 INFO L93 Difference]: Finished difference Result 112 states and 116 transitions. [2018-12-09 01:18:34,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-09 01:18:34,210 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 77 [2018-12-09 01:18:34,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:34,211 INFO L225 Difference]: With dead ends: 112 [2018-12-09 01:18:34,211 INFO L226 Difference]: Without dead ends: 112 [2018-12-09 01:18:34,211 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 69 SyntacticMatches, 6 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 651 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=312, Invalid=2338, Unknown=2, NotChecked=0, Total=2652 [2018-12-09 01:18:34,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-12-09 01:18:34,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 104. [2018-12-09 01:18:34,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 01:18:34,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 106 transitions. [2018-12-09 01:18:34,213 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 106 transitions. Word has length 77 [2018-12-09 01:18:34,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:34,213 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 106 transitions. [2018-12-09 01:18:34,213 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-12-09 01:18:34,213 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 106 transitions. [2018-12-09 01:18:34,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-09 01:18:34,213 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:34,213 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:34,214 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:34,214 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:34,214 INFO L82 PathProgramCache]: Analyzing trace with hash -1132496672, now seen corresponding path program 1 times [2018-12-09 01:18:34,214 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:34,214 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:34,214 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:34,214 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:34,215 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:34,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:34,500 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:18:34,501 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:34,501 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:34,507 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:34,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:34,536 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:34,596 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 01:18:34,596 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 01:18:34,597 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:34,598 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:34,599 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:34,599 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-09 01:18:34,974 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:18:34,988 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:18:34,988 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 25] total 42 [2018-12-09 01:18:34,989 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-12-09 01:18:34,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-12-09 01:18:34,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=114, Invalid=1608, Unknown=0, NotChecked=0, Total=1722 [2018-12-09 01:18:34,989 INFO L87 Difference]: Start difference. First operand 104 states and 106 transitions. Second operand 42 states. [2018-12-09 01:18:35,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:35,541 INFO L93 Difference]: Finished difference Result 98 states and 99 transitions. [2018-12-09 01:18:35,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-09 01:18:35,542 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 76 [2018-12-09 01:18:35,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:35,542 INFO L225 Difference]: With dead ends: 98 [2018-12-09 01:18:35,542 INFO L226 Difference]: Without dead ends: 94 [2018-12-09 01:18:35,543 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 55 SyntacticMatches, 5 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 472 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=204, Invalid=2658, Unknown=0, NotChecked=0, Total=2862 [2018-12-09 01:18:35,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-12-09 01:18:35,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 94. [2018-12-09 01:18:35,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-12-09 01:18:35,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 95 transitions. [2018-12-09 01:18:35,544 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 95 transitions. Word has length 76 [2018-12-09 01:18:35,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:35,544 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 95 transitions. [2018-12-09 01:18:35,544 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-12-09 01:18:35,544 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 95 transitions. [2018-12-09 01:18:35,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-09 01:18:35,545 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:35,545 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:35,545 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:35,545 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:35,545 INFO L82 PathProgramCache]: Analyzing trace with hash 546086984, now seen corresponding path program 1 times [2018-12-09 01:18:35,545 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:35,545 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:35,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:35,546 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:35,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:35,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:35,676 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-09 01:18:35,677 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:35,677 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:35,683 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:35,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:35,709 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:35,711 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:18:35,711 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:35,717 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:35,717 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:18:35,726 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:35,726 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:35,727 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:18:35,727 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:35,728 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:35,728 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 01:18:35,738 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:35,738 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:35,738 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:18:35,739 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:35,740 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:35,740 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:9 [2018-12-09 01:18:35,823 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:35,823 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-12-09 01:18:35,823 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:35,827 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:18:35,827 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:15 [2018-12-09 01:18:35,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:35,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:18:35,850 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-12-09 01:18:35,850 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:35,855 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:18:35,855 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-12-09 01:18:35,878 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:18:35,892 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:18:35,892 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17] total 23 [2018-12-09 01:18:35,892 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-09 01:18:35,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-09 01:18:35,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=483, Unknown=0, NotChecked=0, Total=552 [2018-12-09 01:18:35,893 INFO L87 Difference]: Start difference. First operand 94 states and 95 transitions. Second operand 24 states. [2018-12-09 01:18:36,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:36,384 INFO L93 Difference]: Finished difference Result 103 states and 107 transitions. [2018-12-09 01:18:36,384 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-12-09 01:18:36,385 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 78 [2018-12-09 01:18:36,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:36,385 INFO L225 Difference]: With dead ends: 103 [2018-12-09 01:18:36,385 INFO L226 Difference]: Without dead ends: 103 [2018-12-09 01:18:36,385 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 68 SyntacticMatches, 12 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 330 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=197, Invalid=1609, Unknown=0, NotChecked=0, Total=1806 [2018-12-09 01:18:36,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-12-09 01:18:36,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 93. [2018-12-09 01:18:36,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-09 01:18:36,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 94 transitions. [2018-12-09 01:18:36,387 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 94 transitions. Word has length 78 [2018-12-09 01:18:36,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:36,387 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 94 transitions. [2018-12-09 01:18:36,387 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-09 01:18:36,387 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 94 transitions. [2018-12-09 01:18:36,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-09 01:18:36,387 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:36,387 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:36,387 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:36,387 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:36,388 INFO L82 PathProgramCache]: Analyzing trace with hash -858339670, now seen corresponding path program 1 times [2018-12-09 01:18:36,388 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:36,388 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:36,388 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:36,388 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:36,388 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:36,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:36,992 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-12-09 01:18:36,992 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:18:36,992 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:18:37,001 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:37,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:37,030 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:43,016 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:18:43,031 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:18:43,031 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 23 [2018-12-09 01:18:43,031 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-09 01:18:43,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-09 01:18:43,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=483, Unknown=9, NotChecked=0, Total=552 [2018-12-09 01:18:43,032 INFO L87 Difference]: Start difference. First operand 93 states and 94 transitions. Second operand 24 states. [2018-12-09 01:18:55,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:55,872 INFO L93 Difference]: Finished difference Result 106 states and 107 transitions. [2018-12-09 01:18:55,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-09 01:18:55,872 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 81 [2018-12-09 01:18:55,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:55,872 INFO L225 Difference]: With dead ends: 106 [2018-12-09 01:18:55,872 INFO L226 Difference]: Without dead ends: 79 [2018-12-09 01:18:55,872 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 82 SyntacticMatches, 4 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 6.8s TimeCoverageRelationStatistics Valid=104, Invalid=879, Unknown=9, NotChecked=0, Total=992 [2018-12-09 01:18:55,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-12-09 01:18:55,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-12-09 01:18:55,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-12-09 01:18:55,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 79 transitions. [2018-12-09 01:18:55,874 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 79 transitions. Word has length 81 [2018-12-09 01:18:55,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:55,874 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 79 transitions. [2018-12-09 01:18:55,874 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-09 01:18:55,874 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 79 transitions. [2018-12-09 01:18:55,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-09 01:18:55,874 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:55,874 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:55,874 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION]=== [2018-12-09 01:18:55,874 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:55,875 INFO L82 PathProgramCache]: Analyzing trace with hash -322019790, now seen corresponding path program 1 times [2018-12-09 01:18:55,875 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:18:55,875 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:18:55,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:55,875 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:55,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:18:55,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 01:18:55,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 01:18:55,912 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 01:18:55,923 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-09 01:18:55,927 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 22 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 01:18:55,927 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 21 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 01:18:55,936 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 01:18:55 BoogieIcfgContainer [2018-12-09 01:18:55,936 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 01:18:55,936 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 01:18:55,936 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 01:18:55,936 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 01:18:55,937 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 01:16:38" (3/4) ... [2018-12-09 01:18:55,939 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-09 01:18:55,939 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 01:18:55,940 INFO L168 Benchmark]: Toolchain (without parser) took 138262.18 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 135.3 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -167.8 MB). There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 01:18:55,940 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 01:18:55,940 INFO L168 Benchmark]: CACSL2BoogieTranslator took 323.97 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -123.1 MB). Peak memory consumption was 30.4 MB. Max. memory is 11.5 GB. [2018-12-09 01:18:55,940 INFO L168 Benchmark]: Boogie Preprocessor took 47.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-12-09 01:18:55,940 INFO L168 Benchmark]: RCFGBuilder took 552.23 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 963.4 MB in the end (delta: 110.3 MB). Peak memory consumption was 110.3 MB. Max. memory is 11.5 GB. [2018-12-09 01:18:55,940 INFO L168 Benchmark]: TraceAbstraction took 137333.12 ms. Allocated memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: 29.4 MB). Free memory was 963.4 MB in the beginning and 1.1 GB in the end (delta: -160.4 MB). Peak memory consumption was 203.7 MB. Max. memory is 11.5 GB. [2018-12-09 01:18:55,940 INFO L168 Benchmark]: Witness Printer took 3.09 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 01:18:55,941 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 323.97 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -123.1 MB). Peak memory consumption was 30.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 47.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 552.23 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 963.4 MB in the end (delta: 110.3 MB). Peak memory consumption was 110.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 137333.12 ms. Allocated memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: 29.4 MB). Free memory was 963.4 MB in the beginning and 1.1 GB in the end (delta: -160.4 MB). Peak memory consumption was 203.7 MB. Max. memory is 11.5 GB. * Witness Printer took 3.09 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 22 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 21 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1512]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1512. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={31:0}] [L1513] CALL entry_point() VAL [ldv_global_msg_list={31:0}] [L1490] CALL, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [\old(size)=20, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=20, \result={33:0}, ldv_global_msg_list={31:0}, malloc(size)={33:0}, size=20] [L1490] RET, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct ldv_i2c_client))={33:0}] [L1490] struct ldv_i2c_client *c11 = (struct ldv_i2c_client *)ldv_malloc(sizeof(struct ldv_i2c_client)); [L1491] COND FALSE !(!c11) VAL [c11={33:0}, ldv_global_msg_list={31:0}] [L1493] CALL, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [\old(size)=4, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={28:0}, ldv_global_msg_list={31:0}, malloc(size)={28:0}, size=4] [L1493] RET, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [c11={33:0}, ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct ldv_m88ts2022_config))={28:0}] [L1492-L1493] struct ldv_m88ts2022_config *cfg = (struct ldv_m88ts2022_config *) ldv_malloc(sizeof(struct ldv_m88ts2022_config)); [L1494] COND FALSE !(!cfg) VAL [c11={33:0}, cfg={28:0}, ldv_global_msg_list={31:0}] [L1495] c11->dev.platform_data = cfg VAL [c11={33:0}, cfg={28:0}, ldv_global_msg_list={31:0}] [L1497] CALL, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [\old(size)=4, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={27:0}, ldv_global_msg_list={31:0}, malloc(size)={27:0}, size=4] [L1497] RET, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [c11={33:0}, cfg={28:0}, ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct ldv_dvb_frontend))={27:0}] [L1496-L1497] struct ldv_dvb_frontend *fe = (struct ldv_dvb_frontend *) ldv_malloc(sizeof(struct ldv_dvb_frontend)); [L1498] COND FALSE !(!fe) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1499] cfg->fe = fe VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1500] CALL alloc_3_11(c11) VAL [client={33:0}, ldv_global_msg_list={31:0}] [L1470] EXPR client->dev.platform_data VAL [client={33:0}, client={33:0}, client->dev.platform_data={28:0}, ldv_global_msg_list={31:0}] [L1470] struct ldv_m88ts2022_config *cfg = client->dev.platform_data; [L1471] EXPR cfg->fe VAL [cfg={28:0}, cfg->fe={27:0}, client={33:0}, client={33:0}, ldv_global_msg_list={31:0}] [L1471] struct ldv_dvb_frontend *fe = cfg->fe; [L1472] CALL, EXPR ldv_malloc(sizeof(struct Data11)) VAL [\old(size)=12, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=12, \result={29:0}, ldv_global_msg_list={31:0}, malloc(size)={29:0}, size=12] [L1472] RET, EXPR ldv_malloc(sizeof(struct Data11)) VAL [cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct Data11))={29:0}] [L1472] struct Data11 *priv = (struct Data11*)ldv_malloc(sizeof(struct Data11)); [L1473] COND FALSE !(!priv) VAL [cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={29:0}] [L1474] fe->tuner_priv = priv VAL [cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={29:0}] [L1475] CALL ldv_i2c_set_clientdata(client, 0) VAL [data={0:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1462] CALL ldv_dev_set_drvdata(&dev->dev, data) VAL [data={0:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1198] dev->driver_data = data VAL [data={0:0}, data={0:0}, dev={33:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1462] RET ldv_dev_set_drvdata(&dev->dev, data) VAL [data={0:0}, data={0:0}, dev={33:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1475] RET ldv_i2c_set_clientdata(client, 0) VAL [cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={29:0}] [L1476] return 0; VAL [\result=0, cfg={28:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={29:0}] [L1500] RET alloc_3_11(c11) VAL [alloc_3_11(c11)=0, c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1501] CALL free_11(c11) VAL [client={33:0}, ldv_global_msg_list={31:0}] [L1483] CALL, EXPR ldv_i2c_get_clientdata(client) VAL [dev={33:0}, ldv_global_msg_list={31:0}] [L1457] CALL, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={33:0}, ldv_global_msg_list={31:0}] [L1193] EXPR dev->driver_data VAL [dev={33:0}, dev={33:0}, dev->driver_data={0:0}, ldv_global_msg_list={31:0}] [L1193] return dev->driver_data; [L1457] RET, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={33:0}, dev={33:0}, ldv_dev_get_drvdata(&dev->dev)={0:0}, ldv_global_msg_list={31:0}] [L1457] return ldv_dev_get_drvdata(&dev->dev); [L1483] RET, EXPR ldv_i2c_get_clientdata(client) VAL [client={33:0}, client={33:0}, ldv_global_msg_list={31:0}, ldv_i2c_get_clientdata(client)={0:0}] [L1483] void *priv = (struct Data11*)ldv_i2c_get_clientdata(client); [L1484] COND FALSE !(\read(*priv)) VAL [client={33:0}, client={33:0}, ldv_global_msg_list={31:0}, priv={0:0}] [L1501] RET free_11(c11) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1503] free(fe) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1503] free(fe) [L1505] free(cfg) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1505] free(cfg) [L1507] free(c11) VAL [c11={33:0}, cfg={28:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1507] free(c11) [L1513] RET entry_point() VAL [ldv_global_msg_list={31:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 47 procedures, 375 locations, 85 error locations. UNSAFE Result, 137.2s OverallTime, 40 OverallIterations, 4 TraceHistogramMax, 98.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3328 SDtfs, 3036 SDslu, 18365 SDs, 0 SdLazy, 22477 SolverSat, 1329 SolverUnsat, 47 SolverUnknown, 0 SolverNotchecked, 42.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2110 GetRequests, 1242 SyntacticMatches, 116 SemanticMatches, 752 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 4160 ImplicationChecksByTransitivity, 89.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=170occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 39 MinimizatonAttempts, 716 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 36.5s InterpolantComputationTime, 3297 NumberOfCodeBlocks, 3297 NumberOfCodeBlocksAsserted, 68 NumberOfCheckSat, 3148 ConstructedInterpolants, 169 QuantifiedInterpolants, 1014112 SizeOfPredicates, 224 NumberOfNonLiveVariables, 7488 ConjunctsInSsa, 1024 ConjunctsInUnsatCore, 67 InterpolantComputations, 17 PerfectInterpolantSequences, 855/1164 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-09 01:18:57,171 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 01:18:57,172 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 01:18:57,180 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 01:18:57,180 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 01:18:57,180 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 01:18:57,181 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 01:18:57,182 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 01:18:57,183 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 01:18:57,184 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 01:18:57,184 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 01:18:57,185 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 01:18:57,185 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 01:18:57,186 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 01:18:57,187 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 01:18:57,187 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 01:18:57,188 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 01:18:57,189 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 01:18:57,190 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 01:18:57,191 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 01:18:57,192 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 01:18:57,193 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 01:18:57,195 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 01:18:57,195 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 01:18:57,195 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 01:18:57,196 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 01:18:57,196 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 01:18:57,197 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 01:18:57,197 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 01:18:57,198 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 01:18:57,198 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 01:18:57,199 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 01:18:57,199 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 01:18:57,199 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 01:18:57,200 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 01:18:57,200 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 01:18:57,200 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf [2018-12-09 01:18:57,211 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 01:18:57,211 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 01:18:57,211 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 01:18:57,212 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 01:18:57,212 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-09 01:18:57,212 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-09 01:18:57,212 INFO L133 SettingsManager]: * Use SBE=true [2018-12-09 01:18:57,213 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 01:18:57,213 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 01:18:57,213 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-09 01:18:57,213 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 01:18:57,213 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 01:18:57,213 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 01:18:57,213 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-09 01:18:57,213 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-09 01:18:57,213 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-09 01:18:57,214 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 01:18:57,214 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-09 01:18:57,214 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-09 01:18:57,214 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 01:18:57,214 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-09 01:18:57,214 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 01:18:57,214 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 01:18:57,215 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 01:18:57,215 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 01:18:57,215 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 01:18:57,215 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 01:18:57,215 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 01:18:57,215 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-12-09 01:18:57,215 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 01:18:57,215 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-09 01:18:57,215 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2f4049400be941342f32e9ba06dfe9aa51e5b146 [2018-12-09 01:18:57,239 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 01:18:57,246 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 01:18:57,248 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 01:18:57,249 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 01:18:57,249 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 01:18:57,249 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-12-09 01:18:57,285 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/data/83088c1f1/3af19c63df5a4fdaba823d5ff763ed3d/FLAG17e7ed974 [2018-12-09 01:18:57,718 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 01:18:57,718 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/sv-benchmarks/c/ldv-memsafety/memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-12-09 01:18:57,725 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/data/83088c1f1/3af19c63df5a4fdaba823d5ff763ed3d/FLAG17e7ed974 [2018-12-09 01:18:57,734 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/data/83088c1f1/3af19c63df5a4fdaba823d5ff763ed3d [2018-12-09 01:18:57,736 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 01:18:57,736 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-09 01:18:57,737 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 01:18:57,737 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 01:18:57,739 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 01:18:57,740 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 01:18:57" (1/1) ... [2018-12-09 01:18:57,741 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7d255691 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:18:57, skipping insertion in model container [2018-12-09 01:18:57,741 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 01:18:57" (1/1) ... [2018-12-09 01:18:57,746 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 01:18:57,768 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 01:18:57,964 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 01:18:58,009 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 01:18:58,045 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 01:18:58,079 INFO L195 MainTranslator]: Completed translation [2018-12-09 01:18:58,080 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:18:58 WrapperNode [2018-12-09 01:18:58,080 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 01:18:58,080 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 01:18:58,080 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 01:18:58,080 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 01:18:58,088 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:18:58" (1/1) ... [2018-12-09 01:18:58,088 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:18:58" (1/1) ... [2018-12-09 01:18:58,099 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:18:58" (1/1) ... [2018-12-09 01:18:58,099 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:18:58" (1/1) ... [2018-12-09 01:18:58,116 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:18:58" (1/1) ... [2018-12-09 01:18:58,119 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:18:58" (1/1) ... [2018-12-09 01:18:58,122 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:18:58" (1/1) ... [2018-12-09 01:18:58,126 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 01:18:58,126 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 01:18:58,126 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 01:18:58,126 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 01:18:58,127 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:18:58" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 01:18:58,158 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-09 01:18:58,158 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 01:18:58,158 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-09 01:18:58,158 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-12-09 01:18:58,158 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-12-09 01:18:58,158 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-12-09 01:18:58,158 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-12-09 01:18:58,158 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-09 01:18:58,158 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-09 01:18:58,158 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-09 01:18:58,158 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-12-09 01:18:58,158 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-12-09 01:18:58,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-12-09 01:18:58,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-12-09 01:18:58,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-12-09 01:18:58,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-12-09 01:18:58,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-12-09 01:18:58,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-12-09 01:18:58,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-12-09 01:18:58,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-12-09 01:18:58,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-09 01:18:58,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-09 01:18:58,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-09 01:18:58,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-09 01:18:58,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-09 01:18:58,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-09 01:18:58,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-09 01:18:58,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-09 01:18:58,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-12-09 01:18:58,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-09 01:18:58,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-09 01:18:58,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-09 01:18:58,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-09 01:18:58,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-09 01:18:58,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-09 01:18:58,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-09 01:18:58,160 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-12-09 01:18:58,161 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-12-09 01:18:58,161 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_get_clientdata [2018-12-09 01:18:58,161 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_set_clientdata [2018-12-09 01:18:58,161 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_3_11 [2018-12-09 01:18:58,161 INFO L138 BoogieDeclarations]: Found implementation of procedure free_11 [2018-12-09 01:18:58,161 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-09 01:18:58,161 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-09 01:18:58,161 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-09 01:18:58,161 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-09 01:18:58,161 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-12-09 01:18:58,161 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-12-09 01:18:58,162 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-12-09 01:18:58,162 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-12-09 01:18:58,162 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-12-09 01:18:58,162 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-12-09 01:18:58,162 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-12-09 01:18:58,162 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-12-09 01:18:58,162 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-12-09 01:18:58,162 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-12-09 01:18:58,162 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-12-09 01:18:58,162 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-12-09 01:18:58,162 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-12-09 01:18:58,162 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-12-09 01:18:58,162 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-12-09 01:18:58,163 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-12-09 01:18:58,164 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-12-09 01:18:58,165 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-12-09 01:18:58,166 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-12-09 01:18:58,167 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-12-09 01:18:58,168 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-09 01:18:58,169 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_get_clientdata [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_set_clientdata [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_3_11 [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure free_11 [2018-12-09 01:18:58,170 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-09 01:18:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-09 01:18:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-09 01:18:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-09 01:18:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 01:18:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-12-09 01:18:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-12-09 01:18:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-12-09 01:18:58,171 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE4 [2018-12-09 01:18:58,434 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-09 01:18:58,686 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-09 01:18:58,970 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 01:18:58,970 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-09 01:18:58,971 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 01:18:58 BoogieIcfgContainer [2018-12-09 01:18:58,971 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 01:18:58,971 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 01:18:58,971 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 01:18:58,974 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 01:18:58,974 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 01:18:57" (1/3) ... [2018-12-09 01:18:58,975 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@79ddc320 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 01:18:58, skipping insertion in model container [2018-12-09 01:18:58,975 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:18:58" (2/3) ... [2018-12-09 01:18:58,975 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@79ddc320 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 01:18:58, skipping insertion in model container [2018-12-09 01:18:58,975 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 01:18:58" (3/3) ... [2018-12-09 01:18:58,976 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test11_2_false-valid-memtrack_true-termination.i [2018-12-09 01:18:58,984 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 01:18:58,991 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 85 error locations. [2018-12-09 01:18:59,002 INFO L257 AbstractCegarLoop]: Starting to check reachability of 85 error locations. [2018-12-09 01:18:59,017 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-09 01:18:59,017 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 01:18:59,017 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-09 01:18:59,017 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 01:18:59,018 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 01:18:59,018 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 01:18:59,018 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 01:18:59,018 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 01:18:59,018 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 01:18:59,030 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states. [2018-12-09 01:18:59,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-09 01:18:59,035 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:59,036 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:59,037 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:18:59,040 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:59,041 INFO L82 PathProgramCache]: Analyzing trace with hash -307556449, now seen corresponding path program 1 times [2018-12-09 01:18:59,043 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:18:59,044 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:18:59,059 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:59,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:59,109 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:59,142 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:18:59,142 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:18:59,145 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:18:59,145 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 01:18:59,147 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:18:59,155 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:18:59,156 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:18:59,157 INFO L87 Difference]: Start difference. First operand 170 states. Second operand 5 states. [2018-12-09 01:18:59,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:59,236 INFO L93 Difference]: Finished difference Result 132 states and 153 transitions. [2018-12-09 01:18:59,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:18:59,238 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-12-09 01:18:59,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:59,245 INFO L225 Difference]: With dead ends: 132 [2018-12-09 01:18:59,245 INFO L226 Difference]: Without dead ends: 129 [2018-12-09 01:18:59,246 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:18:59,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-12-09 01:18:59,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 101. [2018-12-09 01:18:59,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-09 01:18:59,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 113 transitions. [2018-12-09 01:18:59,276 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 113 transitions. Word has length 16 [2018-12-09 01:18:59,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:59,276 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 113 transitions. [2018-12-09 01:18:59,276 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:18:59,276 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 113 transitions. [2018-12-09 01:18:59,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-09 01:18:59,277 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:59,277 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:59,278 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:18:59,278 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:59,278 INFO L82 PathProgramCache]: Analyzing trace with hash 1435253886, now seen corresponding path program 1 times [2018-12-09 01:18:59,278 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:18:59,278 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:18:59,299 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:59,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:59,319 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:59,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:18:59,325 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:18:59,326 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:18:59,326 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:18:59,327 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:18:59,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:18:59,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:18:59,327 INFO L87 Difference]: Start difference. First operand 101 states and 113 transitions. Second operand 3 states. [2018-12-09 01:18:59,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:59,506 INFO L93 Difference]: Finished difference Result 144 states and 168 transitions. [2018-12-09 01:18:59,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:18:59,507 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-12-09 01:18:59,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:59,508 INFO L225 Difference]: With dead ends: 144 [2018-12-09 01:18:59,508 INFO L226 Difference]: Without dead ends: 141 [2018-12-09 01:18:59,509 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:18:59,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-09 01:18:59,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 97. [2018-12-09 01:18:59,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-09 01:18:59,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 105 transitions. [2018-12-09 01:18:59,518 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 105 transitions. Word has length 16 [2018-12-09 01:18:59,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:59,518 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 105 transitions. [2018-12-09 01:18:59,519 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:18:59,519 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 105 transitions. [2018-12-09 01:18:59,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 01:18:59,519 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:59,519 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:59,520 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:18:59,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:59,520 INFO L82 PathProgramCache]: Analyzing trace with hash -758951418, now seen corresponding path program 1 times [2018-12-09 01:18:59,521 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:18:59,521 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:18:59,543 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:59,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:59,574 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:59,588 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:18:59,588 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:18:59,626 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:18:59,627 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:18:59,627 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-12-09 01:18:59,627 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:18:59,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:18:59,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:18:59,628 INFO L87 Difference]: Start difference. First operand 97 states and 105 transitions. Second operand 5 states. [2018-12-09 01:18:59,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:18:59,656 INFO L93 Difference]: Finished difference Result 96 states and 104 transitions. [2018-12-09 01:18:59,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:18:59,656 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-12-09 01:18:59,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:18:59,657 INFO L225 Difference]: With dead ends: 96 [2018-12-09 01:18:59,657 INFO L226 Difference]: Without dead ends: 96 [2018-12-09 01:18:59,657 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:18:59,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-12-09 01:18:59,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 96. [2018-12-09 01:18:59,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-12-09 01:18:59,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 104 transitions. [2018-12-09 01:18:59,661 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 104 transitions. Word has length 21 [2018-12-09 01:18:59,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:18:59,661 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 104 transitions. [2018-12-09 01:18:59,662 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:18:59,662 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 104 transitions. [2018-12-09 01:18:59,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 01:18:59,662 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:18:59,662 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:18:59,662 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:18:59,663 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:18:59,663 INFO L82 PathProgramCache]: Analyzing trace with hash -758951381, now seen corresponding path program 1 times [2018-12-09 01:18:59,663 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:18:59,663 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:18:59,678 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:18:59,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:18:59,719 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:18:59,734 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:18:59,735 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:18:59,737 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:18:59,738 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:19:00,149 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|)) is different from true [2018-12-09 01:19:00,157 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 01:19:00,158 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:19:00,162 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:19:00,162 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:11 [2018-12-09 01:19:00,169 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-12-09 01:19:00,170 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:19:00,254 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:19:00,255 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:19:00,255 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5] total 7 [2018-12-09 01:19:00,256 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 01:19:00,256 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 01:19:00,256 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=27, Unknown=5, NotChecked=10, Total=56 [2018-12-09 01:19:00,256 INFO L87 Difference]: Start difference. First operand 96 states and 104 transitions. Second operand 8 states. [2018-12-09 01:19:01,171 WARN L180 SmtUtils]: Spent 877.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 13 [2018-12-09 01:19:01,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:19:01,835 INFO L93 Difference]: Finished difference Result 179 states and 221 transitions. [2018-12-09 01:19:01,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 01:19:01,836 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-12-09 01:19:01,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:19:01,838 INFO L225 Difference]: With dead ends: 179 [2018-12-09 01:19:01,838 INFO L226 Difference]: Without dead ends: 179 [2018-12-09 01:19:01,839 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 32 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=32, Invalid=73, Unknown=9, NotChecked=18, Total=132 [2018-12-09 01:19:01,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-12-09 01:19:01,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 106. [2018-12-09 01:19:01,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-09 01:19:01,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 121 transitions. [2018-12-09 01:19:01,848 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 121 transitions. Word has length 21 [2018-12-09 01:19:01,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:19:01,849 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 121 transitions. [2018-12-09 01:19:01,849 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 01:19:01,849 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 121 transitions. [2018-12-09 01:19:01,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 01:19:01,850 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:19:01,850 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:19:01,850 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:19:01,851 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:19:01,851 INFO L82 PathProgramCache]: Analyzing trace with hash -758951380, now seen corresponding path program 1 times [2018-12-09 01:19:01,851 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:19:01,851 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:19:01,872 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:19:01,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:19:01,927 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:19:01,934 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:19:01,935 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:19:01,944 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:19:01,944 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:19:01,949 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:19:01,949 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 01:19:02,840 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-09 01:19:02,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:19:02,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:19:02,849 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:19:02,849 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:19:02,862 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:19:02,863 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:19:02,870 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:19:02,870 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-12-09 01:19:02,883 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-12-09 01:19:02,883 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:19:03,016 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:19:03,016 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:19:03,023 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:19:03,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:19:03,043 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:19:03,047 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:19:03,047 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:19:03,056 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:19:03,056 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:19:03,062 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:19:03,062 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 01:19:03,073 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:19:03,074 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:19:03,075 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:19:03,075 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:19:03,096 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:19:03,096 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:19:03,108 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:19:03,109 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-09 01:19:03,110 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-12-09 01:19:03,110 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:19:03,210 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:19:03,210 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-12-09 01:19:03,211 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 01:19:03,211 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 01:19:03,211 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=70, Unknown=1, NotChecked=16, Total=110 [2018-12-09 01:19:03,211 INFO L87 Difference]: Start difference. First operand 106 states and 121 transitions. Second operand 9 states. [2018-12-09 01:19:04,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:19:04,346 INFO L93 Difference]: Finished difference Result 187 states and 225 transitions. [2018-12-09 01:19:04,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 01:19:04,347 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-12-09 01:19:04,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:19:04,350 INFO L225 Difference]: With dead ends: 187 [2018-12-09 01:19:04,350 INFO L226 Difference]: Without dead ends: 187 [2018-12-09 01:19:04,350 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 38 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=31, Invalid=104, Unknown=1, NotChecked=20, Total=156 [2018-12-09 01:19:04,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-12-09 01:19:04,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 106. [2018-12-09 01:19:04,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-09 01:19:04,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 120 transitions. [2018-12-09 01:19:04,363 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 120 transitions. Word has length 21 [2018-12-09 01:19:04,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:19:04,363 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 120 transitions. [2018-12-09 01:19:04,363 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 01:19:04,363 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 120 transitions. [2018-12-09 01:19:04,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 01:19:04,364 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:19:04,365 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:19:04,365 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:19:04,365 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:19:04,365 INFO L82 PathProgramCache]: Analyzing trace with hash -1052354388, now seen corresponding path program 1 times [2018-12-09 01:19:04,366 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:19:04,366 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:19:04,389 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:19:04,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:19:04,428 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:19:04,446 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:19:04,446 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:19:04,448 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:19:04,448 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 01:19:04,448 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:19:04,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:19:04,448 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:19:04,449 INFO L87 Difference]: Start difference. First operand 106 states and 120 transitions. Second operand 5 states. [2018-12-09 01:19:04,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:19:04,465 INFO L93 Difference]: Finished difference Result 100 states and 110 transitions. [2018-12-09 01:19:04,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:19:04,465 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-12-09 01:19:04,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:19:04,466 INFO L225 Difference]: With dead ends: 100 [2018-12-09 01:19:04,466 INFO L226 Difference]: Without dead ends: 98 [2018-12-09 01:19:04,466 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:19:04,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-12-09 01:19:04,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-12-09 01:19:04,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-12-09 01:19:04,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 108 transitions. [2018-12-09 01:19:04,469 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 108 transitions. Word has length 21 [2018-12-09 01:19:04,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:19:04,469 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 108 transitions. [2018-12-09 01:19:04,469 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:19:04,469 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 108 transitions. [2018-12-09 01:19:04,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-09 01:19:04,470 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:19:04,470 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:19:04,470 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:19:04,470 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:19:04,470 INFO L82 PathProgramCache]: Analyzing trace with hash 1038858468, now seen corresponding path program 1 times [2018-12-09 01:19:04,470 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:19:04,470 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:19:04,484 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:19:04,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:19:04,500 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:19:04,512 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:19:04,512 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:19:04,513 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:19:04,513 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 01:19:04,514 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:19:04,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:19:04,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:19:04,514 INFO L87 Difference]: Start difference. First operand 98 states and 108 transitions. Second operand 5 states. [2018-12-09 01:19:04,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:19:04,564 INFO L93 Difference]: Finished difference Result 122 states and 138 transitions. [2018-12-09 01:19:04,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:19:04,564 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-12-09 01:19:04,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:19:04,565 INFO L225 Difference]: With dead ends: 122 [2018-12-09 01:19:04,565 INFO L226 Difference]: Without dead ends: 122 [2018-12-09 01:19:04,565 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:19:04,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-12-09 01:19:04,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 100. [2018-12-09 01:19:04,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-09 01:19:04,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 110 transitions. [2018-12-09 01:19:04,568 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 110 transitions. Word has length 25 [2018-12-09 01:19:04,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:19:04,569 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 110 transitions. [2018-12-09 01:19:04,569 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:19:04,569 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 110 transitions. [2018-12-09 01:19:04,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-09 01:19:04,569 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:19:04,569 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:19:04,569 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:19:04,570 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:19:04,570 INFO L82 PathProgramCache]: Analyzing trace with hash 842344963, now seen corresponding path program 1 times [2018-12-09 01:19:04,570 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:19:04,570 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:19:04,585 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:19:04,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:19:04,625 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:19:04,641 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 17 [2018-12-09 01:19:04,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:19:04,650 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 15 [2018-12-09 01:19:04,651 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-12-09 01:19:04,663 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-09 01:19:04,664 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 15 [2018-12-09 01:19:04,666 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:19:04,666 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2018-12-09 01:19:04,666 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:19:04,670 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:19:04,676 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 01:19:04,676 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:18, output treesize:19 [2018-12-09 01:19:06,736 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~c11~0.base (_ BitVec 32))) (and (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= |c_#valid| (store |c_old(#valid)| entry_point_~c11~0.base (_ bv0 1))))) is different from true [2018-12-09 01:19:06,761 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:19:06,761 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:19:07,868 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_17 (_ BitVec 32))) (or (not (= (select |c_#valid| v_entry_point_~c11~0.base_17) (_ bv0 1))) (= |c_old(#valid)| (store |c_#valid| v_entry_point_~c11~0.base_17 (_ bv0 1))))) is different from false [2018-12-09 01:19:07,871 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:19:07,871 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:19:07,877 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:19:07,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:19:07,889 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:19:07,897 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:19:07,897 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:19:08,704 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_20 (_ BitVec 32))) (or (not (= (select |c_#valid| v_entry_point_~c11~0.base_20) (_ bv0 1))) (= |c_old(#valid)| (store |c_#valid| v_entry_point_~c11~0.base_20 (_ bv0 1))))) is different from false [2018-12-09 01:19:08,720 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:19:08,720 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 6] total 9 [2018-12-09 01:19:08,720 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 01:19:08,720 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 01:19:08,720 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=52, Unknown=3, NotChecked=48, Total=132 [2018-12-09 01:19:08,721 INFO L87 Difference]: Start difference. First operand 100 states and 110 transitions. Second operand 10 states. [2018-12-09 01:19:31,327 WARN L180 SmtUtils]: Spent 1.16 s on a formula simplification. DAG size of input: 12 DAG size of output: 10 [2018-12-09 01:20:13,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:20:13,690 INFO L93 Difference]: Finished difference Result 121 states and 131 transitions. [2018-12-09 01:20:13,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 01:20:13,691 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 25 [2018-12-09 01:20:13,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:20:13,692 INFO L225 Difference]: With dead ends: 121 [2018-12-09 01:20:13,692 INFO L226 Difference]: Without dead ends: 116 [2018-12-09 01:20:13,692 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=33, Invalid=66, Unknown=3, NotChecked=54, Total=156 [2018-12-09 01:20:13,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-12-09 01:20:13,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 100. [2018-12-09 01:20:13,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-09 01:20:13,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 107 transitions. [2018-12-09 01:20:13,697 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 107 transitions. Word has length 25 [2018-12-09 01:20:13,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:20:13,697 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 107 transitions. [2018-12-09 01:20:13,698 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 01:20:13,698 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 107 transitions. [2018-12-09 01:20:13,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 01:20:13,698 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:20:13,698 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:20:13,699 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:20:13,699 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:20:13,699 INFO L82 PathProgramCache]: Analyzing trace with hash -677007919, now seen corresponding path program 1 times [2018-12-09 01:20:13,699 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:20:13,700 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:20:13,716 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:20:13,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:20:13,738 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:20:13,749 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:20:13,750 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:20:13,778 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:20:13,779 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:20:13,779 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-12-09 01:20:13,780 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:20:13,780 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:20:13,780 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:20:13,780 INFO L87 Difference]: Start difference. First operand 100 states and 107 transitions. Second operand 5 states. [2018-12-09 01:20:13,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:20:13,818 INFO L93 Difference]: Finished difference Result 99 states and 106 transitions. [2018-12-09 01:20:13,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:20:13,819 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-09 01:20:13,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:20:13,820 INFO L225 Difference]: With dead ends: 99 [2018-12-09 01:20:13,820 INFO L226 Difference]: Without dead ends: 99 [2018-12-09 01:20:13,820 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:20:13,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-12-09 01:20:13,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-12-09 01:20:13,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-09 01:20:13,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 106 transitions. [2018-12-09 01:20:13,823 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 106 transitions. Word has length 29 [2018-12-09 01:20:13,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:20:13,823 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 106 transitions. [2018-12-09 01:20:13,823 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:20:13,823 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 106 transitions. [2018-12-09 01:20:13,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 01:20:13,823 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:20:13,823 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:20:13,824 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:20:13,824 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:20:13,824 INFO L82 PathProgramCache]: Analyzing trace with hash -677007867, now seen corresponding path program 1 times [2018-12-09 01:20:13,824 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:20:13,824 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:20:13,838 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:20:13,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:20:13,894 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:20:13,896 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:20:13,897 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:13,898 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:13,899 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:20:14,250 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|)) is different from true [2018-12-09 01:20:14,254 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-12-09 01:20:14,255 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:14,260 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:20:14,260 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:14, output treesize:11 [2018-12-09 01:20:14,268 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 2 not checked. [2018-12-09 01:20:14,269 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:20:14,373 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:20:14,375 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:20:14,375 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-12-09 01:20:14,375 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 01:20:14,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 01:20:14,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=66, Unknown=5, NotChecked=16, Total=110 [2018-12-09 01:20:14,376 INFO L87 Difference]: Start difference. First operand 99 states and 106 transitions. Second operand 11 states. [2018-12-09 01:20:15,285 WARN L180 SmtUtils]: Spent 872.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 13 [2018-12-09 01:20:15,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:20:15,971 INFO L93 Difference]: Finished difference Result 138 states and 159 transitions. [2018-12-09 01:20:15,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 01:20:15,972 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 29 [2018-12-09 01:20:15,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:20:15,972 INFO L225 Difference]: With dead ends: 138 [2018-12-09 01:20:15,972 INFO L226 Difference]: Without dead ends: 138 [2018-12-09 01:20:15,973 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 44 SyntacticMatches, 4 SemanticMatches, 12 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=38, Invalid=114, Unknown=8, NotChecked=22, Total=182 [2018-12-09 01:20:15,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-09 01:20:15,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 108. [2018-12-09 01:20:15,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-12-09 01:20:15,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 118 transitions. [2018-12-09 01:20:15,975 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 118 transitions. Word has length 29 [2018-12-09 01:20:15,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:20:15,975 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 118 transitions. [2018-12-09 01:20:15,976 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 01:20:15,976 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 118 transitions. [2018-12-09 01:20:15,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 01:20:15,976 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:20:15,976 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:20:15,976 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:20:15,976 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:20:15,976 INFO L82 PathProgramCache]: Analyzing trace with hash -677007866, now seen corresponding path program 1 times [2018-12-09 01:20:15,977 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:20:15,977 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:20:15,995 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:20:16,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:20:16,060 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:20:16,066 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:20:16,066 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:16,076 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:20:16,076 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:16,082 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:16,082 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 01:20:17,006 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-09 01:20:17,012 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:17,015 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:20:17,015 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:17,029 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:17,030 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:17,031 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:20:17,031 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:17,038 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:17,038 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-09 01:20:17,051 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 2 not checked. [2018-12-09 01:20:17,051 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:20:17,198 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:20:17,198 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:20:17,205 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:20:17,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:20:17,220 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:20:17,224 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:20:17,224 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:17,231 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:20:17,231 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:17,236 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:17,236 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 01:20:17,244 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:17,246 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:20:17,247 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:17,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:17,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:17,262 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:20:17,262 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:17,270 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:17,270 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-12-09 01:20:17,271 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 2 not checked. [2018-12-09 01:20:17,271 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:20:17,375 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:20:17,376 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-12-09 01:20:17,376 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 01:20:17,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 01:20:17,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=70, Unknown=1, NotChecked=16, Total=110 [2018-12-09 01:20:17,376 INFO L87 Difference]: Start difference. First operand 108 states and 118 transitions. Second operand 9 states. [2018-12-09 01:20:18,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:20:18,056 INFO L93 Difference]: Finished difference Result 147 states and 166 transitions. [2018-12-09 01:20:18,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 01:20:18,057 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-12-09 01:20:18,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:20:18,057 INFO L225 Difference]: With dead ends: 147 [2018-12-09 01:20:18,057 INFO L226 Difference]: Without dead ends: 147 [2018-12-09 01:20:18,058 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 55 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=31, Invalid=104, Unknown=1, NotChecked=20, Total=156 [2018-12-09 01:20:18,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-09 01:20:18,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 108. [2018-12-09 01:20:18,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-12-09 01:20:18,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 117 transitions. [2018-12-09 01:20:18,061 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 117 transitions. Word has length 29 [2018-12-09 01:20:18,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:20:18,062 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 117 transitions. [2018-12-09 01:20:18,062 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 01:20:18,062 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 117 transitions. [2018-12-09 01:20:18,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 01:20:18,062 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:20:18,062 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:20:18,063 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:20:18,063 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:20:18,063 INFO L82 PathProgramCache]: Analyzing trace with hash -1182566492, now seen corresponding path program 1 times [2018-12-09 01:20:18,063 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:20:18,063 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:20:18,078 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:20:18,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:20:18,118 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:20:18,132 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:20:18,132 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:20:18,134 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:20:18,134 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 01:20:18,134 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:20:18,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:20:18,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:20:18,135 INFO L87 Difference]: Start difference. First operand 108 states and 117 transitions. Second operand 5 states. [2018-12-09 01:20:18,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:20:18,157 INFO L93 Difference]: Finished difference Result 103 states and 110 transitions. [2018-12-09 01:20:18,157 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:20:18,157 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-09 01:20:18,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:20:18,158 INFO L225 Difference]: With dead ends: 103 [2018-12-09 01:20:18,158 INFO L226 Difference]: Without dead ends: 99 [2018-12-09 01:20:18,158 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:20:18,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-12-09 01:20:18,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 97. [2018-12-09 01:20:18,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-09 01:20:18,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 103 transitions. [2018-12-09 01:20:18,161 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 103 transitions. Word has length 29 [2018-12-09 01:20:18,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:20:18,161 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 103 transitions. [2018-12-09 01:20:18,161 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:20:18,161 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 103 transitions. [2018-12-09 01:20:18,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 01:20:18,162 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:20:18,162 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:20:18,162 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:20:18,162 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:20:18,163 INFO L82 PathProgramCache]: Analyzing trace with hash 425511469, now seen corresponding path program 1 times [2018-12-09 01:20:18,163 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:20:18,163 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:20:18,176 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:20:18,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:20:18,238 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:20:18,563 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|)) is different from true [2018-12-09 01:20:18,566 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-12-09 01:20:18,566 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:18,570 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:20:18,570 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:14, output treesize:11 [2018-12-09 01:20:18,582 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 01:20:18,582 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:20:18,584 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:20:18,584 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 01:20:18,584 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 01:20:18,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 01:20:18,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=22, Unknown=1, NotChecked=8, Total=42 [2018-12-09 01:20:18,585 INFO L87 Difference]: Start difference. First operand 97 states and 103 transitions. Second operand 7 states. [2018-12-09 01:20:18,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:20:18,838 INFO L93 Difference]: Finished difference Result 117 states and 129 transitions. [2018-12-09 01:20:18,838 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 01:20:18,838 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 32 [2018-12-09 01:20:18,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:20:18,839 INFO L225 Difference]: With dead ends: 117 [2018-12-09 01:20:18,839 INFO L226 Difference]: Without dead ends: 117 [2018-12-09 01:20:18,839 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=21, Invalid=38, Unknown=1, NotChecked=12, Total=72 [2018-12-09 01:20:18,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-12-09 01:20:18,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 96. [2018-12-09 01:20:18,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-12-09 01:20:18,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 102 transitions. [2018-12-09 01:20:18,842 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 102 transitions. Word has length 32 [2018-12-09 01:20:18,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:20:18,843 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 102 transitions. [2018-12-09 01:20:18,843 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 01:20:18,843 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 102 transitions. [2018-12-09 01:20:18,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 01:20:18,843 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:20:18,843 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:20:18,844 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:20:18,844 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:20:18,844 INFO L82 PathProgramCache]: Analyzing trace with hash 425511470, now seen corresponding path program 1 times [2018-12-09 01:20:18,844 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:20:18,844 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:20:18,861 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:20:18,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:20:18,937 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:20:18,943 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:20:18,943 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:18,951 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:20:18,951 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:18,957 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:18,957 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 01:20:19,977 WARN L180 SmtUtils]: Spent 970.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 01:20:19,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:19,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:19,984 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:20:19,985 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:19,999 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:20:19,999 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:20,007 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:20,007 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:15 [2018-12-09 01:20:20,626 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-09 01:20:20,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:20,634 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:20:20,634 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:20,647 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:20,647 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:20,648 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:20:20,648 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:20,657 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:20,657 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-09 01:20:20,691 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 4 not checked. [2018-12-09 01:20:20,692 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:20:20,995 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:20:20,995 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:20:21,001 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:20:21,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:20:21,023 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:20:21,170 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:21,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:21,172 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:20:21,172 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:21,188 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:20:21,188 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:21,199 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:21,199 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-09 01:20:21,334 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 2 not checked. [2018-12-09 01:20:21,334 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:20:21,479 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:20:21,479 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 19 [2018-12-09 01:20:21,479 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-09 01:20:21,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-09 01:20:21,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=437, Unknown=1, NotChecked=42, Total=552 [2018-12-09 01:20:21,480 INFO L87 Difference]: Start difference. First operand 96 states and 102 transitions. Second operand 20 states. [2018-12-09 01:20:23,714 WARN L180 SmtUtils]: Spent 2.12 s on a formula simplification. DAG size of input: 31 DAG size of output: 24 [2018-12-09 01:20:46,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:20:46,688 INFO L93 Difference]: Finished difference Result 136 states and 153 transitions. [2018-12-09 01:20:46,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-09 01:20:46,688 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-12-09 01:20:46,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:20:46,689 INFO L225 Difference]: With dead ends: 136 [2018-12-09 01:20:46,689 INFO L226 Difference]: Without dead ends: 136 [2018-12-09 01:20:46,689 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 54 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=111, Invalid=704, Unknown=1, NotChecked=54, Total=870 [2018-12-09 01:20:46,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-09 01:20:46,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 95. [2018-12-09 01:20:46,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-12-09 01:20:46,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 101 transitions. [2018-12-09 01:20:46,691 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 101 transitions. Word has length 32 [2018-12-09 01:20:46,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:20:46,692 INFO L480 AbstractCegarLoop]: Abstraction has 95 states and 101 transitions. [2018-12-09 01:20:46,692 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-09 01:20:46,692 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 101 transitions. [2018-12-09 01:20:46,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 01:20:46,692 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:20:46,692 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:20:46,692 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:20:46,692 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:20:46,692 INFO L82 PathProgramCache]: Analyzing trace with hash 423935168, now seen corresponding path program 1 times [2018-12-09 01:20:46,693 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:20:46,693 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:20:46,708 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:20:46,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:20:46,731 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:20:46,742 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:20:46,742 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:20:46,743 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:20:46,743 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 01:20:46,744 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:20:46,744 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:20:46,744 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:20:46,744 INFO L87 Difference]: Start difference. First operand 95 states and 101 transitions. Second operand 5 states. [2018-12-09 01:20:46,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:20:46,769 INFO L93 Difference]: Finished difference Result 114 states and 124 transitions. [2018-12-09 01:20:46,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:20:46,770 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2018-12-09 01:20:46,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:20:46,770 INFO L225 Difference]: With dead ends: 114 [2018-12-09 01:20:46,770 INFO L226 Difference]: Without dead ends: 114 [2018-12-09 01:20:46,770 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:20:46,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-09 01:20:46,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 99. [2018-12-09 01:20:46,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-09 01:20:46,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 106 transitions. [2018-12-09 01:20:46,772 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 106 transitions. Word has length 32 [2018-12-09 01:20:46,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:20:46,773 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 106 transitions. [2018-12-09 01:20:46,773 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:20:46,773 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 106 transitions. [2018-12-09 01:20:46,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 01:20:46,773 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:20:46,773 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:20:46,774 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:20:46,774 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:20:46,774 INFO L82 PathProgramCache]: Analyzing trace with hash -1383519295, now seen corresponding path program 1 times [2018-12-09 01:20:46,774 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:20:46,774 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:20:46,789 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:20:46,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:20:46,841 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:20:46,843 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:20:46,843 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:46,844 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:46,844 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:20:46,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:46,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:46,869 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:20:46,869 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:46,871 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:46,871 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-09 01:20:46,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:46,912 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-09 01:20:46,913 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:46,918 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:20:46,918 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:13 [2018-12-09 01:20:46,933 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:20:46,933 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:20:46,975 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:20:46,975 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:46,979 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:46,979 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:26, output treesize:4 [2018-12-09 01:20:47,040 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 4 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:20:47,042 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:20:47,042 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 11 [2018-12-09 01:20:47,042 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 01:20:47,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 01:20:47,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=101, Unknown=6, NotChecked=0, Total=132 [2018-12-09 01:20:47,042 INFO L87 Difference]: Start difference. First operand 99 states and 106 transitions. Second operand 12 states. [2018-12-09 01:20:53,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:20:53,912 INFO L93 Difference]: Finished difference Result 133 states and 148 transitions. [2018-12-09 01:20:53,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 01:20:53,912 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 32 [2018-12-09 01:20:53,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:20:53,912 INFO L225 Difference]: With dead ends: 133 [2018-12-09 01:20:53,913 INFO L226 Difference]: Without dead ends: 133 [2018-12-09 01:20:53,913 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 47 SyntacticMatches, 6 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=57, Invalid=237, Unknown=12, NotChecked=0, Total=306 [2018-12-09 01:20:53,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-12-09 01:20:53,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 101. [2018-12-09 01:20:53,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-09 01:20:53,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 108 transitions. [2018-12-09 01:20:53,915 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 108 transitions. Word has length 32 [2018-12-09 01:20:53,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:20:53,915 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 108 transitions. [2018-12-09 01:20:53,915 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 01:20:53,915 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 108 transitions. [2018-12-09 01:20:53,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-09 01:20:53,915 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:20:53,915 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:20:53,916 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:20:53,916 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:20:53,916 INFO L82 PathProgramCache]: Analyzing trace with hash 894637102, now seen corresponding path program 1 times [2018-12-09 01:20:53,916 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:20:53,916 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:20:53,932 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:20:54,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:20:54,006 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:20:54,008 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:20:54,009 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:54,012 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:54,012 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 01:20:54,042 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:54,043 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:54,043 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:20:54,043 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:54,047 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:54,047 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-09 01:20:54,073 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-09 01:20:54,074 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:54,087 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:20:54,088 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:20:54,089 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:54,090 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:54,096 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:54,096 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:24, output treesize:15 [2018-12-09 01:20:56,118 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_19 (_ BitVec 32))) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_19 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_19) (_ bv0 32))))) is different from true [2018-12-09 01:20:56,155 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-12-09 01:20:56,157 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 01:20:56,158 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,165 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,174 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,174 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:21 [2018-12-09 01:20:56,238 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-12-09 01:20:56,239 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-12-09 01:20:56,239 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,243 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,246 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,246 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:5 [2018-12-09 01:20:56,284 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-12-09 01:20:56,284 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:20:56,356 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 19 [2018-12-09 01:20:56,356 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,360 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:20:56,360 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:24, output treesize:15 [2018-12-09 01:20:56,434 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:20:56,434 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:20:56,440 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:20:56,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:20:56,461 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:20:56,463 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:20:56,463 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,464 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,465 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:20:56,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:56,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:20:56,539 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:20:56,539 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,540 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,540 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-09 01:20:56,593 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:20:56,595 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:20:56,595 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,597 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,602 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:56,602 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:16, output treesize:12 [2018-12-09 01:20:58,646 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_14 (_ BitVec 32)) (v_entry_point_~c11~0.base_BEFORE_CALL_22 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_22) v_entry_point_~c11~0.offset_BEFORE_CALL_14) v_entry_point_~c11~0.base_BEFORE_CALL_22))) is different from true [2018-12-09 01:20:58,713 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-12-09 01:20:58,716 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 01:20:58,716 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:58,724 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:58,732 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:58,732 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:20 [2018-12-09 01:20:58,847 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-12-09 01:20:58,849 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-12-09 01:20:58,849 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:58,854 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:58,858 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:20:58,858 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:5 [2018-12-09 01:20:58,859 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-12-09 01:20:58,859 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:20:58,864 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 19 [2018-12-09 01:20:58,864 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:20:58,867 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:20:58,868 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:24, output treesize:15 [2018-12-09 01:20:58,967 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:20:58,982 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 01:20:58,983 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14] total 29 [2018-12-09 01:20:58,983 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-12-09 01:20:58,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-12-09 01:20:58,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=720, Unknown=18, NotChecked=110, Total=930 [2018-12-09 01:20:58,983 INFO L87 Difference]: Start difference. First operand 101 states and 108 transitions. Second operand 30 states. [2018-12-09 01:21:05,559 WARN L180 SmtUtils]: Spent 4.01 s on a formula simplification. DAG size of input: 19 DAG size of output: 12 [2018-12-09 01:21:11,652 WARN L180 SmtUtils]: Spent 4.03 s on a formula simplification. DAG size of input: 36 DAG size of output: 29 [2018-12-09 01:21:23,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:21:23,949 INFO L93 Difference]: Finished difference Result 154 states and 174 transitions. [2018-12-09 01:21:23,950 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-12-09 01:21:23,950 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 34 [2018-12-09 01:21:23,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:21:23,951 INFO L225 Difference]: With dead ends: 154 [2018-12-09 01:21:23,951 INFO L226 Difference]: Without dead ends: 154 [2018-12-09 01:21:23,951 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 76 SyntacticMatches, 4 SemanticMatches, 51 ConstructedPredicates, 2 IntricatePredicates, 1 DeprecatedPredicates, 433 ImplicationChecksByTransitivity, 27.7s TimeCoverageRelationStatistics Valid=293, Invalid=2219, Unknown=46, NotChecked=198, Total=2756 [2018-12-09 01:21:23,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-12-09 01:21:23,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 104. [2018-12-09 01:21:23,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 01:21:23,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 111 transitions. [2018-12-09 01:21:23,954 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 111 transitions. Word has length 34 [2018-12-09 01:21:23,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:21:23,954 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 111 transitions. [2018-12-09 01:21:23,954 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-12-09 01:21:23,954 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 111 transitions. [2018-12-09 01:21:23,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-09 01:21:23,954 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:21:23,954 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:21:23,955 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:21:23,955 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:21:23,955 INFO L82 PathProgramCache]: Analyzing trace with hash 894637103, now seen corresponding path program 1 times [2018-12-09 01:21:23,955 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:21:23,955 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:21:23,970 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:21:24,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:21:24,058 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:21:24,060 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:21:24,061 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,065 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,066 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 01:21:24,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:21:24,100 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:21:24,100 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:21:24,100 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,111 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,111 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:11 [2018-12-09 01:21:24,144 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:21:24,147 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:21:24,147 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,150 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,167 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:21:24,176 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:21:24,176 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,179 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,188 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,188 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:33, output treesize:25 [2018-12-09 01:21:24,291 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2018-12-09 01:21:24,294 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 01:21:24,294 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,310 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,342 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-12-09 01:21:24,345 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 01:21:24,345 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,353 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,372 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,372 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:66, output treesize:28 [2018-12-09 01:21:24,484 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-12-09 01:21:24,486 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-09 01:21:24,487 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,489 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,500 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-12-09 01:21:24,502 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-12-09 01:21:24,502 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,507 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,513 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:24,513 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:9 [2018-12-09 01:21:24,570 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:21:24,571 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:21:24,988 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 44 [2018-12-09 01:21:24,989 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-12-09 01:21:25,096 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2018-12-09 01:21:25,097 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:21:25,216 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-12-09 01:21:25,217 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:21:25,337 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 10 dim-0 vars, and 4 xjuncts. [2018-12-09 01:21:25,337 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:103, output treesize:122 [2018-12-09 01:21:26,065 WARN L180 SmtUtils]: Spent 355.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 46 [2018-12-09 01:21:26,071 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:21:26,071 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:21:26,078 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:21:26,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:21:26,103 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:21:26,105 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:21:26,105 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,106 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,107 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:21:26,221 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:21:26,222 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:21:26,222 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:21:26,222 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,226 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-09 01:21:26,328 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:21:26,330 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:21:26,330 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,333 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,350 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:21:26,352 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:21:26,352 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,354 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,362 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,363 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:22 [2018-12-09 01:21:26,612 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-12-09 01:21:26,615 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 01:21:26,615 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,625 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,656 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 44 [2018-12-09 01:21:26,660 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 01:21:26,660 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,672 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,687 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,687 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:63, output treesize:25 [2018-12-09 01:21:26,904 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-12-09 01:21:26,906 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-09 01:21:26,906 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,909 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,921 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-12-09 01:21:26,923 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-12-09 01:21:26,923 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,928 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,935 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:26,935 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:39, output treesize:9 [2018-12-09 01:21:26,937 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:21:26,937 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:21:26,943 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2018-12-09 01:21:26,943 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:21:27,127 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 54 [2018-12-09 01:21:27,128 INFO L267 ElimStorePlain]: Start of recursive call 3: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-12-09 01:21:27,320 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-12-09 01:21:27,320 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:21:27,499 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 10 dim-0 vars, and 4 xjuncts. [2018-12-09 01:21:27,500 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:133, output treesize:162 [2018-12-09 01:21:28,361 WARN L180 SmtUtils]: Spent 463.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 54 [2018-12-09 01:21:28,384 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:21:28,384 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 25 [2018-12-09 01:21:28,385 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-09 01:21:28,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-09 01:21:28,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=955, Unknown=0, NotChecked=0, Total=1056 [2018-12-09 01:21:28,385 INFO L87 Difference]: Start difference. First operand 104 states and 111 transitions. Second operand 26 states. [2018-12-09 01:21:33,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:21:33,064 INFO L93 Difference]: Finished difference Result 134 states and 148 transitions. [2018-12-09 01:21:33,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-09 01:21:33,065 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 34 [2018-12-09 01:21:33,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:21:33,065 INFO L225 Difference]: With dead ends: 134 [2018-12-09 01:21:33,065 INFO L226 Difference]: Without dead ends: 134 [2018-12-09 01:21:33,066 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 52 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 343 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=223, Invalid=1669, Unknown=0, NotChecked=0, Total=1892 [2018-12-09 01:21:33,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-09 01:21:33,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 103. [2018-12-09 01:21:33,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-09 01:21:33,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 110 transitions. [2018-12-09 01:21:33,068 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 110 transitions. Word has length 34 [2018-12-09 01:21:33,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:21:33,068 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 110 transitions. [2018-12-09 01:21:33,068 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-09 01:21:33,068 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 110 transitions. [2018-12-09 01:21:33,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-12-09 01:21:33,068 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:21:33,069 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:21:33,069 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:21:33,069 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:21:33,069 INFO L82 PathProgramCache]: Analyzing trace with hash -1916708687, now seen corresponding path program 1 times [2018-12-09 01:21:33,069 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:21:33,070 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:21:33,084 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:21:33,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:21:33,154 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:21:33,170 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 17 [2018-12-09 01:21:33,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:21:33,179 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 15 [2018-12-09 01:21:33,179 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-12-09 01:21:33,185 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-09 01:21:33,186 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 15 [2018-12-09 01:21:33,188 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:21:33,188 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2018-12-09 01:21:33,188 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:21:33,193 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:21:33,200 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 01:21:33,200 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:18, output treesize:19 [2018-12-09 01:21:43,586 WARN L180 SmtUtils]: Spent 6.03 s on a formula simplification that was a NOOP. DAG size: 24 [2018-12-09 01:21:45,625 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 19 [2018-12-09 01:21:46,811 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~c11~0.base (_ BitVec 32)) (v_prenex_27 (_ BitVec 32))) (let ((.cse0 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (let ((.cse1 (store .cse0 v_prenex_27 (_ bv0 1)))) (and (not (= (_ bv0 32) entry_point_~c11~0.base)) (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= (select .cse0 v_prenex_27) (_ bv0 1)) (= |c_#valid| (store .cse1 entry_point_~c11~0.base (_ bv0 1))) (= (_ bv1 1) (select .cse1 entry_point_~c11~0.base)))))) is different from true [2018-12-09 01:21:46,871 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:21:46,871 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:21:47,040 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 47 [2018-12-09 01:21:49,072 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_25 (_ BitVec 32)) (v_entry_point_~cfg~1.base_26 (_ BitVec 32))) (let ((.cse0 (store |c_#valid| v_entry_point_~c11~0.base_25 (_ bv1 1)))) (or (= v_entry_point_~c11~0.base_25 (_ bv0 32)) (= (store (store .cse0 v_entry_point_~cfg~1.base_26 (_ bv0 1)) v_entry_point_~c11~0.base_25 (_ bv0 1)) |c_old(#valid)|) (not (= (_ bv0 1) (select .cse0 v_entry_point_~cfg~1.base_26))) (not (= (select |c_#valid| v_entry_point_~c11~0.base_25) (_ bv0 1)))))) is different from false [2018-12-09 01:21:49,076 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:21:49,076 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:21:49,082 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:21:49,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:21:49,100 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:21:57,704 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-09 01:21:59,001 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~c11~0.base (_ BitVec 32)) (entry_point_~cfg~1.base (_ BitVec 32))) (let ((.cse0 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (and (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= (select .cse0 entry_point_~cfg~1.base) (_ bv0 1)) (= |c_#valid| (store (store .cse0 entry_point_~cfg~1.base (_ bv0 1)) entry_point_~c11~0.base (_ bv0 1)))))) is different from true [2018-12-09 01:21:59,004 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:21:59,004 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:22:01,133 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_28 (_ BitVec 32)) (v_entry_point_~cfg~1.base_29 (_ BitVec 32))) (let ((.cse0 (store |c_#valid| v_entry_point_~c11~0.base_28 (_ bv1 1)))) (or (not (= (select .cse0 v_entry_point_~cfg~1.base_29) (_ bv0 1))) (not (= (select |c_#valid| v_entry_point_~c11~0.base_28) (_ bv0 1))) (= |c_old(#valid)| (store (store .cse0 v_entry_point_~cfg~1.base_29 (_ bv0 1)) v_entry_point_~c11~0.base_28 (_ bv0 1)))))) is different from false [2018-12-09 01:22:01,149 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:22:01,149 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 9] total 18 [2018-12-09 01:22:01,150 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-09 01:22:01,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-09 01:22:01,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=209, Unknown=13, NotChecked=132, Total=420 [2018-12-09 01:22:01,150 INFO L87 Difference]: Start difference. First operand 103 states and 110 transitions. Second operand 19 states. [2018-12-09 01:22:40,115 WARN L180 SmtUtils]: Spent 3.80 s on a formula simplification. DAG size of input: 31 DAG size of output: 21 [2018-12-09 01:22:41,832 WARN L854 $PredicateComparison]: unable to prove that (and (exists ((|~#ldv_global_msg_list~0.base| (_ BitVec 32))) (= (bvadd (select |c_old(#valid)| |~#ldv_global_msg_list~0.base|) (_ bv1 1)) (_ bv0 1))) (exists ((entry_point_~c11~0.base (_ BitVec 32)) (entry_point_~cfg~1.base (_ BitVec 32))) (let ((.cse0 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (and (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= (select .cse0 entry_point_~cfg~1.base) (_ bv0 1)) (= |c_#valid| (store (store .cse0 entry_point_~cfg~1.base (_ bv0 1)) entry_point_~c11~0.base (_ bv0 1)))))) (exists ((entry_point_~c11~0.base (_ BitVec 32)) (v_prenex_27 (_ BitVec 32))) (let ((.cse2 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (let ((.cse1 (store .cse2 v_prenex_27 (_ bv0 1)))) (and (not (= (_ bv0 32) entry_point_~c11~0.base)) (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= |c_#valid| (store .cse1 entry_point_~c11~0.base (_ bv0 1))) (= (_ bv0 1) (select .cse2 v_prenex_27)) (= (_ bv1 1) (select .cse1 entry_point_~c11~0.base))))))) is different from true [2018-12-09 01:23:08,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:23:08,533 INFO L93 Difference]: Finished difference Result 134 states and 147 transitions. [2018-12-09 01:23:08,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 01:23:08,534 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 35 [2018-12-09 01:23:08,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:23:08,534 INFO L225 Difference]: With dead ends: 134 [2018-12-09 01:23:08,535 INFO L226 Difference]: Without dead ends: 127 [2018-12-09 01:23:08,535 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 33.0s TimeCoverageRelationStatistics Valid=72, Invalid=240, Unknown=14, NotChecked=180, Total=506 [2018-12-09 01:23:08,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-12-09 01:23:08,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 97. [2018-12-09 01:23:08,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-09 01:23:08,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 103 transitions. [2018-12-09 01:23:08,537 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 103 transitions. Word has length 35 [2018-12-09 01:23:08,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:23:08,537 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 103 transitions. [2018-12-09 01:23:08,537 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-09 01:23:08,537 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 103 transitions. [2018-12-09 01:23:08,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-09 01:23:08,537 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:23:08,537 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:23:08,537 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:23:08,538 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:23:08,538 INFO L82 PathProgramCache]: Analyzing trace with hash -776766537, now seen corresponding path program 1 times [2018-12-09 01:23:08,538 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:23:08,538 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:23:08,552 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:23:08,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:23:08,653 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:23:08,657 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:23:08,657 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:08,661 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:08,661 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 01:23:08,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:23:08,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:23:08,690 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:23:08,690 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:08,694 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:08,694 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-09 01:23:08,720 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-09 01:23:08,720 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:08,745 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:23:08,748 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:23:08,748 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:08,751 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:08,767 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:23:08,769 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:23:08,769 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:08,771 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:08,780 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:08,781 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:35, output treesize:22 [2018-12-09 01:23:10,810 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_37 (_ BitVec 32))) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_37 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_37) (_ bv0 32))))) is different from true [2018-12-09 01:23:10,813 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:23:10,813 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:10,820 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:23:10,821 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:14 [2018-12-09 01:23:14,846 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-09 01:23:14,958 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-12-09 01:23:14,962 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 01:23:14,962 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:14,973 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:14,998 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-12-09 01:23:15,001 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 01:23:15,001 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:15,010 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:15,026 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:15,026 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:63, output treesize:31 [2018-12-09 01:23:15,135 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-12-09 01:23:15,136 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 15 [2018-12-09 01:23:15,137 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:15,147 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:15,155 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:23:15,155 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:31 [2018-12-09 01:23:15,263 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-12-09 01:23:15,265 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-09 01:23:15,266 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:15,271 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-09 01:23:15,271 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:15,272 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:15,273 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:15,273 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:33, output treesize:5 [2018-12-09 01:23:17,333 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-12-09 01:23:17,338 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:23:17,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:23:17,339 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-09 01:23:17,339 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:17,345 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:23:17,346 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-12-09 01:23:17,396 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 10 not checked. [2018-12-09 01:23:17,396 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:23:17,461 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:23:17,461 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:23:17,467 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:23:17,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:23:17,502 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:23:17,503 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:23:17,504 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:17,505 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:17,505 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:23:19,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:23:19,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:23:19,604 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:23:19,604 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:19,606 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:19,606 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-09 01:23:19,710 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:23:19,714 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:23:19,714 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:19,718 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:19,745 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:23:19,748 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:23:19,748 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:19,752 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:19,769 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:19,769 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-12-09 01:23:21,871 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_27 (_ BitVec 32)) (v_entry_point_~c11~0.base_BEFORE_CALL_40 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_40) v_entry_point_~c11~0.offset_BEFORE_CALL_27) v_entry_point_~c11~0.base_BEFORE_CALL_40))) is different from true [2018-12-09 01:23:21,875 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:23:21,875 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:21,880 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:23:21,880 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:14 [2018-12-09 01:23:29,948 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-09 01:23:30,152 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-12-09 01:23:30,155 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 01:23:30,155 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:30,169 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:30,194 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-12-09 01:23:30,197 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 01:23:30,197 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:30,207 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:30,220 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:30,220 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:60, output treesize:28 [2018-12-09 01:23:30,408 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-12-09 01:23:30,409 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-12-09 01:23:30,410 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:30,412 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:30,420 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:23:30,420 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:29 [2018-12-09 01:23:30,565 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 [2018-12-09 01:23:30,568 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-12-09 01:23:30,568 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:30,576 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-09 01:23:30,576 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:30,578 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:30,579 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:23:30,580 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:35, output treesize:7 [2018-12-09 01:23:30,619 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:23:30,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:23:30,621 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-09 01:23:30,621 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:23:30,628 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:23:30,628 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-12-09 01:23:30,633 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 10 not checked. [2018-12-09 01:23:30,633 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:23:30,710 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:23:30,710 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 37 [2018-12-09 01:23:30,711 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-12-09 01:23:30,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-12-09 01:23:30,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=1155, Unknown=8, NotChecked=210, Total=1482 [2018-12-09 01:23:30,711 INFO L87 Difference]: Start difference. First operand 97 states and 103 transitions. Second operand 38 states. [2018-12-09 01:23:37,773 WARN L180 SmtUtils]: Spent 916.00 ms on a formula simplification that was a NOOP. DAG size: 21 [2018-12-09 01:23:46,298 WARN L180 SmtUtils]: Spent 4.01 s on a formula simplification. DAG size of input: 19 DAG size of output: 12 [2018-12-09 01:23:52,403 WARN L180 SmtUtils]: Spent 4.02 s on a formula simplification that was a NOOP. DAG size: 28 [2018-12-09 01:24:01,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:24:01,137 INFO L93 Difference]: Finished difference Result 146 states and 165 transitions. [2018-12-09 01:24:01,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-09 01:24:01,138 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 43 [2018-12-09 01:24:01,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:24:01,138 INFO L225 Difference]: With dead ends: 146 [2018-12-09 01:24:01,138 INFO L226 Difference]: Without dead ends: 146 [2018-12-09 01:24:01,139 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 54 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 468 ImplicationChecksByTransitivity, 41.5s TimeCoverageRelationStatistics Valid=270, Invalid=2485, Unknown=13, NotChecked=312, Total=3080 [2018-12-09 01:24:01,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-09 01:24:01,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 128. [2018-12-09 01:24:01,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-12-09 01:24:01,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 148 transitions. [2018-12-09 01:24:01,141 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 148 transitions. Word has length 43 [2018-12-09 01:24:01,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:24:01,142 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 148 transitions. [2018-12-09 01:24:01,142 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-12-09 01:24:01,142 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 148 transitions. [2018-12-09 01:24:01,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-09 01:24:01,142 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:24:01,142 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:24:01,142 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:24:01,142 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:24:01,142 INFO L82 PathProgramCache]: Analyzing trace with hash -776766536, now seen corresponding path program 1 times [2018-12-09 01:24:01,143 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:24:01,143 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:24:01,157 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:24:01,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:24:01,288 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:24:01,290 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:24:01,290 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:01,294 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:01,294 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 01:24:01,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:01,326 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:01,326 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:24:01,326 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:01,330 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:01,330 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-09 01:24:01,358 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:24:01,361 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:24:01,361 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:01,364 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:01,381 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:24:01,383 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:24:01,383 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:01,385 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:01,395 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:01,395 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:22 [2018-12-09 01:24:03,426 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_43 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_43) (_ bv0 32)) v_entry_point_~c11~0.base_BEFORE_CALL_43))) is different from true [2018-12-09 01:24:05,453 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 01:24:05,456 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:24:05,457 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:05,469 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:24:05,469 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:05,477 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:24:05,478 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:24, output treesize:22 [2018-12-09 01:24:07,507 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 22 [2018-12-09 01:24:07,644 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-12-09 01:24:07,646 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 01:24:07,646 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:07,657 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:07,685 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-12-09 01:24:07,687 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 01:24:07,687 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:07,694 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:07,711 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:07,711 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:68, output treesize:65 [2018-12-09 01:24:08,019 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 68 [2018-12-09 01:24:08,021 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-12-09 01:24:08,021 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:08,033 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 40 [2018-12-09 01:24:08,033 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:24:08,042 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:24:08,056 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 33 [2018-12-09 01:24:08,058 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-09 01:24:08,058 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:08,065 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 13 [2018-12-09 01:24:08,066 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:08,069 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:08,073 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:08,073 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:90, output treesize:16 [2018-12-09 01:24:09,893 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-09 01:24:09,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:09,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:09,900 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:24:09,900 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:09,913 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:24:09,913 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:09,921 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:09,921 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-09 01:24:09,963 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 8 not checked. [2018-12-09 01:24:09,963 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:24:10,280 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:24:10,280 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:24:10,286 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:24:10,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:24:10,320 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:24:10,322 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:24:10,322 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:10,324 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:10,324 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:24:10,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:10,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:10,454 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:24:10,455 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:10,456 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:10,456 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-09 01:24:10,553 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:24:10,555 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:24:10,555 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:10,558 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:10,573 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:24:10,575 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:24:10,576 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:10,578 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:10,586 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:10,586 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-12-09 01:24:12,669 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_32 (_ BitVec 32)) (v_entry_point_~c11~0.base_BEFORE_CALL_46 (_ BitVec 32))) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_46 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_46) v_entry_point_~c11~0.offset_BEFORE_CALL_32)))) is different from true [2018-12-09 01:24:16,752 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 01:24:16,756 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:24:16,756 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:16,769 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:24:16,769 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:16,779 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:24:16,779 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:24, output treesize:22 [2018-12-09 01:24:20,864 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 23 [2018-12-09 01:24:21,127 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-12-09 01:24:21,130 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 01:24:21,130 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:21,141 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:21,166 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-12-09 01:24:21,168 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 01:24:21,168 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:21,178 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:21,191 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:21,191 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:65, output treesize:62 [2018-12-09 01:24:21,691 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 66 [2018-12-09 01:24:21,694 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-12-09 01:24:21,694 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:21,707 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-12-09 01:24:21,707 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:24:21,718 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:24:21,734 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 31 [2018-12-09 01:24:21,737 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 11 [2018-12-09 01:24:21,737 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:21,746 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-09 01:24:21,746 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:21,750 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:21,755 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:21,755 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:88, output treesize:14 [2018-12-09 01:24:21,799 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:21,801 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:24:21,802 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:21,815 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:21,816 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:21,816 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:24:21,817 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:21,826 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:21,826 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-09 01:24:21,871 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 8 not checked. [2018-12-09 01:24:21,871 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:24:22,045 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:24:22,045 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 40 [2018-12-09 01:24:22,045 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-12-09 01:24:22,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-12-09 01:24:22,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=1443, Unknown=7, NotChecked=234, Total=1806 [2018-12-09 01:24:22,046 INFO L87 Difference]: Start difference. First operand 128 states and 148 transitions. Second operand 41 states. [2018-12-09 01:24:27,564 WARN L180 SmtUtils]: Spent 1.36 s on a formula simplification that was a NOOP. DAG size: 24 [2018-12-09 01:24:34,013 WARN L180 SmtUtils]: Spent 4.02 s on a formula simplification. DAG size of input: 22 DAG size of output: 15 [2018-12-09 01:24:36,077 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 18 [2018-12-09 01:24:39,852 WARN L180 SmtUtils]: Spent 3.67 s on a formula simplification that was a NOOP. DAG size: 35 [2018-12-09 01:24:49,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:24:49,562 INFO L93 Difference]: Finished difference Result 150 states and 168 transitions. [2018-12-09 01:24:49,562 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-09 01:24:49,562 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 43 [2018-12-09 01:24:49,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:24:49,563 INFO L225 Difference]: With dead ends: 150 [2018-12-09 01:24:49,563 INFO L226 Difference]: Without dead ends: 150 [2018-12-09 01:24:49,564 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 49 SyntacticMatches, 3 SemanticMatches, 55 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 543 ImplicationChecksByTransitivity, 36.5s TimeCoverageRelationStatistics Valid=258, Invalid=2606, Unknown=10, NotChecked=318, Total=3192 [2018-12-09 01:24:49,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-09 01:24:49,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 116. [2018-12-09 01:24:49,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-12-09 01:24:49,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 125 transitions. [2018-12-09 01:24:49,566 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 125 transitions. Word has length 43 [2018-12-09 01:24:49,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:24:49,567 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 125 transitions. [2018-12-09 01:24:49,567 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-12-09 01:24:49,567 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 125 transitions. [2018-12-09 01:24:49,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-09 01:24:49,567 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:24:49,567 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:24:49,567 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:24:49,568 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:24:49,568 INFO L82 PathProgramCache]: Analyzing trace with hash -1185590762, now seen corresponding path program 1 times [2018-12-09 01:24:49,568 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:24:49,568 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:24:49,585 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:24:49,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:24:49,657 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:24:49,675 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:24:49,675 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:24:49,677 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:24:49,677 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 01:24:49,677 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:24:49,678 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:24:49,678 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:24:49,678 INFO L87 Difference]: Start difference. First operand 116 states and 125 transitions. Second operand 5 states. [2018-12-09 01:24:49,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:24:49,695 INFO L93 Difference]: Finished difference Result 99 states and 103 transitions. [2018-12-09 01:24:49,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:24:49,695 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2018-12-09 01:24:49,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:24:49,695 INFO L225 Difference]: With dead ends: 99 [2018-12-09 01:24:49,695 INFO L226 Difference]: Without dead ends: 95 [2018-12-09 01:24:49,696 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:24:49,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-12-09 01:24:49,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 93. [2018-12-09 01:24:49,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-09 01:24:49,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 97 transitions. [2018-12-09 01:24:49,697 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 97 transitions. Word has length 43 [2018-12-09 01:24:49,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:24:49,697 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 97 transitions. [2018-12-09 01:24:49,697 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:24:49,697 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 97 transitions. [2018-12-09 01:24:49,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 01:24:49,698 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:24:49,698 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:24:49,698 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:24:49,698 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:24:49,698 INFO L82 PathProgramCache]: Analyzing trace with hash -1785629904, now seen corresponding path program 1 times [2018-12-09 01:24:49,698 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:24:49,698 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 33 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:24:49,712 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:24:49,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:24:49,746 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:24:49,755 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:24:49,755 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:24:49,756 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:24:49,756 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 01:24:49,756 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:24:49,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:24:49,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:24:49,757 INFO L87 Difference]: Start difference. First operand 93 states and 97 transitions. Second operand 5 states. [2018-12-09 01:24:49,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:24:49,775 INFO L93 Difference]: Finished difference Result 102 states and 107 transitions. [2018-12-09 01:24:49,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:24:49,777 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-12-09 01:24:49,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:24:49,777 INFO L225 Difference]: With dead ends: 102 [2018-12-09 01:24:49,777 INFO L226 Difference]: Without dead ends: 102 [2018-12-09 01:24:49,777 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:24:49,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-12-09 01:24:49,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 97. [2018-12-09 01:24:49,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-09 01:24:49,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 101 transitions. [2018-12-09 01:24:49,779 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 101 transitions. Word has length 47 [2018-12-09 01:24:49,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:24:49,779 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 101 transitions. [2018-12-09 01:24:49,779 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:24:49,779 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 101 transitions. [2018-12-09 01:24:49,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 01:24:49,779 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:24:49,780 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:24:49,780 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:24:49,780 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:24:49,780 INFO L82 PathProgramCache]: Analyzing trace with hash -1982143409, now seen corresponding path program 1 times [2018-12-09 01:24:49,780 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:24:49,780 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:24:49,794 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:24:49,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:24:49,872 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:24:49,874 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-09 01:24:49,875 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:49,875 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:49,875 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-12-09 01:24:49,904 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-09 01:24:49,904 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:24:49,906 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:24:49,906 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 01:24:49,906 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 01:24:49,906 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 01:24:49,906 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-09 01:24:49,907 INFO L87 Difference]: Start difference. First operand 97 states and 101 transitions. Second operand 8 states. [2018-12-09 01:24:50,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:24:50,339 INFO L93 Difference]: Finished difference Result 113 states and 117 transitions. [2018-12-09 01:24:50,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 01:24:50,340 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-12-09 01:24:50,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:24:50,340 INFO L225 Difference]: With dead ends: 113 [2018-12-09 01:24:50,340 INFO L226 Difference]: Without dead ends: 113 [2018-12-09 01:24:50,341 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2018-12-09 01:24:50,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-12-09 01:24:50,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 107. [2018-12-09 01:24:50,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-12-09 01:24:50,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 112 transitions. [2018-12-09 01:24:50,343 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 112 transitions. Word has length 47 [2018-12-09 01:24:50,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:24:50,343 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 112 transitions. [2018-12-09 01:24:50,343 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 01:24:50,343 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 112 transitions. [2018-12-09 01:24:50,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 01:24:50,344 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:24:50,344 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:24:50,344 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:24:50,344 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:24:50,345 INFO L82 PathProgramCache]: Analyzing trace with hash -1982143408, now seen corresponding path program 1 times [2018-12-09 01:24:50,345 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:24:50,345 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:24:50,359 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:24:50,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:24:50,491 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:24:50,497 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:24:50,497 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:50,505 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:24:50,505 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:50,511 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:50,511 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 01:24:51,576 WARN L180 SmtUtils]: Spent 1.01 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 01:24:51,582 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:51,584 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:24:51,584 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:51,598 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:51,599 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:51,600 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:24:51,600 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:51,608 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:51,608 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:15 [2018-12-09 01:24:52,776 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-09 01:24:52,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:52,784 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:24:52,784 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:52,798 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:52,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:52,800 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:24:52,800 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:52,808 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:52,808 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-09 01:24:53,083 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 6 not checked. [2018-12-09 01:24:53,083 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:24:54,381 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:24:54,381 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:24:54,387 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:24:54,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:24:54,422 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:24:54,427 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:24:54,427 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:54,436 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:24:54,436 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:54,442 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:54,442 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 01:24:55,568 WARN L180 SmtUtils]: Spent 1.04 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-09 01:24:55,574 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:55,576 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:24:55,577 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:55,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:55,597 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:55,597 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-09 01:24:55,597 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:55,611 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:55,611 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:31, output treesize:23 [2018-12-09 01:24:55,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:55,742 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:55,744 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:24:55,744 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 13 [2018-12-09 01:24:55,744 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:55,766 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:24:55,766 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:24:55,779 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:24:55,779 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:38, output treesize:9 [2018-12-09 01:24:55,824 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 6 not checked. [2018-12-09 01:24:55,824 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:24:57,228 WARN L180 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 41 [2018-12-09 01:24:57,243 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:24:57,243 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 18] total 20 [2018-12-09 01:24:57,244 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-12-09 01:24:57,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-12-09 01:24:57,244 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=1015, Unknown=1, NotChecked=64, Total=1190 [2018-12-09 01:24:57,244 INFO L87 Difference]: Start difference. First operand 107 states and 112 transitions. Second operand 21 states. [2018-12-09 01:25:00,730 WARN L180 SmtUtils]: Spent 2.50 s on a formula simplification. DAG size of input: 33 DAG size of output: 23 [2018-12-09 01:25:20,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:25:20,926 INFO L93 Difference]: Finished difference Result 130 states and 136 transitions. [2018-12-09 01:25:20,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-09 01:25:20,927 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 47 [2018-12-09 01:25:20,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:25:20,927 INFO L225 Difference]: With dead ends: 130 [2018-12-09 01:25:20,927 INFO L226 Difference]: Without dead ends: 130 [2018-12-09 01:25:20,928 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 99 SyntacticMatches, 4 SemanticMatches, 41 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 258 ImplicationChecksByTransitivity, 9.3s TimeCoverageRelationStatistics Valid=177, Invalid=1548, Unknown=1, NotChecked=80, Total=1806 [2018-12-09 01:25:20,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-12-09 01:25:20,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 107. [2018-12-09 01:25:20,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-12-09 01:25:20,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 111 transitions. [2018-12-09 01:25:20,930 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 111 transitions. Word has length 47 [2018-12-09 01:25:20,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:25:20,930 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 111 transitions. [2018-12-09 01:25:20,930 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-12-09 01:25:20,930 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 111 transitions. [2018-12-09 01:25:20,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-09 01:25:20,930 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:25:20,931 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:25:20,931 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:25:20,931 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:25:20,931 INFO L82 PathProgramCache]: Analyzing trace with hash 2065953268, now seen corresponding path program 1 times [2018-12-09 01:25:20,931 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:25:20,931 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:25:20,945 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:25:21,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:25:21,072 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:25:21,075 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-09 01:25:21,075 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:21,076 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:25:21,076 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-12-09 01:25:21,500 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|)) is different from true [2018-12-09 01:25:21,506 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-12-09 01:25:21,506 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:21,510 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:25:21,510 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:14, output treesize:11 [2018-12-09 01:25:21,534 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-09 01:25:21,534 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:25:21,537 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:25:21,537 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-09 01:25:21,537 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 01:25:21,537 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 01:25:21,537 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=44, Unknown=1, NotChecked=12, Total=72 [2018-12-09 01:25:21,537 INFO L87 Difference]: Start difference. First operand 107 states and 111 transitions. Second operand 9 states. [2018-12-09 01:25:21,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:25:21,899 INFO L93 Difference]: Finished difference Result 111 states and 115 transitions. [2018-12-09 01:25:21,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 01:25:21,900 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 48 [2018-12-09 01:25:21,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:25:21,900 INFO L225 Difference]: With dead ends: 111 [2018-12-09 01:25:21,900 INFO L226 Difference]: Without dead ends: 111 [2018-12-09 01:25:21,901 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=39, Invalid=120, Unknown=1, NotChecked=22, Total=182 [2018-12-09 01:25:21,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-12-09 01:25:21,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 106. [2018-12-09 01:25:21,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-09 01:25:21,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 110 transitions. [2018-12-09 01:25:21,903 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 110 transitions. Word has length 48 [2018-12-09 01:25:21,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:25:21,903 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 110 transitions. [2018-12-09 01:25:21,903 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 01:25:21,903 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 110 transitions. [2018-12-09 01:25:21,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-09 01:25:21,903 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:25:21,904 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:25:21,904 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:25:21,904 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:25:21,904 INFO L82 PathProgramCache]: Analyzing trace with hash 2065953269, now seen corresponding path program 1 times [2018-12-09 01:25:21,904 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:25:21,904 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 38 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:25:21,929 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:25:22,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:25:22,091 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:25:22,100 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:25:22,100 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:22,110 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:25:22,110 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:22,115 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:25:22,115 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 01:25:23,073 WARN L180 SmtUtils]: Spent 906.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 01:25:23,078 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:23,081 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:25:23,081 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:23,095 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:23,096 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:23,096 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:25:23,096 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:23,104 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:25:23,105 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:27, output treesize:15 [2018-12-09 01:25:24,091 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-09 01:25:24,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:24,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:24,100 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:25:24,106 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:24,122 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:25:24,122 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:24,130 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:25:24,131 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-12-09 01:25:24,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:24,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:24,198 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:25:24,198 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:24,212 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:25:24,213 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:24,221 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:25:24,221 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-12-09 01:25:24,337 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 8 not checked. [2018-12-09 01:25:24,337 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:25:24,998 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:25:24,998 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:25:25,004 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:25:25,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:25:25,044 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:25:25,047 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:25:25,047 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:25,056 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:25:25,056 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:25,061 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:25:25,061 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 01:25:25,067 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:25,069 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:25:25,069 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:25,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:25,083 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:25,083 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:25:25,084 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:25,092 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:25:25,092 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-09 01:25:26,371 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-12-09 01:25:26,377 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:26,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:26,379 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-09 01:25:26,379 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:26,399 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 01:25:26,399 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:26,412 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:25:26,412 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:35, output treesize:27 [2018-12-09 01:25:26,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:26,667 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 01:25:26,667 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:26,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:26,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:26,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:25:26,690 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-12-09 01:25:26,690 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:26,704 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:25:26,704 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:36, output treesize:9 [2018-12-09 01:25:26,726 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 10 not checked. [2018-12-09 01:25:26,726 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:25:26,917 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:25:26,917 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 21 [2018-12-09 01:25:26,917 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-09 01:25:26,917 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-09 01:25:26,917 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=586, Unknown=2, NotChecked=98, Total=756 [2018-12-09 01:25:26,917 INFO L87 Difference]: Start difference. First operand 106 states and 110 transitions. Second operand 22 states. [2018-12-09 01:25:30,385 WARN L180 SmtUtils]: Spent 3.27 s on a formula simplification. DAG size of input: 35 DAG size of output: 30 [2018-12-09 01:25:36,112 WARN L180 SmtUtils]: Spent 318.00 ms on a formula simplification that was a NOOP. DAG size: 25 [2018-12-09 01:25:36,942 WARN L180 SmtUtils]: Spent 777.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 35 [2018-12-09 01:25:55,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:25:55,985 INFO L93 Difference]: Finished difference Result 114 states and 118 transitions. [2018-12-09 01:25:55,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-09 01:25:55,986 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 48 [2018-12-09 01:25:55,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:25:55,986 INFO L225 Difference]: With dead ends: 114 [2018-12-09 01:25:55,986 INFO L226 Difference]: Without dead ends: 114 [2018-12-09 01:25:55,986 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 82 SyntacticMatches, 4 SemanticMatches, 36 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 172 ImplicationChecksByTransitivity, 9.2s TimeCoverageRelationStatistics Valid=137, Invalid=1129, Unknown=2, NotChecked=138, Total=1406 [2018-12-09 01:25:55,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-09 01:25:55,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 105. [2018-12-09 01:25:55,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-12-09 01:25:55,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 109 transitions. [2018-12-09 01:25:55,988 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 109 transitions. Word has length 48 [2018-12-09 01:25:55,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:25:55,988 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 109 transitions. [2018-12-09 01:25:55,988 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-09 01:25:55,988 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 109 transitions. [2018-12-09 01:25:55,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-09 01:25:55,989 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:25:55,989 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:25:55,989 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:25:55,989 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:25:55,989 INFO L82 PathProgramCache]: Analyzing trace with hash 1976737196, now seen corresponding path program 1 times [2018-12-09 01:25:55,989 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:25:55,989 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 40 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:25:56,003 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:25:56,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:25:56,098 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:25:56,100 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-09 01:25:56,100 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:25:56,101 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:25:56,101 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-12-09 01:25:56,191 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-09 01:25:56,191 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:25:56,193 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:25:56,193 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-09 01:25:56,193 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 01:25:56,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 01:25:56,193 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-12-09 01:25:56,193 INFO L87 Difference]: Start difference. First operand 105 states and 109 transitions. Second operand 13 states. [2018-12-09 01:25:57,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:25:57,014 INFO L93 Difference]: Finished difference Result 141 states and 147 transitions. [2018-12-09 01:25:57,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 01:25:57,015 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 62 [2018-12-09 01:25:57,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:25:57,015 INFO L225 Difference]: With dead ends: 141 [2018-12-09 01:25:57,015 INFO L226 Difference]: Without dead ends: 141 [2018-12-09 01:25:57,016 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 49 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=101, Invalid=405, Unknown=0, NotChecked=0, Total=506 [2018-12-09 01:25:57,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-09 01:25:57,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 128. [2018-12-09 01:25:57,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-12-09 01:25:57,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 135 transitions. [2018-12-09 01:25:57,018 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 135 transitions. Word has length 62 [2018-12-09 01:25:57,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:25:57,018 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 135 transitions. [2018-12-09 01:25:57,018 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 01:25:57,018 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 135 transitions. [2018-12-09 01:25:57,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-09 01:25:57,018 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:25:57,018 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:25:57,019 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:25:57,019 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:25:57,019 INFO L82 PathProgramCache]: Analyzing trace with hash 1976737197, now seen corresponding path program 1 times [2018-12-09 01:25:57,019 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:25:57,019 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 41 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:25:57,038 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:25:57,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:25:57,156 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:25:57,589 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:25:57,589 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:25:58,486 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2018-12-09 01:25:58,487 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:25:58,511 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-12-09 01:25:58,511 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:25:58,529 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-12-09 01:25:58,529 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:27 [2018-12-09 01:26:00,118 WARN L180 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 44 [2018-12-09 01:26:00,395 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:26:00,397 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:26:00,397 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 33 [2018-12-09 01:26:00,398 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-12-09 01:26:00,398 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-12-09 01:26:00,398 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=1031, Unknown=0, NotChecked=0, Total=1122 [2018-12-09 01:26:00,398 INFO L87 Difference]: Start difference. First operand 128 states and 135 transitions. Second operand 34 states. [2018-12-09 01:26:03,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:26:03,634 INFO L93 Difference]: Finished difference Result 127 states and 133 transitions. [2018-12-09 01:26:03,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-09 01:26:03,636 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 62 [2018-12-09 01:26:03,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:26:03,636 INFO L225 Difference]: With dead ends: 127 [2018-12-09 01:26:03,636 INFO L226 Difference]: Without dead ends: 127 [2018-12-09 01:26:03,636 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 258 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=178, Invalid=1892, Unknown=0, NotChecked=0, Total=2070 [2018-12-09 01:26:03,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-12-09 01:26:03,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-12-09 01:26:03,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-12-09 01:26:03,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 133 transitions. [2018-12-09 01:26:03,638 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 133 transitions. Word has length 62 [2018-12-09 01:26:03,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:26:03,638 INFO L480 AbstractCegarLoop]: Abstraction has 127 states and 133 transitions. [2018-12-09 01:26:03,638 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-12-09 01:26:03,639 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 133 transitions. [2018-12-09 01:26:03,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-12-09 01:26:03,639 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:26:03,639 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:26:03,639 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:26:03,639 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:26:03,639 INFO L82 PathProgramCache]: Analyzing trace with hash 998588711, now seen corresponding path program 1 times [2018-12-09 01:26:03,640 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:26:03,640 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 42 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:26:03,654 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:26:03,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:26:03,756 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:26:03,758 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-09 01:26:03,758 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:03,758 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:03,758 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-12-09 01:26:03,882 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-09 01:26:03,882 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:26:03,884 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:26:03,884 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-12-09 01:26:03,884 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-09 01:26:03,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-09 01:26:03,884 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-12-09 01:26:03,884 INFO L87 Difference]: Start difference. First operand 127 states and 133 transitions. Second operand 15 states. [2018-12-09 01:26:04,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:26:04,440 INFO L93 Difference]: Finished difference Result 130 states and 136 transitions. [2018-12-09 01:26:04,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 01:26:04,441 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 63 [2018-12-09 01:26:04,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:26:04,442 INFO L225 Difference]: With dead ends: 130 [2018-12-09 01:26:04,442 INFO L226 Difference]: Without dead ends: 130 [2018-12-09 01:26:04,442 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=369, Unknown=0, NotChecked=0, Total=420 [2018-12-09 01:26:04,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-12-09 01:26:04,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 103. [2018-12-09 01:26:04,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-09 01:26:04,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 107 transitions. [2018-12-09 01:26:04,444 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 107 transitions. Word has length 63 [2018-12-09 01:26:04,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:26:04,445 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 107 transitions. [2018-12-09 01:26:04,445 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-09 01:26:04,445 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 107 transitions. [2018-12-09 01:26:04,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-09 01:26:04,445 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:26:04,445 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:26:04,446 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:26:04,446 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:26:04,446 INFO L82 PathProgramCache]: Analyzing trace with hash -680851820, now seen corresponding path program 1 times [2018-12-09 01:26:04,446 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:26:04,447 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:26:04,460 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:26:04,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:26:04,572 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:26:04,635 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 01:26:04,637 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 01:26:04,637 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:04,640 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:04,642 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:04,642 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-09 01:26:05,163 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-12-09 01:26:05,164 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-12-09 01:26:05,165 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:05,175 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-09 01:26:05,175 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:05,178 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:05,179 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:05,179 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:22, output treesize:3 [2018-12-09 01:26:05,238 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:26:05,239 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:26:06,608 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 01:26:06,610 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 01:26:06,610 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:06,612 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:06,616 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-12-09 01:26:06,616 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:7 [2018-12-09 01:26:06,797 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 01:26:06,799 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 01:26:06,799 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:06,800 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:06,808 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-09 01:26:06,808 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-09 01:26:06,995 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 01:26:06,997 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 01:26:06,997 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:06,999 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:07,009 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-09 01:26:07,009 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-09 01:26:07,116 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-09 01:26:07,118 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 01:26:07,118 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [22] total 35 [2018-12-09 01:26:07,118 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-12-09 01:26:07,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-12-09 01:26:07,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=1168, Unknown=0, NotChecked=0, Total=1260 [2018-12-09 01:26:07,118 INFO L87 Difference]: Start difference. First operand 103 states and 107 transitions. Second operand 36 states. [2018-12-09 01:26:09,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:26:09,529 INFO L93 Difference]: Finished difference Result 102 states and 106 transitions. [2018-12-09 01:26:09,529 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-09 01:26:09,529 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 72 [2018-12-09 01:26:09,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:26:09,530 INFO L225 Difference]: With dead ends: 102 [2018-12-09 01:26:09,530 INFO L226 Difference]: Without dead ends: 102 [2018-12-09 01:26:09,530 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 319 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=174, Invalid=2178, Unknown=0, NotChecked=0, Total=2352 [2018-12-09 01:26:09,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-12-09 01:26:09,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 102. [2018-12-09 01:26:09,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-09 01:26:09,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 106 transitions. [2018-12-09 01:26:09,532 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 106 transitions. Word has length 72 [2018-12-09 01:26:09,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:26:09,532 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 106 transitions. [2018-12-09 01:26:09,532 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-12-09 01:26:09,532 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 106 transitions. [2018-12-09 01:26:09,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-09 01:26:09,539 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:26:09,539 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:26:09,539 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:26:09,540 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:26:09,540 INFO L82 PathProgramCache]: Analyzing trace with hash 368430441, now seen corresponding path program 1 times [2018-12-09 01:26:09,540 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:26:09,540 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 44 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:26:09,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:26:09,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:26:09,665 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:26:09,724 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 01:26:09,726 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 01:26:09,726 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:09,728 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:09,731 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:09,731 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-09 01:26:10,303 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-12-09 01:26:10,305 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-09 01:26:10,306 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:10,309 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:10,310 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:10,310 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:22, output treesize:3 [2018-12-09 01:26:10,409 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:26:10,409 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:26:11,813 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 01:26:11,816 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 01:26:11,816 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:11,818 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:11,824 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-12-09 01:26:11,824 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:7 [2018-12-09 01:26:12,026 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 01:26:12,028 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 01:26:12,028 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:12,029 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:12,038 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-09 01:26:12,038 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-09 01:26:12,208 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 01:26:12,211 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 01:26:12,211 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:12,212 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:12,220 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-09 01:26:12,221 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-09 01:26:12,328 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-09 01:26:12,331 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 01:26:12,331 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [24] total 37 [2018-12-09 01:26:12,331 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-12-09 01:26:12,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-12-09 01:26:12,332 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1238, Unknown=0, NotChecked=0, Total=1332 [2018-12-09 01:26:12,332 INFO L87 Difference]: Start difference. First operand 102 states and 106 transitions. Second operand 37 states. [2018-12-09 01:26:14,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:26:14,413 INFO L93 Difference]: Finished difference Result 100 states and 103 transitions. [2018-12-09 01:26:14,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-09 01:26:14,414 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 73 [2018-12-09 01:26:14,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:26:14,414 INFO L225 Difference]: With dead ends: 100 [2018-12-09 01:26:14,415 INFO L226 Difference]: Without dead ends: 99 [2018-12-09 01:26:14,415 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 110 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 301 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=174, Invalid=2082, Unknown=0, NotChecked=0, Total=2256 [2018-12-09 01:26:14,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-12-09 01:26:14,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-12-09 01:26:14,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-09 01:26:14,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 102 transitions. [2018-12-09 01:26:14,417 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 102 transitions. Word has length 73 [2018-12-09 01:26:14,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:26:14,418 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 102 transitions. [2018-12-09 01:26:14,418 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-12-09 01:26:14,418 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 102 transitions. [2018-12-09 01:26:14,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-09 01:26:14,418 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:26:14,418 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:26:14,418 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:26:14,418 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:26:14,419 INFO L82 PathProgramCache]: Analyzing trace with hash -1351942458, now seen corresponding path program 1 times [2018-12-09 01:26:14,419 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:26:14,419 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:26:14,433 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:26:14,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:26:14,477 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:26:14,486 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:26:14,486 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:26:14,515 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:26:14,516 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:26:14,516 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-12-09 01:26:14,516 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:26:14,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:26:14,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:26:14,517 INFO L87 Difference]: Start difference. First operand 99 states and 102 transitions. Second operand 5 states. [2018-12-09 01:26:14,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:26:14,537 INFO L93 Difference]: Finished difference Result 98 states and 101 transitions. [2018-12-09 01:26:14,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:26:14,538 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2018-12-09 01:26:14,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:26:14,538 INFO L225 Difference]: With dead ends: 98 [2018-12-09 01:26:14,538 INFO L226 Difference]: Without dead ends: 98 [2018-12-09 01:26:14,538 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:26:14,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-12-09 01:26:14,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-12-09 01:26:14,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-12-09 01:26:14,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 101 transitions. [2018-12-09 01:26:14,540 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 101 transitions. Word has length 73 [2018-12-09 01:26:14,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:26:14,540 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 101 transitions. [2018-12-09 01:26:14,540 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:26:14,540 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 101 transitions. [2018-12-09 01:26:14,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-09 01:26:14,540 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:26:14,540 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:26:14,540 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:26:14,541 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:26:14,541 INFO L82 PathProgramCache]: Analyzing trace with hash 1039457188, now seen corresponding path program 1 times [2018-12-09 01:26:14,541 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:26:14,541 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 46 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:26:14,555 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:26:14,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:26:14,663 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:26:14,666 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:26:14,666 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:14,667 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:14,668 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:26:14,691 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:26:14,691 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:26:14,711 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:26:14,711 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:26:14,718 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:26:14,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:26:14,745 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:26:14,747 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:26:14,747 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:14,749 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:14,749 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:26:14,753 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:26:14,753 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:26:14,788 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:26:14,788 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-12-09 01:26:14,789 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 01:26:14,789 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 01:26:14,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=26, Unknown=4, NotChecked=0, Total=42 [2018-12-09 01:26:14,789 INFO L87 Difference]: Start difference. First operand 98 states and 101 transitions. Second operand 6 states. [2018-12-09 01:26:15,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:26:15,047 INFO L93 Difference]: Finished difference Result 105 states and 109 transitions. [2018-12-09 01:26:15,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 01:26:15,047 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2018-12-09 01:26:15,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:26:15,048 INFO L225 Difference]: With dead ends: 105 [2018-12-09 01:26:15,048 INFO L226 Difference]: Without dead ends: 105 [2018-12-09 01:26:15,048 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 156 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=26, Unknown=4, NotChecked=0, Total=42 [2018-12-09 01:26:15,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-12-09 01:26:15,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2018-12-09 01:26:15,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-12-09 01:26:15,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 109 transitions. [2018-12-09 01:26:15,050 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 109 transitions. Word has length 74 [2018-12-09 01:26:15,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:26:15,050 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 109 transitions. [2018-12-09 01:26:15,050 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 01:26:15,050 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 109 transitions. [2018-12-09 01:26:15,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-12-09 01:26:15,050 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:26:15,050 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:26:15,051 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:26:15,051 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:26:15,051 INFO L82 PathProgramCache]: Analyzing trace with hash 247406239, now seen corresponding path program 1 times [2018-12-09 01:26:15,051 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:26:15,051 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 48 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:26:15,066 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:26:15,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:26:15,263 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:26:15,266 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:26:15,266 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:15,270 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:15,270 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 01:26:15,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:26:15,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:26:15,307 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:26:15,307 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:15,311 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:15,311 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-09 01:26:15,338 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-09 01:26:15,338 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:15,368 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:26:15,371 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:26:15,371 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:15,374 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:15,389 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 01:26:15,391 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 01:26:15,391 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:15,394 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:15,403 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:15,403 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:35, output treesize:22 [2018-12-09 01:26:17,433 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_71 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_71) (_ bv0 32)) v_entry_point_~c11~0.base_BEFORE_CALL_71))) is different from true [2018-12-09 01:26:17,481 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-12-09 01:26:17,484 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 01:26:17,485 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:17,498 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:17,526 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 40 [2018-12-09 01:26:17,528 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 01:26:17,528 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:17,536 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:17,548 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:17,548 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:58, output treesize:27 [2018-12-09 01:26:17,846 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 17 [2018-12-09 01:26:17,848 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-12-09 01:26:17,848 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:26:17,851 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:26:17,870 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 23 [2018-12-09 01:26:17,872 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 01:26:17,872 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:26:17,886 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-12-09 01:26:17,886 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:17,893 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 01:26:17,893 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:26:17,898 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-12-09 01:26:17,902 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-12-09 01:26:17,902 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:19, output treesize:15 [2018-12-09 01:26:18,029 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-12-09 01:26:18,031 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 5 [2018-12-09 01:26:18,031 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:18,037 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-09 01:26:18,038 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:18,039 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:18,041 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:18,041 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:41, output treesize:5 [2018-12-09 01:26:18,083 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 8 refuted. 4 times theorem prover too weak. 2 trivial. 6 not checked. [2018-12-09 01:26:18,083 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:26:18,135 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:26:18,136 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:26:18,142 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:26:18,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:26:18,178 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:26:18,181 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:26:18,181 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:18,183 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:26:18,183 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:26:20,244 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-12-09 01:26:20,247 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:26:20,247 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-12-09 01:26:20,248 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:20,249 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:26:20,249 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-12-09 01:26:21,533 WARN L180 SmtUtils]: Spent 1.17 s on a formula simplification. DAG size of input: 17 DAG size of output: 11 [2018-12-09 01:26:21,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:26:21,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:26:21,538 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-09 01:26:21,538 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:26:21,550 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:26:21,550 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-12-09 01:26:21,606 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 2 not checked. [2018-12-09 01:26:21,607 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:26:21,664 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:26:21,664 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 9] total 25 [2018-12-09 01:26:21,664 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-09 01:26:21,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-09 01:26:21,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=538, Unknown=4, NotChecked=94, Total=702 [2018-12-09 01:26:21,665 INFO L87 Difference]: Start difference. First operand 105 states and 109 transitions. Second operand 26 states. [2018-12-09 01:26:27,255 WARN L180 SmtUtils]: Spent 978.00 ms on a formula simplification that was a NOOP. DAG size: 27 [2018-12-09 01:26:34,363 WARN L180 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 24 [2018-12-09 01:26:39,122 WARN L180 SmtUtils]: Spent 2.69 s on a formula simplification that was a NOOP. DAG size: 33 [2018-12-09 01:27:14,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:27:14,230 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2018-12-09 01:27:14,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-12-09 01:27:14,230 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 75 [2018-12-09 01:27:14,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:27:14,231 INFO L225 Difference]: With dead ends: 106 [2018-12-09 01:27:14,231 INFO L226 Difference]: Without dead ends: 106 [2018-12-09 01:27:14,232 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 137 SyntacticMatches, 4 SemanticMatches, 50 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 402 ImplicationChecksByTransitivity, 21.1s TimeCoverageRelationStatistics Valid=298, Invalid=2147, Unknown=13, NotChecked=194, Total=2652 [2018-12-09 01:27:14,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-09 01:27:14,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 97. [2018-12-09 01:27:14,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-09 01:27:14,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 100 transitions. [2018-12-09 01:27:14,234 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 100 transitions. Word has length 75 [2018-12-09 01:27:14,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:27:14,234 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 100 transitions. [2018-12-09 01:27:14,234 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-09 01:27:14,234 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 100 transitions. [2018-12-09 01:27:14,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-09 01:27:14,235 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:27:14,235 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:27:14,235 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:27:14,235 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:27:14,235 INFO L82 PathProgramCache]: Analyzing trace with hash -1299179168, now seen corresponding path program 1 times [2018-12-09 01:27:14,235 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:27:14,235 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 50 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:27:14,250 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:27:14,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:27:14,379 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:27:14,408 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:27:14,408 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 01:27:14,410 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:27:14,411 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 01:27:14,411 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:27:14,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:27:14,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:27:14,411 INFO L87 Difference]: Start difference. First operand 97 states and 100 transitions. Second operand 5 states. [2018-12-09 01:27:14,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:27:14,426 INFO L93 Difference]: Finished difference Result 97 states and 98 transitions. [2018-12-09 01:27:14,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 01:27:14,427 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 77 [2018-12-09 01:27:14,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:27:14,428 INFO L225 Difference]: With dead ends: 97 [2018-12-09 01:27:14,428 INFO L226 Difference]: Without dead ends: 97 [2018-12-09 01:27:14,428 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 73 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:27:14,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-12-09 01:27:14,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 95. [2018-12-09 01:27:14,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-12-09 01:27:14,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 96 transitions. [2018-12-09 01:27:14,429 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 96 transitions. Word has length 77 [2018-12-09 01:27:14,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:27:14,429 INFO L480 AbstractCegarLoop]: Abstraction has 95 states and 96 transitions. [2018-12-09 01:27:14,429 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:27:14,430 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 96 transitions. [2018-12-09 01:27:14,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-09 01:27:14,430 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:27:14,430 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:27:14,430 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:27:14,430 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:27:14,430 INFO L82 PathProgramCache]: Analyzing trace with hash -1809008570, now seen corresponding path program 1 times [2018-12-09 01:27:14,430 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:27:14,430 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 51 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:27:14,445 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:27:14,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:27:14,626 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:27:14,628 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:27:14,628 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:14,631 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:27:14,631 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:27:14,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:14,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:14,661 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:27:14,661 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:14,664 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:27:14,664 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-09 01:27:14,703 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:14,703 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-09 01:27:14,703 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:14,708 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:27:14,708 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:12 [2018-12-09 01:27:14,727 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 01:27:14,727 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:27:14,764 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:27:14,764 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:27:14,771 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:27:14,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:27:14,799 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:27:14,801 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:27:14,801 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:14,802 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:27:14,802 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:27:14,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:14,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:14,807 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:27:14,807 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:14,809 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:27:14,809 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-09 01:27:14,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:14,819 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-09 01:27:14,819 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:14,824 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:27:14,825 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:12 [2018-12-09 01:27:14,828 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 01:27:14,828 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:27:14,877 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:27:14,877 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2018-12-09 01:27:14,877 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 01:27:14,877 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 01:27:14,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=101, Unknown=6, NotChecked=0, Total=132 [2018-12-09 01:27:14,878 INFO L87 Difference]: Start difference. First operand 95 states and 96 transitions. Second operand 11 states. [2018-12-09 01:27:19,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:27:19,412 INFO L93 Difference]: Finished difference Result 103 states and 105 transitions. [2018-12-09 01:27:19,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 01:27:19,412 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 76 [2018-12-09 01:27:19,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:27:19,413 INFO L225 Difference]: With dead ends: 103 [2018-12-09 01:27:19,413 INFO L226 Difference]: Without dead ends: 103 [2018-12-09 01:27:19,413 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 156 SyntacticMatches, 4 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=140, Unknown=7, NotChecked=0, Total=182 [2018-12-09 01:27:19,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-12-09 01:27:19,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 103. [2018-12-09 01:27:19,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-09 01:27:19,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 105 transitions. [2018-12-09 01:27:19,415 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 105 transitions. Word has length 76 [2018-12-09 01:27:19,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:27:19,415 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 105 transitions. [2018-12-09 01:27:19,415 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 01:27:19,415 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 105 transitions. [2018-12-09 01:27:19,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-09 01:27:19,416 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:27:19,416 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:27:19,416 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:27:19,416 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:27:19,416 INFO L82 PathProgramCache]: Analyzing trace with hash 1534208129, now seen corresponding path program 1 times [2018-12-09 01:27:19,417 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:27:19,417 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 53 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:27:19,441 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:27:19,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:27:19,664 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:27:19,668 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:27:19,669 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:19,670 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:27:19,670 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:27:19,699 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:19,700 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:19,701 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:27:19,701 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:19,702 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:27:19,703 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 01:27:21,744 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-12-09 01:27:21,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:21,749 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-12-09 01:27:21,749 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:21,750 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:27:21,750 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-12-09 01:27:24,146 WARN L180 SmtUtils]: Spent 2.37 s on a formula simplification. DAG size of input: 16 DAG size of output: 11 [2018-12-09 01:27:24,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:24,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:24,152 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-09 01:27:24,152 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:24,160 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:27:24,160 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:20 [2018-12-09 01:27:24,189 INFO L683 Elim1Store]: detected equality via solver [2018-12-09 01:27:24,195 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 34 [2018-12-09 01:27:24,196 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-12-09 01:27:24,220 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-12-09 01:27:24,220 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:26, output treesize:38 [2018-12-09 01:27:26,255 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 4 not checked. [2018-12-09 01:27:26,256 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:27:26,294 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:27:26,294 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:27:26,300 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:27:26,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:27:26,341 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:27:26,343 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:27:26,344 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:26,345 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:27:26,345 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:27:26,349 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:26,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:26,350 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:27:26,350 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:26,352 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:27:26,352 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 01:27:26,356 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:26,357 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-12-09 01:27:26,357 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:26,358 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:27:26,358 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-12-09 01:27:26,379 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:26,380 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:27:26,381 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-09 01:27:26,381 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:27:26,389 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:27:26,389 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:23, output treesize:20 [2018-12-09 01:27:26,395 INFO L683 Elim1Store]: detected equality via solver [2018-12-09 01:27:26,401 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 34 [2018-12-09 01:27:26,402 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-12-09 01:27:26,425 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-12-09 01:27:26,425 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:26, output treesize:38 [2018-12-09 01:27:28,453 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 4 not checked. [2018-12-09 01:27:28,453 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:27:28,504 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:27:28,504 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 14 [2018-12-09 01:27:28,504 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-09 01:27:28,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-09 01:27:28,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=4, NotChecked=26, Total=240 [2018-12-09 01:27:28,505 INFO L87 Difference]: Start difference. First operand 103 states and 105 transitions. Second operand 15 states. [2018-12-09 01:27:32,036 WARN L180 SmtUtils]: Spent 2.13 s on a formula simplification. DAG size of input: 25 DAG size of output: 18 [2018-12-09 01:27:50,550 WARN L854 $PredicateComparison]: unable to prove that (and (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) (exists ((v_prenex_50 (_ BitVec 32))) (and (= (store |c_old(#valid)| v_prenex_50 (_ bv1 1)) |c_#valid|) (= (select |c_old(#valid)| v_prenex_50) (_ bv0 1))))) is different from true [2018-12-09 01:28:08,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:28:08,719 INFO L93 Difference]: Finished difference Result 102 states and 104 transitions. [2018-12-09 01:28:08,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-09 01:28:08,719 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 77 [2018-12-09 01:28:08,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:28:08,719 INFO L225 Difference]: With dead ends: 102 [2018-12-09 01:28:08,720 INFO L226 Difference]: Without dead ends: 102 [2018-12-09 01:28:08,720 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 178 GetRequests, 153 SyntacticMatches, 6 SemanticMatches, 19 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 13.5s TimeCoverageRelationStatistics Valid=70, Invalid=275, Unknown=5, NotChecked=70, Total=420 [2018-12-09 01:28:08,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-12-09 01:28:08,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 94. [2018-12-09 01:28:08,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-12-09 01:28:08,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 95 transitions. [2018-12-09 01:28:08,721 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 95 transitions. Word has length 77 [2018-12-09 01:28:08,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:28:08,721 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 95 transitions. [2018-12-09 01:28:08,721 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-09 01:28:08,721 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 95 transitions. [2018-12-09 01:28:08,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-09 01:28:08,722 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:28:08,722 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:28:08,722 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:28:08,722 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:28:08,722 INFO L82 PathProgramCache]: Analyzing trace with hash 1004533000, now seen corresponding path program 1 times [2018-12-09 01:28:08,722 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:28:08,722 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 55 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:28:08,746 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:28:08,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:28:08,893 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:28:08,896 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:28:08,896 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:08,897 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:08,897 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:28:08,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:08,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:08,922 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:28:08,922 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:08,924 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:08,924 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 01:28:08,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:08,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:08,962 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:28:08,962 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:08,966 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:08,966 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:9 [2018-12-09 01:28:09,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:09,137 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-09 01:28:09,137 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:09,146 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:28:09,146 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:17 [2018-12-09 01:28:09,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:09,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:09,181 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-12-09 01:28:09,181 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:09,190 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:28:09,190 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-12-09 01:28:09,228 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:28:09,228 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:28:09,481 WARN L288 Elim1Store]: Array PQE input equivalent to true [2018-12-09 01:28:09,481 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:09,491 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:28:09,492 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:09,499 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:28:09,499 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:09,503 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-09 01:28:09,503 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-12-09 01:28:09,628 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:28:09,628 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:28:09,635 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:28:09,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:28:09,679 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:28:09,681 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:28:09,681 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:09,682 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:09,683 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:28:09,686 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:09,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:09,687 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:28:09,687 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:09,689 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:09,689 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-09 01:28:09,692 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:09,693 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:09,694 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:28:09,694 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:09,698 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:09,698 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:9 [2018-12-09 01:28:09,756 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:09,756 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-09 01:28:09,756 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:09,764 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:28:09,764 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:17 [2018-12-09 01:28:09,767 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:09,769 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:09,769 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-12-09 01:28:09,769 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:09,777 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:28:09,778 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-12-09 01:28:09,782 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 01:28:09,782 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:28:09,871 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:28:09,871 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17] total 21 [2018-12-09 01:28:09,871 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-09 01:28:09,872 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-09 01:28:09,872 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=553, Unknown=3, NotChecked=0, Total=650 [2018-12-09 01:28:09,872 INFO L87 Difference]: Start difference. First operand 94 states and 95 transitions. Second operand 22 states. [2018-12-09 01:28:15,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:28:15,271 INFO L93 Difference]: Finished difference Result 104 states and 106 transitions. [2018-12-09 01:28:15,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-09 01:28:15,272 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 78 [2018-12-09 01:28:15,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:28:15,272 INFO L225 Difference]: With dead ends: 104 [2018-12-09 01:28:15,272 INFO L226 Difference]: Without dead ends: 104 [2018-12-09 01:28:15,273 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 232 GetRequests, 185 SyntacticMatches, 11 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 428 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=189, Invalid=1214, Unknown=3, NotChecked=0, Total=1406 [2018-12-09 01:28:15,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-12-09 01:28:15,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 104. [2018-12-09 01:28:15,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 01:28:15,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 106 transitions. [2018-12-09 01:28:15,275 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 106 transitions. Word has length 78 [2018-12-09 01:28:15,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:28:15,275 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 106 transitions. [2018-12-09 01:28:15,275 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-09 01:28:15,275 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 106 transitions. [2018-12-09 01:28:15,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-12-09 01:28:15,275 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:28:15,275 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:28:15,276 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:28:15,276 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:28:15,276 INFO L82 PathProgramCache]: Analyzing trace with hash 1200243331, now seen corresponding path program 1 times [2018-12-09 01:28:15,276 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:28:15,276 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 57 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:28:15,294 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:28:15,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:28:15,483 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:28:15,485 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:28:15,485 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:15,486 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:15,486 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:28:15,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:15,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:15,520 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:28:15,520 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:15,521 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:15,522 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-09 01:28:15,553 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:15,554 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:15,555 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:28:15,555 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:15,559 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:15,559 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:9 [2018-12-09 01:28:15,804 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:15,804 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-09 01:28:15,804 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:15,815 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:28:15,816 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:17 [2018-12-09 01:28:15,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:15,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:15,900 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-12-09 01:28:15,900 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:15,915 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:28:15,915 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-12-09 01:28:15,985 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-09 01:28:15,985 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:28:16,234 WARN L288 Elim1Store]: Array PQE input equivalent to true [2018-12-09 01:28:16,234 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,248 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:28:16,248 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,257 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:28:16,258 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,263 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-09 01:28:16,263 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:43, output treesize:9 [2018-12-09 01:28:16,321 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 7 [2018-12-09 01:28:16,322 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,324 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,324 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:3 [2018-12-09 01:28:16,350 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 9 [2018-12-09 01:28:16,350 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,352 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,352 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:3 [2018-12-09 01:28:16,377 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-12-09 01:28:16,378 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,379 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,380 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:3 [2018-12-09 01:28:16,461 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:28:16,461 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:28:16,470 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:28:16,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:28:16,511 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:28:16,513 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:28:16,513 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,514 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,515 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 01:28:16,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:16,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:16,521 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 01:28:16,521 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,522 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,523 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 01:28:16,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:16,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:16,528 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 01:28:16,528 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,532 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,532 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:9 [2018-12-09 01:28:16,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:16,538 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-09 01:28:16,538 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,546 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 01:28:16,546 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:17 [2018-12-09 01:28:16,549 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:16,551 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:16,552 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-12-09 01:28:16,552 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:16,561 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:28:16,561 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-12-09 01:28:16,565 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-09 01:28:16,565 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:28:16,680 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:28:16,680 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 20] total 22 [2018-12-09 01:28:16,681 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-12-09 01:28:16,681 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-12-09 01:28:16,681 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=567, Unknown=11, NotChecked=0, Total=650 [2018-12-09 01:28:16,681 INFO L87 Difference]: Start difference. First operand 104 states and 106 transitions. Second operand 23 states. [2018-12-09 01:28:21,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:28:21,793 INFO L93 Difference]: Finished difference Result 103 states and 105 transitions. [2018-12-09 01:28:21,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-09 01:28:21,794 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 79 [2018-12-09 01:28:21,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:28:21,794 INFO L225 Difference]: With dead ends: 103 [2018-12-09 01:28:21,794 INFO L226 Difference]: Without dead ends: 103 [2018-12-09 01:28:21,795 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 234 GetRequests, 190 SyntacticMatches, 8 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=153, Invalid=1239, Unknown=14, NotChecked=0, Total=1406 [2018-12-09 01:28:21,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-12-09 01:28:21,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 93. [2018-12-09 01:28:21,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-09 01:28:21,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 94 transitions. [2018-12-09 01:28:21,796 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 94 transitions. Word has length 79 [2018-12-09 01:28:21,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:28:21,796 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 94 transitions. [2018-12-09 01:28:21,797 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-12-09 01:28:21,797 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 94 transitions. [2018-12-09 01:28:21,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-09 01:28:21,797 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:28:21,797 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:28:21,797 INFO L423 AbstractCegarLoop]: === Iteration 41 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:28:21,797 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:28:21,797 INFO L82 PathProgramCache]: Analyzing trace with hash -1289079286, now seen corresponding path program 1 times [2018-12-09 01:28:21,798 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:28:21,798 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 59 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:28:21,814 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:28:22,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:28:22,057 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:28:22,081 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 17 [2018-12-09 01:28:22,085 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:22,089 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 15 [2018-12-09 01:28:22,089 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-12-09 01:28:22,096 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-09 01:28:22,097 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 15 [2018-12-09 01:28:22,098 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:28:22,098 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2018-12-09 01:28:22,099 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:28:22,101 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:28:22,107 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 01:28:22,107 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:18, output treesize:19 [2018-12-09 01:28:29,231 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 20 [2018-12-09 01:28:41,948 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 21 [2018-12-09 01:28:43,307 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~fe~1.base (_ BitVec 32)) (entry_point_~c11~0.base (_ BitVec 32)) (entry_point_~cfg~1.base (_ BitVec 32))) (let ((.cse1 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (let ((.cse0 (store .cse1 entry_point_~cfg~1.base (_ bv1 1)))) (and (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= |c_#valid| (store (store (store .cse0 entry_point_~fe~1.base (_ bv0 1)) entry_point_~cfg~1.base (_ bv0 1)) entry_point_~c11~0.base (_ bv0 1))) (= (select .cse1 entry_point_~cfg~1.base) (_ bv0 1)) (= (_ bv0 1) (select .cse0 entry_point_~fe~1.base)))))) is different from true [2018-12-09 01:28:43,411 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:28:43,411 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:28:43,850 WARN L180 SmtUtils]: Spent 303.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 67 [2018-12-09 01:28:45,889 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_40 (_ BitVec 32)) (v_entry_point_~cfg~1.base_33 (_ BitVec 32)) (v_entry_point_~fe~1.base_32 (_ BitVec 32))) (let ((.cse1 (store |c_#valid| v_entry_point_~c11~0.base_40 (_ bv1 1)))) (let ((.cse0 (store .cse1 v_entry_point_~cfg~1.base_33 (_ bv1 1)))) (or (not (= (select |c_#valid| v_entry_point_~c11~0.base_40) (_ bv0 1))) (= (store (store (store .cse0 v_entry_point_~fe~1.base_32 (_ bv0 1)) v_entry_point_~cfg~1.base_33 (_ bv0 1)) v_entry_point_~c11~0.base_40 (_ bv0 1)) |c_old(#valid)|) (not (= (_ bv0 1) (select .cse1 v_entry_point_~cfg~1.base_33))) (not (= (_ bv0 1) (select .cse0 v_entry_point_~fe~1.base_32))))))) is different from false [2018-12-09 01:28:45,894 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:28:45,894 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:28:45,902 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:28:45,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:28:45,954 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:28:45,977 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 01:28:45,977 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 01:28:46,231 WARN L180 SmtUtils]: Spent 139.00 ms on a formula simplification that was a NOOP. DAG size: 67 [2018-12-09 01:28:48,271 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_44 (_ BitVec 32)) (v_entry_point_~fe~1.base_35 (_ BitVec 32)) (v_entry_point_~cfg~1.base_36 (_ BitVec 32))) (let ((.cse0 (store |c_#valid| v_entry_point_~c11~0.base_44 (_ bv1 1)))) (let ((.cse1 (store .cse0 v_entry_point_~cfg~1.base_36 (_ bv1 1)))) (or (not (= (select .cse0 v_entry_point_~cfg~1.base_36) (_ bv0 1))) (not (= (_ bv0 1) (select .cse1 v_entry_point_~fe~1.base_35))) (not (= (select |c_#valid| v_entry_point_~c11~0.base_44) (_ bv0 1))) (= (store (store (store .cse1 v_entry_point_~fe~1.base_35 (_ bv0 1)) v_entry_point_~cfg~1.base_36 (_ bv0 1)) v_entry_point_~c11~0.base_44 (_ bv0 1)) |c_old(#valid)|))))) is different from false [2018-12-09 01:28:48,289 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:28:48,289 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 12] total 17 [2018-12-09 01:28:48,289 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-09 01:28:48,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-09 01:28:48,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=218, Unknown=12, NotChecked=96, Total=380 [2018-12-09 01:28:48,290 INFO L87 Difference]: Start difference. First operand 93 states and 94 transitions. Second operand 18 states. [2018-12-09 01:30:08,843 WARN L180 SmtUtils]: Spent 4.01 s on a formula simplification. DAG size of input: 23 DAG size of output: 21 [2018-12-09 01:30:08,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:30:08,947 INFO L93 Difference]: Finished difference Result 106 states and 107 transitions. [2018-12-09 01:30:08,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-09 01:30:08,948 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 81 [2018-12-09 01:30:08,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:30:08,948 INFO L225 Difference]: With dead ends: 106 [2018-12-09 01:30:08,948 INFO L226 Difference]: Without dead ends: 79 [2018-12-09 01:30:08,949 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 146 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 31.3s TimeCoverageRelationStatistics Valid=70, Invalid=310, Unknown=12, NotChecked=114, Total=506 [2018-12-09 01:30:08,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-12-09 01:30:08,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-12-09 01:30:08,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-12-09 01:30:08,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 79 transitions. [2018-12-09 01:30:08,950 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 79 transitions. Word has length 81 [2018-12-09 01:30:08,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:30:08,950 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 79 transitions. [2018-12-09 01:30:08,950 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-09 01:30:08,950 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 79 transitions. [2018-12-09 01:30:08,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-09 01:30:08,951 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:30:08,951 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:30:08,951 INFO L423 AbstractCegarLoop]: === Iteration 42 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, alloc_3_11Err3REQUIRES_VIOLATION, alloc_3_11Err2REQUIRES_VIOLATION, alloc_3_11Err0REQUIRES_VIOLATION, alloc_3_11Err1REQUIRES_VIOLATION, alloc_3_11Err4REQUIRES_VIOLATION, alloc_3_11Err5REQUIRES_VIOLATION]=== [2018-12-09 01:30:08,951 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:30:08,951 INFO L82 PathProgramCache]: Analyzing trace with hash 846770863, now seen corresponding path program 1 times [2018-12-09 01:30:08,951 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 01:30:08,951 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_17931564-0797-44f4-a104-a78dc079a1fa/bin-2019/uautomizer/cvc4 Starting monitored process 61 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 01:30:08,965 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:30:09,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 01:30:09,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 01:30:09,643 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 01:30:09,661 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-09 01:30:09,665 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 01:30:09,666 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 01:30:09,678 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 01:30:09 BoogieIcfgContainer [2018-12-09 01:30:09,678 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 01:30:09,678 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 01:30:09,678 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 01:30:09,678 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 01:30:09,679 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 01:18:58" (3/4) ... [2018-12-09 01:30:09,681 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-09 01:30:09,681 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 01:30:09,682 INFO L168 Benchmark]: Toolchain (without parser) took 671945.85 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 166.2 MB). Free memory was 939.3 MB in the beginning and 977.4 MB in the end (delta: -38.0 MB). Peak memory consumption was 128.2 MB. Max. memory is 11.5 GB. [2018-12-09 01:30:09,682 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 01:30:09,682 INFO L168 Benchmark]: CACSL2BoogieTranslator took 342.87 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.9 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -166.7 MB). Peak memory consumption was 37.5 MB. Max. memory is 11.5 GB. [2018-12-09 01:30:09,682 INFO L168 Benchmark]: Boogie Preprocessor took 46.14 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2018-12-09 01:30:09,682 INFO L168 Benchmark]: RCFGBuilder took 844.40 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 977.9 MB in the end (delta: 121.4 MB). Peak memory consumption was 121.4 MB. Max. memory is 11.5 GB. [2018-12-09 01:30:09,682 INFO L168 Benchmark]: TraceAbstraction took 670706.59 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 27.3 MB). Free memory was 977.9 MB in the beginning and 977.4 MB in the end (delta: 546.5 kB). Peak memory consumption was 27.8 MB. Max. memory is 11.5 GB. [2018-12-09 01:30:09,683 INFO L168 Benchmark]: Witness Printer took 3.08 ms. Allocated memory is still 1.2 GB. Free memory is still 977.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 01:30:09,683 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 342.87 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.9 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -166.7 MB). Peak memory consumption was 37.5 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 46.14 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 844.40 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 977.9 MB in the end (delta: 121.4 MB). Peak memory consumption was 121.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 670706.59 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 27.3 MB). Free memory was 977.9 MB in the beginning and 977.4 MB in the end (delta: 546.5 kB). Peak memory consumption was 27.8 MB. Max. memory is 11.5 GB. * Witness Printer took 3.08 ms. Allocated memory is still 1.2 GB. Free memory is still 977.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1512]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1512. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={-2129561025:0}] [L1513] CALL entry_point() VAL [ldv_global_msg_list={-2129561025:0}] [L1490] CALL, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [\old(size)=20, ldv_global_msg_list={-2129561025:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=20, \result={1820205349:0}, ldv_global_msg_list={-2129561025:0}, malloc(size)={1820205349:0}, size=20] [L1490] RET, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [ldv_global_msg_list={-2129561025:0}, ldv_malloc(sizeof(struct ldv_i2c_client))={1820205349:0}] [L1490] struct ldv_i2c_client *c11 = (struct ldv_i2c_client *)ldv_malloc(sizeof(struct ldv_i2c_client)); [L1491] COND FALSE !(!c11) VAL [c11={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1493] CALL, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [\old(size)=4, ldv_global_msg_list={-2129561025:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={-1894694275:0}, ldv_global_msg_list={-2129561025:0}, malloc(size)={-1894694275:0}, size=4] [L1493] RET, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [c11={1820205349:0}, ldv_global_msg_list={-2129561025:0}, ldv_malloc(sizeof(struct ldv_m88ts2022_config))={-1894694275:0}] [L1492-L1493] struct ldv_m88ts2022_config *cfg = (struct ldv_m88ts2022_config *) ldv_malloc(sizeof(struct ldv_m88ts2022_config)); [L1494] COND FALSE !(!cfg) VAL [c11={1820205349:0}, cfg={-1894694275:0}, ldv_global_msg_list={-2129561025:0}] [L1495] c11->dev.platform_data = cfg VAL [c11={1820205349:0}, cfg={-1894694275:0}, ldv_global_msg_list={-2129561025:0}] [L1497] CALL, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [\old(size)=4, ldv_global_msg_list={-2129561025:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, malloc(size)={-1820205348:0}, size=4] [L1497] RET, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [c11={1820205349:0}, cfg={-1894694275:0}, ldv_global_msg_list={-2129561025:0}, ldv_malloc(sizeof(struct ldv_dvb_frontend))={-1820205348:0}] [L1496-L1497] struct ldv_dvb_frontend *fe = (struct ldv_dvb_frontend *) ldv_malloc(sizeof(struct ldv_dvb_frontend)); [L1498] COND FALSE !(!fe) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1499] cfg->fe = fe VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1500] CALL alloc_3_11(c11) VAL [client={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1470] EXPR client->dev.platform_data VAL [client={1820205349:0}, client={1820205349:0}, client->dev.platform_data={-1894694275:0}, ldv_global_msg_list={-2129561025:0}] [L1470] struct ldv_m88ts2022_config *cfg = client->dev.platform_data; [L1471] EXPR cfg->fe VAL [cfg={-1894694275:0}, cfg->fe={-1820205348:0}, client={1820205349:0}, client={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1471] struct ldv_dvb_frontend *fe = cfg->fe; [L1472] CALL, EXPR ldv_malloc(sizeof(struct Data11)) VAL [\old(size)=12, ldv_global_msg_list={-2129561025:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=12, \result={17922623:0}, ldv_global_msg_list={-2129561025:0}, malloc(size)={17922623:0}, size=12] [L1472] RET, EXPR ldv_malloc(sizeof(struct Data11)) VAL [cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, ldv_malloc(sizeof(struct Data11))={17922623:0}] [L1472] struct Data11 *priv = (struct Data11*)ldv_malloc(sizeof(struct Data11)); [L1473] COND FALSE !(!priv) VAL [cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, priv={17922623:0}] [L1474] fe->tuner_priv = priv VAL [cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, priv={17922623:0}] [L1475] CALL ldv_i2c_set_clientdata(client, 0) VAL [data={0:0}, dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1462] CALL ldv_dev_set_drvdata(&dev->dev, data) VAL [data={0:0}, dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1198] dev->driver_data = data VAL [data={0:0}, data={0:0}, dev={1820205349:0}, dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1462] RET ldv_dev_set_drvdata(&dev->dev, data) VAL [data={0:0}, data={0:0}, dev={1820205349:0}, dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1475] RET ldv_i2c_set_clientdata(client, 0) VAL [cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, priv={17922623:0}] [L1476] return 0; VAL [\result=0, cfg={-1894694275:0}, client={1820205349:0}, client={1820205349:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}, priv={17922623:0}] [L1500] RET alloc_3_11(c11) VAL [alloc_3_11(c11)=0, c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1501] CALL free_11(c11) VAL [client={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1483] CALL, EXPR ldv_i2c_get_clientdata(client) VAL [dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1457] CALL, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={1820205349:0}, ldv_global_msg_list={-2129561025:0}] [L1193] EXPR dev->driver_data VAL [dev={1820205349:0}, dev={1820205349:0}, dev->driver_data={0:0}, ldv_global_msg_list={-2129561025:0}] [L1193] return dev->driver_data; [L1457] RET, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={1820205349:0}, dev={1820205349:0}, ldv_dev_get_drvdata(&dev->dev)={0:0}, ldv_global_msg_list={-2129561025:0}] [L1457] return ldv_dev_get_drvdata(&dev->dev); [L1483] RET, EXPR ldv_i2c_get_clientdata(client) VAL [client={1820205349:0}, client={1820205349:0}, ldv_global_msg_list={-2129561025:0}, ldv_i2c_get_clientdata(client)={0:0}] [L1483] void *priv = (struct Data11*)ldv_i2c_get_clientdata(client); [L1484] COND FALSE !(\read(*priv)) VAL [client={1820205349:0}, client={1820205349:0}, ldv_global_msg_list={-2129561025:0}, priv={0:0}] [L1501] RET free_11(c11) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1503] free(fe) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1503] free(fe) [L1505] free(cfg) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1505] free(cfg) [L1507] free(c11) VAL [c11={1820205349:0}, cfg={-1894694275:0}, fe={-1820205348:0}, ldv_global_msg_list={-2129561025:0}] [L1507] free(c11) [L1513] RET entry_point() VAL [ldv_global_msg_list={-2129561025:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 47 procedures, 374 locations, 85 error locations. UNSAFE Result, 670.6s OverallTime, 42 OverallIterations, 4 TraceHistogramMax, 509.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3328 SDtfs, 2953 SDslu, 17249 SDs, 0 SdLazy, 21861 SolverSat, 1273 SolverUnsat, 461 SolverUnknown, 0 SolverNotchecked, 395.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3815 GetRequests, 2918 SyntacticMatches, 77 SemanticMatches, 820 ConstructedPredicates, 33 IntricatePredicates, 1 DeprecatedPredicates, 4591 ImplicationChecksByTransitivity, 253.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=170occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 41 MinimizatonAttempts, 726 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.4s SsaConstructionTime, 3.8s SatisfiabilityAnalysisTime, 155.1s InterpolantComputationTime, 2914 NumberOfCodeBlocks, 2914 NumberOfCodeBlocksAsserted, 60 NumberOfCheckSat, 3209 ConstructedInterpolants, 321 QuantifiedInterpolants, 1083933 SizeOfPredicates, 474 NumberOfNonLiveVariables, 10700 ConjunctsInSsa, 1391 ConjunctsInUnsatCore, 69 InterpolantComputations, 16 PerfectInterpolantSequences, 806/1168 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...