./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test19_false-valid-free.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test19_false-valid-free.i -s /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 927b64548732fdfa523149393b95aeee194275ea ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(valid-free) --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 12:43:37,303 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 12:43:37,304 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 12:43:37,310 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 12:43:37,310 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 12:43:37,311 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 12:43:37,312 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 12:43:37,313 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 12:43:37,313 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 12:43:37,314 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 12:43:37,314 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 12:43:37,314 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 12:43:37,315 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 12:43:37,315 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 12:43:37,316 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 12:43:37,316 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 12:43:37,317 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 12:43:37,318 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 12:43:37,318 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 12:43:37,319 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 12:43:37,320 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 12:43:37,320 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 12:43:37,321 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 12:43:37,321 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 12:43:37,322 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 12:43:37,322 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 12:43:37,323 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 12:43:37,323 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 12:43:37,323 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 12:43:37,324 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 12:43:37,324 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 12:43:37,324 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 12:43:37,325 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 12:43:37,325 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 12:43:37,325 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 12:43:37,326 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 12:43:37,326 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-12-09 12:43:37,333 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 12:43:37,333 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 12:43:37,333 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 12:43:37,333 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 12:43:37,334 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-09 12:43:37,334 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-09 12:43:37,334 INFO L133 SettingsManager]: * Use SBE=true [2018-12-09 12:43:37,334 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 12:43:37,334 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 12:43:37,334 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-09 12:43:37,335 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 12:43:37,335 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 12:43:37,335 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 12:43:37,335 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-09 12:43:37,335 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-09 12:43:37,335 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-09 12:43:37,335 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 12:43:37,335 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 12:43:37,336 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-09 12:43:37,336 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 12:43:37,336 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 12:43:37,336 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 12:43:37,336 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 12:43:37,336 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 12:43:37,336 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 12:43:37,336 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 12:43:37,337 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-09 12:43:37,337 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 12:43:37,337 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 927b64548732fdfa523149393b95aeee194275ea [2018-12-09 12:43:37,353 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 12:43:37,360 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 12:43:37,362 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 12:43:37,363 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 12:43:37,363 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 12:43:37,364 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test19_false-valid-free.i [2018-12-09 12:43:37,397 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/data/aa90cab2f/f8fe406d2676466296c212337b8c815c/FLAG4d1fd52fd [2018-12-09 12:43:37,840 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 12:43:37,840 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/sv-benchmarks/c/ldv-memsafety/memleaks_test19_false-valid-free.i [2018-12-09 12:43:37,847 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/data/aa90cab2f/f8fe406d2676466296c212337b8c815c/FLAG4d1fd52fd [2018-12-09 12:43:37,857 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/data/aa90cab2f/f8fe406d2676466296c212337b8c815c [2018-12-09 12:43:37,859 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 12:43:37,860 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-09 12:43:37,861 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 12:43:37,861 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 12:43:37,863 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 12:43:37,863 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 12:43:37" (1/1) ... [2018-12-09 12:43:37,865 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@33416e95 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:43:37, skipping insertion in model container [2018-12-09 12:43:37,865 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 12:43:37" (1/1) ... [2018-12-09 12:43:37,869 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 12:43:37,894 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 12:43:38,113 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 12:43:38,124 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 12:43:38,158 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 12:43:38,191 INFO L195 MainTranslator]: Completed translation [2018-12-09 12:43:38,191 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:43:38 WrapperNode [2018-12-09 12:43:38,191 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 12:43:38,191 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 12:43:38,192 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 12:43:38,192 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 12:43:38,200 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:43:38" (1/1) ... [2018-12-09 12:43:38,200 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:43:38" (1/1) ... [2018-12-09 12:43:38,211 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:43:38" (1/1) ... [2018-12-09 12:43:38,212 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:43:38" (1/1) ... [2018-12-09 12:43:38,229 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:43:38" (1/1) ... [2018-12-09 12:43:38,232 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:43:38" (1/1) ... [2018-12-09 12:43:38,235 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:43:38" (1/1) ... [2018-12-09 12:43:38,239 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 12:43:38,239 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 12:43:38,239 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 12:43:38,239 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 12:43:38,240 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:43:38" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 12:43:38,271 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-09 12:43:38,271 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 12:43:38,271 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-09 12:43:38,271 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-12-09 12:43:38,271 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-12-09 12:43:38,271 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-12-09 12:43:38,271 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-12-09 12:43:38,271 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-09 12:43:38,272 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-12-09 12:43:38,273 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-12-09 12:43:38,274 INFO L138 BoogieDeclarations]: Found implementation of procedure f19 [2018-12-09 12:43:38,274 INFO L138 BoogieDeclarations]: Found implementation of procedure f19_undo [2018-12-09 12:43:38,274 INFO L138 BoogieDeclarations]: Found implementation of procedure g19 [2018-12-09 12:43:38,274 INFO L138 BoogieDeclarations]: Found implementation of procedure probe_unsafe_19 [2018-12-09 12:43:38,274 INFO L138 BoogieDeclarations]: Found implementation of procedure disconnect_19 [2018-12-09 12:43:38,274 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-09 12:43:38,274 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-09 12:43:38,274 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-09 12:43:38,274 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-09 12:43:38,274 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-12-09 12:43:38,274 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-12-09 12:43:38,274 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-12-09 12:43:38,274 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-12-09 12:43:38,274 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-12-09 12:43:38,274 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-12-09 12:43:38,275 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-12-09 12:43:38,276 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-12-09 12:43:38,277 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-12-09 12:43:38,278 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-12-09 12:43:38,279 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-12-09 12:43:38,280 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-12-09 12:43:38,281 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-09 12:43:38,282 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure f19 [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure f19_undo [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure g19 [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure probe_unsafe_19 [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure disconnect_19 [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 12:43:38,283 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-12-09 12:43:38,284 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-12-09 12:43:38,284 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-12-09 12:43:38,284 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2018-12-09 12:43:38,547 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-09 12:43:38,656 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-09 12:43:38,762 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 12:43:38,762 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-09 12:43:38,762 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 12:43:38 BoogieIcfgContainer [2018-12-09 12:43:38,763 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 12:43:38,763 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 12:43:38,763 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 12:43:38,766 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 12:43:38,766 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 12:43:37" (1/3) ... [2018-12-09 12:43:38,766 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6bb8d457 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 12:43:38, skipping insertion in model container [2018-12-09 12:43:38,766 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:43:38" (2/3) ... [2018-12-09 12:43:38,767 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6bb8d457 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 12:43:38, skipping insertion in model container [2018-12-09 12:43:38,767 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 12:43:38" (3/3) ... [2018-12-09 12:43:38,768 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test19_false-valid-free.i [2018-12-09 12:43:38,776 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 12:43:38,782 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 87 error locations. [2018-12-09 12:43:38,791 INFO L257 AbstractCegarLoop]: Starting to check reachability of 87 error locations. [2018-12-09 12:43:38,806 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-09 12:43:38,806 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 12:43:38,806 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-09 12:43:38,806 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 12:43:38,806 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 12:43:38,806 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 12:43:38,806 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 12:43:38,807 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 12:43:38,807 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 12:43:38,817 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states. [2018-12-09 12:43:38,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-09 12:43:38,823 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:43:38,824 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:43:38,825 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:43:38,828 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:43:38,828 INFO L82 PathProgramCache]: Analyzing trace with hash -2073205213, now seen corresponding path program 1 times [2018-12-09 12:43:38,830 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:43:38,830 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:43:38,863 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:38,864 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:38,864 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:38,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:39,006 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:43:39,008 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:43:39,008 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 12:43:39,011 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 12:43:39,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 12:43:39,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-09 12:43:39,025 INFO L87 Difference]: Start difference. First operand 156 states. Second operand 7 states. [2018-12-09 12:43:39,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:43:39,333 INFO L93 Difference]: Finished difference Result 149 states and 173 transitions. [2018-12-09 12:43:39,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 12:43:39,334 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 15 [2018-12-09 12:43:39,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:43:39,344 INFO L225 Difference]: With dead ends: 149 [2018-12-09 12:43:39,344 INFO L226 Difference]: Without dead ends: 146 [2018-12-09 12:43:39,346 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-12-09 12:43:39,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-09 12:43:39,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 82. [2018-12-09 12:43:39,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-12-09 12:43:39,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 90 transitions. [2018-12-09 12:43:39,379 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 90 transitions. Word has length 15 [2018-12-09 12:43:39,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:43:39,379 INFO L480 AbstractCegarLoop]: Abstraction has 82 states and 90 transitions. [2018-12-09 12:43:39,380 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 12:43:39,380 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 90 transitions. [2018-12-09 12:43:39,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-09 12:43:39,380 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:43:39,380 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:43:39,381 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:43:39,381 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:43:39,381 INFO L82 PathProgramCache]: Analyzing trace with hash -2073205212, now seen corresponding path program 1 times [2018-12-09 12:43:39,381 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:43:39,381 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:43:39,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:39,382 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:39,383 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:39,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:39,477 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:43:39,477 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:43:39,477 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 12:43:39,478 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 12:43:39,478 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 12:43:39,478 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-09 12:43:39,478 INFO L87 Difference]: Start difference. First operand 82 states and 90 transitions. Second operand 8 states. [2018-12-09 12:43:39,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:43:39,814 INFO L93 Difference]: Finished difference Result 145 states and 170 transitions. [2018-12-09 12:43:39,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 12:43:39,814 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 15 [2018-12-09 12:43:39,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:43:39,815 INFO L225 Difference]: With dead ends: 145 [2018-12-09 12:43:39,815 INFO L226 Difference]: Without dead ends: 145 [2018-12-09 12:43:39,816 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:43:39,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-12-09 12:43:39,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 79. [2018-12-09 12:43:39,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-12-09 12:43:39,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 86 transitions. [2018-12-09 12:43:39,825 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 86 transitions. Word has length 15 [2018-12-09 12:43:39,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:43:39,825 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 86 transitions. [2018-12-09 12:43:39,825 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 12:43:39,825 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 86 transitions. [2018-12-09 12:43:39,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-09 12:43:39,826 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:43:39,826 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:43:39,826 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:43:39,827 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:43:39,827 INFO L82 PathProgramCache]: Analyzing trace with hash -413123169, now seen corresponding path program 1 times [2018-12-09 12:43:39,827 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:43:39,827 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:43:39,828 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:39,828 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:39,828 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:39,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:39,927 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:43:39,927 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:43:39,927 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 12:43:39,927 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 12:43:39,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 12:43:39,928 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-09 12:43:39,928 INFO L87 Difference]: Start difference. First operand 79 states and 86 transitions. Second operand 7 states. [2018-12-09 12:43:40,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:43:40,136 INFO L93 Difference]: Finished difference Result 126 states and 148 transitions. [2018-12-09 12:43:40,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 12:43:40,136 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2018-12-09 12:43:40,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:43:40,137 INFO L225 Difference]: With dead ends: 126 [2018-12-09 12:43:40,137 INFO L226 Difference]: Without dead ends: 126 [2018-12-09 12:43:40,138 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-12-09 12:43:40,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-12-09 12:43:40,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 77. [2018-12-09 12:43:40,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-12-09 12:43:40,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 84 transitions. [2018-12-09 12:43:40,142 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 84 transitions. Word has length 26 [2018-12-09 12:43:40,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:43:40,142 INFO L480 AbstractCegarLoop]: Abstraction has 77 states and 84 transitions. [2018-12-09 12:43:40,142 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 12:43:40,142 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 84 transitions. [2018-12-09 12:43:40,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-09 12:43:40,143 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:43:40,143 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:43:40,143 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:43:40,143 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:43:40,143 INFO L82 PathProgramCache]: Analyzing trace with hash -413123168, now seen corresponding path program 1 times [2018-12-09 12:43:40,143 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:43:40,143 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:43:40,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:40,145 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:40,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:40,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:40,247 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:43:40,247 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:43:40,247 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 12:43:40,247 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 12:43:40,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 12:43:40,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:43:40,248 INFO L87 Difference]: Start difference. First operand 77 states and 84 transitions. Second operand 11 states. [2018-12-09 12:43:40,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:43:40,618 INFO L93 Difference]: Finished difference Result 136 states and 161 transitions. [2018-12-09 12:43:40,618 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-09 12:43:40,618 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 26 [2018-12-09 12:43:40,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:43:40,619 INFO L225 Difference]: With dead ends: 136 [2018-12-09 12:43:40,619 INFO L226 Difference]: Without dead ends: 136 [2018-12-09 12:43:40,620 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 73 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=403, Unknown=0, NotChecked=0, Total=506 [2018-12-09 12:43:40,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-09 12:43:40,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 75. [2018-12-09 12:43:40,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-12-09 12:43:40,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 82 transitions. [2018-12-09 12:43:40,624 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 82 transitions. Word has length 26 [2018-12-09 12:43:40,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:43:40,625 INFO L480 AbstractCegarLoop]: Abstraction has 75 states and 82 transitions. [2018-12-09 12:43:40,625 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 12:43:40,625 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 82 transitions. [2018-12-09 12:43:40,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-09 12:43:40,626 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:43:40,626 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:43:40,626 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:43:40,626 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:43:40,627 INFO L82 PathProgramCache]: Analyzing trace with hash 951306512, now seen corresponding path program 1 times [2018-12-09 12:43:40,627 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:43:40,627 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:43:40,628 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:40,628 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:40,628 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:40,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:40,653 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:43:40,654 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:43:40,654 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 12:43:40,654 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 12:43:40,655 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 12:43:40,655 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 12:43:40,655 INFO L87 Difference]: Start difference. First operand 75 states and 82 transitions. Second operand 6 states. [2018-12-09 12:43:40,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:43:40,699 INFO L93 Difference]: Finished difference Result 82 states and 91 transitions. [2018-12-09 12:43:40,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 12:43:40,700 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-12-09 12:43:40,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:43:40,700 INFO L225 Difference]: With dead ends: 82 [2018-12-09 12:43:40,700 INFO L226 Difference]: Without dead ends: 82 [2018-12-09 12:43:40,700 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-12-09 12:43:40,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-12-09 12:43:40,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 81. [2018-12-09 12:43:40,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-12-09 12:43:40,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 89 transitions. [2018-12-09 12:43:40,703 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 89 transitions. Word has length 26 [2018-12-09 12:43:40,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:43:40,703 INFO L480 AbstractCegarLoop]: Abstraction has 81 states and 89 transitions. [2018-12-09 12:43:40,703 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 12:43:40,703 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 89 transitions. [2018-12-09 12:43:40,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-09 12:43:40,704 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:43:40,704 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:43:40,704 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:43:40,704 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:43:40,704 INFO L82 PathProgramCache]: Analyzing trace with hash -1836108975, now seen corresponding path program 1 times [2018-12-09 12:43:40,704 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:43:40,704 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:43:40,705 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:40,705 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:40,705 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:40,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:40,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:43:40,747 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:43:40,747 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 12:43:40,747 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 12:43:40,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 12:43:40,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-09 12:43:40,747 INFO L87 Difference]: Start difference. First operand 81 states and 89 transitions. Second operand 8 states. [2018-12-09 12:43:40,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:43:40,815 INFO L93 Difference]: Finished difference Result 95 states and 105 transitions. [2018-12-09 12:43:40,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 12:43:40,816 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-12-09 12:43:40,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:43:40,816 INFO L225 Difference]: With dead ends: 95 [2018-12-09 12:43:40,816 INFO L226 Difference]: Without dead ends: 95 [2018-12-09 12:43:40,817 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-12-09 12:43:40,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-12-09 12:43:40,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 89. [2018-12-09 12:43:40,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-12-09 12:43:40,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 100 transitions. [2018-12-09 12:43:40,821 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 100 transitions. Word has length 26 [2018-12-09 12:43:40,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:43:40,821 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 100 transitions. [2018-12-09 12:43:40,822 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 12:43:40,822 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 100 transitions. [2018-12-09 12:43:40,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-09 12:43:40,822 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:43:40,822 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:43:40,822 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:43:40,822 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:43:40,822 INFO L82 PathProgramCache]: Analyzing trace with hash -1836108974, now seen corresponding path program 1 times [2018-12-09 12:43:40,823 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:43:40,823 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:43:40,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:40,823 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:40,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:40,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:40,859 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:43:40,859 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:43:40,859 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 12:43:40,859 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 12:43:40,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 12:43:40,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 12:43:40,859 INFO L87 Difference]: Start difference. First operand 89 states and 100 transitions. Second operand 6 states. [2018-12-09 12:43:40,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:43:40,878 INFO L93 Difference]: Finished difference Result 89 states and 97 transitions. [2018-12-09 12:43:40,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 12:43:40,878 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-12-09 12:43:40,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:43:40,879 INFO L225 Difference]: With dead ends: 89 [2018-12-09 12:43:40,879 INFO L226 Difference]: Without dead ends: 89 [2018-12-09 12:43:40,879 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 12:43:40,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-12-09 12:43:40,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 86. [2018-12-09 12:43:40,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-12-09 12:43:40,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 94 transitions. [2018-12-09 12:43:40,882 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 94 transitions. Word has length 26 [2018-12-09 12:43:40,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:43:40,882 INFO L480 AbstractCegarLoop]: Abstraction has 86 states and 94 transitions. [2018-12-09 12:43:40,882 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 12:43:40,882 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 94 transitions. [2018-12-09 12:43:40,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-09 12:43:40,882 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:43:40,882 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:43:40,883 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:43:40,883 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:43:40,883 INFO L82 PathProgramCache]: Analyzing trace with hash -1084190059, now seen corresponding path program 1 times [2018-12-09 12:43:40,883 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:43:40,883 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:43:40,884 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:40,884 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:40,884 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:40,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:40,911 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:43:40,911 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:43:40,911 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 12:43:40,911 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 12:43:40,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 12:43:40,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 12:43:40,912 INFO L87 Difference]: Start difference. First operand 86 states and 94 transitions. Second operand 4 states. [2018-12-09 12:43:40,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:43:40,980 INFO L93 Difference]: Finished difference Result 113 states and 129 transitions. [2018-12-09 12:43:40,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 12:43:40,981 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-12-09 12:43:40,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:43:40,981 INFO L225 Difference]: With dead ends: 113 [2018-12-09 12:43:40,981 INFO L226 Difference]: Without dead ends: 104 [2018-12-09 12:43:40,982 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 12:43:40,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-12-09 12:43:40,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 97. [2018-12-09 12:43:40,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-09 12:43:40,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 110 transitions. [2018-12-09 12:43:40,986 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 110 transitions. Word has length 27 [2018-12-09 12:43:40,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:43:40,986 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 110 transitions. [2018-12-09 12:43:40,986 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 12:43:40,986 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 110 transitions. [2018-12-09 12:43:40,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-12-09 12:43:40,987 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:43:40,987 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:43:40,987 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:43:40,987 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:43:40,988 INFO L82 PathProgramCache]: Analyzing trace with hash 43118944, now seen corresponding path program 1 times [2018-12-09 12:43:40,988 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:43:40,988 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:43:40,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:40,989 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:40,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:40,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:41,021 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 12:43:41,021 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:43:41,022 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 12:43:41,022 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 12:43:41,022 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 12:43:41,022 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 12:43:41,022 INFO L87 Difference]: Start difference. First operand 97 states and 110 transitions. Second operand 5 states. [2018-12-09 12:43:41,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:43:41,033 INFO L93 Difference]: Finished difference Result 112 states and 127 transitions. [2018-12-09 12:43:41,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 12:43:41,034 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-12-09 12:43:41,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:43:41,035 INFO L225 Difference]: With dead ends: 112 [2018-12-09 12:43:41,035 INFO L226 Difference]: Without dead ends: 112 [2018-12-09 12:43:41,035 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 12:43:41,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-12-09 12:43:41,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 105. [2018-12-09 12:43:41,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-12-09 12:43:41,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 120 transitions. [2018-12-09 12:43:41,040 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 120 transitions. Word has length 35 [2018-12-09 12:43:41,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:43:41,040 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 120 transitions. [2018-12-09 12:43:41,040 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 12:43:41,040 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 120 transitions. [2018-12-09 12:43:41,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-12-09 12:43:41,041 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:43:41,041 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:43:41,042 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:43:41,042 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:43:41,042 INFO L82 PathProgramCache]: Analyzing trace with hash 930622625, now seen corresponding path program 1 times [2018-12-09 12:43:41,042 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:43:41,042 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:43:41,043 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:41,043 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:41,043 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:41,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:41,097 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:43:41,097 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:43:41,097 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 12:43:41,097 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 12:43:41,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 12:43:41,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 12:43:41,098 INFO L87 Difference]: Start difference. First operand 105 states and 120 transitions. Second operand 6 states. [2018-12-09 12:43:41,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:43:41,127 INFO L93 Difference]: Finished difference Result 103 states and 116 transitions. [2018-12-09 12:43:41,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 12:43:41,127 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-12-09 12:43:41,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:43:41,128 INFO L225 Difference]: With dead ends: 103 [2018-12-09 12:43:41,128 INFO L226 Difference]: Without dead ends: 103 [2018-12-09 12:43:41,129 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-12-09 12:43:41,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-12-09 12:43:41,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 103. [2018-12-09 12:43:41,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-09 12:43:41,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 116 transitions. [2018-12-09 12:43:41,132 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 116 transitions. Word has length 35 [2018-12-09 12:43:41,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:43:41,132 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 116 transitions. [2018-12-09 12:43:41,132 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 12:43:41,132 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 116 transitions. [2018-12-09 12:43:41,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-12-09 12:43:41,133 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:43:41,133 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:43:41,133 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:43:41,134 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:43:41,134 INFO L82 PathProgramCache]: Analyzing trace with hash 637219618, now seen corresponding path program 1 times [2018-12-09 12:43:41,134 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:43:41,134 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:43:41,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:41,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:41,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:41,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:41,259 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:43:41,260 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:43:41,260 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:43:41,268 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:41,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:41,292 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:43:41,331 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 12:43:41,333 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 12:43:41,333 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:43:41,337 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:43:41,338 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:43:41,338 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-09 12:43:41,775 WARN L854 $PredicateComparison]: unable to prove that (exists ((f19_~a.offset Int)) (= (store |c_old(#memory_$Pointer$.offset)| |c_f19_#in~a.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_f19_#in~a.base|) f19_~a.offset 0)) |c_#memory_$Pointer$.offset|)) is different from true [2018-12-09 12:43:41,784 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-12-09 12:43:41,786 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 17 [2018-12-09 12:43:41,786 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:43:41,789 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:43:41,792 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 12:43:41,792 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:17 [2018-12-09 12:43:41,803 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-12-09 12:43:41,804 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-12-09 12:43:41,804 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:43:41,805 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:43:41,806 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:43:41,806 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-12-09 12:43:41,810 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 12:43:41,835 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 12:43:41,835 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [13] total 17 [2018-12-09 12:43:41,836 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-09 12:43:41,836 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-09 12:43:41,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=227, Unknown=1, NotChecked=30, Total=306 [2018-12-09 12:43:41,836 INFO L87 Difference]: Start difference. First operand 103 states and 116 transitions. Second operand 18 states. [2018-12-09 12:43:43,341 WARN L180 SmtUtils]: Spent 329.00 ms on a formula simplification that was a NOOP. DAG size: 22 [2018-12-09 12:43:43,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:43:43,512 INFO L93 Difference]: Finished difference Result 102 states and 115 transitions. [2018-12-09 12:43:43,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-09 12:43:43,512 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 35 [2018-12-09 12:43:43,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:43:43,513 INFO L225 Difference]: With dead ends: 102 [2018-12-09 12:43:43,513 INFO L226 Difference]: Without dead ends: 102 [2018-12-09 12:43:43,513 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 28 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=115, Invalid=587, Unknown=4, NotChecked=50, Total=756 [2018-12-09 12:43:43,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-12-09 12:43:43,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 102. [2018-12-09 12:43:43,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-09 12:43:43,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 115 transitions. [2018-12-09 12:43:43,516 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 115 transitions. Word has length 35 [2018-12-09 12:43:43,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:43:43,516 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 115 transitions. [2018-12-09 12:43:43,516 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-09 12:43:43,516 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 115 transitions. [2018-12-09 12:43:43,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-09 12:43:43,517 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:43:43,517 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:43:43,517 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:43:43,517 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:43:43,517 INFO L82 PathProgramCache]: Analyzing trace with hash -1721028121, now seen corresponding path program 1 times [2018-12-09 12:43:43,517 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:43:43,517 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:43:43,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:43,518 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:43,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:43:43,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:43,661 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:43:43,662 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:43:43,662 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:43:43,675 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:43:43,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:43:43,694 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:43:43,696 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 12:43:43,696 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:43:43,697 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:43:43,697 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 12:43:43,710 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 12:43:43,712 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 12:43:43,712 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:43:43,713 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:43:43,716 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:43:43,716 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:11 [2018-12-09 12:43:47,115 WARN L180 SmtUtils]: Spent 396.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-12-09 12:43:47,121 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-12-09 12:43:47,130 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 28 [2018-12-09 12:43:47,131 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 12:43:47,140 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 12:43:47,149 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-12-09 12:43:47,149 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:23, output treesize:35 [2018-12-09 12:43:47,173 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-12-09 12:43:47,175 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-12-09 12:43:47,175 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:43:47,177 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:43:47,184 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-12-09 12:43:47,189 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 16 [2018-12-09 12:43:47,189 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-12-09 12:43:47,194 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-09 12:43:47,202 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 3 xjuncts. [2018-12-09 12:43:47,202 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:53, output treesize:24 [2018-12-09 12:43:47,229 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:43:47,244 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 12:43:47,244 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12] total 21 [2018-12-09 12:43:47,245 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-09 12:43:47,245 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-09 12:43:47,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=389, Unknown=8, NotChecked=0, Total=462 [2018-12-09 12:43:47,245 INFO L87 Difference]: Start difference. First operand 102 states and 115 transitions. Second operand 22 states. [2018-12-09 12:44:03,363 WARN L180 SmtUtils]: Spent 334.00 ms on a formula simplification that was a NOOP. DAG size: 25 [2018-12-09 12:44:08,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:08,088 INFO L93 Difference]: Finished difference Result 117 states and 134 transitions. [2018-12-09 12:44:08,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-09 12:44:08,088 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 36 [2018-12-09 12:44:08,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:08,089 INFO L225 Difference]: With dead ends: 117 [2018-12-09 12:44:08,089 INFO L226 Difference]: Without dead ends: 117 [2018-12-09 12:44:08,089 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 30 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=158, Invalid=950, Unknown=14, NotChecked=0, Total=1122 [2018-12-09 12:44:08,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-12-09 12:44:08,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 105. [2018-12-09 12:44:08,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-12-09 12:44:08,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 118 transitions. [2018-12-09 12:44:08,092 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 118 transitions. Word has length 36 [2018-12-09 12:44:08,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:08,092 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 118 transitions. [2018-12-09 12:44:08,092 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-09 12:44:08,092 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 118 transitions. [2018-12-09 12:44:08,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-09 12:44:08,093 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:08,093 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:08,093 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:08,093 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:08,093 INFO L82 PathProgramCache]: Analyzing trace with hash 496729832, now seen corresponding path program 1 times [2018-12-09 12:44:08,093 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:08,094 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:08,094 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:08,094 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:08,094 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:08,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:08,123 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:44:08,123 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:44:08,124 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:44:08,132 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:08,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:08,152 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:44:08,160 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 12:44:08,162 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 12:44:08,162 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:08,164 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:08,169 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 12:44:08,171 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 12:44:08,171 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:08,173 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:08,176 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:08,176 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-12-09 12:44:08,182 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-12-09 12:44:08,183 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-12-09 12:44:08,183 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:08,185 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:08,190 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-12-09 12:44:08,191 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-12-09 12:44:08,191 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:08,192 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:08,198 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:08,198 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:37, output treesize:7 [2018-12-09 12:44:08,199 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:44:08,224 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 12:44:08,224 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 6 [2018-12-09 12:44:08,224 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 12:44:08,225 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 12:44:08,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 12:44:08,225 INFO L87 Difference]: Start difference. First operand 105 states and 118 transitions. Second operand 6 states. [2018-12-09 12:44:08,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:08,264 INFO L93 Difference]: Finished difference Result 92 states and 98 transitions. [2018-12-09 12:44:08,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 12:44:08,265 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-12-09 12:44:08,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:08,265 INFO L225 Difference]: With dead ends: 92 [2018-12-09 12:44:08,266 INFO L226 Difference]: Without dead ends: 88 [2018-12-09 12:44:08,266 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 34 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-12-09 12:44:08,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-12-09 12:44:08,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 86. [2018-12-09 12:44:08,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-12-09 12:44:08,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 92 transitions. [2018-12-09 12:44:08,268 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 92 transitions. Word has length 36 [2018-12-09 12:44:08,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:08,268 INFO L480 AbstractCegarLoop]: Abstraction has 86 states and 92 transitions. [2018-12-09 12:44:08,268 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 12:44:08,268 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 92 transitions. [2018-12-09 12:44:08,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-09 12:44:08,268 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:08,269 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:08,269 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:08,269 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:08,269 INFO L82 PathProgramCache]: Analyzing trace with hash 1752841694, now seen corresponding path program 1 times [2018-12-09 12:44:08,269 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:08,269 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:08,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:08,270 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:08,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:08,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:08,308 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 12:44:08,308 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:44:08,308 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 12:44:08,308 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 12:44:08,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 12:44:08,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-09 12:44:08,309 INFO L87 Difference]: Start difference. First operand 86 states and 92 transitions. Second operand 8 states. [2018-12-09 12:44:08,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:08,373 INFO L93 Difference]: Finished difference Result 95 states and 101 transitions. [2018-12-09 12:44:08,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 12:44:08,374 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-12-09 12:44:08,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:08,374 INFO L225 Difference]: With dead ends: 95 [2018-12-09 12:44:08,374 INFO L226 Difference]: Without dead ends: 95 [2018-12-09 12:44:08,374 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-12-09 12:44:08,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-12-09 12:44:08,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 88. [2018-12-09 12:44:08,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-12-09 12:44:08,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 95 transitions. [2018-12-09 12:44:08,376 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 95 transitions. Word has length 42 [2018-12-09 12:44:08,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:08,376 INFO L480 AbstractCegarLoop]: Abstraction has 88 states and 95 transitions. [2018-12-09 12:44:08,376 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 12:44:08,376 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 95 transitions. [2018-12-09 12:44:08,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-09 12:44:08,377 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:08,377 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:08,378 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:08,378 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:08,378 INFO L82 PathProgramCache]: Analyzing trace with hash 1752841695, now seen corresponding path program 1 times [2018-12-09 12:44:08,378 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:08,378 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:08,378 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:08,379 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:08,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:08,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:08,479 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 12:44:08,479 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:44:08,479 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 12:44:08,480 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 12:44:08,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 12:44:08,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:44:08,480 INFO L87 Difference]: Start difference. First operand 88 states and 95 transitions. Second operand 11 states. [2018-12-09 12:44:08,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:08,558 INFO L93 Difference]: Finished difference Result 94 states and 99 transitions. [2018-12-09 12:44:08,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 12:44:08,558 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 42 [2018-12-09 12:44:08,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:08,559 INFO L225 Difference]: With dead ends: 94 [2018-12-09 12:44:08,559 INFO L226 Difference]: Without dead ends: 94 [2018-12-09 12:44:08,559 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2018-12-09 12:44:08,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-12-09 12:44:08,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 92. [2018-12-09 12:44:08,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-12-09 12:44:08,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 99 transitions. [2018-12-09 12:44:08,562 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 99 transitions. Word has length 42 [2018-12-09 12:44:08,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:08,562 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 99 transitions. [2018-12-09 12:44:08,562 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 12:44:08,562 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 99 transitions. [2018-12-09 12:44:08,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-09 12:44:08,563 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:08,563 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:08,563 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:08,563 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:08,564 INFO L82 PathProgramCache]: Analyzing trace with hash -1496482347, now seen corresponding path program 1 times [2018-12-09 12:44:08,564 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:08,564 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:08,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:08,565 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:08,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:08,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:08,632 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:44:08,632 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:44:08,633 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 12:44:08,633 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 12:44:08,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 12:44:08,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:44:08,633 INFO L87 Difference]: Start difference. First operand 92 states and 99 transitions. Second operand 11 states. [2018-12-09 12:44:08,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:08,717 INFO L93 Difference]: Finished difference Result 93 states and 98 transitions. [2018-12-09 12:44:08,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 12:44:08,717 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 43 [2018-12-09 12:44:08,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:08,718 INFO L225 Difference]: With dead ends: 93 [2018-12-09 12:44:08,718 INFO L226 Difference]: Without dead ends: 93 [2018-12-09 12:44:08,718 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=144, Unknown=0, NotChecked=0, Total=182 [2018-12-09 12:44:08,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-12-09 12:44:08,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 92. [2018-12-09 12:44:08,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-12-09 12:44:08,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 98 transitions. [2018-12-09 12:44:08,721 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 98 transitions. Word has length 43 [2018-12-09 12:44:08,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:08,722 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 98 transitions. [2018-12-09 12:44:08,722 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 12:44:08,722 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 98 transitions. [2018-12-09 12:44:08,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-12-09 12:44:08,722 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:08,722 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:08,723 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:08,723 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:08,723 INFO L82 PathProgramCache]: Analyzing trace with hash 853687550, now seen corresponding path program 1 times [2018-12-09 12:44:08,723 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:08,723 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:08,724 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:08,724 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:08,724 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:08,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:08,798 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:44:08,798 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:44:08,798 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 12:44:08,798 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 12:44:08,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 12:44:08,799 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:44:08,799 INFO L87 Difference]: Start difference. First operand 92 states and 98 transitions. Second operand 11 states. [2018-12-09 12:44:08,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:08,903 INFO L93 Difference]: Finished difference Result 106 states and 115 transitions. [2018-12-09 12:44:08,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 12:44:08,903 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 44 [2018-12-09 12:44:08,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:08,904 INFO L225 Difference]: With dead ends: 106 [2018-12-09 12:44:08,904 INFO L226 Difference]: Without dead ends: 106 [2018-12-09 12:44:08,904 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=144, Unknown=0, NotChecked=0, Total=182 [2018-12-09 12:44:08,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-09 12:44:08,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 104. [2018-12-09 12:44:08,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 12:44:08,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 113 transitions. [2018-12-09 12:44:08,907 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 113 transitions. Word has length 44 [2018-12-09 12:44:08,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:08,907 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 113 transitions. [2018-12-09 12:44:08,907 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 12:44:08,907 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 113 transitions. [2018-12-09 12:44:08,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-12-09 12:44:08,908 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:08,908 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:08,908 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:08,908 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:08,909 INFO L82 PathProgramCache]: Analyzing trace with hash -1184368739, now seen corresponding path program 1 times [2018-12-09 12:44:08,909 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:08,909 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:08,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:08,910 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:08,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:08,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:08,976 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:44:08,976 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:44:08,976 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 12:44:08,976 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 12:44:08,977 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 12:44:08,977 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:44:08,977 INFO L87 Difference]: Start difference. First operand 104 states and 113 transitions. Second operand 11 states. [2018-12-09 12:44:09,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:09,096 INFO L93 Difference]: Finished difference Result 114 states and 121 transitions. [2018-12-09 12:44:09,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 12:44:09,097 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 44 [2018-12-09 12:44:09,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:09,097 INFO L225 Difference]: With dead ends: 114 [2018-12-09 12:44:09,097 INFO L226 Difference]: Without dead ends: 114 [2018-12-09 12:44:09,098 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=144, Unknown=0, NotChecked=0, Total=182 [2018-12-09 12:44:09,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-09 12:44:09,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 92. [2018-12-09 12:44:09,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-12-09 12:44:09,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 97 transitions. [2018-12-09 12:44:09,100 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 97 transitions. Word has length 44 [2018-12-09 12:44:09,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:09,101 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 97 transitions. [2018-12-09 12:44:09,101 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 12:44:09,101 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 97 transitions. [2018-12-09 12:44:09,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-12-09 12:44:09,101 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:09,101 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:09,102 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:09,102 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:09,102 INFO L82 PathProgramCache]: Analyzing trace with hash -219716567, now seen corresponding path program 1 times [2018-12-09 12:44:09,102 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:09,102 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:09,103 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:09,103 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:09,103 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:09,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:09,141 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 12:44:09,141 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:44:09,141 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-09 12:44:09,142 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 12:44:09,142 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 12:44:09,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-09 12:44:09,142 INFO L87 Difference]: Start difference. First operand 92 states and 97 transitions. Second operand 8 states. [2018-12-09 12:44:09,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:09,168 INFO L93 Difference]: Finished difference Result 100 states and 104 transitions. [2018-12-09 12:44:09,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 12:44:09,168 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-12-09 12:44:09,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:09,168 INFO L225 Difference]: With dead ends: 100 [2018-12-09 12:44:09,169 INFO L226 Difference]: Without dead ends: 100 [2018-12-09 12:44:09,169 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-12-09 12:44:09,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-12-09 12:44:09,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 97. [2018-12-09 12:44:09,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-09 12:44:09,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 101 transitions. [2018-12-09 12:44:09,171 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 101 transitions. Word has length 44 [2018-12-09 12:44:09,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:09,171 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 101 transitions. [2018-12-09 12:44:09,171 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 12:44:09,171 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 101 transitions. [2018-12-09 12:44:09,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-12-09 12:44:09,171 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:09,171 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:09,171 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:09,172 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:09,172 INFO L82 PathProgramCache]: Analyzing trace with hash -616877014, now seen corresponding path program 1 times [2018-12-09 12:44:09,172 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:09,172 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:09,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:09,172 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:09,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:09,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:09,239 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 12:44:09,239 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:44:09,239 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-09 12:44:09,240 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 12:44:09,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 12:44:09,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-12-09 12:44:09,240 INFO L87 Difference]: Start difference. First operand 97 states and 101 transitions. Second operand 10 states. [2018-12-09 12:44:09,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:09,349 INFO L93 Difference]: Finished difference Result 110 states and 116 transitions. [2018-12-09 12:44:09,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 12:44:09,349 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 46 [2018-12-09 12:44:09,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:09,349 INFO L225 Difference]: With dead ends: 110 [2018-12-09 12:44:09,349 INFO L226 Difference]: Without dead ends: 110 [2018-12-09 12:44:09,350 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-12-09 12:44:09,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-12-09 12:44:09,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 104. [2018-12-09 12:44:09,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 12:44:09,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 111 transitions. [2018-12-09 12:44:09,351 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 111 transitions. Word has length 46 [2018-12-09 12:44:09,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:09,352 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 111 transitions. [2018-12-09 12:44:09,352 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 12:44:09,352 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 111 transitions. [2018-12-09 12:44:09,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-12-09 12:44:09,352 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:09,352 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:09,352 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:09,352 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:09,353 INFO L82 PathProgramCache]: Analyzing trace with hash -616877013, now seen corresponding path program 1 times [2018-12-09 12:44:09,353 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:09,353 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:09,353 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:09,353 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:09,353 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:09,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:09,471 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:44:09,471 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:44:09,471 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-12-09 12:44:09,471 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-09 12:44:09,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-09 12:44:09,472 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=148, Unknown=0, NotChecked=0, Total=182 [2018-12-09 12:44:09,472 INFO L87 Difference]: Start difference. First operand 104 states and 111 transitions. Second operand 14 states. [2018-12-09 12:44:09,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:09,881 INFO L93 Difference]: Finished difference Result 121 states and 130 transitions. [2018-12-09 12:44:09,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-09 12:44:09,881 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 46 [2018-12-09 12:44:09,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:09,882 INFO L225 Difference]: With dead ends: 121 [2018-12-09 12:44:09,882 INFO L226 Difference]: Without dead ends: 121 [2018-12-09 12:44:09,882 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=119, Invalid=531, Unknown=0, NotChecked=0, Total=650 [2018-12-09 12:44:09,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-12-09 12:44:09,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 103. [2018-12-09 12:44:09,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-09 12:44:09,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 109 transitions. [2018-12-09 12:44:09,884 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 109 transitions. Word has length 46 [2018-12-09 12:44:09,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:09,884 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 109 transitions. [2018-12-09 12:44:09,884 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-09 12:44:09,884 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 109 transitions. [2018-12-09 12:44:09,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 12:44:09,885 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:09,885 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:09,885 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:09,885 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:09,885 INFO L82 PathProgramCache]: Analyzing trace with hash 1704507390, now seen corresponding path program 1 times [2018-12-09 12:44:09,885 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:09,885 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:09,886 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:09,886 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:09,886 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:09,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:09,983 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:44:09,983 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:44:09,983 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-09 12:44:09,983 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 12:44:09,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 12:44:09,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:44:09,984 INFO L87 Difference]: Start difference. First operand 103 states and 109 transitions. Second operand 13 states. [2018-12-09 12:44:10,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:10,268 INFO L93 Difference]: Finished difference Result 122 states and 131 transitions. [2018-12-09 12:44:10,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-09 12:44:10,268 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 47 [2018-12-09 12:44:10,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:10,269 INFO L225 Difference]: With dead ends: 122 [2018-12-09 12:44:10,269 INFO L226 Difference]: Without dead ends: 122 [2018-12-09 12:44:10,269 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=64, Invalid=316, Unknown=0, NotChecked=0, Total=380 [2018-12-09 12:44:10,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-12-09 12:44:10,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 112. [2018-12-09 12:44:10,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-12-09 12:44:10,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 121 transitions. [2018-12-09 12:44:10,272 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 121 transitions. Word has length 47 [2018-12-09 12:44:10,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:10,272 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 121 transitions. [2018-12-09 12:44:10,272 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 12:44:10,272 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 121 transitions. [2018-12-09 12:44:10,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 12:44:10,273 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:10,273 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:10,273 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:10,273 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:10,273 INFO L82 PathProgramCache]: Analyzing trace with hash -1943318218, now seen corresponding path program 1 times [2018-12-09 12:44:10,273 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:10,273 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:10,274 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:10,274 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:10,274 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:10,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:10,472 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:44:10,472 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:44:10,472 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:44:10,485 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:10,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:10,506 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:44:10,536 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 12:44:10,537 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 12:44:10,537 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:10,539 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:10,542 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:10,542 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-12-09 12:44:10,983 WARN L854 $PredicateComparison]: unable to prove that (exists ((f19_~a.offset Int)) (= (store |c_old(#memory_$Pointer$.offset)| |c_f19_#in~a.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_f19_#in~a.base|) f19_~a.offset 0)) |c_#memory_$Pointer$.offset|)) is different from true [2018-12-09 12:44:10,989 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-12-09 12:44:10,991 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 17 [2018-12-09 12:44:10,991 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:10,994 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:10,996 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 12:44:10,996 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:17 [2018-12-09 12:44:11,076 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-12-09 12:44:11,077 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-12-09 12:44:11,077 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:11,078 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:11,079 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:11,079 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-12-09 12:44:11,081 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 12:44:11,096 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 12:44:11,096 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [15] total 26 [2018-12-09 12:44:11,097 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-12-09 12:44:11,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-12-09 12:44:11,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=569, Unknown=1, NotChecked=48, Total=702 [2018-12-09 12:44:11,097 INFO L87 Difference]: Start difference. First operand 112 states and 121 transitions. Second operand 27 states. [2018-12-09 12:44:14,357 WARN L180 SmtUtils]: Spent 2.36 s on a formula simplification that was a NOOP. DAG size: 30 [2018-12-09 12:44:14,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:14,930 INFO L93 Difference]: Finished difference Result 111 states and 120 transitions. [2018-12-09 12:44:14,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-09 12:44:14,930 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 47 [2018-12-09 12:44:14,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:14,931 INFO L225 Difference]: With dead ends: 111 [2018-12-09 12:44:14,931 INFO L226 Difference]: Without dead ends: 111 [2018-12-09 12:44:14,931 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 36 SyntacticMatches, 3 SemanticMatches, 40 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 377 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=217, Invalid=1423, Unknown=4, NotChecked=78, Total=1722 [2018-12-09 12:44:14,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-12-09 12:44:14,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-12-09 12:44:14,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-12-09 12:44:14,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 120 transitions. [2018-12-09 12:44:14,933 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 120 transitions. Word has length 47 [2018-12-09 12:44:14,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:14,934 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 120 transitions. [2018-12-09 12:44:14,934 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-12-09 12:44:14,934 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 120 transitions. [2018-12-09 12:44:14,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 12:44:14,934 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:14,934 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:14,935 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:14,935 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:14,935 INFO L82 PathProgramCache]: Analyzing trace with hash -372701953, now seen corresponding path program 1 times [2018-12-09 12:44:14,935 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:14,935 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:14,936 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:14,936 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:14,936 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:14,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:15,015 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:44:15,015 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:44:15,015 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-09 12:44:15,016 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 12:44:15,016 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 12:44:15,016 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2018-12-09 12:44:15,016 INFO L87 Difference]: Start difference. First operand 111 states and 120 transitions. Second operand 12 states. [2018-12-09 12:44:15,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:15,152 INFO L93 Difference]: Finished difference Result 111 states and 119 transitions. [2018-12-09 12:44:15,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-09 12:44:15,152 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 47 [2018-12-09 12:44:15,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:15,153 INFO L225 Difference]: With dead ends: 111 [2018-12-09 12:44:15,153 INFO L226 Difference]: Without dead ends: 110 [2018-12-09 12:44:15,153 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=253, Unknown=0, NotChecked=0, Total=306 [2018-12-09 12:44:15,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-12-09 12:44:15,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 108. [2018-12-09 12:44:15,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-12-09 12:44:15,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 115 transitions. [2018-12-09 12:44:15,155 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 115 transitions. Word has length 47 [2018-12-09 12:44:15,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:15,155 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 115 transitions. [2018-12-09 12:44:15,155 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 12:44:15,155 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 115 transitions. [2018-12-09 12:44:15,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-12-09 12:44:15,156 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:15,156 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:15,156 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:15,156 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:15,156 INFO L82 PathProgramCache]: Analyzing trace with hash 1779334333, now seen corresponding path program 1 times [2018-12-09 12:44:15,156 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:15,156 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:15,157 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:15,157 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:15,157 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:15,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:15,395 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:44:15,395 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:44:15,396 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:44:15,402 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:15,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:15,423 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:44:15,467 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 12:44:15,469 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 12:44:15,469 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:15,470 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:15,473 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:15,473 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:24 [2018-12-09 12:44:18,616 WARN L180 SmtUtils]: Spent 384.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-12-09 12:44:18,623 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 28 [2018-12-09 12:44:18,636 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:44:18,637 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 37 [2018-12-09 12:44:18,638 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:18,642 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:18,647 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:18,647 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:38, output treesize:24 [2018-12-09 12:44:18,649 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-12-09 12:44:18,651 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 12 [2018-12-09 12:44:18,651 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:18,653 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:18,656 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:18,656 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:33, output treesize:12 [2018-12-09 12:44:21,558 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:44:21,573 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 12:44:21,574 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 13] total 25 [2018-12-09 12:44:21,574 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-09 12:44:21,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-09 12:44:21,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=546, Unknown=18, NotChecked=0, Total=650 [2018-12-09 12:44:21,574 INFO L87 Difference]: Start difference. First operand 108 states and 115 transitions. Second operand 26 states. [2018-12-09 12:44:34,302 WARN L180 SmtUtils]: Spent 420.00 ms on a formula simplification that was a NOOP. DAG size: 28 [2018-12-09 12:44:36,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:36,742 INFO L93 Difference]: Finished difference Result 114 states and 120 transitions. [2018-12-09 12:44:36,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 12:44:36,743 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 45 [2018-12-09 12:44:36,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:36,743 INFO L225 Difference]: With dead ends: 114 [2018-12-09 12:44:36,743 INFO L226 Difference]: Without dead ends: 98 [2018-12-09 12:44:36,743 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 298 ImplicationChecksByTransitivity, 7.9s TimeCoverageRelationStatistics Valid=149, Invalid=1020, Unknown=21, NotChecked=0, Total=1190 [2018-12-09 12:44:36,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-12-09 12:44:36,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 96. [2018-12-09 12:44:36,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-12-09 12:44:36,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 102 transitions. [2018-12-09 12:44:36,745 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 102 transitions. Word has length 45 [2018-12-09 12:44:36,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:36,746 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 102 transitions. [2018-12-09 12:44:36,746 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-09 12:44:36,746 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 102 transitions. [2018-12-09 12:44:36,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 12:44:36,746 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:36,746 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:36,746 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:36,746 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:36,746 INFO L82 PathProgramCache]: Analyzing trace with hash -1942704932, now seen corresponding path program 1 times [2018-12-09 12:44:36,747 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:36,747 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:36,747 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:36,747 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:36,747 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:36,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:36,765 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 12:44:36,765 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:44:36,765 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 12:44:36,765 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 12:44:36,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 12:44:36,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 12:44:36,765 INFO L87 Difference]: Start difference. First operand 96 states and 102 transitions. Second operand 5 states. [2018-12-09 12:44:36,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:36,771 INFO L93 Difference]: Finished difference Result 99 states and 104 transitions. [2018-12-09 12:44:36,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 12:44:36,771 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-12-09 12:44:36,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:36,772 INFO L225 Difference]: With dead ends: 99 [2018-12-09 12:44:36,772 INFO L226 Difference]: Without dead ends: 99 [2018-12-09 12:44:36,772 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 12:44:36,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-12-09 12:44:36,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 96. [2018-12-09 12:44:36,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-12-09 12:44:36,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 101 transitions. [2018-12-09 12:44:36,774 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 101 transitions. Word has length 47 [2018-12-09 12:44:36,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:36,774 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 101 transitions. [2018-12-09 12:44:36,774 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 12:44:36,774 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 101 transitions. [2018-12-09 12:44:36,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-09 12:44:36,774 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:36,774 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:36,775 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:36,775 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:36,775 INFO L82 PathProgramCache]: Analyzing trace with hash -113322518, now seen corresponding path program 1 times [2018-12-09 12:44:36,775 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:36,775 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:36,775 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:36,775 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:36,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:36,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:37,022 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:44:37,023 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:44:37,023 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:44:37,029 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:37,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:37,052 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:44:37,065 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 12:44:37,065 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:37,066 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:37,066 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 12:44:37,087 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 12:44:37,089 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 12:44:37,089 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:37,091 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:37,094 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:37,094 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:15 [2018-12-09 12:44:37,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:44:37,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:44:37,872 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 39 [2018-12-09 12:44:37,872 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:37,881 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 26 [2018-12-09 12:44:37,888 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 26 treesize of output 32 [2018-12-09 12:44:37,889 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 12:44:37,897 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 12:44:37,908 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-12-09 12:44:37,908 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:34, output treesize:63 [2018-12-09 12:44:38,052 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-12-09 12:44:38,054 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-12-09 12:44:38,054 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:38,057 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:38,060 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 12:44:38,060 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:36, output treesize:15 [2018-12-09 12:44:38,082 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:44:38,096 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 12:44:38,097 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [18] total 31 [2018-12-09 12:44:38,097 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-12-09 12:44:38,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-12-09 12:44:38,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=886, Unknown=2, NotChecked=0, Total=992 [2018-12-09 12:44:38,097 INFO L87 Difference]: Start difference. First operand 96 states and 101 transitions. Second operand 32 states. [2018-12-09 12:44:48,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:44:48,818 INFO L93 Difference]: Finished difference Result 110 states and 115 transitions. [2018-12-09 12:44:48,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-12-09 12:44:48,819 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 48 [2018-12-09 12:44:48,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:44:48,819 INFO L225 Difference]: With dead ends: 110 [2018-12-09 12:44:48,819 INFO L226 Difference]: Without dead ends: 110 [2018-12-09 12:44:48,820 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 741 ImplicationChecksByTransitivity, 7.6s TimeCoverageRelationStatistics Valid=278, Invalid=2369, Unknown=5, NotChecked=0, Total=2652 [2018-12-09 12:44:48,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-12-09 12:44:48,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 101. [2018-12-09 12:44:48,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-09 12:44:48,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 105 transitions. [2018-12-09 12:44:48,822 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 105 transitions. Word has length 48 [2018-12-09 12:44:48,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:44:48,823 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 105 transitions. [2018-12-09 12:44:48,823 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-12-09 12:44:48,823 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 105 transitions. [2018-12-09 12:44:48,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-12-09 12:44:48,823 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:44:48,823 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:44:48,824 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:44:48,824 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:44:48,824 INFO L82 PathProgramCache]: Analyzing trace with hash 1649066462, now seen corresponding path program 1 times [2018-12-09 12:44:48,824 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:44:48,824 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:44:48,825 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:48,825 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:48,825 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:44:48,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:49,171 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:44:49,171 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:44:49,171 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:44:49,180 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:44:49,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:44:49,208 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:44:49,221 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 12:44:49,222 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:49,223 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:49,223 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 12:44:49,245 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 12:44:49,246 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 12:44:49,246 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:44:49,247 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:49,250 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:44:49,250 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:11 [2018-12-09 12:45:01,338 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:01,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:01,339 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 39 [2018-12-09 12:45:01,340 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:01,348 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 26 [2018-12-09 12:45:01,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:01,350 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 35 [2018-12-09 12:45:01,351 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:01,355 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:45:01,359 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:45:01,359 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:34, output treesize:35 [2018-12-09 12:45:01,429 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 14 [2018-12-09 12:45:01,430 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:01,434 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 12:45:01,434 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:38, output treesize:18 [2018-12-09 12:45:03,547 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 21 [2018-12-09 12:45:03,551 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:03,552 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 47 [2018-12-09 12:45:03,552 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:03,558 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 12:45:03,558 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:59, output treesize:35 [2018-12-09 12:45:03,589 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-12-09 12:45:03,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:03,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:03,591 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 21 [2018-12-09 12:45:03,592 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 12:45:03,595 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 12:45:03,598 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 12:45:03,598 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:30, output treesize:11 [2018-12-09 12:45:03,627 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:45:03,642 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 12:45:03,642 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [20] total 32 [2018-12-09 12:45:03,643 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-12-09 12:45:03,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-12-09 12:45:03,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=950, Unknown=6, NotChecked=0, Total=1056 [2018-12-09 12:45:03,643 INFO L87 Difference]: Start difference. First operand 101 states and 105 transitions. Second operand 33 states. [2018-12-09 12:45:15,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:45:15,962 INFO L93 Difference]: Finished difference Result 109 states and 114 transitions. [2018-12-09 12:45:15,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-12-09 12:45:15,962 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 49 [2018-12-09 12:45:15,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:45:15,962 INFO L225 Difference]: With dead ends: 109 [2018-12-09 12:45:15,963 INFO L226 Difference]: Without dead ends: 109 [2018-12-09 12:45:15,963 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 36 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 552 ImplicationChecksByTransitivity, 14.8s TimeCoverageRelationStatistics Valid=234, Invalid=2112, Unknown=6, NotChecked=0, Total=2352 [2018-12-09 12:45:15,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-12-09 12:45:15,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 100. [2018-12-09 12:45:15,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-09 12:45:15,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 104 transitions. [2018-12-09 12:45:15,965 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 104 transitions. Word has length 49 [2018-12-09 12:45:15,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:45:15,965 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 104 transitions. [2018-12-09 12:45:15,965 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-12-09 12:45:15,965 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 104 transitions. [2018-12-09 12:45:15,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-09 12:45:15,965 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:45:15,965 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:45:15,966 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:45:15,966 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:45:15,966 INFO L82 PathProgramCache]: Analyzing trace with hash -146387923, now seen corresponding path program 1 times [2018-12-09 12:45:15,966 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:45:15,966 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:45:15,966 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:45:15,966 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:45:15,966 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:45:15,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:45:16,269 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:45:16,269 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:45:16,269 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:45:16,278 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:45:16,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:45:16,306 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:45:16,308 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 12:45:16,308 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:16,309 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:45:16,309 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 12:45:16,365 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 12:45:16,366 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 12:45:16,366 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:16,368 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:45:16,372 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:45:16,372 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:20 [2018-12-09 12:45:16,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:16,473 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:16,474 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 12:45:16,474 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:16,481 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-12-09 12:45:16,488 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 28 [2018-12-09 12:45:16,489 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 12:45:16,496 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 12:45:16,506 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-12-09 12:45:16,506 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:38, output treesize:47 [2018-12-09 12:45:16,539 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 14 [2018-12-09 12:45:16,540 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:16,547 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-12-09 12:45:16,547 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 6 variables, input treesize:42, output treesize:31 [2018-12-09 12:45:18,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:18,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:18,631 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 20 [2018-12-09 12:45:18,631 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:18,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:18,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:18,643 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-12-09 12:45:18,644 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:18,654 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 12:45:18,654 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:57, output treesize:41 [2018-12-09 12:45:18,750 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-12-09 12:45:18,751 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 4 [2018-12-09 12:45:18,752 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:18,752 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:45:18,755 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:45:18,755 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:10 [2018-12-09 12:45:18,767 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:18,767 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-12-09 12:45:18,767 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:18,774 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 12:45:18,774 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-12-09 12:45:18,862 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 12:45:18,876 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 12:45:18,876 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [19] total 35 [2018-12-09 12:45:18,877 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-12-09 12:45:18,877 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-12-09 12:45:18,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=1160, Unknown=1, NotChecked=0, Total=1260 [2018-12-09 12:45:18,877 INFO L87 Difference]: Start difference. First operand 100 states and 104 transitions. Second operand 36 states. [2018-12-09 12:45:45,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:45:45,969 INFO L93 Difference]: Finished difference Result 108 states and 113 transitions. [2018-12-09 12:45:45,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-12-09 12:45:45,969 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 51 [2018-12-09 12:45:45,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:45:45,970 INFO L225 Difference]: With dead ends: 108 [2018-12-09 12:45:45,970 INFO L226 Difference]: Without dead ends: 108 [2018-12-09 12:45:45,971 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 36 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 728 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=315, Invalid=3223, Unknown=2, NotChecked=0, Total=3540 [2018-12-09 12:45:45,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-12-09 12:45:45,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 99. [2018-12-09 12:45:45,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-09 12:45:45,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 103 transitions. [2018-12-09 12:45:45,974 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 103 transitions. Word has length 51 [2018-12-09 12:45:45,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:45:45,974 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 103 transitions. [2018-12-09 12:45:45,974 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-12-09 12:45:45,974 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 103 transitions. [2018-12-09 12:45:45,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-09 12:45:45,974 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:45:45,974 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:45:45,975 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:45:45,975 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:45:45,975 INFO L82 PathProgramCache]: Analyzing trace with hash -146387922, now seen corresponding path program 1 times [2018-12-09 12:45:45,975 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:45:45,975 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:45:45,976 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:45:45,976 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:45:45,976 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:45:45,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:45:46,019 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 12:45:46,019 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:45:46,020 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 12:45:46,020 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 12:45:46,020 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 12:45:46,020 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-12-09 12:45:46,020 INFO L87 Difference]: Start difference. First operand 99 states and 103 transitions. Second operand 8 states. [2018-12-09 12:45:46,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:45:46,070 INFO L93 Difference]: Finished difference Result 98 states and 102 transitions. [2018-12-09 12:45:46,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 12:45:46,071 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 51 [2018-12-09 12:45:46,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:45:46,071 INFO L225 Difference]: With dead ends: 98 [2018-12-09 12:45:46,071 INFO L226 Difference]: Without dead ends: 98 [2018-12-09 12:45:46,072 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:45:46,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-12-09 12:45:46,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-12-09 12:45:46,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-12-09 12:45:46,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 102 transitions. [2018-12-09 12:45:46,074 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 102 transitions. Word has length 51 [2018-12-09 12:45:46,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:45:46,074 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 102 transitions. [2018-12-09 12:45:46,075 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 12:45:46,075 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 102 transitions. [2018-12-09 12:45:46,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-12-09 12:45:46,075 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:45:46,075 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:45:46,075 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:45:46,076 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:45:46,076 INFO L82 PathProgramCache]: Analyzing trace with hash -243058330, now seen corresponding path program 1 times [2018-12-09 12:45:46,076 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:45:46,076 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:45:46,077 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:45:46,077 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:45:46,077 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:45:46,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:45:46,161 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:45:46,162 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:45:46,162 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-12-09 12:45:46,162 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-09 12:45:46,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-09 12:45:46,162 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2018-12-09 12:45:46,162 INFO L87 Difference]: Start difference. First operand 98 states and 102 transitions. Second operand 15 states. [2018-12-09 12:45:46,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:45:46,289 INFO L93 Difference]: Finished difference Result 97 states and 101 transitions. [2018-12-09 12:45:46,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 12:45:46,290 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 52 [2018-12-09 12:45:46,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:45:46,290 INFO L225 Difference]: With dead ends: 97 [2018-12-09 12:45:46,290 INFO L226 Difference]: Without dead ends: 97 [2018-12-09 12:45:46,291 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-12-09 12:45:46,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-12-09 12:45:46,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2018-12-09 12:45:46,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-09 12:45:46,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 101 transitions. [2018-12-09 12:45:46,293 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 101 transitions. Word has length 52 [2018-12-09 12:45:46,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:45:46,294 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 101 transitions. [2018-12-09 12:45:46,294 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-09 12:45:46,294 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 101 transitions. [2018-12-09 12:45:46,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-09 12:45:46,294 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:45:46,294 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:45:46,294 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:45:46,295 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:45:46,295 INFO L82 PathProgramCache]: Analyzing trace with hash 1055126413, now seen corresponding path program 1 times [2018-12-09 12:45:46,295 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:45:46,295 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:45:46,295 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:45:46,296 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:45:46,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:45:46,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:45:46,619 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:45:46,619 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:45:46,619 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-12-09 12:45:46,619 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-12-09 12:45:46,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-12-09 12:45:46,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=542, Unknown=0, NotChecked=0, Total=600 [2018-12-09 12:45:46,620 INFO L87 Difference]: Start difference. First operand 97 states and 101 transitions. Second operand 25 states. [2018-12-09 12:45:47,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:45:47,199 INFO L93 Difference]: Finished difference Result 111 states and 117 transitions. [2018-12-09 12:45:47,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-09 12:45:47,199 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 53 [2018-12-09 12:45:47,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:45:47,200 INFO L225 Difference]: With dead ends: 111 [2018-12-09 12:45:47,200 INFO L226 Difference]: Without dead ends: 111 [2018-12-09 12:45:47,200 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 214 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=132, Invalid=1200, Unknown=0, NotChecked=0, Total=1332 [2018-12-09 12:45:47,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-12-09 12:45:47,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-12-09 12:45:47,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-12-09 12:45:47,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 117 transitions. [2018-12-09 12:45:47,202 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 117 transitions. Word has length 53 [2018-12-09 12:45:47,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:45:47,202 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 117 transitions. [2018-12-09 12:45:47,202 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-12-09 12:45:47,202 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 117 transitions. [2018-12-09 12:45:47,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-09 12:45:47,203 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:45:47,203 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:45:47,203 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:45:47,203 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:45:47,203 INFO L82 PathProgramCache]: Analyzing trace with hash 1405926350, now seen corresponding path program 1 times [2018-12-09 12:45:47,203 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:45:47,203 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:45:47,204 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:45:47,204 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:45:47,204 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:45:47,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:45:47,233 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:45:47,233 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:45:47,233 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 12:45:47,234 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 12:45:47,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 12:45:47,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 12:45:47,234 INFO L87 Difference]: Start difference. First operand 111 states and 117 transitions. Second operand 6 states. [2018-12-09 12:45:47,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:45:47,264 INFO L93 Difference]: Finished difference Result 92 states and 96 transitions. [2018-12-09 12:45:47,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 12:45:47,264 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2018-12-09 12:45:47,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:45:47,264 INFO L225 Difference]: With dead ends: 92 [2018-12-09 12:45:47,264 INFO L226 Difference]: Without dead ends: 86 [2018-12-09 12:45:47,264 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-12-09 12:45:47,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-12-09 12:45:47,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2018-12-09 12:45:47,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-12-09 12:45:47,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 90 transitions. [2018-12-09 12:45:47,266 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 90 transitions. Word has length 53 [2018-12-09 12:45:47,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:45:47,266 INFO L480 AbstractCegarLoop]: Abstraction has 86 states and 90 transitions. [2018-12-09 12:45:47,266 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 12:45:47,266 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 90 transitions. [2018-12-09 12:45:47,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-12-09 12:45:47,267 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:45:47,267 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:45:47,267 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:45:47,267 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:45:47,267 INFO L82 PathProgramCache]: Analyzing trace with hash -1261499104, now seen corresponding path program 1 times [2018-12-09 12:45:47,267 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:45:47,268 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:45:47,268 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:45:47,268 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:45:47,268 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:45:47,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:45:47,456 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:45:47,456 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:45:47,456 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:45:47,462 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:45:47,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:45:47,483 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:45:47,485 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 12:45:47,485 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:47,488 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:45:47,489 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 12:45:47,514 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 12:45:47,515 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 12:45:47,516 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:47,517 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:45:47,522 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:45:47,522 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:20 [2018-12-09 12:45:49,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:49,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:49,998 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 12:45:49,999 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:50,005 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-12-09 12:45:50,012 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 28 [2018-12-09 12:45:50,013 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 12:45:50,020 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 12:45:50,029 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-12-09 12:45:50,029 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:36, output treesize:43 [2018-12-09 12:45:50,489 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 8 [2018-12-09 12:45:50,489 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:50,492 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-12-09 12:45:50,492 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 6 variables, input treesize:31, output treesize:19 [2018-12-09 12:45:52,495 WARN L854 $PredicateComparison]: unable to prove that (or (exists ((v_probe_unsafe_19_~a.offset_BEFORE_CALL_11 Int) (|v_probe_unsafe_19_#in~a.base_BEFORE_CALL_12| Int)) (not (= (select (select |c_#memory_$Pointer$.base| |v_probe_unsafe_19_#in~a.base_BEFORE_CALL_12|) (+ v_probe_unsafe_19_~a.offset_BEFORE_CALL_11 4)) |v_probe_unsafe_19_#in~a.base_BEFORE_CALL_12|))) (exists ((v_prenex_10 Int) (f19_~a.offset Int)) (not (= v_prenex_10 (select (select |c_#memory_$Pointer$.base| v_prenex_10) f19_~a.offset))))) is different from true [2018-12-09 12:45:53,203 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 8 [2018-12-09 12:45:53,203 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:53,206 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-12-09 12:45:53,206 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 6 variables, input treesize:31, output treesize:19 [2018-12-09 12:45:55,208 WARN L854 $PredicateComparison]: unable to prove that (or (exists ((v_probe_unsafe_19_~a.base_BEFORE_CALL_16 Int) (f19_~a.offset Int)) (not (= (select (select |c_#memory_$Pointer$.base| v_probe_unsafe_19_~a.base_BEFORE_CALL_16) f19_~a.offset) v_probe_unsafe_19_~a.base_BEFORE_CALL_16))) (exists ((v_prenex_12 Int) (v_prenex_13 Int)) (not (= v_prenex_13 (select (select |c_#memory_$Pointer$.base| v_prenex_13) (+ v_prenex_12 4)))))) is different from true [2018-12-09 12:45:55,671 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 26 [2018-12-09 12:45:55,673 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 4 [2018-12-09 12:45:55,673 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:55,676 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:45:55,684 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-12-09 12:45:55,689 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 20 [2018-12-09 12:45:55,689 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-12-09 12:45:55,696 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-09 12:45:55,707 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 3 xjuncts. [2018-12-09 12:45:55,707 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:65, output treesize:42 [2018-12-09 12:45:56,271 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:56,275 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 20 [2018-12-09 12:45:56,276 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-12-09 12:45:56,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:56,289 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2018-12-09 12:45:56,289 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:56,301 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-12-09 12:45:56,302 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:39, output treesize:44 [2018-12-09 12:45:57,124 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:57,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:45:57,125 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 15 [2018-12-09 12:45:57,125 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:45:57,136 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 12:45:57,137 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:38, output treesize:11 [2018-12-09 12:45:57,198 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 12:45:57,212 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 12:45:57,213 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [17] total 32 [2018-12-09 12:45:57,213 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-12-09 12:45:57,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-12-09 12:45:57,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=835, Unknown=11, NotChecked=118, Total=1056 [2018-12-09 12:45:57,213 INFO L87 Difference]: Start difference. First operand 86 states and 90 transitions. Second operand 33 states. [2018-12-09 12:46:18,218 WARN L180 SmtUtils]: Spent 713.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 14 [2018-12-09 12:46:55,941 WARN L180 SmtUtils]: Spent 941.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 11 [2018-12-09 12:47:17,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:47:17,076 INFO L93 Difference]: Finished difference Result 86 states and 90 transitions. [2018-12-09 12:47:17,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-09 12:47:17,076 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 57 [2018-12-09 12:47:17,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:47:17,076 INFO L225 Difference]: With dead ends: 86 [2018-12-09 12:47:17,076 INFO L226 Difference]: Without dead ends: 86 [2018-12-09 12:47:17,077 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 41 SyntacticMatches, 3 SemanticMatches, 50 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 573 ImplicationChecksByTransitivity, 72.5s TimeCoverageRelationStatistics Valid=224, Invalid=2189, Unknown=45, NotChecked=194, Total=2652 [2018-12-09 12:47:17,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-12-09 12:47:17,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 85. [2018-12-09 12:47:17,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-12-09 12:47:17,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 89 transitions. [2018-12-09 12:47:17,078 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 89 transitions. Word has length 57 [2018-12-09 12:47:17,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:47:17,078 INFO L480 AbstractCegarLoop]: Abstraction has 85 states and 89 transitions. [2018-12-09 12:47:17,078 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-12-09 12:47:17,078 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 89 transitions. [2018-12-09 12:47:17,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-12-09 12:47:17,079 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:47:17,079 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:47:17,079 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:47:17,079 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:47:17,079 INFO L82 PathProgramCache]: Analyzing trace with hash -451153242, now seen corresponding path program 1 times [2018-12-09 12:47:17,079 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:47:17,079 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:47:17,080 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:47:17,080 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:47:17,080 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:47:17,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:47:17,106 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 12:47:17,106 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:47:17,106 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-09 12:47:17,106 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 12:47:17,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 12:47:17,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-09 12:47:17,107 INFO L87 Difference]: Start difference. First operand 85 states and 89 transitions. Second operand 8 states. [2018-12-09 12:47:17,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:47:17,122 INFO L93 Difference]: Finished difference Result 85 states and 88 transitions. [2018-12-09 12:47:17,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 12:47:17,122 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 58 [2018-12-09 12:47:17,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:47:17,122 INFO L225 Difference]: With dead ends: 85 [2018-12-09 12:47:17,122 INFO L226 Difference]: Without dead ends: 85 [2018-12-09 12:47:17,122 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-12-09 12:47:17,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-12-09 12:47:17,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 85. [2018-12-09 12:47:17,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-12-09 12:47:17,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 88 transitions. [2018-12-09 12:47:17,124 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 88 transitions. Word has length 58 [2018-12-09 12:47:17,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:47:17,124 INFO L480 AbstractCegarLoop]: Abstraction has 85 states and 88 transitions. [2018-12-09 12:47:17,124 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 12:47:17,124 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 88 transitions. [2018-12-09 12:47:17,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-12-09 12:47:17,124 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:47:17,124 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:47:17,124 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, disconnect_19Err0REQUIRES_VIOLATION, disconnect_19Err3ASSERT_VIOLATIONMEMORY_FREE, disconnect_19Err1REQUIRES_VIOLATION, disconnect_19Err2ASSERT_VIOLATIONMEMORY_FREE, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, probe_unsafe_19Err4REQUIRES_VIOLATION, probe_unsafe_19Err3REQUIRES_VIOLATION, probe_unsafe_19Err2REQUIRES_VIOLATION, probe_unsafe_19Err7ASSERT_VIOLATIONMEMORY_FREE, probe_unsafe_19Err1REQUIRES_VIOLATION, probe_unsafe_19Err5REQUIRES_VIOLATION, probe_unsafe_19Err0REQUIRES_VIOLATION, probe_unsafe_19Err6ASSERT_VIOLATIONMEMORY_FREE, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr0REQUIRES_VIOLATION, f19_undoErr3ASSERT_VIOLATIONMEMORY_FREE, f19_undoErr1REQUIRES_VIOLATION, f19_undoErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, f19Err2REQUIRES_VIOLATION, f19Err1REQUIRES_VIOLATION, f19Err0REQUIRES_VIOLATION, f19Err3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 12:47:17,125 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:47:17,125 INFO L82 PathProgramCache]: Analyzing trace with hash -1119860384, now seen corresponding path program 1 times [2018-12-09 12:47:17,125 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 12:47:17,125 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 12:47:17,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:47:17,125 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:47:17,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:47:17,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 12:47:17,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 12:47:17,154 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 12:47:17,171 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 10 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 12:47:17,172 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 9 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 12:47:17,180 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 12:47:17 BoogieIcfgContainer [2018-12-09 12:47:17,180 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 12:47:17,180 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 12:47:17,180 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 12:47:17,180 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 12:47:17,180 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 12:43:38" (3/4) ... [2018-12-09 12:47:17,182 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-09 12:47:17,185 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 9 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 12:47:17,185 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 10 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 12:47:17,211 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_625ee690-9ee0-460b-b7eb-6ecabb2a443b/bin-2019/uautomizer/witness.graphml [2018-12-09 12:47:17,211 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 12:47:17,212 INFO L168 Benchmark]: Toolchain (without parser) took 219352.21 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 309.3 MB). Free memory was 950.6 MB in the beginning and 1.2 GB in the end (delta: -238.0 MB). Peak memory consumption was 71.3 MB. Max. memory is 11.5 GB. [2018-12-09 12:47:17,212 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 12:47:17,212 INFO L168 Benchmark]: CACSL2BoogieTranslator took 330.52 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 147.8 MB). Free memory was 950.6 MB in the beginning and 1.1 GB in the end (delta: -167.4 MB). Peak memory consumption was 34.1 MB. Max. memory is 11.5 GB. [2018-12-09 12:47:17,212 INFO L168 Benchmark]: Boogie Preprocessor took 47.65 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-12-09 12:47:17,212 INFO L168 Benchmark]: RCFGBuilder took 523.30 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 111.3 MB). Peak memory consumption was 111.3 MB. Max. memory is 11.5 GB. [2018-12-09 12:47:17,213 INFO L168 Benchmark]: TraceAbstraction took 218416.48 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 161.5 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -185.5 MB). There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 12:47:17,213 INFO L168 Benchmark]: Witness Printer took 31.35 ms. Allocated memory is still 1.3 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 12:47:17,213 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 330.52 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 147.8 MB). Free memory was 950.6 MB in the beginning and 1.1 GB in the end (delta: -167.4 MB). Peak memory consumption was 34.1 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 47.65 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 523.30 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 111.3 MB). Peak memory consumption was 111.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 218416.48 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 161.5 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -185.5 MB). There was no memory consumed. Max. memory is 11.5 GB. * Witness Printer took 31.35 ms. Allocated memory is still 1.3 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 10 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 10 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1478]: free of unallocated memory possible free of unallocated memory possible We found a FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={16:0}] [L1492] CALL entry_point() VAL [ldv_global_msg_list={16:0}] [L1483] struct A19 a19; VAL [a19={18:0}, ldv_global_msg_list={16:0}] [L1484] CALL, EXPR probe_unsafe_19(&a19) VAL [a={18:0}, ldv_global_msg_list={16:0}] [L1455] int ret = - -3; VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ret=3] [L1457] CALL, EXPR ldv_malloc(sizeof(int)) VAL [\old(size)=4, ldv_global_msg_list={16:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={12:0}, ldv_global_msg_list={16:0}, malloc(size)={12:0}, size=4] [L1457] RET, EXPR ldv_malloc(sizeof(int)) VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ldv_malloc(sizeof(int))={12:0}, ret=3] [L1457] a->q = (int *)ldv_malloc(sizeof(int)) VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ldv_malloc(sizeof(int))={12:0}, ret=3] [L1458] EXPR a->q VAL [a={18:0}, a={18:0}, a->q={12:0}, ldv_global_msg_list={16:0}, ret=3] [L1458] COND FALSE !(!a->q) [L1460] CALL, EXPR f19(a) VAL [a={18:0}, ldv_global_msg_list={16:0}] [L1440] CALL, EXPR ldv_malloc(sizeof(int)) VAL [\old(size)=4, ldv_global_msg_list={16:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={14:0}, ldv_global_msg_list={16:0}, malloc(size)={14:0}, size=4] [L1440] RET, EXPR ldv_malloc(sizeof(int)) VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ldv_malloc(sizeof(int))={14:0}] [L1440] a->p = (int *)ldv_malloc(sizeof(int)) VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ldv_malloc(sizeof(int))={14:0}] [L1441] a->p VAL [a={18:0}, a={18:0}, a->p={14:0}, ldv_global_msg_list={16:0}] [L1441] COND TRUE a->p [L1442] return 0; VAL [\result=0, a={18:0}, a={18:0}, ldv_global_msg_list={16:0}] [L1460] RET, EXPR f19(a) VAL [a={18:0}, a={18:0}, f19(a)=0, ldv_global_msg_list={16:0}, ret=3] [L1460] ret = f19(a) [L1461] COND FALSE !(\read(ret)) VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ret=0] [L1464] CALL, EXPR g19() VAL [ldv_global_msg_list={16:0}] [L1451] return __VERIFIER_nondet_int(); [L1464] RET, EXPR g19() VAL [a={18:0}, a={18:0}, g19()=0, ldv_global_msg_list={16:0}, ret=0] [L1464] COND TRUE !g19() [L1470] CALL f19_undo(a) VAL [a={18:0}, ldv_global_msg_list={16:0}] [L1447] EXPR a->p VAL [a={18:0}, a={18:0}, a->p={14:0}, ldv_global_msg_list={16:0}] [L1447] free(a->p) VAL [a={18:0}, a={18:0}, a->p={14:0}, ldv_global_msg_list={16:0}] [L1447] free(a->p) [L1470] RET f19_undo(a) VAL [a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ret=0] [L1472] EXPR a->q VAL [a={18:0}, a={18:0}, a->q={12:0}, ldv_global_msg_list={16:0}, ret=0] [L1472] free(a->q) VAL [a={18:0}, a={18:0}, a->q={12:0}, ldv_global_msg_list={16:0}, ret=0] [L1472] free(a->q) [L1474] return ret; VAL [\result=0, a={18:0}, a={18:0}, ldv_global_msg_list={16:0}, ret=0] [L1484] RET, EXPR probe_unsafe_19(&a19) VAL [a19={18:0}, ldv_global_msg_list={16:0}, probe_unsafe_19(&a19)=0] [L1484] int ret = probe_unsafe_19(&a19); [L1486] COND TRUE ret==0 VAL [a19={18:0}, ldv_global_msg_list={16:0}, ret=0] [L1487] CALL disconnect_19(&a19) VAL [a={18:0}, ldv_global_msg_list={16:0}] [L1478] EXPR a->q VAL [a={18:0}, a={18:0}, a->q={12:0}, ldv_global_msg_list={16:0}] [L1478] free(a->q) VAL [a={18:0}, a={18:0}, a->q={12:0}, ldv_global_msg_list={16:0}] [L1478] free(a->q) VAL [a={18:0}, a={18:0}, a->q={12:0}, ldv_global_msg_list={16:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 48 procedures, 374 locations, 87 error locations. UNSAFE Result, 218.3s OverallTime, 36 OverallIterations, 2 TraceHistogramMax, 175.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2552 SDtfs, 2187 SDslu, 13386 SDs, 0 SdLazy, 12400 SolverSat, 777 SolverUnsat, 144 SolverUnknown, 0 SolverNotchecked, 91.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1021 GetRequests, 362 SyntacticMatches, 27 SemanticMatches, 632 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 4267 ImplicationChecksByTransitivity, 122.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=156occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 35 MinimizatonAttempts, 384 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 41.9s InterpolantComputationTime, 1883 NumberOfCodeBlocks, 1883 NumberOfCodeBlocksAsserted, 45 NumberOfCheckSat, 1780 ConstructedInterpolants, 124 QuantifiedInterpolants, 649655 SizeOfPredicates, 94 NumberOfNonLiveVariables, 2195 ConjunctsInSsa, 333 ConjunctsInUnsatCore, 44 InterpolantComputations, 33 PerfectInterpolantSequences, 126/152 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...