./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4867b1d8e60a05de2199d52aa990071fe8bd647c ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4867b1d8e60a05de2199d52aa990071fe8bd647c ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-08 16:54:51,962 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 16:54:51,963 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 16:54:51,970 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 16:54:51,970 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 16:54:51,970 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 16:54:51,971 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 16:54:51,972 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 16:54:51,972 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 16:54:51,973 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 16:54:51,973 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 16:54:51,974 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 16:54:51,974 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 16:54:51,974 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 16:54:51,975 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 16:54:51,975 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 16:54:51,976 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 16:54:51,977 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 16:54:51,977 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 16:54:51,978 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 16:54:51,979 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 16:54:51,979 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 16:54:51,980 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 16:54:51,980 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 16:54:51,980 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 16:54:51,981 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 16:54:51,981 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 16:54:51,982 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 16:54:51,982 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 16:54:51,983 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 16:54:51,983 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 16:54:51,983 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 16:54:51,983 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 16:54:51,983 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 16:54:51,984 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 16:54:51,984 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 16:54:51,984 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-12-08 16:54:51,991 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 16:54:51,992 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 16:54:51,992 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 16:54:51,992 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 16:54:51,992 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-08 16:54:51,993 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-08 16:54:51,993 INFO L133 SettingsManager]: * Use SBE=true [2018-12-08 16:54:51,993 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 16:54:51,993 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-08 16:54:51,993 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-08 16:54:51,993 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-08 16:54:51,993 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-08 16:54:51,993 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 16:54:51,993 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-08 16:54:51,993 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-08 16:54:51,994 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-08 16:54:51,994 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 16:54:51,994 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-08 16:54:51,994 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-08 16:54:51,994 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 16:54:51,994 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 16:54:51,994 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 16:54:51,994 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 16:54:51,994 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 16:54:51,994 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 16:54:51,994 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 16:54:51,995 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-08 16:54:51,995 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 16:54:51,995 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4867b1d8e60a05de2199d52aa990071fe8bd647c [2018-12-08 16:54:52,012 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 16:54:52,020 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 16:54:52,022 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 16:54:52,023 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 16:54:52,023 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 16:54:52,024 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-08 16:54:52,059 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/data/3c65da0a4/c186c3be58624ebaafb4324485243b95/FLAGd959dd0fc [2018-12-08 16:54:52,525 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 16:54:52,526 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-08 16:54:52,532 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/data/3c65da0a4/c186c3be58624ebaafb4324485243b95/FLAGd959dd0fc [2018-12-08 16:54:52,541 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/data/3c65da0a4/c186c3be58624ebaafb4324485243b95 [2018-12-08 16:54:52,543 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 16:54:52,544 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-08 16:54:52,544 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 16:54:52,544 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 16:54:52,546 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 16:54:52,547 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 04:54:52" (1/1) ... [2018-12-08 16:54:52,549 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5828bbf7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:54:52, skipping insertion in model container [2018-12-08 16:54:52,549 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 04:54:52" (1/1) ... [2018-12-08 16:54:52,553 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 16:54:52,574 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 16:54:52,800 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 16:54:52,812 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 16:54:52,846 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 16:54:52,876 INFO L195 MainTranslator]: Completed translation [2018-12-08 16:54:52,876 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:54:52 WrapperNode [2018-12-08 16:54:52,876 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 16:54:52,877 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 16:54:52,877 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 16:54:52,877 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 16:54:52,885 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:54:52" (1/1) ... [2018-12-08 16:54:52,885 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:54:52" (1/1) ... [2018-12-08 16:54:52,896 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:54:52" (1/1) ... [2018-12-08 16:54:52,896 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:54:52" (1/1) ... [2018-12-08 16:54:52,911 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:54:52" (1/1) ... [2018-12-08 16:54:52,914 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:54:52" (1/1) ... [2018-12-08 16:54:52,916 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:54:52" (1/1) ... [2018-12-08 16:54:52,921 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 16:54:52,921 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 16:54:52,921 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 16:54:52,921 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 16:54:52,922 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:54:52" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 16:54:52,952 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-08 16:54:52,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 16:54:52,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-08 16:54:52,953 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-12-08 16:54:52,953 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-12-08 16:54:52,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-12-08 16:54:52,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-12-08 16:54:52,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-08 16:54:52,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-08 16:54:52,953 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-08 16:54:52,953 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-12-08 16:54:52,953 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-12-08 16:54:52,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-12-08 16:54:52,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-08 16:54:52,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-12-08 16:54:52,955 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-08 16:54:52,955 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-08 16:54:52,955 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-08 16:54:52,955 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-08 16:54:52,955 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-08 16:54:52,955 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-08 16:54:52,955 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-08 16:54:52,955 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-12-08 16:54:52,955 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-12-08 16:54:52,955 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-08 16:54:52,956 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-08 16:54:52,956 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-08 16:54:52,956 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-08 16:54:52,956 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-12-08 16:54:52,956 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-12-08 16:54:52,956 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-12-08 16:54:52,956 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-12-08 16:54:52,956 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-12-08 16:54:52,956 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-12-08 16:54:52,957 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-12-08 16:54:52,957 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-12-08 16:54:52,957 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-12-08 16:54:52,957 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-12-08 16:54:52,957 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-12-08 16:54:52,957 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-12-08 16:54:52,957 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-12-08 16:54:52,957 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-12-08 16:54:52,957 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-12-08 16:54:52,958 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-12-08 16:54:52,958 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-12-08 16:54:52,958 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-12-08 16:54:52,958 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-12-08 16:54:52,958 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-12-08 16:54:52,958 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-12-08 16:54:52,958 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-12-08 16:54:52,958 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-12-08 16:54:52,958 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-12-08 16:54:52,959 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-12-08 16:54:52,959 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-12-08 16:54:52,959 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-12-08 16:54:52,959 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-12-08 16:54:52,959 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-12-08 16:54:52,959 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-12-08 16:54:52,959 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-12-08 16:54:52,959 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-12-08 16:54:52,959 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-12-08 16:54:52,959 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-12-08 16:54:52,960 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-12-08 16:54:52,960 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-12-08 16:54:52,960 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-12-08 16:54:52,960 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-12-08 16:54:52,960 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-12-08 16:54:52,960 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-12-08 16:54:52,960 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-12-08 16:54:52,960 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-12-08 16:54:52,961 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-12-08 16:54:52,961 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-12-08 16:54:52,961 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-12-08 16:54:52,961 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-12-08 16:54:52,961 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-12-08 16:54:52,961 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-12-08 16:54:52,961 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-12-08 16:54:52,961 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-12-08 16:54:52,961 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-12-08 16:54:52,961 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-12-08 16:54:52,962 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-12-08 16:54:52,962 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-12-08 16:54:52,962 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-12-08 16:54:52,962 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-12-08 16:54:52,962 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-12-08 16:54:52,962 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-12-08 16:54:52,962 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-12-08 16:54:52,962 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-12-08 16:54:52,962 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-12-08 16:54:52,962 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-12-08 16:54:52,963 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-12-08 16:54:52,963 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-12-08 16:54:52,963 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-12-08 16:54:52,963 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-12-08 16:54:52,963 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-12-08 16:54:52,963 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-12-08 16:54:52,963 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-12-08 16:54:52,963 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-12-08 16:54:52,963 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-12-08 16:54:52,964 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-12-08 16:54:52,964 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-12-08 16:54:52,964 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-12-08 16:54:52,964 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-12-08 16:54:52,964 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-12-08 16:54:52,964 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-12-08 16:54:52,964 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-12-08 16:54:52,964 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-12-08 16:54:52,964 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-12-08 16:54:52,965 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-12-08 16:54:52,965 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-12-08 16:54:52,965 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-12-08 16:54:52,965 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-12-08 16:54:52,965 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-12-08 16:54:52,965 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-12-08 16:54:52,965 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-12-08 16:54:52,965 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-12-08 16:54:52,965 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-12-08 16:54:52,965 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-12-08 16:54:52,966 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-12-08 16:54:52,966 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-12-08 16:54:52,966 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-12-08 16:54:52,966 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-12-08 16:54:52,966 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-12-08 16:54:52,966 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-12-08 16:54:52,966 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-12-08 16:54:52,966 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-12-08 16:54:52,966 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-12-08 16:54:52,967 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-12-08 16:54:52,967 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-12-08 16:54:52,967 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-12-08 16:54:52,967 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-12-08 16:54:52,967 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-08 16:54:52,967 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-12-08 16:54:52,967 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-12-08 16:54:52,967 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-12-08 16:54:52,967 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-12-08 16:54:52,968 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-12-08 16:54:52,968 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-12-08 16:54:52,968 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-08 16:54:52,968 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-08 16:54:52,968 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-08 16:54:52,968 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-08 16:54:52,968 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-08 16:54:52,968 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-08 16:54:52,968 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-12-08 16:54:52,968 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-12-08 16:54:52,969 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-12-08 16:54:52,969 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-08 16:54:52,969 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-12-08 16:54:52,969 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-12-08 16:54:52,969 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-12-08 16:54:52,969 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-12-08 16:54:52,969 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-12-08 16:54:52,969 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-12-08 16:54:52,969 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-08 16:54:52,969 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-12-08 16:54:52,970 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-12-08 16:54:52,970 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-08 16:54:52,970 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-08 16:54:52,970 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-08 16:54:52,970 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-08 16:54:52,970 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-08 16:54:52,970 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-08 16:54:52,970 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-08 16:54:52,970 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-08 16:54:52,970 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-08 16:54:52,971 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-08 16:54:52,971 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-08 16:54:52,971 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-12-08 16:54:52,971 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-08 16:54:52,971 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-08 16:54:52,971 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-08 16:54:52,971 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-08 16:54:52,971 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-08 16:54:52,971 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-08 16:54:52,971 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-08 16:54:52,971 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-08 16:54:52,972 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-12-08 16:54:52,972 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-12-08 16:54:52,972 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-08 16:54:52,972 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-08 16:54:52,972 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-08 16:54:52,972 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-08 16:54:52,972 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 16:54:52,972 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-12-08 16:54:52,972 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2018-12-08 16:54:52,972 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-12-08 16:54:52,972 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-12-08 16:54:53,202 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-08 16:54:53,316 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-08 16:54:53,445 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 16:54:53,445 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-08 16:54:53,445 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 04:54:53 BoogieIcfgContainer [2018-12-08 16:54:53,446 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 16:54:53,446 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 16:54:53,446 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 16:54:53,449 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 16:54:53,449 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 04:54:52" (1/3) ... [2018-12-08 16:54:53,450 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@ff7eb03 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 04:54:53, skipping insertion in model container [2018-12-08 16:54:53,450 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:54:52" (2/3) ... [2018-12-08 16:54:53,450 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@ff7eb03 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 04:54:53, skipping insertion in model container [2018-12-08 16:54:53,450 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 04:54:53" (3/3) ... [2018-12-08 16:54:53,451 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-08 16:54:53,459 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 16:54:53,466 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 67 error locations. [2018-12-08 16:54:53,479 INFO L257 AbstractCegarLoop]: Starting to check reachability of 67 error locations. [2018-12-08 16:54:53,493 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-08 16:54:53,494 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 16:54:53,494 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-08 16:54:53,494 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 16:54:53,494 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 16:54:53,494 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 16:54:53,494 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 16:54:53,494 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 16:54:53,494 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 16:54:53,508 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states. [2018-12-08 16:54:53,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 16:54:53,515 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:53,515 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:53,517 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:53,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:53,520 INFO L82 PathProgramCache]: Analyzing trace with hash 280699124, now seen corresponding path program 1 times [2018-12-08 16:54:53,521 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:53,521 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:53,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:53,555 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:53,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:53,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:53,654 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:53,655 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:53,656 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 16:54:53,658 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 16:54:53,666 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 16:54:53,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:54:53,668 INFO L87 Difference]: Start difference. First operand 171 states. Second operand 5 states. [2018-12-08 16:54:53,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:53,779 INFO L93 Difference]: Finished difference Result 153 states and 164 transitions. [2018-12-08 16:54:53,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 16:54:53,780 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-08 16:54:53,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:53,788 INFO L225 Difference]: With dead ends: 153 [2018-12-08 16:54:53,788 INFO L226 Difference]: Without dead ends: 150 [2018-12-08 16:54:53,789 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:54:53,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-08 16:54:53,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 144. [2018-12-08 16:54:53,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 16:54:53,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 155 transitions. [2018-12-08 16:54:53,819 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 155 transitions. Word has length 17 [2018-12-08 16:54:53,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:53,819 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 155 transitions. [2018-12-08 16:54:53,819 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 16:54:53,819 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 155 transitions. [2018-12-08 16:54:53,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 16:54:53,820 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:53,820 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:53,820 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:53,820 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:53,820 INFO L82 PathProgramCache]: Analyzing trace with hash 280699125, now seen corresponding path program 1 times [2018-12-08 16:54:53,820 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:53,820 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:53,822 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:53,822 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:53,822 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:53,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:53,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:53,899 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:53,899 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 16:54:53,900 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 16:54:53,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 16:54:53,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 16:54:53,900 INFO L87 Difference]: Start difference. First operand 144 states and 155 transitions. Second operand 6 states. [2018-12-08 16:54:53,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:53,998 INFO L93 Difference]: Finished difference Result 149 states and 160 transitions. [2018-12-08 16:54:53,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 16:54:53,998 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-08 16:54:53,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:54,000 INFO L225 Difference]: With dead ends: 149 [2018-12-08 16:54:54,000 INFO L226 Difference]: Without dead ends: 149 [2018-12-08 16:54:54,000 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-08 16:54:54,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-08 16:54:54,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 144. [2018-12-08 16:54:54,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 16:54:54,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 154 transitions. [2018-12-08 16:54:54,010 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 154 transitions. Word has length 17 [2018-12-08 16:54:54,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:54,011 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 154 transitions. [2018-12-08 16:54:54,011 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 16:54:54,011 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 154 transitions. [2018-12-08 16:54:54,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 16:54:54,011 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:54,011 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:54,012 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:54,012 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:54,012 INFO L82 PathProgramCache]: Analyzing trace with hash 309328275, now seen corresponding path program 1 times [2018-12-08 16:54:54,012 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:54,012 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:54,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:54,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:54,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:54,055 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:54,055 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 16:54:54,056 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 16:54:54,056 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 16:54:54,056 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:54:54,056 INFO L87 Difference]: Start difference. First operand 144 states and 154 transitions. Second operand 5 states. [2018-12-08 16:54:54,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:54,067 INFO L93 Difference]: Finished difference Result 143 states and 151 transitions. [2018-12-08 16:54:54,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 16:54:54,067 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-08 16:54:54,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:54,068 INFO L225 Difference]: With dead ends: 143 [2018-12-08 16:54:54,068 INFO L226 Difference]: Without dead ends: 143 [2018-12-08 16:54:54,068 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:54:54,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-12-08 16:54:54,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 141. [2018-12-08 16:54:54,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-08 16:54:54,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 149 transitions. [2018-12-08 16:54:54,073 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 149 transitions. Word has length 17 [2018-12-08 16:54:54,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:54,074 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 149 transitions. [2018-12-08 16:54:54,074 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 16:54:54,074 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 149 transitions. [2018-12-08 16:54:54,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-08 16:54:54,074 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:54,074 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:54,074 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:54,075 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:54,075 INFO L82 PathProgramCache]: Analyzing trace with hash -1990609809, now seen corresponding path program 1 times [2018-12-08 16:54:54,075 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:54,075 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:54,076 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,076 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:54,076 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:54,111 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:54,111 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:54,111 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 16:54:54,111 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 16:54:54,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 16:54:54,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:54:54,112 INFO L87 Difference]: Start difference. First operand 141 states and 149 transitions. Second operand 5 states. [2018-12-08 16:54:54,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:54,121 INFO L93 Difference]: Finished difference Result 143 states and 150 transitions. [2018-12-08 16:54:54,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 16:54:54,121 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-12-08 16:54:54,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:54,122 INFO L225 Difference]: With dead ends: 143 [2018-12-08 16:54:54,122 INFO L226 Difference]: Without dead ends: 143 [2018-12-08 16:54:54,122 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:54:54,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-12-08 16:54:54,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 141. [2018-12-08 16:54:54,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-08 16:54:54,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 148 transitions. [2018-12-08 16:54:54,127 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 148 transitions. Word has length 27 [2018-12-08 16:54:54,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:54,127 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 148 transitions. [2018-12-08 16:54:54,128 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 16:54:54,128 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 148 transitions. [2018-12-08 16:54:54,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-08 16:54:54,128 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:54,128 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:54,128 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:54,129 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:54,129 INFO L82 PathProgramCache]: Analyzing trace with hash 1793823310, now seen corresponding path program 1 times [2018-12-08 16:54:54,129 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:54,129 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:54,130 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,130 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:54,130 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:54,179 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:54,180 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:54,180 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 16:54:54,180 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 16:54:54,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 16:54:54,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 16:54:54,180 INFO L87 Difference]: Start difference. First operand 141 states and 148 transitions. Second operand 7 states. [2018-12-08 16:54:54,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:54,206 INFO L93 Difference]: Finished difference Result 157 states and 165 transitions. [2018-12-08 16:54:54,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 16:54:54,206 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-12-08 16:54:54,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:54,207 INFO L225 Difference]: With dead ends: 157 [2018-12-08 16:54:54,207 INFO L226 Difference]: Without dead ends: 157 [2018-12-08 16:54:54,208 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 16:54:54,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-12-08 16:54:54,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 150. [2018-12-08 16:54:54,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-08 16:54:54,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-08 16:54:54,216 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 27 [2018-12-08 16:54:54,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:54,216 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-08 16:54:54,216 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 16:54:54,216 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-08 16:54:54,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-08 16:54:54,217 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:54,217 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:54,218 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:54,218 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:54,218 INFO L82 PathProgramCache]: Analyzing trace with hash 1482045916, now seen corresponding path program 1 times [2018-12-08 16:54:54,218 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:54,218 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:54,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,219 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:54,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:54,292 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:54,292 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:54,292 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 16:54:54,292 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 16:54:54,293 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 16:54:54,293 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-08 16:54:54,293 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 11 states. [2018-12-08 16:54:54,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:54,484 INFO L93 Difference]: Finished difference Result 149 states and 156 transitions. [2018-12-08 16:54:54,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 16:54:54,484 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-12-08 16:54:54,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:54,485 INFO L225 Difference]: With dead ends: 149 [2018-12-08 16:54:54,485 INFO L226 Difference]: Without dead ends: 149 [2018-12-08 16:54:54,485 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-08 16:54:54,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-08 16:54:54,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-12-08 16:54:54,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-08 16:54:54,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 156 transitions. [2018-12-08 16:54:54,492 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 156 transitions. Word has length 32 [2018-12-08 16:54:54,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:54,492 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 156 transitions. [2018-12-08 16:54:54,492 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 16:54:54,492 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 156 transitions. [2018-12-08 16:54:54,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-08 16:54:54,493 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:54,493 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:54,493 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:54,494 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:54,494 INFO L82 PathProgramCache]: Analyzing trace with hash 1482045917, now seen corresponding path program 1 times [2018-12-08 16:54:54,494 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:54,494 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:54,495 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,495 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:54,495 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:54,520 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:54,520 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:54,520 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 16:54:54,521 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 16:54:54,521 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 16:54:54,521 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 16:54:54,521 INFO L87 Difference]: Start difference. First operand 149 states and 156 transitions. Second operand 4 states. [2018-12-08 16:54:54,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:54,533 INFO L93 Difference]: Finished difference Result 152 states and 159 transitions. [2018-12-08 16:54:54,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 16:54:54,534 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-08 16:54:54,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:54,535 INFO L225 Difference]: With dead ends: 152 [2018-12-08 16:54:54,535 INFO L226 Difference]: Without dead ends: 150 [2018-12-08 16:54:54,535 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:54:54,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-08 16:54:54,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-08 16:54:54,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-08 16:54:54,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-08 16:54:54,541 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 32 [2018-12-08 16:54:54,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:54,541 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-08 16:54:54,542 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 16:54:54,542 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-08 16:54:54,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-08 16:54:54,542 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:54,543 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:54,543 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:54,543 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:54,543 INFO L82 PathProgramCache]: Analyzing trace with hash 426736712, now seen corresponding path program 1 times [2018-12-08 16:54:54,544 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:54,544 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:54,545 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,545 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:54,545 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:54,581 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:54,582 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:54:54,582 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:54:54,590 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:54,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:54,636 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:54:54,655 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:54,677 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 16:54:54,677 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-12-08 16:54:54,677 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 16:54:54,677 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 16:54:54,677 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-08 16:54:54,678 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 6 states. [2018-12-08 16:54:54,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:54,691 INFO L93 Difference]: Finished difference Result 153 states and 160 transitions. [2018-12-08 16:54:54,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 16:54:54,691 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2018-12-08 16:54:54,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:54,691 INFO L225 Difference]: With dead ends: 153 [2018-12-08 16:54:54,692 INFO L226 Difference]: Without dead ends: 151 [2018-12-08 16:54:54,692 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-08 16:54:54,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-08 16:54:54,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-12-08 16:54:54,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-08 16:54:54,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 158 transitions. [2018-12-08 16:54:54,695 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 158 transitions. Word has length 33 [2018-12-08 16:54:54,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:54,695 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 158 transitions. [2018-12-08 16:54:54,695 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 16:54:54,695 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 158 transitions. [2018-12-08 16:54:54,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-08 16:54:54,696 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:54,696 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:54,696 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:54,696 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:54,696 INFO L82 PathProgramCache]: Analyzing trace with hash 2071889725, now seen corresponding path program 2 times [2018-12-08 16:54:54,696 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:54,696 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:54,697 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,697 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:54,697 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:54,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:54,721 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:54,721 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:54:54,721 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:54:54,728 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 16:54:54,750 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-08 16:54:54,750 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 16:54:54,753 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:54:54,781 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:54:54,783 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:54:54,787 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:54:54,788 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 16:54:54,916 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-08 16:54:54,931 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 16:54:54,931 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [6] total 17 [2018-12-08 16:54:54,932 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-08 16:54:54,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-08 16:54:54,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=230, Unknown=0, NotChecked=0, Total=272 [2018-12-08 16:54:54,932 INFO L87 Difference]: Start difference. First operand 151 states and 158 transitions. Second operand 17 states. [2018-12-08 16:54:55,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:55,374 INFO L93 Difference]: Finished difference Result 213 states and 222 transitions. [2018-12-08 16:54:55,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-08 16:54:55,374 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 34 [2018-12-08 16:54:55,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:55,375 INFO L225 Difference]: With dead ends: 213 [2018-12-08 16:54:55,375 INFO L226 Difference]: Without dead ends: 211 [2018-12-08 16:54:55,375 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=85, Invalid=515, Unknown=0, NotChecked=0, Total=600 [2018-12-08 16:54:55,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-12-08 16:54:55,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 151. [2018-12-08 16:54:55,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-08 16:54:55,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 158 transitions. [2018-12-08 16:54:55,379 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 158 transitions. Word has length 34 [2018-12-08 16:54:55,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:55,379 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 158 transitions. [2018-12-08 16:54:55,379 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-08 16:54:55,379 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 158 transitions. [2018-12-08 16:54:55,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-08 16:54:55,379 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:55,379 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:55,380 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:55,380 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:55,380 INFO L82 PathProgramCache]: Analyzing trace with hash -1823867884, now seen corresponding path program 1 times [2018-12-08 16:54:55,380 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:55,380 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:55,381 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:55,381 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 16:54:55,381 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:55,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:55,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:55,425 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:55,425 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 16:54:55,425 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 16:54:55,425 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 16:54:55,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 16:54:55,426 INFO L87 Difference]: Start difference. First operand 151 states and 158 transitions. Second operand 7 states. [2018-12-08 16:54:55,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:55,448 INFO L93 Difference]: Finished difference Result 161 states and 168 transitions. [2018-12-08 16:54:55,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 16:54:55,448 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-12-08 16:54:55,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:55,449 INFO L225 Difference]: With dead ends: 161 [2018-12-08 16:54:55,449 INFO L226 Difference]: Without dead ends: 161 [2018-12-08 16:54:55,450 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 16:54:55,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-12-08 16:54:55,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 157. [2018-12-08 16:54:55,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-12-08 16:54:55,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 164 transitions. [2018-12-08 16:54:55,454 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 164 transitions. Word has length 36 [2018-12-08 16:54:55,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:55,454 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 164 transitions. [2018-12-08 16:54:55,454 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 16:54:55,454 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 164 transitions. [2018-12-08 16:54:55,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-08 16:54:55,455 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:55,455 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:55,456 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:55,456 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:55,456 INFO L82 PathProgramCache]: Analyzing trace with hash -1550558175, now seen corresponding path program 1 times [2018-12-08 16:54:55,456 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:55,456 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:55,457 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:55,457 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:55,457 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:55,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:55,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:55,474 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:55,474 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 16:54:55,475 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 16:54:55,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 16:54:55,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 16:54:55,475 INFO L87 Difference]: Start difference. First operand 157 states and 164 transitions. Second operand 3 states. [2018-12-08 16:54:55,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:55,539 INFO L93 Difference]: Finished difference Result 168 states and 174 transitions. [2018-12-08 16:54:55,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 16:54:55,539 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-12-08 16:54:55,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:55,540 INFO L225 Difference]: With dead ends: 168 [2018-12-08 16:54:55,540 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 16:54:55,540 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 16:54:55,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 16:54:55,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 138. [2018-12-08 16:54:55,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-08 16:54:55,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 144 transitions. [2018-12-08 16:54:55,543 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 144 transitions. Word has length 34 [2018-12-08 16:54:55,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:55,543 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 144 transitions. [2018-12-08 16:54:55,543 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 16:54:55,543 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 144 transitions. [2018-12-08 16:54:55,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-08 16:54:55,543 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:55,543 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:55,544 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:55,544 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:55,544 INFO L82 PathProgramCache]: Analyzing trace with hash -1036104256, now seen corresponding path program 1 times [2018-12-08 16:54:55,544 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:55,544 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:55,545 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:55,545 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:55,545 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:55,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:55,607 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-08 16:54:55,607 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:55,607 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 16:54:55,607 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 16:54:55,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 16:54:55,608 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-08 16:54:55,608 INFO L87 Difference]: Start difference. First operand 138 states and 144 transitions. Second operand 11 states. [2018-12-08 16:54:55,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:55,764 INFO L93 Difference]: Finished difference Result 136 states and 142 transitions. [2018-12-08 16:54:55,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 16:54:55,764 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 40 [2018-12-08 16:54:55,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:55,765 INFO L225 Difference]: With dead ends: 136 [2018-12-08 16:54:55,765 INFO L226 Difference]: Without dead ends: 136 [2018-12-08 16:54:55,765 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-08 16:54:55,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-08 16:54:55,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-08 16:54:55,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-08 16:54:55,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions. [2018-12-08 16:54:55,768 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 40 [2018-12-08 16:54:55,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:55,768 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 142 transitions. [2018-12-08 16:54:55,768 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 16:54:55,768 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions. [2018-12-08 16:54:55,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-08 16:54:55,769 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:55,769 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:55,769 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:55,769 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:55,769 INFO L82 PathProgramCache]: Analyzing trace with hash -1036104255, now seen corresponding path program 1 times [2018-12-08 16:54:55,769 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:55,769 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:55,770 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:55,770 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:55,770 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:55,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:55,799 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:55,799 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:54:55,799 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:54:55,806 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:55,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:55,824 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:54:55,833 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:55,848 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 16:54:55,848 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-12-08 16:54:55,848 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 16:54:55,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 16:54:55,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-12-08 16:54:55,849 INFO L87 Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 8 states. [2018-12-08 16:54:55,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:55,865 INFO L93 Difference]: Finished difference Result 139 states and 145 transitions. [2018-12-08 16:54:55,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 16:54:55,866 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 40 [2018-12-08 16:54:55,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:55,867 INFO L225 Difference]: With dead ends: 139 [2018-12-08 16:54:55,867 INFO L226 Difference]: Without dead ends: 137 [2018-12-08 16:54:55,867 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-08 16:54:55,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-12-08 16:54:55,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-12-08 16:54:55,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-12-08 16:54:55,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 143 transitions. [2018-12-08 16:54:55,870 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 143 transitions. Word has length 40 [2018-12-08 16:54:55,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:55,870 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 143 transitions. [2018-12-08 16:54:55,870 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 16:54:55,871 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 143 transitions. [2018-12-08 16:54:55,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-12-08 16:54:55,871 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:55,871 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:55,871 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:55,872 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:55,872 INFO L82 PathProgramCache]: Analyzing trace with hash -141560532, now seen corresponding path program 2 times [2018-12-08 16:54:55,872 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:55,872 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:55,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:55,873 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:55,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:55,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:55,918 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:55,918 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:54:55,918 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:54:55,926 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 16:54:55,947 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-08 16:54:55,947 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 16:54:55,950 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:54:55,965 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:54:55,965 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:54:55,969 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:54:55,969 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 16:54:56,111 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 16:54:56,126 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 16:54:56,126 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [8] total 19 [2018-12-08 16:54:56,126 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-08 16:54:56,126 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-08 16:54:56,126 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=289, Unknown=0, NotChecked=0, Total=342 [2018-12-08 16:54:56,126 INFO L87 Difference]: Start difference. First operand 137 states and 143 transitions. Second operand 19 states. [2018-12-08 16:54:56,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:56,578 INFO L93 Difference]: Finished difference Result 138 states and 144 transitions. [2018-12-08 16:54:56,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-08 16:54:56,579 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 41 [2018-12-08 16:54:56,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:56,579 INFO L225 Difference]: With dead ends: 138 [2018-12-08 16:54:56,579 INFO L226 Difference]: Without dead ends: 136 [2018-12-08 16:54:56,580 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 28 SyntacticMatches, 3 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=118, Invalid=694, Unknown=0, NotChecked=0, Total=812 [2018-12-08 16:54:56,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-08 16:54:56,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-08 16:54:56,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-08 16:54:56,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions. [2018-12-08 16:54:56,582 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 41 [2018-12-08 16:54:56,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:56,582 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 142 transitions. [2018-12-08 16:54:56,582 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-08 16:54:56,582 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions. [2018-12-08 16:54:56,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-12-08 16:54:56,582 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:56,582 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:56,583 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:56,583 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:56,583 INFO L82 PathProgramCache]: Analyzing trace with hash -271503917, now seen corresponding path program 1 times [2018-12-08 16:54:56,583 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:56,583 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:56,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:56,584 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 16:54:56,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:56,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:56,629 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 16:54:56,629 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:56,630 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 16:54:56,630 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 16:54:56,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 16:54:56,630 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 16:54:56,630 INFO L87 Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 7 states. [2018-12-08 16:54:56,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:56,650 INFO L93 Difference]: Finished difference Result 138 states and 143 transitions. [2018-12-08 16:54:56,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 16:54:56,651 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 45 [2018-12-08 16:54:56,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:56,652 INFO L225 Difference]: With dead ends: 138 [2018-12-08 16:54:56,652 INFO L226 Difference]: Without dead ends: 136 [2018-12-08 16:54:56,652 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 16:54:56,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-08 16:54:56,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-08 16:54:56,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-08 16:54:56,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 141 transitions. [2018-12-08 16:54:56,655 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 141 transitions. Word has length 45 [2018-12-08 16:54:56,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:56,655 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 141 transitions. [2018-12-08 16:54:56,655 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 16:54:56,656 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 141 transitions. [2018-12-08 16:54:56,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-08 16:54:56,656 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:56,656 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:56,656 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:56,657 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:56,657 INFO L82 PathProgramCache]: Analyzing trace with hash 865251330, now seen corresponding path program 1 times [2018-12-08 16:54:56,657 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:56,657 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:56,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:56,658 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:56,658 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:56,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:56,712 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 16:54:56,712 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:56,712 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-08 16:54:56,713 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 16:54:56,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 16:54:56,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 16:54:56,713 INFO L87 Difference]: Start difference. First operand 136 states and 141 transitions. Second operand 9 states. [2018-12-08 16:54:56,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:56,747 INFO L93 Difference]: Finished difference Result 140 states and 144 transitions. [2018-12-08 16:54:56,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 16:54:56,747 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 50 [2018-12-08 16:54:56,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:56,748 INFO L225 Difference]: With dead ends: 140 [2018-12-08 16:54:56,748 INFO L226 Difference]: Without dead ends: 136 [2018-12-08 16:54:56,748 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-08 16:54:56,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-08 16:54:56,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-08 16:54:56,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-08 16:54:56,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 140 transitions. [2018-12-08 16:54:56,750 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 140 transitions. Word has length 50 [2018-12-08 16:54:56,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:56,750 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 140 transitions. [2018-12-08 16:54:56,750 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 16:54:56,750 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 140 transitions. [2018-12-08 16:54:56,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-08 16:54:56,750 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:56,751 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:56,751 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:56,751 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:56,751 INFO L82 PathProgramCache]: Analyzing trace with hash 1664444297, now seen corresponding path program 1 times [2018-12-08 16:54:56,751 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:56,751 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:56,752 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:56,752 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:56,752 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:56,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:56,823 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 16:54:56,823 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:56,823 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-12-08 16:54:56,823 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-08 16:54:56,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-08 16:54:56,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=157, Unknown=0, NotChecked=0, Total=182 [2018-12-08 16:54:56,824 INFO L87 Difference]: Start difference. First operand 136 states and 140 transitions. Second operand 14 states. [2018-12-08 16:54:57,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:57,023 INFO L93 Difference]: Finished difference Result 134 states and 138 transitions. [2018-12-08 16:54:57,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-08 16:54:57,023 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 61 [2018-12-08 16:54:57,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:57,024 INFO L225 Difference]: With dead ends: 134 [2018-12-08 16:54:57,024 INFO L226 Difference]: Without dead ends: 134 [2018-12-08 16:54:57,024 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2018-12-08 16:54:57,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-08 16:54:57,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-08 16:54:57,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-08 16:54:57,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 138 transitions. [2018-12-08 16:54:57,027 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 138 transitions. Word has length 61 [2018-12-08 16:54:57,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:57,027 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 138 transitions. [2018-12-08 16:54:57,027 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-08 16:54:57,027 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 138 transitions. [2018-12-08 16:54:57,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-08 16:54:57,028 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:57,028 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:57,028 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:57,028 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:57,028 INFO L82 PathProgramCache]: Analyzing trace with hash 1664444298, now seen corresponding path program 1 times [2018-12-08 16:54:57,029 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:57,029 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:57,029 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:57,029 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:57,030 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:57,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:57,071 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:57,072 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:54:57,072 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:54:57,078 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:57,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:57,102 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:54:57,111 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:57,125 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 16:54:57,125 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-12-08 16:54:57,126 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 16:54:57,126 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 16:54:57,126 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-12-08 16:54:57,126 INFO L87 Difference]: Start difference. First operand 134 states and 138 transitions. Second operand 10 states. [2018-12-08 16:54:57,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:57,143 INFO L93 Difference]: Finished difference Result 137 states and 141 transitions. [2018-12-08 16:54:57,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 16:54:57,143 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 61 [2018-12-08 16:54:57,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:57,144 INFO L225 Difference]: With dead ends: 137 [2018-12-08 16:54:57,144 INFO L226 Difference]: Without dead ends: 135 [2018-12-08 16:54:57,144 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-12-08 16:54:57,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-08 16:54:57,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-12-08 16:54:57,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-12-08 16:54:57,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 139 transitions. [2018-12-08 16:54:57,147 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 139 transitions. Word has length 61 [2018-12-08 16:54:57,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:57,147 INFO L480 AbstractCegarLoop]: Abstraction has 135 states and 139 transitions. [2018-12-08 16:54:57,147 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 16:54:57,147 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 139 transitions. [2018-12-08 16:54:57,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-08 16:54:57,147 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:57,148 INFO L402 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:57,148 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:57,148 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:57,148 INFO L82 PathProgramCache]: Analyzing trace with hash -785964801, now seen corresponding path program 2 times [2018-12-08 16:54:57,148 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:57,148 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:57,149 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:57,149 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:57,149 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:57,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:57,195 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:57,195 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:54:57,195 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:54:57,203 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 16:54:57,223 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-08 16:54:57,223 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 16:54:57,225 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:54:57,232 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:54:57,232 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:54:57,238 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:54:57,238 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 16:54:57,443 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-08 16:54:57,458 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 16:54:57,458 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [10] total 24 [2018-12-08 16:54:57,458 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 16:54:57,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 16:54:57,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=475, Unknown=0, NotChecked=0, Total=552 [2018-12-08 16:54:57,458 INFO L87 Difference]: Start difference. First operand 135 states and 139 transitions. Second operand 24 states. [2018-12-08 16:54:58,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:58,269 INFO L93 Difference]: Finished difference Result 136 states and 140 transitions. [2018-12-08 16:54:58,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-08 16:54:58,270 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 62 [2018-12-08 16:54:58,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:58,271 INFO L225 Difference]: With dead ends: 136 [2018-12-08 16:54:58,271 INFO L226 Difference]: Without dead ends: 134 [2018-12-08 16:54:58,272 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 46 SyntacticMatches, 3 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=177, Invalid=1155, Unknown=0, NotChecked=0, Total=1332 [2018-12-08 16:54:58,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-08 16:54:58,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-08 16:54:58,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-08 16:54:58,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 138 transitions. [2018-12-08 16:54:58,276 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 138 transitions. Word has length 62 [2018-12-08 16:54:58,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:58,276 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 138 transitions. [2018-12-08 16:54:58,276 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 16:54:58,276 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 138 transitions. [2018-12-08 16:54:58,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-08 16:54:58,277 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:58,277 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:58,278 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:58,278 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:58,278 INFO L82 PathProgramCache]: Analyzing trace with hash 1963990681, now seen corresponding path program 1 times [2018-12-08 16:54:58,278 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:58,278 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:58,280 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:58,280 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 16:54:58,280 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:58,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:58,352 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-08 16:54:58,353 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:58,353 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 16:54:58,353 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 16:54:58,353 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 16:54:58,353 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-08 16:54:58,353 INFO L87 Difference]: Start difference. First operand 134 states and 138 transitions. Second operand 10 states. [2018-12-08 16:54:58,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:58,391 INFO L93 Difference]: Finished difference Result 137 states and 140 transitions. [2018-12-08 16:54:58,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 16:54:58,392 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 72 [2018-12-08 16:54:58,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:58,392 INFO L225 Difference]: With dead ends: 137 [2018-12-08 16:54:58,392 INFO L226 Difference]: Without dead ends: 134 [2018-12-08 16:54:58,393 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-08 16:54:58,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-08 16:54:58,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-08 16:54:58,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-08 16:54:58,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 137 transitions. [2018-12-08 16:54:58,395 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 137 transitions. Word has length 72 [2018-12-08 16:54:58,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:58,396 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 137 transitions. [2018-12-08 16:54:58,396 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 16:54:58,396 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 137 transitions. [2018-12-08 16:54:58,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-08 16:54:58,397 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:58,397 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:58,397 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:58,397 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:58,397 INFO L82 PathProgramCache]: Analyzing trace with hash -1499600980, now seen corresponding path program 1 times [2018-12-08 16:54:58,397 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:58,398 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:58,398 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:58,398 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:58,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:58,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:58,517 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-08 16:54:58,518 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:54:58,518 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-12-08 16:54:58,518 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-08 16:54:58,518 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-08 16:54:58,518 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=211, Unknown=0, NotChecked=0, Total=240 [2018-12-08 16:54:58,518 INFO L87 Difference]: Start difference. First operand 134 states and 137 transitions. Second operand 16 states. [2018-12-08 16:54:58,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:58,778 INFO L93 Difference]: Finished difference Result 141 states and 144 transitions. [2018-12-08 16:54:58,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-08 16:54:58,779 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 85 [2018-12-08 16:54:58,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:58,779 INFO L225 Difference]: With dead ends: 141 [2018-12-08 16:54:58,779 INFO L226 Difference]: Without dead ends: 141 [2018-12-08 16:54:58,780 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2018-12-08 16:54:58,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-08 16:54:58,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 132. [2018-12-08 16:54:58,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-08 16:54:58,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 135 transitions. [2018-12-08 16:54:58,783 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 135 transitions. Word has length 85 [2018-12-08 16:54:58,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:58,783 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 135 transitions. [2018-12-08 16:54:58,783 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-08 16:54:58,783 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 135 transitions. [2018-12-08 16:54:58,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-08 16:54:58,784 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:58,784 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:58,784 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:58,785 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:58,785 INFO L82 PathProgramCache]: Analyzing trace with hash -1499600979, now seen corresponding path program 1 times [2018-12-08 16:54:58,785 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:58,785 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:58,786 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:58,786 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:58,786 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:58,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:58,852 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:58,852 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:54:58,852 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:54:58,860 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:58,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:58,897 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:54:58,910 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:58,934 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 16:54:58,934 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-12-08 16:54:58,935 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-08 16:54:58,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-08 16:54:58,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-12-08 16:54:58,935 INFO L87 Difference]: Start difference. First operand 132 states and 135 transitions. Second operand 12 states. [2018-12-08 16:54:58,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:54:58,959 INFO L93 Difference]: Finished difference Result 135 states and 138 transitions. [2018-12-08 16:54:58,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 16:54:58,960 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 85 [2018-12-08 16:54:58,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:54:58,960 INFO L225 Difference]: With dead ends: 135 [2018-12-08 16:54:58,961 INFO L226 Difference]: Without dead ends: 133 [2018-12-08 16:54:58,961 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 85 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-12-08 16:54:58,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-12-08 16:54:58,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-12-08 16:54:58,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-12-08 16:54:58,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 136 transitions. [2018-12-08 16:54:58,963 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 136 transitions. Word has length 85 [2018-12-08 16:54:58,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:54:58,964 INFO L480 AbstractCegarLoop]: Abstraction has 133 states and 136 transitions. [2018-12-08 16:54:58,964 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-08 16:54:58,964 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 136 transitions. [2018-12-08 16:54:58,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-08 16:54:58,964 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:54:58,965 INFO L402 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:54:58,965 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:54:58,965 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:54:58,965 INFO L82 PathProgramCache]: Analyzing trace with hash -481832414, now seen corresponding path program 2 times [2018-12-08 16:54:58,965 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:54:58,965 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:54:58,966 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:58,966 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:54:58,966 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:54:58,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:54:59,039 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:54:59,039 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:54:59,039 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:54:59,047 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 16:54:59,078 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-08 16:54:59,078 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 16:54:59,082 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:54:59,092 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:54:59,092 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:54:59,096 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:54:59,096 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 16:54:59,360 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-08 16:54:59,375 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 16:54:59,375 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [12] total 29 [2018-12-08 16:54:59,376 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-12-08 16:54:59,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-12-08 16:54:59,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=707, Unknown=0, NotChecked=0, Total=812 [2018-12-08 16:54:59,376 INFO L87 Difference]: Start difference. First operand 133 states and 136 transitions. Second operand 29 states. [2018-12-08 16:55:00,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:00,044 INFO L93 Difference]: Finished difference Result 134 states and 137 transitions. [2018-12-08 16:55:00,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-12-08 16:55:00,044 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 86 [2018-12-08 16:55:00,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:00,045 INFO L225 Difference]: With dead ends: 134 [2018-12-08 16:55:00,045 INFO L226 Difference]: Without dead ends: 132 [2018-12-08 16:55:00,045 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 65 SyntacticMatches, 5 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 337 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=258, Invalid=1722, Unknown=0, NotChecked=0, Total=1980 [2018-12-08 16:55:00,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-12-08 16:55:00,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-12-08 16:55:00,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-08 16:55:00,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 135 transitions. [2018-12-08 16:55:00,048 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 135 transitions. Word has length 86 [2018-12-08 16:55:00,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:00,048 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 135 transitions. [2018-12-08 16:55:00,048 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-12-08 16:55:00,048 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 135 transitions. [2018-12-08 16:55:00,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-08 16:55:00,049 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:00,049 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:00,049 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:00,049 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:00,049 INFO L82 PathProgramCache]: Analyzing trace with hash -2061581223, now seen corresponding path program 1 times [2018-12-08 16:55:00,050 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:55:00,050 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:55:00,050 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:00,051 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 16:55:00,051 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:00,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:00,109 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 16:55:00,109 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:00,109 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 16:55:00,110 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 16:55:00,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 16:55:00,110 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-08 16:55:00,110 INFO L87 Difference]: Start difference. First operand 132 states and 135 transitions. Second operand 10 states. [2018-12-08 16:55:00,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:00,147 INFO L93 Difference]: Finished difference Result 134 states and 136 transitions. [2018-12-08 16:55:00,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 16:55:00,148 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 85 [2018-12-08 16:55:00,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:00,148 INFO L225 Difference]: With dead ends: 134 [2018-12-08 16:55:00,148 INFO L226 Difference]: Without dead ends: 132 [2018-12-08 16:55:00,148 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-08 16:55:00,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-12-08 16:55:00,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-12-08 16:55:00,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-08 16:55:00,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 134 transitions. [2018-12-08 16:55:00,150 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 134 transitions. Word has length 85 [2018-12-08 16:55:00,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:00,150 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 134 transitions. [2018-12-08 16:55:00,150 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 16:55:00,150 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 134 transitions. [2018-12-08 16:55:00,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-12-08 16:55:00,151 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:00,151 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:00,151 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:00,151 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:00,151 INFO L82 PathProgramCache]: Analyzing trace with hash -1177100084, now seen corresponding path program 1 times [2018-12-08 16:55:00,151 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:55:00,151 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:55:00,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:00,152 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:00,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:00,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:00,311 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 16:55:00,311 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:00,311 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-08 16:55:00,312 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 16:55:00,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 16:55:00,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=343, Unknown=0, NotChecked=0, Total=380 [2018-12-08 16:55:00,312 INFO L87 Difference]: Start difference. First operand 132 states and 134 transitions. Second operand 20 states. [2018-12-08 16:55:00,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:00,639 INFO L93 Difference]: Finished difference Result 135 states and 137 transitions. [2018-12-08 16:55:00,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-08 16:55:00,639 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 101 [2018-12-08 16:55:00,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:00,640 INFO L225 Difference]: With dead ends: 135 [2018-12-08 16:55:00,640 INFO L226 Difference]: Without dead ends: 135 [2018-12-08 16:55:00,641 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=637, Unknown=0, NotChecked=0, Total=702 [2018-12-08 16:55:00,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-08 16:55:00,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 130. [2018-12-08 16:55:00,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-12-08 16:55:00,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions. [2018-12-08 16:55:00,643 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 101 [2018-12-08 16:55:00,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:00,644 INFO L480 AbstractCegarLoop]: Abstraction has 130 states and 132 transitions. [2018-12-08 16:55:00,644 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 16:55:00,644 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions. [2018-12-08 16:55:00,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-12-08 16:55:00,644 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:00,644 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:00,645 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:00,645 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:00,645 INFO L82 PathProgramCache]: Analyzing trace with hash -1177100083, now seen corresponding path program 1 times [2018-12-08 16:55:00,645 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:55:00,645 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:55:00,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:00,646 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:00,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:00,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:00,726 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:00,726 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:55:00,726 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:55:00,735 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:00,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:00,780 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:00,794 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:00,809 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 16:55:00,809 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-12-08 16:55:00,809 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-08 16:55:00,809 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-08 16:55:00,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-12-08 16:55:00,810 INFO L87 Difference]: Start difference. First operand 130 states and 132 transitions. Second operand 14 states. [2018-12-08 16:55:00,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:00,839 INFO L93 Difference]: Finished difference Result 133 states and 135 transitions. [2018-12-08 16:55:00,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 16:55:00,839 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 101 [2018-12-08 16:55:00,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:00,840 INFO L225 Difference]: With dead ends: 133 [2018-12-08 16:55:00,840 INFO L226 Difference]: Without dead ends: 131 [2018-12-08 16:55:00,840 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 101 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-12-08 16:55:00,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-12-08 16:55:00,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-12-08 16:55:00,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-12-08 16:55:00,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 133 transitions. [2018-12-08 16:55:00,842 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 133 transitions. Word has length 101 [2018-12-08 16:55:00,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:00,842 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 133 transitions. [2018-12-08 16:55:00,842 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-08 16:55:00,842 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions. [2018-12-08 16:55:00,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-08 16:55:00,842 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:00,842 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:00,842 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:00,843 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:00,843 INFO L82 PathProgramCache]: Analyzing trace with hash -1492172478, now seen corresponding path program 2 times [2018-12-08 16:55:00,843 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:55:00,843 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:55:00,843 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:00,843 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:00,843 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:00,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:00,918 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:00,918 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:55:00,918 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:55:00,928 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 16:55:00,975 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-08 16:55:00,976 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 16:55:00,981 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:01,003 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:55:01,004 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:01,007 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:01,007 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 16:55:01,406 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-12-08 16:55:01,420 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 16:55:01,421 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [14] total 35 [2018-12-08 16:55:01,421 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-12-08 16:55:01,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-12-08 16:55:01,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=1050, Unknown=0, NotChecked=0, Total=1190 [2018-12-08 16:55:01,421 INFO L87 Difference]: Start difference. First operand 131 states and 133 transitions. Second operand 35 states. [2018-12-08 16:55:02,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:02,676 INFO L93 Difference]: Finished difference Result 132 states and 134 transitions. [2018-12-08 16:55:02,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-12-08 16:55:02,676 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 102 [2018-12-08 16:55:02,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:02,677 INFO L225 Difference]: With dead ends: 132 [2018-12-08 16:55:02,677 INFO L226 Difference]: Without dead ends: 130 [2018-12-08 16:55:02,678 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 75 SyntacticMatches, 7 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 532 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=351, Invalid=2619, Unknown=0, NotChecked=0, Total=2970 [2018-12-08 16:55:02,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-12-08 16:55:02,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2018-12-08 16:55:02,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-12-08 16:55:02,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions. [2018-12-08 16:55:02,681 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 102 [2018-12-08 16:55:02,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:02,682 INFO L480 AbstractCegarLoop]: Abstraction has 130 states and 132 transitions. [2018-12-08 16:55:02,682 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-12-08 16:55:02,682 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions. [2018-12-08 16:55:02,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-12-08 16:55:02,682 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:02,682 INFO L402 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:02,683 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:02,683 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:02,683 INFO L82 PathProgramCache]: Analyzing trace with hash 2022543782, now seen corresponding path program 1 times [2018-12-08 16:55:02,683 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:55:02,683 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:55:02,684 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:02,685 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 16:55:02,685 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:02,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:02,796 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:02,796 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:55:02,796 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:55:02,803 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:02,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:02,845 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:02,854 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:02,869 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 16:55:02,869 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-12-08 16:55:02,870 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-08 16:55:02,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-08 16:55:02,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-12-08 16:55:02,870 INFO L87 Difference]: Start difference. First operand 130 states and 132 transitions. Second operand 16 states. [2018-12-08 16:55:02,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:02,897 INFO L93 Difference]: Finished difference Result 133 states and 135 transitions. [2018-12-08 16:55:02,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-08 16:55:02,897 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 108 [2018-12-08 16:55:02,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:02,898 INFO L225 Difference]: With dead ends: 133 [2018-12-08 16:55:02,898 INFO L226 Difference]: Without dead ends: 131 [2018-12-08 16:55:02,898 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-12-08 16:55:02,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-12-08 16:55:02,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-12-08 16:55:02,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-12-08 16:55:02,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 133 transitions. [2018-12-08 16:55:02,900 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 133 transitions. Word has length 108 [2018-12-08 16:55:02,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:02,900 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 133 transitions. [2018-12-08 16:55:02,900 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-08 16:55:02,901 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions. [2018-12-08 16:55:02,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-12-08 16:55:02,901 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:02,901 INFO L402 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:02,902 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:02,902 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:02,902 INFO L82 PathProgramCache]: Analyzing trace with hash -1491946607, now seen corresponding path program 2 times [2018-12-08 16:55:02,902 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:55:02,902 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:55:02,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:02,903 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:02,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:02,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:03,004 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:03,004 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:55:03,004 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:55:03,010 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 16:55:03,048 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-08 16:55:03,048 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 16:55:03,053 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:03,127 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-08 16:55:03,128 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-08 16:55:03,128 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:03,129 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:03,130 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:03,130 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-12-08 16:55:03,199 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 16:55:03,201 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 16:55:03,205 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 16:55:03,205 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-12-08 16:55:03,802 WARN L854 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-12-08 16:55:03,808 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-12-08 16:55:03,810 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:03,811 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-12-08 16:55:03,814 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:03,814 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:03,817 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-12-08 16:55:03,817 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:03,822 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:03,824 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:03,828 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:03,828 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-12-08 16:55:04,095 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:04,095 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-12-08 16:55:04,097 INFO L683 Elim1Store]: detected equality via solver [2018-12-08 16:55:04,098 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:04,098 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-12-08 16:55:04,098 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:04,100 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:04,103 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:04,103 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-12-08 16:55:04,400 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-12-08 16:55:04,402 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-08 16:55:04,402 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:04,402 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:04,403 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:04,403 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-12-08 16:55:04,441 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-12-08 16:55:04,456 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 16:55:04,456 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [41] imperfect sequences [16] total 55 [2018-12-08 16:55:04,457 INFO L459 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-12-08 16:55:04,457 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-12-08 16:55:04,457 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=2668, Unknown=1, NotChecked=104, Total=2970 [2018-12-08 16:55:04,458 INFO L87 Difference]: Start difference. First operand 131 states and 133 transitions. Second operand 55 states. [2018-12-08 16:55:05,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:05,951 INFO L93 Difference]: Finished difference Result 112 states and 112 transitions. [2018-12-08 16:55:05,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-12-08 16:55:05,951 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 109 [2018-12-08 16:55:05,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:05,952 INFO L225 Difference]: With dead ends: 112 [2018-12-08 16:55:05,952 INFO L226 Difference]: Without dead ends: 110 [2018-12-08 16:55:05,953 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 70 SyntacticMatches, 1 SemanticMatches, 87 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1436 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=503, Invalid=7156, Unknown=1, NotChecked=172, Total=7832 [2018-12-08 16:55:05,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-12-08 16:55:05,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-12-08 16:55:05,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-12-08 16:55:05,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 110 transitions. [2018-12-08 16:55:05,955 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 110 transitions. Word has length 109 [2018-12-08 16:55:05,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:05,955 INFO L480 AbstractCegarLoop]: Abstraction has 110 states and 110 transitions. [2018-12-08 16:55:05,955 INFO L481 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-12-08 16:55:05,955 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 110 transitions. [2018-12-08 16:55:05,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-12-08 16:55:05,955 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:05,955 INFO L402 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:05,956 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:05,956 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:05,956 INFO L82 PathProgramCache]: Analyzing trace with hash 281292969, now seen corresponding path program 1 times [2018-12-08 16:55:05,956 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:55:05,956 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:55:05,956 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:05,956 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 16:55:05,957 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:05,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:06,061 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:06,061 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:55:06,061 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:55:06,069 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:06,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:06,119 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:06,142 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:06,167 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 16:55:06,168 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-12-08 16:55:06,168 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-08 16:55:06,168 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-08 16:55:06,168 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-12-08 16:55:06,168 INFO L87 Difference]: Start difference. First operand 110 states and 110 transitions. Second operand 18 states. [2018-12-08 16:55:06,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:06,197 INFO L93 Difference]: Finished difference Result 113 states and 113 transitions. [2018-12-08 16:55:06,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-08 16:55:06,198 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 109 [2018-12-08 16:55:06,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:06,198 INFO L225 Difference]: With dead ends: 113 [2018-12-08 16:55:06,198 INFO L226 Difference]: Without dead ends: 111 [2018-12-08 16:55:06,199 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-12-08 16:55:06,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-12-08 16:55:06,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-12-08 16:55:06,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-12-08 16:55:06,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 111 transitions. [2018-12-08 16:55:06,201 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 111 transitions. Word has length 109 [2018-12-08 16:55:06,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:06,201 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 111 transitions. [2018-12-08 16:55:06,201 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-08 16:55:06,202 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 111 transitions. [2018-12-08 16:55:06,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-12-08 16:55:06,202 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:06,202 INFO L402 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:06,202 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:06,203 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:06,203 INFO L82 PathProgramCache]: Analyzing trace with hash -1293726690, now seen corresponding path program 2 times [2018-12-08 16:55:06,203 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:55:06,203 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:55:06,204 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:06,204 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:06,204 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:06,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:06,335 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:06,336 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:55:06,336 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:55:06,342 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 16:55:06,392 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 16:55:06,392 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 16:55:06,394 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:06,407 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:06,423 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 16:55:06,423 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-12-08 16:55:06,423 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-08 16:55:06,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-08 16:55:06,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-12-08 16:55:06,424 INFO L87 Difference]: Start difference. First operand 111 states and 111 transitions. Second operand 19 states. [2018-12-08 16:55:06,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:06,455 INFO L93 Difference]: Finished difference Result 114 states and 114 transitions. [2018-12-08 16:55:06,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-08 16:55:06,456 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 110 [2018-12-08 16:55:06,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:06,456 INFO L225 Difference]: With dead ends: 114 [2018-12-08 16:55:06,456 INFO L226 Difference]: Without dead ends: 112 [2018-12-08 16:55:06,456 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 110 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-12-08 16:55:06,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-12-08 16:55:06,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-12-08 16:55:06,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-12-08 16:55:06,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 112 transitions. [2018-12-08 16:55:06,458 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 112 transitions. Word has length 110 [2018-12-08 16:55:06,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:06,459 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 112 transitions. [2018-12-08 16:55:06,459 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-08 16:55:06,459 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 112 transitions. [2018-12-08 16:55:06,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-08 16:55:06,459 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:06,459 INFO L402 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:06,460 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:06,460 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:06,460 INFO L82 PathProgramCache]: Analyzing trace with hash 1420271433, now seen corresponding path program 3 times [2018-12-08 16:55:06,460 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:55:06,460 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:55:06,461 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:06,461 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 16:55:06,461 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:06,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:06,601 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:06,601 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:55:06,601 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:55:06,608 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 16:55:27,097 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-12-08 16:55:27,097 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 16:55:27,108 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:27,309 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:27,328 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 16:55:27,328 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 23] total 40 [2018-12-08 16:55:27,328 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-12-08 16:55:27,328 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-12-08 16:55:27,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=470, Invalid=1090, Unknown=0, NotChecked=0, Total=1560 [2018-12-08 16:55:27,329 INFO L87 Difference]: Start difference. First operand 112 states and 112 transitions. Second operand 40 states. [2018-12-08 16:55:27,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:27,439 INFO L93 Difference]: Finished difference Result 115 states and 115 transitions. [2018-12-08 16:55:27,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-08 16:55:27,439 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 111 [2018-12-08 16:55:27,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:27,440 INFO L225 Difference]: With dead ends: 115 [2018-12-08 16:55:27,440 INFO L226 Difference]: Without dead ends: 113 [2018-12-08 16:55:27,440 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 616 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=512, Invalid=1210, Unknown=0, NotChecked=0, Total=1722 [2018-12-08 16:55:27,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-12-08 16:55:27,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-12-08 16:55:27,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-12-08 16:55:27,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 113 transitions. [2018-12-08 16:55:27,441 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 113 transitions. Word has length 111 [2018-12-08 16:55:27,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:27,442 INFO L480 AbstractCegarLoop]: Abstraction has 113 states and 113 transitions. [2018-12-08 16:55:27,442 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-12-08 16:55:27,442 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 113 transitions. [2018-12-08 16:55:27,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-08 16:55:27,442 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:27,442 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:27,442 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:27,442 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:27,442 INFO L82 PathProgramCache]: Analyzing trace with hash -345132674, now seen corresponding path program 4 times [2018-12-08 16:55:27,443 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 16:55:27,443 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 16:55:27,443 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:27,443 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 16:55:27,443 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 16:55:27,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 16:55:27,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 16:55:27,523 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-08 16:55:27,532 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-12-08 16:55:27,536 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-08 16:55:27,539 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 18 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-08 16:55:27,539 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 17 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-08 16:55:27,548 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.12 04:55:27 BoogieIcfgContainer [2018-12-08 16:55:27,548 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-08 16:55:27,548 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-08 16:55:27,548 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-08 16:55:27,549 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-08 16:55:27,549 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 04:54:53" (3/4) ... [2018-12-08 16:55:27,551 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-08 16:55:27,551 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-08 16:55:27,552 INFO L168 Benchmark]: Toolchain (without parser) took 35008.63 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 466.1 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -186.7 MB). Peak memory consumption was 279.4 MB. Max. memory is 11.5 GB. [2018-12-08 16:55:27,553 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 16:55:27,553 INFO L168 Benchmark]: CACSL2BoogieTranslator took 332.14 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 143.1 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -157.0 MB). Peak memory consumption was 30.8 MB. Max. memory is 11.5 GB. [2018-12-08 16:55:27,553 INFO L168 Benchmark]: Boogie Preprocessor took 43.97 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 16:55:27,553 INFO L168 Benchmark]: RCFGBuilder took 524.86 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 102.6 MB). Peak memory consumption was 102.6 MB. Max. memory is 11.5 GB. [2018-12-08 16:55:27,553 INFO L168 Benchmark]: TraceAbstraction took 34101.89 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 323.0 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -132.3 MB). Peak memory consumption was 190.7 MB. Max. memory is 11.5 GB. [2018-12-08 16:55:27,554 INFO L168 Benchmark]: Witness Printer took 3.07 ms. Allocated memory is still 1.5 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 16:55:27,555 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 332.14 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 143.1 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -157.0 MB). Peak memory consumption was 30.8 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 43.97 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 524.86 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 102.6 MB). Peak memory consumption was 102.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 34101.89 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 323.0 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -132.3 MB). Peak memory consumption was 190.7 MB. Max. memory is 11.5 GB. * Witness Printer took 3.07 ms. Allocated memory is still 1.5 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 18 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 17 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1443]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1443. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={30:0}] [L1444] CALL entry_point() VAL [ldv_global_msg_list={30:0}] [L1436] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={30:0}] [L1437] CALL, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={30:0}] [L1406] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={30:0}] [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16, ldv_global_msg_list={30:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=16, \result={26:0}, ldv_global_msg_list={30:0}, malloc(size)={26:0}, size=16] [L1408] RET, EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_global_msg_list={30:0}, ldv_malloc(sizeof(*kobj))={26:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={26:0}, ldv_global_msg_list={30:0}, memset(kobj, 0, sizeof(*kobj))={26:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={26:12}, ldv_global_msg_list={30:0}] [L1294] ((&kref->refcount)->counter) = (1) VAL [kref={26:12}, kref={26:12}, ldv_global_msg_list={30:0}] [L1382] RET ldv_kref_init(&kobj->kref) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [ldv_global_msg_list={30:0}, list={26:4}] [L1099] list->next = list VAL [ldv_global_msg_list={30:0}, list={26:4}, list={26:4}] [L1100] list->prev = list VAL [ldv_global_msg_list={30:0}, list={26:4}, list={26:4}] [L1383] RET LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1398] RET ldv_kobject_init_internal(kobj) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1413] RET ldv_kobject_init(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1414] return kobj; VAL [\result={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1437] RET, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={30:0}, ldv_kobject_create()={26:0}] [L1437] kobj = ldv_kobject_create() [L1438] CALL ldv_kobject_get(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={26:12}, ldv_global_msg_list={30:0}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={30:0}, v={26:12}] [L1255] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={26:12}, v={26:12}] [L1256] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={26:12}, v={26:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=2, v={26:12}, v={26:12}] [L1258] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=2, v={26:12}, v={26:12}] [L1259] return temp; VAL [\old(i)=1, \result=2, i=1, ldv_global_msg_list={30:0}, temp=2, v={26:12}, v={26:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={26:12}, kref={26:12}, ldv_atomic_add_return(1, (&kref->refcount))=2, ldv_global_msg_list={30:0}] [L1374] RET ldv_kref_get(&kobj->kref) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1375] return kobj; VAL [\result={26:0}, kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1438] RET ldv_kobject_get(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}, ldv_kobject_get(kobj)={26:0}] [L1440] CALL ldv_kobject_put(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={26:12}, ldv_global_msg_list={30:0}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={26:12}, ldv_global_msg_list={30:0}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={30:0}, v={26:12}] [L1264] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={26:12}, v={26:12}] [L1265] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={26:12}, v={26:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=1, v={26:12}, v={26:12}] [L1267] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=1, v={26:12}, v={26:12}] [L1268] return temp; VAL [\old(i)=1, \result=1, i=1, ldv_global_msg_list={30:0}, temp=1, v={26:12}, v={26:12}] [L1281] RET, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={26:12}, kref={26:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, ldv_global_msg_list={30:0}, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] return 0; VAL [\old(count)=1, \result=0, count=1, kref={26:12}, kref={26:12}, ldv_global_msg_list={30:0}, release={-1:0}, release={-1:0}] [L1313] RET, EXPR ldv_kref_sub(kref, 1, release) VAL [kref={26:12}, kref={26:12}, ldv_global_msg_list={30:0}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] return ldv_kref_sub(kref, 1, release); [L1363] RET ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={26:0}, kobj={26:0}, ldv_global_msg_list={30:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1440] RET ldv_kobject_put(kobj) VAL [kobj={26:0}, ldv_global_msg_list={30:0}] [L1444] RET entry_point() VAL [ldv_global_msg_list={30:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 43 procedures, 311 locations, 67 error locations. UNSAFE Result, 34.0s OverallTime, 33 OverallIterations, 16 TraceHistogramMax, 7.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3887 SDtfs, 878 SDslu, 33527 SDs, 0 SdLazy, 11483 SolverSat, 218 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1652 GetRequests, 1080 SyntacticMatches, 20 SemanticMatches, 552 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3544 ImplicationChecksByTransitivity, 5.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=171occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 32 MinimizatonAttempts, 108 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 21.1s SatisfiabilityAnalysisTime, 4.7s InterpolantComputationTime, 3274 NumberOfCodeBlocks, 3232 NumberOfCodeBlocksAsserted, 57 NumberOfCheckSat, 3115 ConstructedInterpolants, 164 QuantifiedInterpolants, 566107 SizeOfPredicates, 110 NumberOfNonLiveVariables, 5947 ConjunctsInSsa, 570 ConjunctsInUnsatCore, 47 InterpolantComputations, 23 PerfectInterpolantSequences, 400/1557 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-08 16:55:28,797 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 16:55:28,798 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 16:55:28,806 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 16:55:28,806 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 16:55:28,807 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 16:55:28,808 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 16:55:28,809 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 16:55:28,810 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 16:55:28,811 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 16:55:28,811 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 16:55:28,811 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 16:55:28,812 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 16:55:28,813 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 16:55:28,813 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 16:55:28,814 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 16:55:28,814 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 16:55:28,815 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 16:55:28,817 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 16:55:28,818 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 16:55:28,819 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 16:55:28,819 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 16:55:28,821 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 16:55:28,821 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 16:55:28,821 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 16:55:28,822 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 16:55:28,823 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 16:55:28,823 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 16:55:28,824 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 16:55:28,824 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 16:55:28,825 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 16:55:28,825 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 16:55:28,825 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 16:55:28,826 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 16:55:28,826 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 16:55:28,827 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 16:55:28,827 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf [2018-12-08 16:55:28,837 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 16:55:28,837 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 16:55:28,838 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 16:55:28,838 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 16:55:28,838 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-08 16:55:28,838 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-08 16:55:28,839 INFO L133 SettingsManager]: * Use SBE=true [2018-12-08 16:55:28,839 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 16:55:28,839 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-08 16:55:28,839 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-08 16:55:28,839 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-08 16:55:28,839 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-08 16:55:28,840 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 16:55:28,840 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-08 16:55:28,840 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-08 16:55:28,840 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-08 16:55:28,840 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 16:55:28,840 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-08 16:55:28,840 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-08 16:55:28,841 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-08 16:55:28,841 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-08 16:55:28,841 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 16:55:28,841 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 16:55:28,841 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 16:55:28,841 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 16:55:28,842 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 16:55:28,842 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 16:55:28,842 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 16:55:28,842 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-12-08 16:55:28,842 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 16:55:28,842 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-08 16:55:28,842 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4867b1d8e60a05de2199d52aa990071fe8bd647c [2018-12-08 16:55:28,864 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 16:55:28,873 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 16:55:28,876 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 16:55:28,877 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 16:55:28,877 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 16:55:28,878 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-08 16:55:28,922 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/data/ade459184/92e6bb0e39f24b1a88e6080182e728ac/FLAGc5e31f4f2 [2018-12-08 16:55:29,264 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 16:55:29,265 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-08 16:55:29,273 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/data/ade459184/92e6bb0e39f24b1a88e6080182e728ac/FLAGc5e31f4f2 [2018-12-08 16:55:29,281 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/data/ade459184/92e6bb0e39f24b1a88e6080182e728ac [2018-12-08 16:55:29,283 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 16:55:29,284 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-08 16:55:29,284 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 16:55:29,284 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 16:55:29,286 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 16:55:29,287 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 04:55:29" (1/1) ... [2018-12-08 16:55:29,289 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4096dacc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:55:29, skipping insertion in model container [2018-12-08 16:55:29,289 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 04:55:29" (1/1) ... [2018-12-08 16:55:29,293 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 16:55:29,317 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 16:55:29,511 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 16:55:29,523 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 16:55:29,589 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 16:55:29,621 INFO L195 MainTranslator]: Completed translation [2018-12-08 16:55:29,622 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:55:29 WrapperNode [2018-12-08 16:55:29,622 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 16:55:29,622 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 16:55:29,622 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 16:55:29,622 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 16:55:29,630 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:55:29" (1/1) ... [2018-12-08 16:55:29,630 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:55:29" (1/1) ... [2018-12-08 16:55:29,641 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:55:29" (1/1) ... [2018-12-08 16:55:29,641 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:55:29" (1/1) ... [2018-12-08 16:55:29,656 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:55:29" (1/1) ... [2018-12-08 16:55:29,659 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:55:29" (1/1) ... [2018-12-08 16:55:29,662 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:55:29" (1/1) ... [2018-12-08 16:55:29,666 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 16:55:29,666 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 16:55:29,666 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 16:55:29,666 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 16:55:29,667 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:55:29" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 16:55:29,697 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-08 16:55:29,697 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 16:55:29,697 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-08 16:55:29,697 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-12-08 16:55:29,697 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-12-08 16:55:29,697 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-12-08 16:55:29,698 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-12-08 16:55:29,698 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-08 16:55:29,698 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-08 16:55:29,698 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-08 16:55:29,698 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-12-08 16:55:29,698 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-12-08 16:55:29,698 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-12-08 16:55:29,698 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-12-08 16:55:29,698 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-12-08 16:55:29,698 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-12-08 16:55:29,698 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-12-08 16:55:29,699 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-12-08 16:55:29,699 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-12-08 16:55:29,699 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-12-08 16:55:29,699 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-08 16:55:29,699 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-08 16:55:29,699 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-08 16:55:29,699 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-08 16:55:29,699 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-08 16:55:29,699 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-08 16:55:29,699 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-08 16:55:29,699 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-08 16:55:29,699 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-12-08 16:55:29,700 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-08 16:55:29,700 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-08 16:55:29,700 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-08 16:55:29,700 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-08 16:55:29,700 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-08 16:55:29,700 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-08 16:55:29,700 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-08 16:55:29,700 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-12-08 16:55:29,700 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-12-08 16:55:29,700 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-08 16:55:29,700 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-08 16:55:29,700 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-08 16:55:29,700 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-08 16:55:29,701 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-12-08 16:55:29,701 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-12-08 16:55:29,702 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-12-08 16:55:29,703 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-12-08 16:55:29,703 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-12-08 16:55:29,703 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-12-08 16:55:29,703 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-12-08 16:55:29,703 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-12-08 16:55:29,703 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-12-08 16:55:29,703 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-12-08 16:55:29,703 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-12-08 16:55:29,703 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-12-08 16:55:29,703 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-12-08 16:55:29,703 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-12-08 16:55:29,703 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-12-08 16:55:29,703 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-12-08 16:55:29,704 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-12-08 16:55:29,705 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-12-08 16:55:29,706 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-08 16:55:29,707 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-12-08 16:55:29,708 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-08 16:55:29,709 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-08 16:55:29,710 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-08 16:55:29,710 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-08 16:55:29,710 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 16:55:29,710 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-12-08 16:55:29,710 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-12-08 16:55:29,710 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-12-08 16:55:29,710 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE4 [2018-12-08 16:55:29,962 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-08 16:55:30,207 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-08 16:55:30,403 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 16:55:30,403 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-08 16:55:30,404 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 04:55:30 BoogieIcfgContainer [2018-12-08 16:55:30,404 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 16:55:30,405 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 16:55:30,405 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 16:55:30,407 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 16:55:30,408 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 04:55:29" (1/3) ... [2018-12-08 16:55:30,408 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@43cd542b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 04:55:30, skipping insertion in model container [2018-12-08 16:55:30,408 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 04:55:29" (2/3) ... [2018-12-08 16:55:30,409 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@43cd542b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 04:55:30, skipping insertion in model container [2018-12-08 16:55:30,409 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 04:55:30" (3/3) ... [2018-12-08 16:55:30,410 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-08 16:55:30,419 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 16:55:30,426 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 67 error locations. [2018-12-08 16:55:30,438 INFO L257 AbstractCegarLoop]: Starting to check reachability of 67 error locations. [2018-12-08 16:55:30,455 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-08 16:55:30,455 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 16:55:30,456 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-08 16:55:30,456 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 16:55:30,456 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 16:55:30,456 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 16:55:30,456 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 16:55:30,456 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 16:55:30,456 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 16:55:30,466 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states. [2018-12-08 16:55:30,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 16:55:30,472 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:30,472 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:30,474 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:30,477 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:30,477 INFO L82 PathProgramCache]: Analyzing trace with hash 1655346548, now seen corresponding path program 1 times [2018-12-08 16:55:30,479 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:30,480 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:30,495 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:30,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:30,549 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:30,577 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:55:30,579 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:30,583 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:30,583 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 16:55:30,605 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:30,605 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:30,608 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:30,608 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 16:55:30,610 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 16:55:30,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 16:55:30,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:55:30,619 INFO L87 Difference]: Start difference. First operand 170 states. Second operand 5 states. [2018-12-08 16:55:30,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:30,843 INFO L93 Difference]: Finished difference Result 152 states and 163 transitions. [2018-12-08 16:55:30,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 16:55:30,844 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-08 16:55:30,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:30,852 INFO L225 Difference]: With dead ends: 152 [2018-12-08 16:55:30,852 INFO L226 Difference]: Without dead ends: 149 [2018-12-08 16:55:30,853 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:55:30,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-08 16:55:30,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 143. [2018-12-08 16:55:30,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-12-08 16:55:30,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 154 transitions. [2018-12-08 16:55:30,882 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 154 transitions. Word has length 17 [2018-12-08 16:55:30,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:30,882 INFO L480 AbstractCegarLoop]: Abstraction has 143 states and 154 transitions. [2018-12-08 16:55:30,882 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 16:55:30,882 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 154 transitions. [2018-12-08 16:55:30,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 16:55:30,883 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:30,883 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:30,883 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:30,883 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:30,883 INFO L82 PathProgramCache]: Analyzing trace with hash 1655346549, now seen corresponding path program 1 times [2018-12-08 16:55:30,884 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:30,884 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:30,899 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:30,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:30,934 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:30,944 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:55:30,944 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:30,951 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:30,951 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 16:55:30,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:30,987 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:30,988 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:30,988 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 16:55:30,989 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 16:55:30,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 16:55:30,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 16:55:30,989 INFO L87 Difference]: Start difference. First operand 143 states and 154 transitions. Second operand 6 states. [2018-12-08 16:55:31,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:31,219 INFO L93 Difference]: Finished difference Result 148 states and 159 transitions. [2018-12-08 16:55:31,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 16:55:31,220 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-08 16:55:31,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:31,221 INFO L225 Difference]: With dead ends: 148 [2018-12-08 16:55:31,221 INFO L226 Difference]: Without dead ends: 148 [2018-12-08 16:55:31,222 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-08 16:55:31,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-12-08 16:55:31,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 143. [2018-12-08 16:55:31,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-12-08 16:55:31,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 153 transitions. [2018-12-08 16:55:31,229 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 153 transitions. Word has length 17 [2018-12-08 16:55:31,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:31,230 INFO L480 AbstractCegarLoop]: Abstraction has 143 states and 153 transitions. [2018-12-08 16:55:31,230 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 16:55:31,230 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 153 transitions. [2018-12-08 16:55:31,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 16:55:31,230 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:31,230 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:31,230 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:31,231 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:31,231 INFO L82 PathProgramCache]: Analyzing trace with hash 1683975699, now seen corresponding path program 1 times [2018-12-08 16:55:31,231 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:31,231 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:31,246 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:31,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:31,274 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:31,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:31,309 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:31,310 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:31,310 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 16:55:31,310 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 16:55:31,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 16:55:31,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:55:31,311 INFO L87 Difference]: Start difference. First operand 143 states and 153 transitions. Second operand 5 states. [2018-12-08 16:55:31,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:31,329 INFO L93 Difference]: Finished difference Result 142 states and 150 transitions. [2018-12-08 16:55:31,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 16:55:31,330 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-08 16:55:31,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:31,330 INFO L225 Difference]: With dead ends: 142 [2018-12-08 16:55:31,331 INFO L226 Difference]: Without dead ends: 142 [2018-12-08 16:55:31,331 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:55:31,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-08 16:55:31,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 140. [2018-12-08 16:55:31,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-08 16:55:31,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 148 transitions. [2018-12-08 16:55:31,337 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 148 transitions. Word has length 17 [2018-12-08 16:55:31,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:31,337 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 148 transitions. [2018-12-08 16:55:31,337 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 16:55:31,338 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 148 transitions. [2018-12-08 16:55:31,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-08 16:55:31,338 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:31,338 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:31,338 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:31,339 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:31,339 INFO L82 PathProgramCache]: Analyzing trace with hash 1758022862, now seen corresponding path program 1 times [2018-12-08 16:55:31,339 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:31,339 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:31,353 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:31,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:31,383 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:31,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:31,415 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:31,417 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:31,417 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 16:55:31,417 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 16:55:31,417 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 16:55:31,417 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:55:31,417 INFO L87 Difference]: Start difference. First operand 140 states and 148 transitions. Second operand 5 states. [2018-12-08 16:55:31,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:31,435 INFO L93 Difference]: Finished difference Result 142 states and 149 transitions. [2018-12-08 16:55:31,435 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 16:55:31,435 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-12-08 16:55:31,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:31,436 INFO L225 Difference]: With dead ends: 142 [2018-12-08 16:55:31,436 INFO L226 Difference]: Without dead ends: 142 [2018-12-08 16:55:31,436 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:55:31,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-08 16:55:31,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 140. [2018-12-08 16:55:31,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-08 16:55:31,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 147 transitions. [2018-12-08 16:55:31,440 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 147 transitions. Word has length 27 [2018-12-08 16:55:31,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:31,441 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 147 transitions. [2018-12-08 16:55:31,441 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 16:55:31,441 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 147 transitions. [2018-12-08 16:55:31,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-08 16:55:31,441 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:31,441 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:31,441 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:31,442 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:31,442 INFO L82 PathProgramCache]: Analyzing trace with hash 1247488685, now seen corresponding path program 1 times [2018-12-08 16:55:31,442 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:31,442 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:31,463 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:31,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:31,522 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:31,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:31,567 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:31,568 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:31,569 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 16:55:31,569 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 16:55:31,569 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 16:55:31,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 16:55:31,569 INFO L87 Difference]: Start difference. First operand 140 states and 147 transitions. Second operand 7 states. [2018-12-08 16:55:31,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:31,605 INFO L93 Difference]: Finished difference Result 156 states and 164 transitions. [2018-12-08 16:55:31,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 16:55:31,605 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-12-08 16:55:31,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:31,607 INFO L225 Difference]: With dead ends: 156 [2018-12-08 16:55:31,607 INFO L226 Difference]: Without dead ends: 156 [2018-12-08 16:55:31,607 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 16:55:31,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-08 16:55:31,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 149. [2018-12-08 16:55:31,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-08 16:55:31,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 156 transitions. [2018-12-08 16:55:31,614 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 156 transitions. Word has length 27 [2018-12-08 16:55:31,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:31,615 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 156 transitions. [2018-12-08 16:55:31,615 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 16:55:31,615 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 156 transitions. [2018-12-08 16:55:31,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-08 16:55:31,615 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:31,616 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:31,616 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:31,616 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:31,616 INFO L82 PathProgramCache]: Analyzing trace with hash -858274277, now seen corresponding path program 1 times [2018-12-08 16:55:31,617 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:31,617 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:31,631 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:31,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:31,688 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:31,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:31,699 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:31,700 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:31,700 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 16:55:31,700 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 16:55:31,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 16:55:31,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 16:55:31,701 INFO L87 Difference]: Start difference. First operand 149 states and 156 transitions. Second operand 4 states. [2018-12-08 16:55:31,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:31,732 INFO L93 Difference]: Finished difference Result 152 states and 159 transitions. [2018-12-08 16:55:31,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 16:55:31,732 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-08 16:55:31,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:31,733 INFO L225 Difference]: With dead ends: 152 [2018-12-08 16:55:31,733 INFO L226 Difference]: Without dead ends: 150 [2018-12-08 16:55:31,733 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 16:55:31,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-08 16:55:31,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-08 16:55:31,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-08 16:55:31,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-08 16:55:31,738 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 32 [2018-12-08 16:55:31,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:31,738 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-08 16:55:31,739 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 16:55:31,739 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-08 16:55:31,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-08 16:55:31,739 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:31,739 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:31,740 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:31,740 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:31,740 INFO L82 PathProgramCache]: Analyzing trace with hash -608271994, now seen corresponding path program 1 times [2018-12-08 16:55:31,740 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:31,740 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:31,755 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:31,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:31,827 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:31,854 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:31,854 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 16:55:31,906 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:31,908 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 16:55:31,908 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-12-08 16:55:31,908 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 16:55:31,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 16:55:31,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-08 16:55:31,908 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 8 states. [2018-12-08 16:55:31,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:31,998 INFO L93 Difference]: Finished difference Result 157 states and 165 transitions. [2018-12-08 16:55:31,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 16:55:31,998 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2018-12-08 16:55:31,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:31,999 INFO L225 Difference]: With dead ends: 157 [2018-12-08 16:55:31,999 INFO L226 Difference]: Without dead ends: 153 [2018-12-08 16:55:31,999 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 58 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-12-08 16:55:32,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-12-08 16:55:32,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 153. [2018-12-08 16:55:32,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-12-08 16:55:32,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 160 transitions. [2018-12-08 16:55:32,004 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 160 transitions. Word has length 33 [2018-12-08 16:55:32,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:32,004 INFO L480 AbstractCegarLoop]: Abstraction has 153 states and 160 transitions. [2018-12-08 16:55:32,004 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 16:55:32,004 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 160 transitions. [2018-12-08 16:55:32,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-08 16:55:32,005 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:32,005 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:32,005 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:32,005 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:32,005 INFO L82 PathProgramCache]: Analyzing trace with hash 885785874, now seen corresponding path program 1 times [2018-12-08 16:55:32,006 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:32,006 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:32,019 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:32,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:32,074 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:32,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:32,113 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:32,115 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:32,115 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 16:55:32,116 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 16:55:32,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 16:55:32,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 16:55:32,116 INFO L87 Difference]: Start difference. First operand 153 states and 160 transitions. Second operand 7 states. [2018-12-08 16:55:32,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:32,142 INFO L93 Difference]: Finished difference Result 163 states and 170 transitions. [2018-12-08 16:55:32,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 16:55:32,143 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-12-08 16:55:32,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:32,144 INFO L225 Difference]: With dead ends: 163 [2018-12-08 16:55:32,144 INFO L226 Difference]: Without dead ends: 163 [2018-12-08 16:55:32,144 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 16:55:32,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-12-08 16:55:32,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 159. [2018-12-08 16:55:32,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-08 16:55:32,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 166 transitions. [2018-12-08 16:55:32,149 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 166 transitions. Word has length 36 [2018-12-08 16:55:32,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:32,149 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 166 transitions. [2018-12-08 16:55:32,149 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 16:55:32,149 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 166 transitions. [2018-12-08 16:55:32,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-08 16:55:32,150 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:32,150 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:32,151 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:32,151 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:32,151 INFO L82 PathProgramCache]: Analyzing trace with hash -1369388837, now seen corresponding path program 2 times [2018-12-08 16:55:32,151 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:32,151 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:32,166 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 16:55:32,215 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-08 16:55:32,216 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 16:55:32,218 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:32,220 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:55:32,220 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:32,222 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:32,222 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 16:55:32,318 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 16:55:32,318 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:32,319 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:32,320 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 16:55:32,320 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 16:55:32,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 16:55:32,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-12-08 16:55:32,320 INFO L87 Difference]: Start difference. First operand 159 states and 166 transitions. Second operand 13 states. [2018-12-08 16:55:33,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:33,277 INFO L93 Difference]: Finished difference Result 170 states and 176 transitions. [2018-12-08 16:55:33,277 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 16:55:33,277 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 36 [2018-12-08 16:55:33,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:33,279 INFO L225 Difference]: With dead ends: 170 [2018-12-08 16:55:33,279 INFO L226 Difference]: Without dead ends: 170 [2018-12-08 16:55:33,280 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-12-08 16:55:33,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-12-08 16:55:33,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 158. [2018-12-08 16:55:33,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-12-08 16:55:33,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 165 transitions. [2018-12-08 16:55:33,286 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 165 transitions. Word has length 36 [2018-12-08 16:55:33,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:33,287 INFO L480 AbstractCegarLoop]: Abstraction has 158 states and 165 transitions. [2018-12-08 16:55:33,287 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 16:55:33,287 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 165 transitions. [2018-12-08 16:55:33,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-08 16:55:33,288 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:33,288 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:33,289 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:33,289 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:33,289 INFO L82 PathProgramCache]: Analyzing trace with hash -1369388836, now seen corresponding path program 1 times [2018-12-08 16:55:33,290 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:33,290 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:33,319 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 16:55:33,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:33,433 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:33,460 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:33,460 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 16:55:33,601 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:33,604 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 16:55:33,604 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2018-12-08 16:55:33,605 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-08 16:55:33,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-08 16:55:33,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-12-08 16:55:33,605 INFO L87 Difference]: Start difference. First operand 158 states and 165 transitions. Second operand 14 states. [2018-12-08 16:55:34,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:34,170 INFO L93 Difference]: Finished difference Result 168 states and 179 transitions. [2018-12-08 16:55:34,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-08 16:55:34,170 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 36 [2018-12-08 16:55:34,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:34,171 INFO L225 Difference]: With dead ends: 168 [2018-12-08 16:55:34,171 INFO L226 Difference]: Without dead ends: 164 [2018-12-08 16:55:34,172 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 58 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=131, Invalid=211, Unknown=0, NotChecked=0, Total=342 [2018-12-08 16:55:34,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-12-08 16:55:34,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-12-08 16:55:34,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-12-08 16:55:34,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 171 transitions. [2018-12-08 16:55:34,178 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 171 transitions. Word has length 36 [2018-12-08 16:55:34,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:34,178 INFO L480 AbstractCegarLoop]: Abstraction has 164 states and 171 transitions. [2018-12-08 16:55:34,178 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-08 16:55:34,178 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 171 transitions. [2018-12-08 16:55:34,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-08 16:55:34,179 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:34,179 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:34,179 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:34,179 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:34,180 INFO L82 PathProgramCache]: Analyzing trace with hash 124691458, now seen corresponding path program 1 times [2018-12-08 16:55:34,180 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:34,180 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:34,196 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:34,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:34,219 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:34,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:34,227 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:34,229 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:34,229 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 16:55:34,229 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 16:55:34,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 16:55:34,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 16:55:34,229 INFO L87 Difference]: Start difference. First operand 164 states and 171 transitions. Second operand 3 states. [2018-12-08 16:55:34,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:34,332 INFO L93 Difference]: Finished difference Result 175 states and 181 transitions. [2018-12-08 16:55:34,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 16:55:34,332 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-12-08 16:55:34,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:34,333 INFO L225 Difference]: With dead ends: 175 [2018-12-08 16:55:34,333 INFO L226 Difference]: Without dead ends: 153 [2018-12-08 16:55:34,333 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 16:55:34,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-12-08 16:55:34,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 145. [2018-12-08 16:55:34,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-12-08 16:55:34,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 151 transitions. [2018-12-08 16:55:34,335 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 151 transitions. Word has length 34 [2018-12-08 16:55:34,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:34,336 INFO L480 AbstractCegarLoop]: Abstraction has 145 states and 151 transitions. [2018-12-08 16:55:34,336 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 16:55:34,336 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 151 transitions. [2018-12-08 16:55:34,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 16:55:34,336 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:34,336 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:34,336 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:34,336 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:34,337 INFO L82 PathProgramCache]: Analyzing trace with hash -1662093060, now seen corresponding path program 2 times [2018-12-08 16:55:34,337 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:34,337 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:34,351 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 16:55:34,400 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-08 16:55:34,400 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 16:55:34,402 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:34,408 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:55:34,408 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:34,412 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:34,413 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 16:55:34,560 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-12-08 16:55:34,560 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:34,562 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:34,562 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 16:55:34,562 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 16:55:34,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 16:55:34,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-12-08 16:55:34,562 INFO L87 Difference]: Start difference. First operand 145 states and 151 transitions. Second operand 13 states. [2018-12-08 16:55:35,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:35,627 INFO L93 Difference]: Finished difference Result 144 states and 150 transitions. [2018-12-08 16:55:35,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 16:55:35,628 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 42 [2018-12-08 16:55:35,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:35,628 INFO L225 Difference]: With dead ends: 144 [2018-12-08 16:55:35,628 INFO L226 Difference]: Without dead ends: 144 [2018-12-08 16:55:35,629 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2018-12-08 16:55:35,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-12-08 16:55:35,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-12-08 16:55:35,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 16:55:35,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 150 transitions. [2018-12-08 16:55:35,631 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 150 transitions. Word has length 42 [2018-12-08 16:55:35,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:35,631 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 150 transitions. [2018-12-08 16:55:35,632 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 16:55:35,632 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 150 transitions. [2018-12-08 16:55:35,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-08 16:55:35,632 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:35,632 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:35,632 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:35,632 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:35,633 INFO L82 PathProgramCache]: Analyzing trace with hash -1164712948, now seen corresponding path program 1 times [2018-12-08 16:55:35,633 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:35,633 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:35,653 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 16:55:35,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:35,744 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:35,815 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:35,815 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 16:55:36,232 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:55:36,234 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 16:55:36,234 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 26 [2018-12-08 16:55:36,234 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-08 16:55:36,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-08 16:55:36,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=178, Invalid=472, Unknown=0, NotChecked=0, Total=650 [2018-12-08 16:55:36,235 INFO L87 Difference]: Start difference. First operand 144 states and 150 transitions. Second operand 26 states. [2018-12-08 16:55:37,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:37,284 INFO L93 Difference]: Finished difference Result 154 states and 164 transitions. [2018-12-08 16:55:37,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-08 16:55:37,284 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 47 [2018-12-08 16:55:37,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:37,285 INFO L225 Difference]: With dead ends: 154 [2018-12-08 16:55:37,285 INFO L226 Difference]: Without dead ends: 150 [2018-12-08 16:55:37,285 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 68 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=278, Invalid=652, Unknown=0, NotChecked=0, Total=930 [2018-12-08 16:55:37,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-08 16:55:37,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-08 16:55:37,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-08 16:55:37,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 156 transitions. [2018-12-08 16:55:37,287 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 156 transitions. Word has length 47 [2018-12-08 16:55:37,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:37,287 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 156 transitions. [2018-12-08 16:55:37,287 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-08 16:55:37,287 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 156 transitions. [2018-12-08 16:55:37,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-08 16:55:37,288 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:37,288 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:37,288 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:37,288 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:37,288 INFO L82 PathProgramCache]: Analyzing trace with hash 969727980, now seen corresponding path program 2 times [2018-12-08 16:55:37,288 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:37,288 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:37,305 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 16:55:37,365 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-08 16:55:37,365 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 16:55:37,367 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:37,370 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:55:37,370 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:37,371 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:37,371 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 16:55:37,476 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 16:55:37,476 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:37,478 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:37,478 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 16:55:37,478 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 16:55:37,478 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 16:55:37,478 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-12-08 16:55:37,478 INFO L87 Difference]: Start difference. First operand 150 states and 156 transitions. Second operand 13 states. [2018-12-08 16:55:38,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:38,285 INFO L93 Difference]: Finished difference Result 160 states and 165 transitions. [2018-12-08 16:55:38,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 16:55:38,286 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 53 [2018-12-08 16:55:38,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:38,286 INFO L225 Difference]: With dead ends: 160 [2018-12-08 16:55:38,286 INFO L226 Difference]: Without dead ends: 160 [2018-12-08 16:55:38,287 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-12-08 16:55:38,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-08 16:55:38,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 148. [2018-12-08 16:55:38,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-08 16:55:38,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 154 transitions. [2018-12-08 16:55:38,289 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 154 transitions. Word has length 53 [2018-12-08 16:55:38,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:38,289 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 154 transitions. [2018-12-08 16:55:38,289 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 16:55:38,289 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 154 transitions. [2018-12-08 16:55:38,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-08 16:55:38,289 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:38,289 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:38,289 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:38,290 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:38,290 INFO L82 PathProgramCache]: Analyzing trace with hash 969727981, now seen corresponding path program 1 times [2018-12-08 16:55:38,290 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:38,290 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:38,304 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 16:55:38,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:38,465 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:38,473 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:55:38,473 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:38,478 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:38,478 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 16:55:38,630 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 16:55:38,631 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:38,633 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:38,633 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 16:55:38,633 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 16:55:38,634 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 16:55:38,634 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-12-08 16:55:38,634 INFO L87 Difference]: Start difference. First operand 148 states and 154 transitions. Second operand 13 states. [2018-12-08 16:55:39,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:39,420 INFO L93 Difference]: Finished difference Result 146 states and 152 transitions. [2018-12-08 16:55:39,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 16:55:39,420 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 53 [2018-12-08 16:55:39,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:39,421 INFO L225 Difference]: With dead ends: 146 [2018-12-08 16:55:39,421 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 16:55:39,421 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2018-12-08 16:55:39,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 16:55:39,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-08 16:55:39,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-08 16:55:39,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 152 transitions. [2018-12-08 16:55:39,424 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 152 transitions. Word has length 53 [2018-12-08 16:55:39,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:39,424 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 152 transitions. [2018-12-08 16:55:39,424 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 16:55:39,424 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 152 transitions. [2018-12-08 16:55:39,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-12-08 16:55:39,424 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:39,425 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:39,425 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:39,425 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:39,425 INFO L82 PathProgramCache]: Analyzing trace with hash -1108493563, now seen corresponding path program 1 times [2018-12-08 16:55:39,425 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:39,425 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:39,442 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:39,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:39,491 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:39,515 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 16:55:39,515 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:39,516 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:39,517 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 16:55:39,517 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 16:55:39,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 16:55:39,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 16:55:39,517 INFO L87 Difference]: Start difference. First operand 146 states and 152 transitions. Second operand 7 states. [2018-12-08 16:55:39,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:39,547 INFO L93 Difference]: Finished difference Result 148 states and 153 transitions. [2018-12-08 16:55:39,548 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 16:55:39,548 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 56 [2018-12-08 16:55:39,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:39,548 INFO L225 Difference]: With dead ends: 148 [2018-12-08 16:55:39,548 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 16:55:39,549 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 16:55:39,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 16:55:39,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-08 16:55:39,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-08 16:55:39,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 151 transitions. [2018-12-08 16:55:39,551 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 151 transitions. Word has length 56 [2018-12-08 16:55:39,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:39,551 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 151 transitions. [2018-12-08 16:55:39,551 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 16:55:39,551 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 151 transitions. [2018-12-08 16:55:39,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-08 16:55:39,552 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:39,552 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:39,552 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:39,553 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:39,553 INFO L82 PathProgramCache]: Analyzing trace with hash 128711114, now seen corresponding path program 1 times [2018-12-08 16:55:39,553 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:39,553 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:39,567 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:39,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:39,617 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:39,654 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 16:55:39,654 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:39,656 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:39,656 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-08 16:55:39,656 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 16:55:39,657 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 16:55:39,657 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 16:55:39,657 INFO L87 Difference]: Start difference. First operand 146 states and 151 transitions. Second operand 9 states. [2018-12-08 16:55:39,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:39,723 INFO L93 Difference]: Finished difference Result 150 states and 154 transitions. [2018-12-08 16:55:39,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 16:55:39,723 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 61 [2018-12-08 16:55:39,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:39,724 INFO L225 Difference]: With dead ends: 150 [2018-12-08 16:55:39,724 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 16:55:39,724 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-08 16:55:39,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 16:55:39,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-08 16:55:39,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-08 16:55:39,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 150 transitions. [2018-12-08 16:55:39,726 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 150 transitions. Word has length 61 [2018-12-08 16:55:39,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:39,726 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 150 transitions. [2018-12-08 16:55:39,726 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 16:55:39,726 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 150 transitions. [2018-12-08 16:55:39,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-08 16:55:39,727 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:39,727 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:39,727 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:39,727 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:39,727 INFO L82 PathProgramCache]: Analyzing trace with hash -489606087, now seen corresponding path program 1 times [2018-12-08 16:55:39,727 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:39,727 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:39,750 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:39,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:39,901 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:39,904 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:55:39,904 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:39,905 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:39,905 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 16:55:40,108 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 16:55:40,108 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:40,110 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:40,110 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-12-08 16:55:40,110 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-08 16:55:40,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-08 16:55:40,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2018-12-08 16:55:40,111 INFO L87 Difference]: Start difference. First operand 146 states and 150 transitions. Second operand 18 states. [2018-12-08 16:55:41,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:41,476 INFO L93 Difference]: Finished difference Result 156 states and 159 transitions. [2018-12-08 16:55:41,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-08 16:55:41,476 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2018-12-08 16:55:41,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:41,477 INFO L225 Difference]: With dead ends: 156 [2018-12-08 16:55:41,477 INFO L226 Difference]: Without dead ends: 156 [2018-12-08 16:55:41,477 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=68, Invalid=394, Unknown=0, NotChecked=0, Total=462 [2018-12-08 16:55:41,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-08 16:55:41,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 144. [2018-12-08 16:55:41,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 16:55:41,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 148 transitions. [2018-12-08 16:55:41,479 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 148 transitions. Word has length 72 [2018-12-08 16:55:41,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:41,479 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 148 transitions. [2018-12-08 16:55:41,479 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-08 16:55:41,479 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 148 transitions. [2018-12-08 16:55:41,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-08 16:55:41,480 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:41,480 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:41,480 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:41,480 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:41,480 INFO L82 PathProgramCache]: Analyzing trace with hash -489606086, now seen corresponding path program 1 times [2018-12-08 16:55:41,480 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:41,480 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:41,495 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:41,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:41,695 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:41,701 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:55:41,701 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:41,705 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:41,706 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 16:55:41,983 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 16:55:41,983 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:41,985 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:41,986 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-12-08 16:55:41,986 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-08 16:55:41,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-08 16:55:41,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=260, Unknown=0, NotChecked=0, Total=306 [2018-12-08 16:55:41,986 INFO L87 Difference]: Start difference. First operand 144 states and 148 transitions. Second operand 18 states. [2018-12-08 16:55:43,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:43,259 INFO L93 Difference]: Finished difference Result 142 states and 146 transitions. [2018-12-08 16:55:43,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-08 16:55:43,260 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2018-12-08 16:55:43,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:43,260 INFO L225 Difference]: With dead ends: 142 [2018-12-08 16:55:43,260 INFO L226 Difference]: Without dead ends: 142 [2018-12-08 16:55:43,260 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=70, Invalid=436, Unknown=0, NotChecked=0, Total=506 [2018-12-08 16:55:43,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-08 16:55:43,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-08 16:55:43,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-08 16:55:43,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 146 transitions. [2018-12-08 16:55:43,263 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 146 transitions. Word has length 72 [2018-12-08 16:55:43,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:43,264 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 146 transitions. [2018-12-08 16:55:43,264 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-08 16:55:43,264 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 146 transitions. [2018-12-08 16:55:43,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-08 16:55:43,265 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:43,265 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:43,265 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:43,265 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:43,265 INFO L82 PathProgramCache]: Analyzing trace with hash -298190586, now seen corresponding path program 1 times [2018-12-08 16:55:43,265 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:43,266 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:43,288 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:43,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:43,356 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:43,397 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 16:55:43,397 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:43,398 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:43,398 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 16:55:43,399 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 16:55:43,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 16:55:43,399 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-08 16:55:43,399 INFO L87 Difference]: Start difference. First operand 142 states and 146 transitions. Second operand 10 states. [2018-12-08 16:55:43,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:43,472 INFO L93 Difference]: Finished difference Result 145 states and 148 transitions. [2018-12-08 16:55:43,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 16:55:43,473 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 81 [2018-12-08 16:55:43,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:43,473 INFO L225 Difference]: With dead ends: 145 [2018-12-08 16:55:43,474 INFO L226 Difference]: Without dead ends: 142 [2018-12-08 16:55:43,474 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-08 16:55:43,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-08 16:55:43,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-08 16:55:43,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-08 16:55:43,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 145 transitions. [2018-12-08 16:55:43,476 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 145 transitions. Word has length 81 [2018-12-08 16:55:43,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:43,476 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 145 transitions. [2018-12-08 16:55:43,476 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 16:55:43,476 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 145 transitions. [2018-12-08 16:55:43,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-08 16:55:43,477 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:43,477 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:43,477 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:43,477 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:43,477 INFO L82 PathProgramCache]: Analyzing trace with hash 240813275, now seen corresponding path program 1 times [2018-12-08 16:55:43,478 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:43,478 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:43,492 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:43,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:43,675 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:43,677 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:55:43,677 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:43,679 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:43,679 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 16:55:43,956 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 16:55:43,956 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:43,959 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:43,959 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-08 16:55:43,960 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 16:55:43,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 16:55:43,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-12-08 16:55:43,960 INFO L87 Difference]: Start difference. First operand 142 states and 145 transitions. Second operand 20 states. [2018-12-08 16:55:45,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:45,483 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2018-12-08 16:55:45,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-08 16:55:45,483 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 94 [2018-12-08 16:55:45,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:45,484 INFO L225 Difference]: With dead ends: 156 [2018-12-08 16:55:45,485 INFO L226 Difference]: Without dead ends: 156 [2018-12-08 16:55:45,485 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 70 SyntacticMatches, 5 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=79, Invalid=521, Unknown=0, NotChecked=0, Total=600 [2018-12-08 16:55:45,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-08 16:55:45,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 140. [2018-12-08 16:55:45,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-08 16:55:45,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 143 transitions. [2018-12-08 16:55:45,488 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 143 transitions. Word has length 94 [2018-12-08 16:55:45,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:45,488 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 143 transitions. [2018-12-08 16:55:45,488 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 16:55:45,488 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 143 transitions. [2018-12-08 16:55:45,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-08 16:55:45,489 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:45,489 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:45,490 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:45,490 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:45,490 INFO L82 PathProgramCache]: Analyzing trace with hash 240813276, now seen corresponding path program 1 times [2018-12-08 16:55:45,490 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:45,490 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:45,526 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:45,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:45,774 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:45,781 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:55:45,781 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:45,785 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:45,785 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 16:55:46,165 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 16:55:46,165 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:46,168 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:46,169 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-08 16:55:46,169 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 16:55:46,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 16:55:46,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2018-12-08 16:55:46,169 INFO L87 Difference]: Start difference. First operand 140 states and 143 transitions. Second operand 20 states. [2018-12-08 16:55:47,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:47,640 INFO L93 Difference]: Finished difference Result 138 states and 141 transitions. [2018-12-08 16:55:47,640 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-08 16:55:47,640 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 94 [2018-12-08 16:55:47,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:47,641 INFO L225 Difference]: With dead ends: 138 [2018-12-08 16:55:47,641 INFO L226 Difference]: Without dead ends: 138 [2018-12-08 16:55:47,641 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 70 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=81, Invalid=569, Unknown=0, NotChecked=0, Total=650 [2018-12-08 16:55:47,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-08 16:55:47,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-08 16:55:47,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-08 16:55:47,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 141 transitions. [2018-12-08 16:55:47,643 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 141 transitions. Word has length 94 [2018-12-08 16:55:47,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:47,643 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 141 transitions. [2018-12-08 16:55:47,643 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 16:55:47,643 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 141 transitions. [2018-12-08 16:55:47,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-08 16:55:47,643 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:47,644 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:47,644 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:47,644 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:47,644 INFO L82 PathProgramCache]: Analyzing trace with hash 217874955, now seen corresponding path program 1 times [2018-12-08 16:55:47,644 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:47,644 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:47,659 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:47,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:47,724 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:47,768 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 16:55:47,768 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:47,769 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:47,769 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 16:55:47,770 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 16:55:47,770 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 16:55:47,770 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-08 16:55:47,770 INFO L87 Difference]: Start difference. First operand 138 states and 141 transitions. Second operand 10 states. [2018-12-08 16:55:47,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:47,819 INFO L93 Difference]: Finished difference Result 140 states and 142 transitions. [2018-12-08 16:55:47,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 16:55:47,819 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 92 [2018-12-08 16:55:47,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:47,820 INFO L225 Difference]: With dead ends: 140 [2018-12-08 16:55:47,820 INFO L226 Difference]: Without dead ends: 138 [2018-12-08 16:55:47,820 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-08 16:55:47,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-08 16:55:47,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-08 16:55:47,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-08 16:55:47,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 140 transitions. [2018-12-08 16:55:47,821 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 140 transitions. Word has length 92 [2018-12-08 16:55:47,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:47,821 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 140 transitions. [2018-12-08 16:55:47,822 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 16:55:47,822 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 140 transitions. [2018-12-08 16:55:47,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-12-08 16:55:47,822 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:47,822 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:47,822 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:47,822 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:47,822 INFO L82 PathProgramCache]: Analyzing trace with hash -220146983, now seen corresponding path program 1 times [2018-12-08 16:55:47,823 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:47,823 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:47,836 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:48,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:48,056 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:48,059 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:55:48,059 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:48,061 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:48,061 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 16:55:48,470 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 16:55:48,470 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:48,473 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:48,473 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-08 16:55:48,473 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 16:55:48,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 16:55:48,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=486, Unknown=0, NotChecked=0, Total=552 [2018-12-08 16:55:48,474 INFO L87 Difference]: Start difference. First operand 138 states and 140 transitions. Second operand 24 states. [2018-12-08 16:55:50,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:50,514 INFO L93 Difference]: Finished difference Result 148 states and 149 transitions. [2018-12-08 16:55:50,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-08 16:55:50,514 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-12-08 16:55:50,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:50,515 INFO L225 Difference]: With dead ends: 148 [2018-12-08 16:55:50,515 INFO L226 Difference]: Without dead ends: 148 [2018-12-08 16:55:50,515 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 77 SyntacticMatches, 7 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=101, Invalid=829, Unknown=0, NotChecked=0, Total=930 [2018-12-08 16:55:50,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-12-08 16:55:50,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 136. [2018-12-08 16:55:50,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-08 16:55:50,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 138 transitions. [2018-12-08 16:55:50,517 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 138 transitions. Word has length 107 [2018-12-08 16:55:50,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:50,517 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 138 transitions. [2018-12-08 16:55:50,517 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 16:55:50,517 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 138 transitions. [2018-12-08 16:55:50,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-12-08 16:55:50,517 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:50,517 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:50,518 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:50,518 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:50,518 INFO L82 PathProgramCache]: Analyzing trace with hash -220146982, now seen corresponding path program 1 times [2018-12-08 16:55:50,518 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:50,518 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:50,532 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:50,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:50,839 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:50,854 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 16:55:50,854 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:50,861 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:50,862 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 16:55:51,365 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 16:55:51,365 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:55:51,369 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 16:55:51,369 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-08 16:55:51,369 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 16:55:51,369 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 16:55:51,369 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=488, Unknown=0, NotChecked=0, Total=552 [2018-12-08 16:55:51,369 INFO L87 Difference]: Start difference. First operand 136 states and 138 transitions. Second operand 24 states. [2018-12-08 16:55:53,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:55:53,263 INFO L93 Difference]: Finished difference Result 134 states and 136 transitions. [2018-12-08 16:55:53,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-08 16:55:53,264 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-12-08 16:55:53,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:55:53,264 INFO L225 Difference]: With dead ends: 134 [2018-12-08 16:55:53,265 INFO L226 Difference]: Without dead ends: 134 [2018-12-08 16:55:53,265 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 77 SyntacticMatches, 7 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=103, Invalid=889, Unknown=0, NotChecked=0, Total=992 [2018-12-08 16:55:53,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-08 16:55:53,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-08 16:55:53,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-08 16:55:53,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-12-08 16:55:53,267 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 107 [2018-12-08 16:55:53,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:55:53,267 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-12-08 16:55:53,267 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 16:55:53,267 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-12-08 16:55:53,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-08 16:55:53,268 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:55:53,268 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:55:53,268 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:55:53,268 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:55:53,268 INFO L82 PathProgramCache]: Analyzing trace with hash -1296614760, now seen corresponding path program 1 times [2018-12-08 16:55:53,269 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:55:53,269 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:55:53,287 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:55:53,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:55:53,670 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:55:53,691 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-08 16:55:53,693 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-08 16:55:53,693 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:53,695 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:53,699 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:53,700 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-12-08 16:55:53,717 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-12-08 16:55:53,721 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,722 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-12-08 16:55:53,722 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:53,731 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:53,741 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:53,741 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-12-08 16:55:53,771 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-12-08 16:55:53,775 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,778 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,778 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-12-08 16:55:53,778 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:53,793 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:53,806 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:53,806 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:35 [2018-12-08 16:55:53,846 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-12-08 16:55:53,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,859 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-12-08 16:55:53,859 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:53,887 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:53,908 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:53,908 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:46 [2018-12-08 16:55:53,969 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-12-08 16:55:53,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,976 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,978 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,982 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,991 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:53,992 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-12-08 16:55:53,993 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:54,041 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:54,070 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:54,070 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:57 [2018-12-08 16:55:54,151 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-12-08 16:55:54,157 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,159 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,160 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,169 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,176 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,179 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,182 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-12-08 16:55:54,183 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:54,263 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:54,300 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:54,300 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:68 [2018-12-08 16:55:54,393 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-12-08 16:55:54,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,441 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-12-08 16:55:54,441 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:54,547 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:54,593 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:54,593 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:83, output treesize:79 [2018-12-08 16:55:54,714 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-12-08 16:55:54,722 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,727 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,729 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,731 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,733 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,736 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,738 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,742 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,744 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,746 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,750 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,752 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,757 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,759 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,762 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,768 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,770 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,775 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,777 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:54,783 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-12-08 16:55:54,784 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:54,934 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:54,990 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:54,991 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:94, output treesize:90 [2018-12-08 16:55:55,130 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-12-08 16:55:55,137 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,140 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,142 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,147 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,160 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,168 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,176 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,179 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,186 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,188 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,190 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,205 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,207 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,216 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-12-08 16:55:55,216 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:55,428 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:55,494 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:55,495 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:105, output treesize:101 [2018-12-08 16:55:55,665 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-12-08 16:55:55,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,677 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,679 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,682 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,690 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,693 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,698 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,701 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,703 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,706 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,709 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,712 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,715 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,720 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,722 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,727 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,735 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,737 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,742 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,750 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,752 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,757 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,760 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,762 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,768 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,771 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,778 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,781 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,783 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,786 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:55,789 INFO L303 Elim1Store]: Index analysis took 122 ms [2018-12-08 16:55:55,790 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-12-08 16:55:55,791 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:56,081 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:56,157 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:56,157 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:116, output treesize:112 [2018-12-08 16:55:56,353 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 101 [2018-12-08 16:55:56,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,365 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,377 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,380 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,385 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,407 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,426 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,437 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,448 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,480 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,483 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,486 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,491 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,497 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,499 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,508 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,510 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:56,511 INFO L303 Elim1Store]: Index analysis took 157 ms [2018-12-08 16:55:56,512 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 540 [2018-12-08 16:55:56,513 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:56,862 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:56,948 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:56,949 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:127, output treesize:123 [2018-12-08 16:55:57,172 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 110 [2018-12-08 16:55:57,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,188 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,215 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,221 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,224 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,227 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,233 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,236 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,239 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,242 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,245 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,248 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,251 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,254 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,263 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,266 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,269 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,272 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,278 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,281 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,293 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,296 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,301 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,304 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,311 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,314 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,317 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,324 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,331 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,340 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,349 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,353 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,356 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,369 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,375 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:57,382 INFO L303 Elim1Store]: Index analysis took 208 ms [2018-12-08 16:55:57,383 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 66 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 637 [2018-12-08 16:55:57,384 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:57,849 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:57,956 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:57,956 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:138, output treesize:134 [2018-12-08 16:55:58,192 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 57 [2018-12-08 16:55:58,212 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-12-08 16:55:58,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,226 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,229 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,236 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,239 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,242 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,245 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,248 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,255 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,264 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,267 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,270 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,277 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,280 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,293 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,296 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,302 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,309 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,312 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,315 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,324 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,340 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,358 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,375 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,387 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,403 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,413 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:58,471 INFO L303 Elim1Store]: Index analysis took 257 ms [2018-12-08 16:55:58,472 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 78 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 742 [2018-12-08 16:55:58,473 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:55:59,067 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:59,183 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:55:59,183 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:149, output treesize:145 [2018-12-08 16:55:59,444 WARN L180 SmtUtils]: Spent 113.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2018-12-08 16:55:59,480 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 128 [2018-12-08 16:55:59,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,528 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,534 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,544 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,568 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,586 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,627 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,684 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,694 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,708 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,721 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,731 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,741 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,767 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,785 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,816 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,825 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,915 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,964 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,976 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:55:59,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,000 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,018 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,028 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,042 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,050 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,070 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,088 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,095 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,116 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,128 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,159 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,219 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,231 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,244 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,276 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,298 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,312 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,326 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,433 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,473 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,487 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,500 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:00,501 INFO L303 Elim1Store]: Index analysis took 1019 ms [2018-12-08 16:56:00,502 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 91 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 855 [2018-12-08 16:56:00,503 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:56:01,168 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:01,313 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:01,313 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:160, output treesize:156 [2018-12-08 16:56:01,632 WARN L180 SmtUtils]: Spent 140.00 ms on a formula simplification that was a NOOP. DAG size: 65 [2018-12-08 16:56:01,657 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 137 [2018-12-08 16:56:01,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,676 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,679 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,683 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,693 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,696 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,699 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,703 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,706 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,709 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,713 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,716 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,720 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,723 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,727 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,734 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,737 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,741 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,751 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,759 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,762 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,769 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,783 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,787 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,794 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,798 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,808 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,812 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,815 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,840 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,864 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,891 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,902 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,953 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,957 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,960 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,964 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,977 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,981 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,991 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:01,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:02,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:02,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:02,008 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:02,012 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:02,015 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:02,018 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:02,022 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:02,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:02,029 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:02,030 INFO L303 Elim1Store]: Index analysis took 371 ms [2018-12-08 16:56:02,031 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 105 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 976 [2018-12-08 16:56:02,032 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:56:02,871 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:03,034 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:03,034 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:171, output treesize:167 [2018-12-08 16:56:03,393 WARN L180 SmtUtils]: Spent 162.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2018-12-08 16:56:03,440 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 179 treesize of output 146 [2018-12-08 16:56:03,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,486 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,503 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,533 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,548 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,605 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,680 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,704 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,720 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,728 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,803 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,832 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,877 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,894 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:03,996 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,024 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,038 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,052 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,068 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,085 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,101 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,117 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,131 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,147 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,205 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,220 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,234 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,266 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,279 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,296 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,326 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,369 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,455 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,487 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,503 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,515 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,528 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,545 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,557 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,572 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,679 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,696 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,711 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,722 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,733 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,763 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,814 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,831 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,859 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,884 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,978 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:04,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:05,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:05,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:05,029 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:05,045 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:05,057 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:05,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:05,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:05,083 INFO L303 Elim1Store]: Index analysis took 1640 ms [2018-12-08 16:56:05,085 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 1105 [2018-12-08 16:56:05,086 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:56:06,081 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:06,247 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:06,247 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:179, output treesize:175 [2018-12-08 16:56:06,673 WARN L180 SmtUtils]: Spent 167.00 ms on a formula simplification that was a NOOP. DAG size: 70 [2018-12-08 16:56:08,549 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 16:56:08,557 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 16:56:08,564 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 16:56:08,564 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:27 [2018-12-08 16:56:10,583 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= |c_#memory_$Pointer$.offset| (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base|) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv8 32)) .cse0))))) is different from true [2018-12-08 16:56:12,591 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base|) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv8 32)) .cse0))) |c_#memory_$Pointer$.offset|)) is different from true [2018-12-08 16:56:12,747 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:12,748 INFO L303 Elim1Store]: Index analysis took 153 ms [2018-12-08 16:56:12,749 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 170 treesize of output 158 [2018-12-08 16:56:12,873 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:12,930 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:12,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,271 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,570 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,729 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,783 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,887 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:13,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,033 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,135 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,184 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,238 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,499 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,543 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,599 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,765 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,930 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:14,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,036 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,091 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,248 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,407 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,462 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,708 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,809 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:15,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,250 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,302 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,352 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,511 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,676 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,769 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,823 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:16,968 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,073 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,126 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,176 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,222 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,544 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,588 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,698 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,752 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:17,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,074 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,124 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,280 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,495 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,799 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:18,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,057 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,207 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,259 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,314 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,771 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,825 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:19,982 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:20,028 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:20,081 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:20,082 INFO L683 Elim1Store]: detected equality via solver [2018-12-08 16:56:21,761 INFO L303 Elim1Store]: Index analysis took 9010 ms [2018-12-08 16:56:21,977 INFO L478 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 158 treesize of output 1177 [2018-12-08 16:56:22,064 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,113 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,317 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,345 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,542 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,567 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,588 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,741 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,811 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,942 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,964 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:22,987 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,008 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,030 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,074 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,235 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,256 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,370 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,466 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,559 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,579 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,677 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,701 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,746 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,772 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,798 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,891 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,957 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:23,980 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,004 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,024 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,046 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,070 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,091 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,113 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,254 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,278 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,301 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,322 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,383 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,407 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,550 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,594 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,619 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,709 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,733 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,777 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,823 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:24,871 INFO L303 Elim1Store]: Index analysis took 2863 ms [2018-12-08 16:56:24,873 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1092 treesize of output 1092 [2018-12-08 16:56:25,636 WARN L180 SmtUtils]: Spent 759.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 77 [2018-12-08 16:56:25,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,668 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,675 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,684 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,693 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,702 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,719 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,729 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,739 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,749 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,759 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,768 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,786 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,795 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,804 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,811 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,859 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,904 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,948 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:25,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,019 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,026 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,033 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,055 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,062 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,083 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,092 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,116 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,124 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,139 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,170 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,210 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,224 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,248 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,265 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,273 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,281 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,303 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,311 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,336 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,341 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,347 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,363 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,370 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,387 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,426 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,486 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,495 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:26,523 INFO L303 Elim1Store]: Index analysis took 884 ms [2018-12-08 16:56:26,524 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 1096 [2018-12-08 16:56:26,525 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-08 16:56:26,921 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:28,271 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,353 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,379 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,468 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,495 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,550 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,622 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,676 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,704 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,787 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,814 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,939 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:28,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,064 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,089 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,117 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,229 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,253 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,279 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,363 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,516 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,545 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,598 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,701 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,832 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,887 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:29,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,066 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,091 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,118 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,234 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,264 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,285 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,340 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,363 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,531 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,556 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,581 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,633 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,706 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,735 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,763 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,789 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,814 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,924 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:30,980 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,008 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,037 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,062 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,085 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,112 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,302 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,484 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,511 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,536 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,564 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,697 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,724 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:31,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:32,763 INFO L303 Elim1Store]: Index analysis took 4553 ms [2018-12-08 16:56:32,847 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 155 treesize of output 1164 [2018-12-08 16:56:34,624 WARN L180 SmtUtils]: Spent 1.77 s on a formula simplification. DAG size of input: 166 DAG size of output: 119 [2018-12-08 16:56:34,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,668 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,678 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,696 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,704 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,713 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,720 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,739 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,747 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,774 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,783 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,793 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,811 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,821 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,837 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,890 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,935 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,968 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,977 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:34,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,008 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,034 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,052 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,061 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,070 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,084 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,092 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,100 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,110 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,128 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,222 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,239 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,247 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,256 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,266 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,282 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,291 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,353 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,380 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,387 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,405 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,446 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,462 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,484 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,504 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,522 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,530 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,540 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,550 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,559 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,568 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,586 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,594 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,629 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,645 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:35,906 INFO L303 Elim1Store]: Index analysis took 1280 ms [2018-12-08 16:56:35,908 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 133 treesize of output 1092 [2018-12-08 16:56:35,909 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-08 16:56:36,498 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,507 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,516 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,525 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,544 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,552 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,559 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,568 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,584 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,665 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,697 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,704 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,713 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,722 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,731 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,750 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,759 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,768 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,778 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,787 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,794 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,803 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,811 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,820 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,904 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,939 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,948 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,957 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,977 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:36,991 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,000 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,009 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,019 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,029 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,038 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,056 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,065 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,081 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,088 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,098 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,107 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,117 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,127 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,186 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,204 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,222 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,233 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,242 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,276 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,286 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,304 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,323 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,332 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,358 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,428 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,462 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,470 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,479 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,497 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,515 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,523 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,532 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,541 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:37,778 INFO L303 Elim1Store]: Index analysis took 1296 ms [2018-12-08 16:56:37,779 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 1062 [2018-12-08 16:56:37,780 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-08 16:56:38,248 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-08 16:56:38,393 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-08 16:56:38,461 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:38,512 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:38,512 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 2 variables, input treesize:173, output treesize:141 [2018-12-08 16:56:41,582 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 124 [2018-12-08 16:56:41,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,588 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,588 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,594 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,596 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,597 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,597 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,598 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,599 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,605 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,608 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,612 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,614 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,615 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,615 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,619 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,622 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,622 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,624 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,627 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,627 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,629 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,633 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,636 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,638 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,638 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,645 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,647 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,657 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,657 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,665 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,665 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,666 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,667 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,668 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,668 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,671 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,675 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,676 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,677 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,677 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:41,692 INFO L303 Elim1Store]: Index analysis took 108 ms [2018-12-08 16:56:41,695 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 1068 [2018-12-08 16:56:41,698 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:56:42,045 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:42,094 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:42,094 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:160, output treesize:141 [2018-12-08 16:56:44,653 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 125 treesize of output 92 [2018-12-08 16:56:44,885 INFO L303 Elim1Store]: Index analysis took 230 ms [2018-12-08 16:56:44,886 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 110 [2018-12-08 16:56:44,886 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:56:44,913 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:44,938 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:44,938 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:125, output treesize:110 [2018-12-08 16:56:47,050 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 81 [2018-12-08 16:56:47,126 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 16 select indices, 16 select index equivalence classes, 105 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 15 case distinctions, treesize of input 81 treesize of output 121 [2018-12-08 16:56:47,127 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-12-08 16:56:47,127 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-12-08 16:56:47,181 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-08 16:56:47,230 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-08 16:56:47,230 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:113, output treesize:130 [2018-12-08 16:56:48,168 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 16:56:48,168 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 16:56:50,308 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 16:56:50,310 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 16:56:50,311 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 16:56:50,311 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:10 [2018-12-08 16:56:50,610 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 16:56:50,610 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 16:56:50,618 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:56:50,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 16:56:50,683 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 16:56:51,435 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-08 16:56:51,437 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-08 16:56:51,437 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:56:51,439 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:51,442 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:51,442 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-12-08 16:56:52,820 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 16:56:52,825 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 16:56:52,844 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 16:56:52,844 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:38 [2018-12-08 16:56:55,332 WARN L180 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 22 [2018-12-08 16:56:55,343 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 31 [2018-12-08 16:56:55,347 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:55,350 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 41 [2018-12-08 16:56:55,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:55,356 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:55,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:56:55,362 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 45 [2018-12-08 16:56:55,362 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-08 16:56:55,371 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:55,378 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:55,394 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:56:55,394 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:58, output treesize:22 [2018-12-08 16:57:00,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:57:00,045 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 38 [2018-12-08 16:57:00,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 16:57:00,048 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 9 [2018-12-08 16:57:00,048 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:57:00,050 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:57:00,054 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:57:00,055 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:13 [2018-12-08 16:57:03,795 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-12-08 16:57:03,797 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 5 [2018-12-08 16:57:03,797 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 16:57:03,799 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:57:03,800 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 16:57:03,800 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:5 [2018-12-08 16:57:04,085 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 16:57:04,085 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 16:57:04,102 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 16:57:04,102 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [40] imperfect sequences [61] total 97 [2018-12-08 16:57:04,102 INFO L459 AbstractCegarLoop]: Interpolant automaton has 97 states [2018-12-08 16:57:04,102 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2018-12-08 16:57:04,104 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=295, Invalid=10631, Unknown=2, NotChecked=414, Total=11342 [2018-12-08 16:57:04,104 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 97 states. [2018-12-08 16:57:57,597 WARN L180 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 29 [2018-12-08 16:58:03,037 WARN L180 SmtUtils]: Spent 4.11 s on a formula simplification. DAG size of input: 38 DAG size of output: 31 [2018-12-08 16:58:08,061 WARN L180 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 32 [2018-12-08 16:58:16,163 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification that was a NOOP. DAG size: 128 [2018-12-08 16:58:36,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 16:58:36,501 INFO L93 Difference]: Finished difference Result 112 states and 112 transitions. [2018-12-08 16:58:36,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-12-08 16:58:36,502 INFO L78 Accepts]: Start accepts. Automaton has 97 states. Word has length 112 [2018-12-08 16:58:36,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 16:58:36,503 INFO L225 Difference]: With dead ends: 112 [2018-12-08 16:58:36,503 INFO L226 Difference]: Without dead ends: 112 [2018-12-08 16:58:36,505 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 278 GetRequests, 131 SyntacticMatches, 1 SemanticMatches, 146 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 3132 ImplicationChecksByTransitivity, 53.4s TimeCoverageRelationStatistics Valid=677, Invalid=20499, Unknown=2, NotChecked=578, Total=21756 [2018-12-08 16:58:36,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-12-08 16:58:36,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-12-08 16:58:36,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-12-08 16:58:36,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 112 transitions. [2018-12-08 16:58:36,507 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 112 transitions. Word has length 112 [2018-12-08 16:58:36,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 16:58:36,507 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 112 transitions. [2018-12-08 16:58:36,507 INFO L481 AbstractCegarLoop]: Interpolant automaton has 97 states. [2018-12-08 16:58:36,507 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 112 transitions. [2018-12-08 16:58:36,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-08 16:58:36,512 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 16:58:36,512 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 16:58:36,512 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-08 16:58:36,514 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 16:58:36,514 INFO L82 PathProgramCache]: Analyzing trace with hash 425919928, now seen corresponding path program 1 times [2018-12-08 16:58:36,514 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 16:58:36,514 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6e83885c-124c-4cb4-b7d3-391a94203bd8/bin-2019/uautomizer/cvc4 Starting monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 16:58:36,528 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 16:58:40,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 16:58:45,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 16:58:45,459 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-08 16:58:45,469 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-12-08 16:58:45,475 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-08 16:58:45,478 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-08 16:58:45,479 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-08 16:58:45,489 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.12 04:58:45 BoogieIcfgContainer [2018-12-08 16:58:45,489 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-08 16:58:45,489 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-08 16:58:45,489 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-08 16:58:45,489 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-08 16:58:45,490 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 04:55:30" (3/4) ... [2018-12-08 16:58:45,493 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-08 16:58:45,493 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-08 16:58:45,494 INFO L168 Benchmark]: Toolchain (without parser) took 196210.31 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 276.3 MB). Free memory was 936.7 MB in the beginning and 1.2 GB in the end (delta: -276.2 MB). Peak memory consumption was 75.6 kB. Max. memory is 11.5 GB. [2018-12-08 16:58:45,494 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 16:58:45,494 INFO L168 Benchmark]: CACSL2BoogieTranslator took 337.68 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 152.0 MB). Free memory was 936.7 MB in the beginning and 1.1 GB in the end (delta: -182.5 MB). Peak memory consumption was 37.6 MB. Max. memory is 11.5 GB. [2018-12-08 16:58:45,494 INFO L168 Benchmark]: Boogie Preprocessor took 43.68 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 16:58:45,494 INFO L168 Benchmark]: RCFGBuilder took 737.82 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 113.7 MB). Peak memory consumption was 113.7 MB. Max. memory is 11.5 GB. [2018-12-08 16:58:45,495 INFO L168 Benchmark]: TraceAbstraction took 195084.23 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 124.3 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -207.5 MB). There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 16:58:45,495 INFO L168 Benchmark]: Witness Printer took 3.92 ms. Allocated memory is still 1.3 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 16:58:45,496 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 337.68 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 152.0 MB). Free memory was 936.7 MB in the beginning and 1.1 GB in the end (delta: -182.5 MB). Peak memory consumption was 37.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 43.68 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 737.82 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 113.7 MB). Peak memory consumption was 113.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 195084.23 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 124.3 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -207.5 MB). There was no memory consumed. Max. memory is 11.5 GB. * Witness Printer took 3.92 ms. Allocated memory is still 1.3 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1443]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1443. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={-1:0}] [L1444] CALL entry_point() VAL [ldv_global_msg_list={-1:0}] [L1436] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1437] CALL, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}] [L1406] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16, ldv_global_msg_list={-1:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=16, \result={1082401:0}, ldv_global_msg_list={-1:0}, malloc(size)={1082401:0}, size=16] [L1408] RET, EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_global_msg_list={-1:0}, ldv_malloc(sizeof(*kobj))={1082401:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}, memset(kobj, 0, sizeof(*kobj))={1082401:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1294] ((&kref->refcount)->counter) = (1) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1382] RET ldv_kref_init(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [ldv_global_msg_list={-1:0}, list={1082401:4}] [L1099] list->next = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1100] list->prev = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1383] RET LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] RET ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1413] RET ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1414] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1437] RET, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}, ldv_kobject_create()={1082401:0}] [L1437] kobj = ldv_kobject_create() [L1438] CALL ldv_kobject_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1255] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1256] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1258] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1259] return temp; VAL [\old(i)=1, \result=2, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={1082401:12}, kref={1082401:12}, ldv_atomic_add_return(1, (&kref->refcount))=2, ldv_global_msg_list={-1:0}] [L1374] RET ldv_kref_get(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1375] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1438] RET ldv_kobject_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kobject_get(kobj)={1082401:0}] [L1440] CALL ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1264] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1265] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1267] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1268] return temp; VAL [\old(i)=1, \result=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1281] RET, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={1082401:12}, kref={1082401:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] return 0; VAL [\old(count)=1, \result=0, count=1, kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1313] RET, EXPR ldv_kref_sub(kref, 1, release) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] return ldv_kref_sub(kref, 1, release); [L1363] RET ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1440] RET ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1444] RET entry_point() VAL [ldv_global_msg_list={-1:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 43 procedures, 310 locations, 67 error locations. UNSAFE Result, 195.0s OverallTime, 27 OverallIterations, 16 TraceHistogramMax, 108.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3053 SDtfs, 1375 SDslu, 22161 SDs, 0 SdLazy, 15667 SolverSat, 405 SolverUnsat, 7 SolverUnknown, 0 SolverNotchecked, 79.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1784 GetRequests, 1272 SyntacticMatches, 42 SemanticMatches, 470 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 3568 ImplicationChecksByTransitivity, 58.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=170occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 26 MinimizatonAttempts, 98 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 6.7s SatisfiabilityAnalysisTime, 74.2s InterpolantComputationTime, 1678 NumberOfCodeBlocks, 1648 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 1653 ConstructedInterpolants, 324 QuantifiedInterpolants, 1218241 SizeOfPredicates, 226 NumberOfNonLiveVariables, 6317 ConjunctsInSsa, 645 ConjunctsInUnsatCore, 30 InterpolantComputations, 23 PerfectInterpolantSequences, 1833/2101 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...